JP5329865B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP5329865B2
JP5329865B2 JP2008198477A JP2008198477A JP5329865B2 JP 5329865 B2 JP5329865 B2 JP 5329865B2 JP 2008198477 A JP2008198477 A JP 2008198477A JP 2008198477 A JP2008198477 A JP 2008198477A JP 5329865 B2 JP5329865 B2 JP 5329865B2
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fin
region
type impurity
type
conductivity type
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Japanese (ja)
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JP2010040571A (ja
JP2010040571A5 (enExample
Inventor
雄一朗 佐々木
圭一 中本
勝己 岡下
久隆 金田
文二 水野
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Priority to JP2008198477A priority Critical patent/JP5329865B2/ja
Priority to US12/512,617 priority patent/US8004045B2/en
Publication of JP2010040571A publication Critical patent/JP2010040571A/ja
Priority to US13/185,221 priority patent/US8536000B2/en
Publication of JP2010040571A5 publication Critical patent/JP2010040571A5/ja
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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2008198477A 2007-07-27 2008-07-31 半導体装置及びその製造方法 Active JP5329865B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008198477A JP5329865B2 (ja) 2008-07-31 2008-07-31 半導体装置及びその製造方法
US12/512,617 US8004045B2 (en) 2007-07-27 2009-07-30 Semiconductor device and method for producing the same
US13/185,221 US8536000B2 (en) 2007-07-27 2011-07-18 Method for producing a semiconductor device have fin-shaped semiconductor regions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008198477A JP5329865B2 (ja) 2008-07-31 2008-07-31 半導体装置及びその製造方法

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JP2010040571A JP2010040571A (ja) 2010-02-18
JP2010040571A5 JP2010040571A5 (enExample) 2011-08-11
JP5329865B2 true JP5329865B2 (ja) 2013-10-30

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8778603B2 (en) * 2010-03-15 2014-07-15 Varian Semiconductor Equipment Associates, Inc. Method and system for modifying substrate relief features using ion implantation
JP2015213183A (ja) * 2015-06-25 2015-11-26 インテル・コーポレーション 非プレーナ型トランジスタのフィン製造
JP7117354B2 (ja) * 2020-09-14 2022-08-12 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置、およびプログラム

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101177867B1 (ko) * 2005-05-12 2012-08-28 파나소닉 주식회사 플라즈마 도핑 방법 및 플라즈마 도핑 장치
KR101172853B1 (ko) * 2005-07-22 2012-08-10 삼성전자주식회사 반도체 소자의 형성 방법
US7494862B2 (en) * 2006-09-29 2009-02-24 Intel Corporation Methods for uniform doping of non-planar transistor structures
JPWO2008050596A1 (ja) * 2006-10-25 2010-02-25 パナソニック株式会社 プラズマドーピング方法及びプラズマドーピング装置

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