JP5329784B2 - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve throughput by providing a manufacturing technique for reducing the number of photolithographic steps using a photoresist and simplifying a manufacturing process of a semiconductor device. <P>SOLUTION: An etching mask for forming a pattern of a processing target layer such as a conductive layer and a semiconductor layer is produced without using a lithographic technique employing a photoresist. The etching mask consists of a light-absorbing layer made of a material absorbing a laser beam. The light-absorbing layer is irradiated with a laser beam via the photomask, and a mask is formed while utilizing laser ablation based on the energy of the laser beam absorbed by the light-absorbing layer. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device. In particular, the present invention relates to a method of forming a pattern such as a conductive layer or a semiconductor layer.

  2. Description of the Related Art Conventionally, MOS transistors, thin film transistors (hereinafter also referred to as TFTs), and semiconductor devices having them are manufactured using a lithography technique as appropriate by forming a large number of thin films such as an insulating layer and a conductive layer on a substrate. Lithography technology is a technology that uses light to transfer a circuit pattern, etc., formed of a light-shielding material on a transparent flat plate called a photomask to a target object, such as a semiconductor integrated circuit. It is widely used in the manufacturing process.

  However, a manufacturing process using a lithography technique requires a multi-step process such as resist coating using a photosensitive resin called a photoresist, pattern exposure, development, etching using a resist as a mask, and resist removal. Accordingly, the throughput decreases as the number of lithography processes increases.

  For example, the present applicant has proposed a technique for processing a linear pattern without using the photoresist described in Patent Document 1. Patent Document 1 describes a technique for forming a pattern by irradiating a transparent conductive film (ITO) linearly with an excimer laser to form a linear groove.

In addition, Patent Document 2 uses a resist containing an aliphatic polyester, selectively exposes ultraviolet rays to remove the resist in the ultraviolet irradiation region, thereby eliminating the development step with a developer, and performing a lithography step. A technique to simplify is described.
JP-A 63-84789 JP 2005-099500 A

  It is an object of the present invention to reduce the number of lithography processes and improve throughput in a semiconductor device manufacturing process.

  It is another object of the present invention to provide a pattern forming technique that can be applied to a large-area substrate in a semiconductor device manufacturing process.

  The present invention is characterized in that a mask for patterning layers such as a semiconductor layer, a wiring layer, and an electrode layer is formed using laser ablation without using a photoresist. As in the present invention, a process for forming a pattern using laser ablation is also referred to as a laser ablation patterning process (LAPP). First, a light absorption layer is formed over a layer to be processed, and a mask made of the light absorption layer is formed by laser beam irradiation through a photomask. The layer to be processed is etched using the mask as an etching mask to form a layer having a desired pattern shape. By irradiating a laser beam through a photomask, even a large area can be selectively irradiated at a time. Therefore, it is possible to form a mask for processing a large area at a time.

  The light absorption layer is formed using a material that absorbs a laser beam. By irradiating the laser beam from the side of the light absorption layer formed on the layer to be processed, the laser beam is absorbed by the light absorption layer. The light absorption layer is heated by the energy of the absorbed laser beam, and is destroyed and removed in the irradiation region. Thus, the phenomenon in which the irradiated region is removed by the energy of the laser beam is called laser ablation.

  The laser beam is irradiated through a photomask. In the photomask, a desired pattern is formed by a region that transmits a laser beam and a region that shields light. In the present invention, since the laser beam is irradiated through the photomask, the laser beam that has passed through the transmission region of the photomask is absorbed by the light absorption layer. Therefore, the light absorption layer is laser ablated and removed corresponding to the pattern formed on the photomask.

  Next, the layer to be processed is etched using the remaining light absorption layer as a mask. The layer to be processed remains corresponding to the light absorption layer used as a mask. Therefore, a pattern corresponding to the photomask is formed on the layer to be processed. After the layer to be processed is processed into a desired shape, the light absorption layer used as a mask may be removed as necessary.

  The layer to be processed is formed using a conductive material or a semiconductor material. By using laser ablation, a conductive layer or a semiconductor layer can be formed without using a lithography process using a photoresist.

  One aspect of the present invention is to form a work layer, form a light absorption layer on the work layer, and irradiate the light absorption layer with a laser beam through a photomask to remove an irradiation region of the light absorption layer. Then, the layer to be processed is etched using the remaining light absorption layer as a mask.

  One aspect of the present invention is to form a work layer, form a light absorption layer on the work layer, and irradiate the light absorption layer with a laser beam through a photomask to remove an irradiation region of the light absorption layer. Then, the layer to be processed is etched using the remaining light absorption layer as a mask to form a layer having a tapered shape.

  In addition, the layer having a tapered shape is formed by wet etching or etching in which dry etching and wet etching are combined.

  One aspect of the present invention is to form a work layer, form a light absorption layer on the work layer, and irradiate the light absorption layer with a laser beam through a photomask to remove an irradiation region of the light absorption layer. Then, the layer to be processed is etched using the remaining light absorption layer as a mask to form a layer having a vertical shape.

  The layer having a vertical shape is formed by etching using a dry etching method.

  In one embodiment of the present invention, a layer to be processed is formed using a conductive material or a semiconductor material.

  In one embodiment of the present invention, a light absorption layer is formed using a material that absorbs a laser beam.

  In one embodiment of the present invention, the light absorption layer is formed using a conductive material, a semiconductor material, or an insulating material.

  According to another aspect of the present invention, at least one element of chromium (Cr), molybdenum (Mo), nickel (Ni), titanium (Ti), cobalt (Co), copper (Cu), and aluminum (Al) is added. A light absorption layer is formed using the same.

  One embodiment of the present invention uses a photomask in which a pattern is formed by a region through which a laser beam is transmitted and a region through which the laser beam is shielded.

  In the present invention, a mask formed of a light absorption layer can be manufactured by irradiating a laser beam through a photomask. By using the mask, a semiconductor layer, a conductive layer, or the like can be processed into a desired shape.

  By applying the present invention, a lithography process when manufacturing a semiconductor device can be reduced, and throughput can be improved.

  Further, by applying the present invention, a conductive layer functioning as a wiring, an electrode, or the like, a semiconductor layer, or the like can be formed over a large-area substrate, so that throughput can be improved.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals may be used in common in different drawings.

(Embodiment 1)
The present invention is characterized in that a layer such as a conductive layer or a semiconductor layer having a desired shape is formed without using a lithography technique using a photoresist. A layer processed by applying the present invention is also referred to as a layer to be processed. In this embodiment mode, for example, a wiring layer, a gate electrode layer, a source electrode layer, a conductive layer such as a drain electrode layer, a semiconductor layer, and the like that form a transistor or the like are processed.

  One mode of a method for manufacturing a layer to be processed to which the present invention is applied will be described with reference to FIGS.

  First, a substrate 100 on which a layer to be processed 102 and a light absorption layer 104 are sequentially stacked is prepared. Then, the laser beam 114 is irradiated from the light absorption layer 104 side through the photomask 108 (see FIG. 1A).

  As the substrate 100, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a semiconductor substrate, or the like is used. Note that a base insulating layer can also be formed over the substrate 100. In that case, the base insulating layer is formed using an insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), or silicon nitride oxide (SiNxOy) (x> y). What is necessary is just to form.

  The workpiece layer 102 is formed using a material in accordance with the purpose. For example, when a conductive layer functioning as an electrode or a wiring is to be formed as the work layer 102, the conductive layer is formed using a conductive material. As the conductive material, silver (Ag), gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), tantalum (Ta), tungsten (W), An element selected from titanium (Ti), molybdenum (Mo), aluminum (Al), and copper (Cu), or an alloy material or a compound material containing the element as a main component can be used. The processed layer 102 can be formed using a single layer structure or a stacked layer structure using these conductive materials by a sputtering method, a CVD method, or the like.

  In the case where a semiconductor layer for forming a channel or the like is to be formed as the layer to be processed 102, a semiconductor material is used. As the semiconductor material, silicon, silicon germanium, or the like can be used. Further, the processed layer 102 may be an amorphous semiconductor layer or a crystalline semiconductor layer. The processed layer 102 can be formed using a single layer structure or a stacked layer structure using these semiconductor materials by a sputtering method, a CVD method, or the like.

  The light absorption layer 104 is formed using a material that can absorb a laser beam. The light absorption layer 104 is preferably made of a material having a boiling point or a sublimation point lower than the melting point of the lower layer 102 to be processed. For example, the light absorption layer 104 can be formed using a conductive material, a semiconductor material, or an insulating material. Specifically, any one of chromium (Cr), molybdenum (Mo), nickel (Ni), titanium (Ti), cobalt (Co), copper (Cu), and aluminum (Al), or the element A conductive material such as an alloy material or a compound as a main component can be used. As the compound containing the element as a main component, a nitrogen compound, an oxygen compound, a carbon compound, a halogen compound, or the like can be used. For example, aluminum nitride, tungsten nitride, tantalum nitride, or the like can be used. In addition, silicon, germanium, silicon germanium, molybdenum oxide, tin oxide, bismuth oxide, vanadium oxide, nickel oxide, zinc oxide, gallium arsenide, gallium nitride, indium oxide, indium phosphide, indium nitride, cadmium sulfide, cadmium telluride A semiconductor material such as strontium titanate can be used. Alternatively, an organic resin material such as polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene, or an insulating material such as siloxane or polysilazane can be used. Further, zinc sulfide, silicon nitride, mercury sulfide, aluminum chloride, or the like can be used. The light absorption layer 104 can be formed with a single layer structure or a stacked layer structure using the above-described materials by a vapor deposition method, a sputtering method, a CVD method, or the like. In the case where the light absorption layer 104 is formed using an insulating material, it can be formed by a coating method. Further, hydrogen or an inert gas (a rare gas such as helium (He), argon (Ar), krypton (Kr), neon (Ne), or xenon (Xe)) can be added to the light absorption layer 104. By adding hydrogen or an inert gas to the light absorption layer 104, when the laser beam is irradiated later, gas emission in the light absorption layer 104 or evaporation of the light absorption layer 104 can be easily caused.

  The photomask 108 includes a region 110 that transmits a laser beam (hereinafter also referred to as a transmission region) 110 and a region 112 that shields the laser beam (hereinafter also referred to as a light shielding region). A desired pattern is formed. For example, in the photomask 108, a desired pattern is formed on a light-transmitting substrate surface using a light-blocking material. Note that the material forming the light shielding region 112 needs to be a material that has excellent light shielding properties and is resistant to the energy of the laser beam 114. For example, when an excimer laser is used for the laser beam 114, tungsten, molybdenum, or aluminum can be used.

  As the laser beam 114, one having energy absorbed by the light absorption layer 104 is appropriately selected. Typically, a laser beam in an ultraviolet region, a visible region, or an infrared region can be appropriately selected and irradiated.

Laser oscillators that can oscillate such a laser beam include excimer laser oscillators such as KrF, ArF, and XeCl, gas laser oscillators such as He, He—Cd, Ar, He—Ne, and HF, and single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , Nd, Yb, A solid laser oscillator or a semiconductor laser oscillator such as GaN, GaAs, GaAlAs, or InGaAsP using one or more of Cr, Ti, Ho, Er, Tm, and Ta as a medium can be used. In the solid-state laser oscillator, it is preferable to select and use the fifth harmonic from the fundamental wave as appropriate.

As the laser beam 114, a continuous wave laser beam or a pulsed laser beam can be used as appropriate. In a pulsed laser beam, an oscillation frequency of several tens to several kilohertz is normally used, but an oscillation frequency of 10 MHz or higher and a pulse width in the picosecond range or a femtosecond ( ^10-15 seconds), which is significantly higher than that. A pulsed laser capable of obtaining a single laser beam may be used.

  As the cross-sectional shape of the laser beam 114, a circular shape, an elliptical shape, a rectangular shape, or a linear shape (strictly, an elongated rectangular shape) may be used as appropriate. The laser beam 114 is preferably processed by an optical system so as to have such a cross-sectional shape.

  Further, it is preferable that the energy of the laser beam 114 be sufficient to cause gas emission in the light absorption layer 104 or evaporation of the light absorption layer 104.

  In FIG. 1A, a laser beam 114 passes through the transmission region 110 of the photomask 108 and is absorbed by the light absorption layer 104. The light absorption layer 104 is removed by laser ablation in a region where the laser beam 114 has reached (hereinafter also referred to as an irradiation region) (see FIG. 1B). The remaining light absorption layer 104 is separated into a light absorption layer 116a, a light absorption layer 116b, a light absorption layer 116c, and a light absorption layer 116d. The remaining light absorption layers 116a to 116d function as an etching mask when the processed layer 102 is etched. Further, the pattern of the remaining light absorption layers 116a to 116d corresponds to the pattern formed on the photomask 108, specifically, the pattern formed by the light shielding region 112.

  The laser ablation that occurs here indicates that the irradiation region of the light absorption layer 104 is evaporated and removed (or scattered) by the energy of the laser beam 114 absorbed by the light absorption layer 104.

  As described above, since the etching mask is formed using laser ablation, the resist coating process and the developing process using the developer in the lithography process using the photoresist can be omitted. Therefore, loss of materials such as a photoresist material and a developer can be prevented. Further, it is not necessary to rotate the substrate, and it is easy to apply to a large area substrate. Further, since the laser beam is irradiated through the photomask, even a large area can be selectively irradiated at a time. As a result, a mask pattern can be formed on a large area at a time.

  In a normal lithography process, a mask pattern for etching a layer to be processed is a resist coating, pattern exposure, development, etching, resist stripping, etc., using an exposure apparatus having a complicated optical system such as a stepper. After forming. On the other hand, since the present invention forms a mask pattern using laser ablation, an apparatus for resist application, development, resist stripping, etc. is not required. By applying the present invention, maintenance of an apparatus for forming a pattern can be facilitated.

In addition, after irradiation with the laser beam 114, a gas such as N ₂ or air may be injected to the irradiation side of the laser beam 114 of the substrate 100. Further, the substrate 100 may be cleaned using a liquid which is a non-reactive substance such as water. In this way, dust, residue, and the like resulting from ablation can be reduced by jetting gas or washing with liquid.

  Next, the processed layer 102 is etched using the remaining light absorption layers 116a to 116d as a mask to form the processed layer 120a, the processed layer 120b, the processed layer 120c, and the processed layer 120d (FIG. 1C )reference). The processed layers 120a to 120d have a desired pattern shape, and form a conductive layer functioning as a wiring, an electrode, or the like, or a semiconductor layer. The pattern shape formed by the layers to be processed 120 a to 120 d corresponds to the pattern formed on the photomask 108. Specifically, this corresponds to the pattern of the light shielding region 112 formed on the photomask 108. The remaining light absorption layers 116a to 116d function as an etching mask.

  The processed layer 102 is subjected to anisotropic etching or isotropic etching to form processed layers 120a to 120d. Etching may be performed by dry etching, wet etching, or a combination of dry etching and wet etching.

  In general, when a wet etching method is used, an etching processed product (processed layers 120a to 120d in this embodiment) has an isotropic shape. Therefore, the wet etching method is applied to isotropic etching. On the other hand, the dry etching method includes a chemical etching element in which etching proceeds by a chemical reaction and a physical etching element in which etching proceeds physically by a sputtering effect or the like. Chemical etching shows isotropic property and physical etching shows anisotropy, and the ratio of both changes depending on the configuration of the apparatus. The dry etching method can be applied to both etching because anisotropic etching or isotropic etching can be performed depending on the ratio of the chemical etching element and the physical etching element.

In the case of using a dry etching method, an etching gas is a gas that can take a high selection ratio between the layer to be processed 102 and the light absorption layers 116a to 116d. For example, a fluorine or chlorine gas such as CF ₄ , CHF ₃ , NF ₃ , Cl ₂ , or BCl ₃ can be used. Further, an inert gas such as He or argon, an O ₂ gas, or the like may be appropriately added to the etching gas. For example, in the case where the layer to be processed 102 is formed using tungsten and the light absorption layers 116a to 116d are formed using chromium, a mixed gas of CF ₄ , Cl _2, and O ₂ can be used as an etching gas.

  Note that when the dry etching method is used, the uppermost layer portion, that is, the upper layer portion of the light absorption layers 116a to 116d in this case, is also etched, and the film thickness may be reduced (referred to as film reduction).

  In the case of using the wet etching method, a solution that can obtain a high selection ratio between the layer 102 to be processed and the light absorption layers 116a to 116d is used as the etching solution. For example, an acidic solution such as hydrofluoric acid, phosphoric acid, nitric acid, acetic acid, or sulfuric acid, or an alkaline solution such as potassium hydroxide, hydrazine, or ethylenediamine can be used. Moreover, you may add a pure water and a buffering agent suitably to etching solution. For example, when the layer to be processed 102 is formed using molybdenum and the light absorption layer 104 is formed using chromium, phosphoric acid, acetic acid, nitric acid, and pure water are used as an etchant in a volume ratio of 85: 5: 5: 5. A mixed acid (hereinafter, also referred to as mixed acid aluminum liquid) can be used. In the case where the layer to be processed 102 is formed using tungsten, a solution in which 28 wt% ammonia, 31 wt% hydrogen peroxide water, and pure water are mixed at a volume ratio of 3: 5: 2 (this specification) In the following, it is also possible to use ammonium perhydrate). For example, tungsten (W) has an etching rate of about 24 nm / min with respect to ammonium perhydrate. Tungsten nitride has an etching rate of about 250 nm / min with respect to ammonium perhydrate.

  FIG. 1C illustrates an example in which a part of the processing layer 102 is removed by anisotropic etching to form the processing layers 120a to 120d. The side surfaces (side walls) of the processed layers 120a to 120d etched by anisotropic etching have a vertical shape.

  2A shows an example in which a part of the processing layer 102 is removed by isotropic etching to form a processing layer 220a, a processing layer 220b, a processing layer 220c, and a processing layer 220d. Show. The process up to the step of forming the light absorption layers 116a to 116d to be etching masks is the same as that in FIG. The side surfaces (side walls) of the processed layers 220a to 220d etched by isotropic etching have a tapered shape.

  Note that when a mask made of a light absorption layer is formed by laser ablation, there is a concern about an influence on a layer to be processed which is a lower layer. However, the layer to be processed located below the laser beam irradiation region is not particularly problematic because it is removed during etching.

Next, the light absorption layers 116a to 116d are removed (see FIGS. 1D and 2B). The light absorption layers 116a to 116d may be appropriately selected from a method of removing by etching using a dry etching method or a wet etching method, or a method of removing by laser ablation by irradiating a laser beam. Furthermore, if removed by laser ablation, the laser beam irradiation side, N _2, injection or gas such as air, may be performed such as cleaning with liquid. As described above, the processed layers 120a to 120d constituting a desired pattern shape can be obtained.

  In addition, by applying the present invention, a conductive layer formed over a wiring substrate or a conductive layer functioning as an antenna used for an RF tag or the like can be formed.

  By applying the present invention, a layer having a desired pattern shape can be formed without using a lithography process using a photoresist. Accordingly, since the lithography process is simplified, the throughput can be improved.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, a large number of patterns can be formed in a short time, and mass productivity can be improved.

(Embodiment 2)
In this embodiment, a method for manufacturing a plurality of conductive layers functioning as a gate electrode layer and a wiring layer by applying the present invention will be described with reference to FIGS.

  First, a substrate 400 in which a conductive layer 402 and a light absorption layer 404 are sequentially stacked is prepared. Then, the laser beam 414 is irradiated from the light absorption layer 404 side through the photomask 408 (see FIG. 4A1).

  As the substrate 400, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a semiconductor substrate, or the like may be used. Note that a base insulating layer may be formed over the substrate 400 using an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide.

  The conductive layer 402 includes silver (Ag), gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), tantalum (Ta), tungsten (W), It is formed using an element selected from titanium (Ti), molybdenum (Mo), aluminum (Al), and copper (Cu), or a conductive material such as an alloy material or a compound material containing the element as a main component. The conductive layer 402 may have a single-layer structure or a stacked structure. For example, a single layer structure of a tungsten layer, a tantalum nitride layer, a tungsten layer or a tungsten nitride layer, a two-layer structure in which a molybdenum layer is stacked, a three-layer structure in which a molybdenum layer, an aluminum layer, or a molybdenum layer is stacked Can do.

  The conductive layer 402 is formed by a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), or a CVD method (Chemical Vapor Deposition) such as a plasma CVD method.

  The light absorption layer 404 is formed using a material that can absorb the laser beam 414. The light absorption layer 404 is preferably formed using a material whose boiling point or sublimation point is lower than the melting point of the lower conductive layer 402. For example, the light absorption layer 404 can be formed using a conductive material, a semiconductor material, or an insulating material. The light absorption layer 404 can be formed using an element such as Cr, Mo, Ni, Ti, Co, Cu, or Al, or a conductive material such as an alloy material or a compound containing the element as a main component. As the compound, a nitrogen compound, an oxygen compound, a carbon compound, a halogen compound, or the like can be used. For example, aluminum nitride, tungsten nitride, tantalum nitride, or the like can be used. In addition, silicon, germanium, silicon germanium, molybdenum oxide, tin oxide, bismuth oxide, vanadium oxide, nickel oxide, zinc oxide, gallium arsenide, gallium nitride, indium oxide, indium phosphide, indium nitride, cadmium sulfide, cadmium telluride A semiconductor material such as strontium titanate can be used. Alternatively, an organic resin material such as polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene, or an insulating material such as siloxane or polysilazane can be used. Further, zinc sulfide, silicon nitride, mercury sulfide, aluminum chloride, or the like can be used. The light absorption layer 404 may have a single layer structure or a stacked structure.

  The light absorption layer 404 is formed by an evaporation method, a sputtering method, a CVD method, or the like. In the case where the light absorption layer 404 is formed using an insulating material, it can be formed by a coating method. Further, hydrogen or an inert gas (a rare gas such as helium (He), argon (Ar), krypton (Kr), neon (Ne), or xenon (Xe)) may be added to the light absorption layer 404. By adding hydrogen or an inert gas to the light absorption layer 404, when the laser beam is irradiated later, gas emission in the light absorption layer 404 or evaporation of the light absorption layer 404 can be easily caused.

  The photomask 408 includes a transmission region 410 of the laser beam 414 and a light shielding region 412, and a desired pattern is formed by the transmission region 410 and the light shielding region 412. For example, the photomask 408 is formed by forming a desired pattern using a light-blocking material on a light-transmitting substrate surface. Note that a material that forms the light-blocking region 412 needs to be a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 414. For example, when an excimer laser is used, tungsten, molybdenum, or aluminum can be used.

  As the laser beam 414, one having energy absorbed by the light absorption layer 404 may be selected as appropriate, and typically, a laser beam in the ultraviolet region, the visible region, or the infrared region may be appropriately selected.

Laser oscillators that can oscillate such a laser beam include excimer laser oscillators such as KrF, ArF, and XeCl, gas laser oscillators such as He, He—Cd, Ar, He—Ne, and HF, and single crystal YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , Nd, Yb, A solid laser oscillator or a semiconductor laser oscillator such as GaN, GaAs, GaAlAs, or InGaAsP using one or more of Cr, Ti, Ho, Er, Tm, and Ta as a medium can be used. In the solid-state laser oscillator, it is preferable to select and use the fifth harmonic from the fundamental wave as appropriate.

As the laser beam 414, a continuous wave laser beam or a pulsed laser beam can be used as appropriate. In a pulsed laser beam, an oscillation frequency of several tens to several kilohertz is normally used, but an oscillation frequency of 10 MHz or higher and a pulse width in the picosecond range or a femtosecond ( ^10-15 seconds), which is significantly higher than that. A pulsed laser capable of obtaining a single laser beam may be used.

  As the cross-sectional shape of the laser beam 414, a circular shape, an elliptical shape, a rectangular shape, or a linear shape (strictly, an elongated rectangular shape) may be used as appropriate, and it is preferable that the cross-sectional shape be processed with an optical system. Further, it is preferable that the energy of the laser beam 414 be such that gas is emitted from the light absorption layer 404 or the light absorption layer 404 is evaporated.

  FIG. 4A2 is a schematic view of the top surface of FIG. 4A1 corresponds to a cross-sectional view taken along the line OP in FIG. 4A2. Note that the photomask 408 and the laser beam 414 are omitted in the top view.

  In FIG. 4A 1, the laser beam 414 passes through the transmission region 410 of the photomask 408 and is absorbed by the light absorption layer 404. The light absorption layer 404 is removed by laser ablation in the irradiation region of the laser beam 414. Then, the light absorption layer 416a, the light absorption layer 416b, the light absorption layer 416c, and the light absorption layer 416d remain (see FIGS. 4B1 and 4B2). The pattern of the remaining light absorption layers 416 a to 416 d corresponds to the pattern formed on the photomask 408, specifically, the pattern formed by the light shielding region 412.

  The laser ablation that occurs here indicates that the irradiation region of the light absorption layer 404 is evaporated and removed (or scattered) by the energy of the laser beam 414 absorbed by the light absorption layer 404.

Further, after irradiation with the laser beam 414, a gas such as N ₂ or air may be injected to the irradiation side of the laser beam 414 of the substrate 400. Further, the substrate 400 may be cleaned using a liquid which is a non-reactive substance such as water. In this way, dust, residue, and the like resulting from ablation can be reduced by jetting gas or washing with liquid.

  Next, the conductive layer 402 is etched using the light absorption layers 416a to 416d as a mask to form a conductive layer 420a, a conductive layer 420b, a conductive layer 420c, and a conductive layer 420d (see FIGS. 4C1 and 4C2). ). The pattern formed by the conductive layers 420 a to 420 d corresponds to the pattern formed on the photomask 408.

  The conductive layers 420a to 420d can be formed by anisotropic etching or isotropic etching of the conductive layer 402 using the light absorption layers 416a to 416d as an etching mask. Etching may be performed by appropriately selecting an etching method, an etching gas, an etching solution, or the like under a condition that a high selection ratio between the conductive layer 402 and the light absorption layers 416a to 416d can be obtained.

In this embodiment mode, anisotropic etching is performed to form conductive layers 420a to 420d whose side surfaces have a vertical shape (see FIG. 4C1). A dry etching method can be used for the anisotropic etching. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , CHF ₃ , NF ₃ , Cl ₂ , or BCl ₃ can be used. Further, an inert gas such as He or Ar, an O ₂ gas, or the like may be appropriately added to the etching gas.

After the anisotropic etching, isotropic etching may be performed subsequently to form a conductive layer having a tapered shape on the side surface (side wall) (see FIG. 34). For example, the conductive layers 420a to 420d whose side surfaces are vertical are formed by dry etching (see FIG. 34A), and then the conductive layers 422a, 422b, and 422c whose side surfaces are tapered are formed by wet etching. A conductive layer 422d is formed (see FIG. 34B). When the etching solution flows under the light absorption layers 416a to 416d serving as masks by the wet etching method, tapered shapes are formed on the side surfaces of the conductive layers 420a to 420d. As a result, conductive layers 422a to 422d as shown in FIG. 34C can be formed. As an etchant used for wet etching, an acidic solution such as HF, H ₃ PO ₄ , HNO ₃ , CH ₃ COOH, H ₂ SO ₄ , KOH, N ₂ H ₂ , NH ₂ (CH ₂ ) ₂ NH _2, etc. An alkaline solution can be used. Moreover, you may add a pure water and a buffering agent suitably to etching liquid.

  Alternatively, only the wet etching may be performed to form a conductive layer having a tapered side surface.

For example, when the conductive layer 402 is formed using tungsten and the light absorption layer 404 (416a to 416d) is formed using chromium, dry etching can be performed using a mixed gas of CF ₄ , Cl ₂ , and O ₂ .

  In the case where the conductive layer 402 is formed using molybdenum and the light absorption layer 404 (416a to 416d) is formed using chromium, wet etching can be performed using a mixed acid aluminum solution. In the case where the conductive layer is formed using tungsten, etching can be performed using ammonium perhydrate.

  Note that in the case of using a dry etching method for etching, the upper layer portions of the light absorption layers 416a to 416d serving as masks are etched, and the film thickness of the light absorption layers 416a to 416d is reduced (referred to as film reduction). is there.

Next, the light absorption layers 416a to 416d used as the mask are removed (see FIGS. 4D1 and 4D2). The light absorption layers 416a to 416d may be removed by a method of removing using a dry etching method or a wet etching method, or a method of removing by laser ablation with laser beam irradiation. When removing the light absorption layers 416a to 416d using laser ablation, after laser ablation, cleaning with a jet of a gas such as N ₂ or air or a liquid that is a non-reacting substance such as water is used. It is preferable to remove residues and the like. As described above, the conductive layers 420a to 420d having a desired pattern shape can be obtained.

  Note that the light absorption layers 416a to 416d (light absorption layer 404) are formed using a conductive material and are not removed as they are, and a conductive layer having a stacked structure of the light absorption layers 416a to 416d and the conductive layers 420a to 420d (See FIG. 4 (C1)).

  In addition, by applying the present invention, a conductive layer formed over a wiring substrate or a conductive layer functioning as an antenna used for an RF tag or the like can be formed.

  By applying the present invention, a layer having a desired pattern shape can be formed without using a lithography process using a photoresist. Therefore, the lithography process can be simplified and the throughput can be improved.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, a large number of patterns can be formed in a short time, and mass productivity can be improved.

(Embodiment 3)
In this embodiment, a structural example of a laser irradiation apparatus used when the present invention is applied will be described.

  FIG. 3 shows a schematic diagram of a laser irradiation apparatus. In FIG. 3, a laser irradiation apparatus 700 includes a laser oscillation apparatus 702, a first optical system 704 that shapes a laser beam, a second optical system 706 that makes the laser beam uniform, a mask holder 720, and a third The optical system 710 and the stage 712 are provided. A photomask 708 is disposed on the mask holder 720. A substrate 714 is disposed on the stage 712.

  A laser beam obtained by oscillating with an oscillator of the laser oscillation device 702 is shaped through the first optical system 704. The shaped laser beam passes through the second optical system 706 and is made uniform. Then, the shaped and uniform laser beam passes through the photomask 708, is reduced to a desired magnification in the third optical system 710, and forms a pattern on the substrate 714 held on the stage 712. .

  The laser oscillation device 702 includes a laser oscillator that can obtain a large output. For example, an excimer laser oscillator, a gas laser oscillator, a solid-state laser oscillator, a semiconductor laser oscillator, and the like are provided. What can obtain a continuous wave laser beam or a pulsed laser beam can be used as appropriate. Specifically, the laser oscillator described in Embodiment 1 can be used.

  The first optical system 704 is an optical system for shaping the laser beam obtained from the laser oscillation device 702 into a desired shape. Specifically, the cross-sectional shape of the laser beam is shaped into a surface shape such as a circle, an ellipse, or a rectangle, or a linear shape (strictly, an elongated rectangle). For example, the beam diameter of the laser beam may be adjusted using an expander or the like for the first optical system 704. In addition, a polarizer that aligns the polarization direction of the laser beam, an attenuator that adjusts the energy of the laser beam, a spectrometer, and the like may be provided.

  The second optical system 706 is an optical system for making the energy distribution of the laser beam shaped by the first optical system 704 uniform. Specifically, the energy distribution of the laser beam applied to the photomask 708 is made uniform. For example, the energy distribution of the laser beam may be made uniform using a homogenizer or the like. Further, a field lens or the like may be provided between the homogenizer and the photomask 708 so that the photomask 708 is efficiently irradiated with the laser beam.

  A photomask 708 is a mask used when the present invention is applied, and corresponds to a photomask used in the first and second embodiments. That is, the photomask 708 is a mask in which a desired pattern is formed by a transmission region and a light shielding region. The light shielding region is made of a material that has excellent light shielding properties and is resistant to the energy of the irradiated laser beam. The transmissive region may be made of a light-transmitting material or may be a slit.

  The third optical system 710 is an optical system for reducing the laser beam patterned through the photomask 708. Since the laser beam passes through only the transmission region of the photomask 708, the laser beam that has passed through the photomask 708 corresponds to the pattern formed in the transmission region. The third optical system 710 is an optical system that reduces and forms an image on the substrate 714 while maintaining the pattern shape of the laser beam by the photomask 708. For example, a reduction lens that reduces the pattern shape of the laser beam to 1/5, 1/10, or the like may be used.

  As the substrate 714, a substrate in which a layer to be processed (semiconductor layer, conductive layer, or the like) and a light absorption layer are stacked over the substrate is used as described in Embodiments 1 and 2. The material of the light absorption layer is the same as in the first and second embodiments. For the light absorption layer, a material that absorbs the energy of the laser beam is used. The substrate 714 is held by the stage 712 and can move in the XYZθ directions.

  The laser irradiation apparatus 700 may be provided with a light receiving element 716 for monitoring and controlling whether the photomask 708 is uniformly irradiated with the laser beam. In addition, a light receiving element 718 may be provided as an autofocus mechanism for focusing the laser beam on the substrate. A CCD camera or the like may be used as the light receiving elements 716 and 718.

  In addition, a mirror or the like may be appropriately provided in the laser irradiation apparatus 700 to control the traveling direction of the laser beam.

  One feature of the present invention is that a mask for patterning layers such as a semiconductor layer, a wiring layer, and an electrode layer is formed using laser ablation. By using the laser irradiation apparatus described in this embodiment mode, a mask having a finer pattern shape can be manufactured.

  Further, by using an optical system to process a linear laser beam, or a planar laser beam having a large area such as a rectangular laser beam or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. It becomes possible. Accordingly, a large number of patterns can be formed on a large-area substrate in a short time, and mass productivity can be improved.

  This embodiment can be combined with Embodiments 1 and 2 as appropriate.

(Embodiment 4)
In this embodiment, a method for manufacturing an inverted staggered transistor by applying the present invention will be described with reference to FIGS.

  First, FIG. 5 shows one mode of an inverted staggered transistor manufactured by applying the present invention. In the transistor illustrated in FIG. 5, a conductive layer 504 functioning as a gate electrode is provided over a substrate 500 with a base insulating layer 502 interposed therebetween. Over the conductive layer 504, a semiconductor layer 508 and semiconductor layers 510a and 510b having one conductivity are provided with a gate insulating layer 506 provided therebetween. The semiconductor layers 510a and 510b having one conductivity are separated. Further, a conductive layer 512a and a conductive layer 512b functioning as a source electrode or a drain electrode are provided over the semiconductor layers 510a and 510b. The conductive layers 512a and 512b are separated. The conductive layer 512a is provided in contact with the semiconductor layer 510a, and the conductive layer 512b is provided in contact with the semiconductor layer 510b. A specific manufacturing method will be described below.

  A base insulating layer 502 is formed over the substrate 500, and a conductive layer 503 is formed over the base insulating layer 502 (see FIG. 6A). As the substrate 500, a glass substrate containing barium borosilicate glass, alumino borosilicate glass, or the like, a quartz substrate, a sapphire substrate, a ceramic substrate, or a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process is used. Further, polishing may be performed by a CMP method or the like so that the surface of the substrate 500 is planarized.

  The base insulating layer 502 has a single-layer structure or a stacked structure by using an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide by a variety of methods such as a CVD method, a sputtering method, or a spin coating method. Form. The base insulating layer 502 is not necessarily formed, but has an effect of blocking contaminants from the substrate 500.

  The conductive layer 503 is an element selected from Ag, Au, Ni, Pt, Pd, Ir, Rh, Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component. What is necessary is just to form. Alternatively, a semiconductor material typified by polycrystalline silicon doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used. Alternatively, a single layer structure or a stacked structure may be used. For example, a two-layer structure of a tungsten nitride film and a molybdenum (Mo) film may be used, a tungsten film with a thickness of 50 nm, an alloy of aluminum and silicon with a thickness of 500 nm (Al A three-layer structure in which a -Si) film and a titanium nitride film with a thickness of 30 nm are sequentially stacked may be employed. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten of the first conductive layer, or aluminum instead of the aluminum and silicon alloy (Al-Si) film of the second conductive layer. A titanium alloy film (Al—Ti) may be used, or a titanium film may be used in place of the titanium nitride film of the third conductive layer.

  The conductive layer 503 is formed by a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), a CVD method (Chemical Vapor Deposition) such as a plasma CVD method, or the like.

  A light absorption layer 550 is formed over the conductive layer 503. Then, a laser beam 560 is irradiated from the light absorption layer 550 side through a photomask 554 for laser ablation. The laser beam 560 is transmitted through the transmission region 556 of the photomask 554 and is blocked by the light-blocking region 558 (see FIG. 6A).

  The light absorption layer 550 is formed using a material that can absorb a laser beam. For example, the light absorption layer 550 can be formed using a conductive material, a semiconductor material, or an insulating material. Specifically, an element of chromium (Cr), molybdenum (Mo), nickel (Ni), titanium (Ti), cobalt (Co), copper (Cu), or aluminum (Al), or the element as a main component It may be formed using a conductive material such as an alloy material or a compound (a nitrogen compound, an oxygen compound, a carbon compound, a halogen compound, or the like). In addition, silicon, germanium, silicon germanium, molybdenum oxide, tin oxide, bismuth oxide, vanadium oxide, nickel oxide, zinc oxide, gallium arsenide, gallium nitride, indium oxide, indium phosphide, indium nitride, cadmium sulfide, cadmium telluride Alternatively, a semiconductor material such as strontium titanate may be used. Alternatively, an organic resin material such as polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene, or an insulating material such as siloxane or polysilazane can be used. In addition, zinc sulfide, silicon nitride, mercury sulfide, aluminum chloride, or the like can be used. The light absorption layer 550 may have a single-layer structure or a stacked structure, and for example, a 20 nm-thick chromium (Cr) film, a zinc oxide film, or an aluminum nitride film can be used.

  The light absorption layer 550 is formed by an evaporation method, a sputtering method, a CVD method, or the like. In the case where the light absorption layer 550 is formed using an insulating material, it may be formed by a coating method. Alternatively, hydrogen or an inert gas (a rare gas such as helium (He), argon (Ar), krypton (Kr), neon (Ne), or xenon (Xe)) can be added to the light absorption layer 550.

  The photomask 554 includes a transmission region 556 that transmits the laser beam 560 and a light-blocking region 558 that blocks the laser beam 560, and a desired pattern is formed by the transmission region 556 and the light-blocking region 558. Specifically, the conductive layer 503 is processed corresponding to the pattern of the light shielding region 558 and remains. As the photomask 554, for example, a light-transmitting substrate surface with a pattern formed using a light-blocking material may be used. Note that the light-blocking region 558 included in the photomask 554 is formed using a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 560.

  As the laser beam 560, one having energy absorbed by the light absorption layer 550 is appropriately selected. Typically, irradiation is performed by appropriately selecting a laser beam in an ultraviolet region, a visible region, or an infrared region.

Examples of laser oscillators that can oscillate such a laser beam 560 include excimer laser oscillators such as KrF, ArF, and XeCl, gas laser oscillators such as He, He—Cd, Ar, He—Ne, and HF, and single crystals. YAG, YVO ₄ , forsterite (Mg ₂ SiO ₄ ), YAlO ₃ , GdVO ₄ , or polycrystalline (ceramic) YAG, Y ₂ O ₃ , YVO ₄ , YAlO ₃ , GdVO ₄ , and Nd, Yb as dopants , Cr, Ti, Ho, Er, Tm, Ta, or a semiconductor laser oscillator such as GaN, GaAs, GaAlAs, InGaAsP, or the like using one or more of them added as a medium can be used. In the solid-state laser oscillator, it is preferable to select and use the fifth harmonic from the fundamental wave as appropriate.

As the laser beam 560, a continuous wave laser beam or a pulsed laser beam can be used as appropriate. In a pulsed laser beam, an oscillation frequency of several tens to several kilohertz is normally used, but an oscillation frequency of 10 MHz or higher and a pulse width in the picosecond range or a femtosecond ( ^10-15 seconds), which is significantly higher than that. A pulsed laser capable of obtaining a single laser beam may be used.

  As the cross-sectional shape of the laser beam 560, a circular shape, an elliptical shape, a rectangular shape, or a linear shape (strictly, an elongated rectangular shape) may be used as appropriate. Further, it is preferable to process with an optical system so as to have such a cross-sectional shape.

  Further, it is preferable that the energy of the laser beam 560 be such as to cause gas emission in the light absorption layer 550 or evaporation of the light absorption layer 550.

  The laser beam 560 that has passed through the photomask 554 is absorbed by the light absorption layer 550. The light absorption layer 550 is removed by laser ablation in the irradiation region of the laser beam 560. That is, the irradiation region of the light absorption layer 550 is laser ablated by the energy of the laser beam 560 absorbed by the light absorption layer 550, and the light absorption layer 550 in the irradiation region is removed. Then, the light absorption layer 551 remains (see FIG. 6B).

After irradiation with the laser beam 560, N ₂ , gas such as air may be jetted from the laser beam irradiation side, or cleaning using a liquid that is a non-reactive substance such as water may be performed. In this way, by jetting gas or washing with liquid, dust, residues, and the like resulting from ablation can be removed.

  Next, part of the conductive layer 503 is removed by etching using the light absorption layer 551 as an etching mask, so that the conductive layer 504 is formed (see FIG. 6C). The conductive layer 504 may be anisotropically etched or isotropically etched using a dry etching method or a wet etching method as appropriate.

  In this embodiment, the conductive layer 504 is formed by isotropic etching. The side surface of the formed conductive layer 504 has a tapered shape. A wet etching method may be applied to the isotropic etching. Note that an etchant having a high selection ratio between the light absorption layer 551 and the conductive layer 503 is used. For example, an acidic solution such as hydrofluoric acid, phosphoric acid, nitric acid, acetic acid, or sulfuric acid, or an alkaline solution such as potassium hydroxide, hydrazine, or ethylenediamine can be used. Moreover, you may add a pure water and a buffering agent suitably to etching solution.

In addition, using ICP (Inductively Coupled Plasma) etching method, etching conditions (amount of power applied to coil-type electrode, amount of power applied to substrate-side electrode, substrate-side electrode temperature, etc.) The side surface of the conductive layer can be etched into a tapered shape by appropriately adjusting. As an etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl ₄ , a fluorine-based gas typified by CF ₄ , CHF ₃ , SF ₆ or NF _3, or O ₂ is used. It can be used as appropriate. Further, an inert gas such as He or argon, an O ₂ gas, or the like may be appropriately added to the etching gas.

  For example, when the conductive layer 503 is formed using molybdenum, a wet etching method using a mixed acid aluminum solution can be performed. In the case where the conductive layer 503 is formed using tungsten, a wet etching method using ammonium perhydrate can be performed.

  Alternatively, the conductive layer 504 having a vertical side surface (side wall) may be formed by applying anisotropic etching. The base insulating layer 502 has an effect of preventing the substrate 500 from being etched when a dry etching method is used.

After the conductive layer 504 having a desired shape is formed by etching, the light absorption layer 551 used as a mask is removed. The light absorption layer 551 may be removed by appropriately selecting a method for etching and removing using a wet etching method or a dry etching method or a method for removing using a laser ablation by laser beam irradiation. When laser ablation is used, it is preferable to remove dust, residues, and the like resulting from ablation by performing a jet of gas such as N ₂ or cleaning using a liquid after ablation.

  In addition, the conductive layer 504 does not use the method of forming a mask by using laser ablation as described in Embodiment 1 or the like, but uses various printing methods (screen (stencil) printing, offset (lithographic) printing, letterpress printing). Or a method of forming a desired pattern such as gravure (intaglio) printing), nanoimprint method, droplet discharge method, dispenser method, selective coating method, or the like. When such a method is used, a conductive layer can be selectively formed at a desired place.

  Further, the conductive layer 504 may be formed by a lithography technique using a photoresist.

  The formed conductive layer 504 functions as a gate electrode layer of a completed transistor.

  Next, a gate insulating layer 506 is formed over the conductive layer 504 (see FIG. 7A).

  The gate insulating layer 506 is formed using an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide by a CVD method, a sputtering method, or the like. The gate insulating layer 506 may have a single-layer structure or a stacked structure. For example, the gate insulating layer 506 may have a single-layer structure of a silicon oxynitride layer or a stacked structure of two layers of a silicon nitride layer and a silicon oxide layer. Moreover, it is good also as a laminated structure of three or more layers using these. Preferably, silicon nitride having a dense film quality is used. Further, the gate insulating layer 506 is preferably formed using silicon nitride or NiB when the lower conductive layer 504 is formed using silver or copper by a droplet discharge method. These films have the effect of preventing the diffusion of impurities and flattening the surface. Note that a rare gas element such as argon may be included in the reaction gas during the formation of the gate insulating layer 506. By including the rare gas element in the reaction gas, a dense insulating layer with low leakage current can be obtained at a low film formation temperature.

  Next, a semiconductor layer is formed over the gate insulating layer 506 (see FIG. 7A). In this embodiment, a stacked structure of the semiconductor layer 507 and the semiconductor layer 509 having one conductivity is used. Note that the semiconductor layer 509 having one conductivity may be formed as needed. The semiconductor layer 509 having one conductivity is preferably formed in order to improve ohmic contact between the semiconductor layer forming a channel and the conductive layer functioning as a source electrode or a drain electrode.

For example, an n-type semiconductor layer 509 can be formed over the semiconductor layer 507 to form an n-channel transistor NMOS structure, and a p-type semiconductor layer 509 can be formed to form a p-channel transistor PMOS structure. Alternatively, an n-channel transistor or a p-channel transistor can be formed by adding an element imparting conductivity to the semiconductor layer 507 by doping to form an impurity region. Further, instead of forming the n-type semiconductor layer 509, conductivity may be imparted to the semiconductor layer 507 by performing plasma treatment with a PH ₃ gas.

  As a material for forming the semiconductor layer, an amorphous semiconductor (hereinafter also referred to as “AS”) manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane, or an optical energy of the amorphous semiconductor is used. Alternatively, a polycrystalline semiconductor crystallized using heat energy or a semi-amorphous (also referred to as microcrystal or microcrystal; hereinafter referred to as “SAS”) semiconductor or the like can be used. The semiconductor layer can be formed by various means (such as sputtering, LPCVD, or plasma CVD).

SAS is a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystals and polycrystals) and having a third state that is stable in terms of free energy, and has short-range order and lattice distortion. It includes a crystalline region having. A crystal region of 0.5 nm to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wavenumber side than 520 cm ^−1. Yes. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. In order to terminate dangling bonds (dangling bonds), hydrogen or halogen is contained at least 1 atomic% or more. SAS is formed by glow discharge decomposition (plasma CVD) of a gas containing silicon. As a gas containing silicon, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, F ₂ and GeF ₄ may be mixed. The gas containing silicon may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution rate is in the range of 2 to 1000 times, the pressure is in the range of approximately 0.1 Pa to 133 Pa, and the power frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or lower, and can be formed even at a substrate heating temperature of 100 ° C. to 200 ° C. Here, as an impurity element mainly taken in at the time of film formation, impurities derived from atmospheric components such as oxygen, nitrogen, and carbon are preferably 1 × 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is 5 × 10 5. It is preferable to be ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. In addition, a SAS layer formed of a hydrogen-based gas may be stacked on a SAS layer formed of a fluorine-based gas as a semiconductor layer.

  A typical example of an amorphous semiconductor is hydrogenated amorphous silicon, and a typical example of a crystalline semiconductor is polysilicon. Polysilicon (polycrystalline silicon) is mainly made of so-called high-temperature polysilicon using polysilicon formed through a process temperature of 800 ° C. or higher as a main material, or polysilicon formed at a process temperature of 600 ° C. or lower. And so-called low-temperature polysilicon, and polysilicon crystallized by adding an element that promotes crystallization. Of course, as described above, a semi-amorphous semiconductor or a semiconductor including a crystal phase in a part of the semiconductor layer can also be used.

In the case where a crystalline semiconductor such as a polycrystalline semiconductor or a semi-amorphous semiconductor is used for the semiconductor layer, various methods (laser crystallization method, thermal crystallization method, or crystallization of nickel, etc. are promoted). For example, a thermal crystallization method using an element to be formed). In addition, a microcrystalline semiconductor that is a SAS can be crystallized by laser irradiation to improve crystallinity. For example, in the case where a semiconductor layer is formed using silicon and without introducing an element that promotes crystallization, the amorphous silicon layer is heated at 500 ° C. for 1 hour in a nitrogen atmosphere before being irradiated with a laser beam. It is preferable to release the hydrogen concentration of the amorphous silicon layer to 1 × 10 ²⁰ atoms / cm ³ or less. This is because the amorphous silicon layer is destroyed when the amorphous silicon layer containing a large amount of hydrogen is irradiated with a laser beam.

  The method for introducing the metal element into the amorphous semiconductor layer is not particularly limited as long as the metal element can be present on the surface of the amorphous semiconductor layer or inside the amorphous semiconductor layer. For example, a sputtering method, a CVD method, A plasma treatment method (including a plasma CVD method), an adsorption method, or a method of applying a metal salt solution can be used. Among these, the method using a solution is simple and useful in that the concentration of the metal element can be easily adjusted. At this time, in order to improve the wettability of the surface of the amorphous semiconductor layer and to spread the aqueous solution over the entire surface of the amorphous semiconductor layer, irradiation with UV light in an oxygen atmosphere, thermal oxidation method, hydroxy radical It is desirable to form an oxide film on the surface of the amorphous semiconductor layer by treatment with ozone-containing water or hydrogen peroxide water.

  For crystallization of the amorphous semiconductor layer, heat treatment and crystallization by laser beam irradiation may be combined, or heat treatment and laser beam irradiation may be performed several times independently.

  Alternatively, the crystalline semiconductor layer may be directly formed over the substrate by a plasma method. Alternatively, the crystalline semiconductor layer may be selectively formed over the substrate by a linear plasma method.

  The semiconductor layer 507 can be formed using an organic semiconductor material. As the organic semiconductor material, a low molecular material, a polymer material, or the like is used, and a material such as a conductive polymer material can also be used. For example, a π-electron conjugated polymer material whose skeleton is composed of conjugated double bonds can be used. Specifically, polythiophene, polyfluorene, poly (3-alkylthiophene), polythiophene derivatives, A polymeric material can be used. In addition, as an organic semiconductor material, there is a material capable of forming a semiconductor layer by processing after forming a soluble precursor. Examples of such an organic semiconductor material include polythienylene vinylene, poly (2,5-thienylene vinylene), polyacetylene, a polyacetylene derivative, and polyarylene vinylene.

  When converting the precursor into an organic semiconductor, a reaction catalyst such as hydrogen chloride gas is added as well as heat treatment. Typical solvents for dissolving these soluble organic semiconductor materials include toluene, xylene, chlorobenzene, dichlorobenzene, anisole, chloroform, dichloromethane, γ-butyllactone, butyl cellosolve, cyclohexane, NMP (N-methyl-2) -Pyrrolidone), cyclohexanone, 2-butanone, dioxane, dimethylformamide (DMF), THF (tetrahydrofuran), or the like can be applied.

  In this embodiment, an amorphous semiconductor layer is formed as the semiconductor layer 507 and the semiconductor layer 509 having one conductivity. As the semiconductor layer 509 having one conductivity, an n-type semiconductor layer containing phosphorus (P) which is an impurity element imparting n-type conductivity is formed. The semiconductor layer 509 having one conductivity functions as a source region and a drain region, and improves ohmic contact between the semiconductor layer 507 and the conductive layer functioning as a source electrode or a drain electrode. Note that the semiconductor layer 509 having one conductivity may be formed as necessary, and an n-type semiconductor layer including an n-type impurity element (P, As) or a p-type impurity element (B A p-type semiconductor layer can be formed.

  Next, a light absorption layer 562 is formed over the semiconductor layer 509. Then, the laser beam 572 is irradiated from the light absorption layer 562 side through the photomask 566. The laser beam 572 is transmitted through the transmission region 568 of the photomask 566 and is blocked by the light-blocking region 570 (see FIG. 7A).

  The light absorption layer 562 may be formed in the same manner as the light absorption layer 550 described above.

  The photomask 566 includes a transmission region 568 that transmits the laser beam 572 and a light-blocking region 570 that blocks the laser beam 572, and a desired pattern is formed by the transmission region 568 and the light-blocking region 570. The semiconductor layer 507 and the semiconductor layer 509 having one conductivity are processed and remain corresponding to the pattern formed on the photomask 566, specifically, the pattern of the light shielding region 570. As the photomask 566, a light-transmitting substrate surface with a pattern formed using a light-blocking material may be used. Needless to say, like the photomask 554, the light-blocking region 570 included in the photomask 566 is formed using a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 572.

  As the laser beam 572, a laser beam having energy absorbed by the light absorption layer 562 may be selected as appropriate, similarly to the laser beam 560 described above. The energy of the laser beam 572 is preferably such that gas is emitted from the light absorption layer 562 or the light absorption layer 562 is evaporated.

The laser beam 572 that has passed through the photomask 566 is absorbed by the light absorption layer 562. The light absorption layer 562 is removed by laser ablation in the irradiation region of the laser beam 572. That is, the irradiation region of the light absorption layer 562 is laser ablated and removed by the energy of the laser beam 572 absorbed by the light absorption layer 562. Then, the light absorption layer 563 remains (see FIG. 7B). After irradiation with the laser beam 572, a gas such as N ₂ may be jetted or cleaning using a liquid may be performed. By doing in this way, the dust, residue, etc. resulting from ablation can be reduced more.

  Next, part of the semiconductor layers 509 and 507 having one conductivity is etched using the light absorption layer 563 as a mask, so that the semiconductor layers 505 and 508 having one conductivity are formed. The semiconductor layers 505 and 508 having one conductivity may be formed by performing anisotropic etching or isotropic etching by appropriately applying a dry etching method or a wet etching method.

In this embodiment, the semiconductor layer 505 and the semiconductor layer 508 are formed by anisotropic etching. Side surfaces of the semiconductor layer 505 and the semiconductor layer 508 have a vertical shape. The anisotropic etching is performed using chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl _4, fluorine-based gas typified by CF ₄ , CHF ₃ , SF ₆ or NF _3, or O ₂ . And dry etching may be performed.

  After the semiconductor layers 505 and 508 having desired shapes are formed, the light absorption layer 563 used as a mask is removed (see FIG. 7C).

The light absorption layer 563 may be removed by a method of etching and removing using a wet etching method or a dry etching method, or laser ablation by laser beam irradiation. When laser ablation is used, dust, residues, and the like resulting from ablation can be further reduced by performing jetting of a gas such as N ₂ or cleaning using a liquid.

  Note that the semiconductor layer 505 or the semiconductor layer 508 is not printed using the method described in Embodiment 1 or the like, and various printing methods (screen (stencil printing), offset (lithographic printing), relief printing and gravure (intaglio printing) are used. Or the like, a nanoimprint method, a droplet discharge method, a dispenser method, a selective coating method, or the like. When such a method is used, a semiconductor layer can be selectively formed at a desired place.

  Further, the semiconductor layer 505 or the semiconductor layer 508 may be formed by a lithography technique using a photoresist.

  The semiconductor layer 508 forms a channel of the completed transistor. In addition, the semiconductor layer 505 forms a source region or a drain region of a completed transistor.

  Next, a conductive layer 511 is formed over the semiconductor layer 505 (see FIG. 8A). Part of the conductive layer 511 functions as a source electrode or a drain electrode of the completed transistor.

  The conductive layer 511 includes an element selected from Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminum), Mo (molybdenum), Ta (tantalum), and Ti (titanium). Alternatively, an alloy material or a compound material containing the element as a main component can be used. Alternatively, light-transmitting indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined. In addition, the conductive layer 511 may have a single-layer structure or a stacked structure.

  The conductive layer 511 can be formed by a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), a CVD method such as a plasma CVD method (Chemical Vapor Deposition), or the like.

  Next, a light absorption layer 574 is formed over the conductive layer 511. Then, the laser beam 584 is irradiated from the light absorption layer 574 side through the photomask 578. The laser beam 584 is transmitted through the transmission region 580 of the photomask 578 and is blocked by the light-blocking region 582 (see FIG. 8A).

  The light absorption layer 574 may be formed in the same manner as the light absorption layers 550 and 562 described above.

  The photomask 578 includes a transmission region 580 that transmits the laser beam 584 and a light-blocking region 582 that blocks the laser beam 584, and a desired pattern is formed by the transmission region 580 and the light-blocking region 582. Specifically, the conductive layer 511 and the semiconductor layer 505 having one conductivity are processed and remain corresponding to the pattern of the light shielding region 582. As the photomask 578, a substrate in which a pattern is formed using a light-blocking material on a light-transmitting substrate surface may be used. Needless to say, the light-blocking region 582 included in the photomask 578 is formed using a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 584, similar to the photomasks 554 and 566.

  As the laser beam 584, a laser beam having energy absorbed by the light absorption layer 574 may be selected as appropriate, similarly to the laser beams 560 and 572 described above. Further, it is preferable that the energy of the laser beam 584 cause gas emission in the light absorption layer 574, evaporation of the light absorption layer 574, and the like.

The laser beam 584 that has passed through the photomask 578 is absorbed by the light absorption layer 574. The light absorption layer 574 is removed by laser ablation in the region irradiated with the laser beam 584. That is, the irradiation region of the light absorption layer 574 is laser ablated and removed by the energy of the laser beam 584 absorbed by the light absorption layer 574. Then, the light absorption layer 575a and the light absorption layer 575b remain (see FIG. 8B). After irradiation with the laser beam 584, gas such as N ₂ may be jetted or cleaning using a liquid may be performed. By doing in this way, the dust, residue, etc. resulting from ablation can be reduced more.

  Next, part of the conductive layer 511 is removed by etching using the light absorption layers 575a and 575b as a mask (see FIG. 8C). The conductive layer 511 may be anisotropically etched or isotropically etched by appropriately applying a dry etching method or a wet etching method.

In this embodiment mode, the conductive layers 512a and 512b whose side surfaces have a vertical shape are formed by anisotropic etching. For example, anisotropic etching is performed using chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl _4, fluorine-based gas typified by CF ₄ , CHF ₃ , SF ₆ or NF _3, or O _2. Dry etching may be performed using an etching gas such as.

  After the conductive layers 512a and 512b having a desired shape are formed, the light absorption layers 575a and 575b used as masks are removed (see FIG. 9A).

The light absorption layers 575a and 575b may be removed by a method of etching and removing using a wet etching method or a dry etching method, or laser ablation by laser beam irradiation. When laser ablation is used, dust, residues, and the like due to ablation can be further reduced by performing jetting of a gas such as N ₂ or air, or cleaning using a liquid.

  Note that the conductive layers 512a and 512b can be printed by various printing methods (screen (stencil) printing) without using a method of forming a mask by utilizing the ablation phenomenon caused by laser beam irradiation as described in the first embodiment or the like. , Offset (lithographic) printing, letterpress printing, gravure (intaglio printing) and other desired patterns), nanoimprinting, droplet ejection, dispenser, selective coating, etc. Good. When such a method is used, a conductive layer can be selectively formed at a desired place.

  In addition, the conductive layers 512a and 512b may be formed by a lithography technique using a photoresist.

  The conductive layers 512a and 512b function as a source electrode or a drain electrode of the completed transistor.

  Next, using the conductive layers 512a and 512b as masks, part of the semiconductor layer 505 having one conductivity is removed by etching, so that part of the semiconductor layer 508 is exposed (see FIG. 9B). Etching of the semiconductor layer 505 having one conductivity may be performed by appropriately applying a dry etching method or a wet etching method. In the case where the dry etching method is applied, an exposed portion of the semiconductor layer 508 is slightly etched to reduce the film thickness, and the exposed portion may be recessed compared to other portions of the semiconductor layer 508.

  Through the above steps, a transistor 520 that is an inverted staggered transistor (also referred to as a bottom-gate transistor) can be manufactured (see FIG. 9B).

  In this embodiment mode, a pattern is formed by utilizing ablation by laser beam irradiation in various steps. However, the present invention is not limited to this, and the pattern may be formed by using a lithography technique using a photoresist. Good. Of course, other techniques that can selectively form a pattern may be used. The present invention is characterized in that in at least one manufacturing process, a mask is formed using ablation by laser beam irradiation, and a desired pattern is obtained by etching using the mask.

  By applying the present invention, a transistor can be manufactured by reducing the number of lithography steps using a photoresist. Accordingly, since the lithography process is simplified, the throughput can be improved.

  In addition, by applying the present invention, contamination such as impurities contained in a photoresist can be prevented, and deterioration of transistor characteristics can be prevented. As a result, a highly reliable semiconductor device can be obtained.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, many patterns can be formed in a short time, and a semiconductor device can be manufactured with high productivity.

  This embodiment mode can be freely combined with Embodiment Modes 1 to 3 as appropriate.

(Embodiment 5)
In this embodiment, a method for manufacturing an inverted staggered transistor, which is different from that in Embodiment 4, will be described with reference to FIGS. Note that the same components as those in the fourth embodiment are denoted by the same reference numerals, and description thereof is partially omitted or simplified.

  A base insulating layer 502 and a conductive layer 504 are formed over the substrate 500 as described in Embodiment 4 (see FIG. 6C). The conductive layer 504 functions as a gate electrode.

  A gate insulating layer 1506, a semiconductor layer 1507, a semiconductor layer 1509 having one conductivity, and a light absorption layer 1511 are sequentially stacked over the conductive layer 504 (see FIG. 21A).

  The gate insulating layer 1506 may be formed in a manner similar to that of the gate insulating layer 506 described in Embodiment 4. For example, an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide may be formed by a CVD method, a sputtering method, or the like, and may have a single-layer structure or a stacked structure.

  The semiconductor layer 1507 and the semiconductor layer 1509 having one conductivity may be formed in a manner similar to that of the semiconductor layer 507 and the semiconductor layer 509 having one conductivity described in Embodiment 4. For example, a single layer structure or a stacked structure is formed by a sputtering method or a CVD method using a semiconductor material such as silicon or silicon germanium. The semiconductor layer 1507 may be an amorphous semiconductor or a crystalline semiconductor. The crystalline semiconductor can be formed using an amorphous semiconductor by a laser crystallization method, a thermal crystallization method, a thermal crystallization method using an element that promotes crystallization such as nickel, or the like.

  The semiconductor layer 1509 having one conductivity may be formed as necessary. By providing the semiconductor layer 1509, ohmic contact between the semiconductor layer 1507 forming the channel and the conductive layer functioning as a source electrode or a drain electrode can be improved.

  The light absorption layer 1511 is formed using a conductive material that can absorb the laser beam 1572. For example, the light absorption layer 1511 is formed using a conductive material, a semiconductor material, or an insulating material. Specifically, an element of chromium (Cr), molybdenum (Mo), nickel (Ni), titanium (Ti), cobalt (Co), copper (Cu), or aluminum (Al), or the element as a main component It is formed by a vapor deposition method, a sputtering method, a CVD method, or the like using a conductive material such as an alloy material or a compound (such as a nitrogen compound, an oxygen compound, a carbon compound, or a halogen compound). The light absorption layer 1511 includes silicon, germanium, silicon germanium, molybdenum oxide, tin oxide, bismuth oxide, vanadium oxide, nickel oxide, zinc oxide, gallium arsenide, gallium nitride, indium oxide, indium phosphide, Use semiconductor materials such as indium nitride, cadmium sulfide, cadmium telluride, strontium titanate, organic resin materials such as polyimide, acrylic, polyamide, polyimide amide, resist or benzocyclobutene, and insulating materials such as siloxane and polysilazane. it can. Further, zinc sulfide, silicon nitride, mercury sulfide, aluminum chloride, or the like can be used. In the case where the light absorption layer 1511 is formed using an insulating material, it may be formed by a coating method. The light absorption layer 1511 may have a single-layer structure or a stacked structure. In this embodiment, part of the light absorption layer 1511 is used as a source electrode or a drain electrode of a completed transistor.

  Irradiation with a laser beam 1572 is performed from the light absorption layer 1511 side through the photomask 1566. The laser beam 1572 is transmitted through the transmission region 1568 of the photomask 1566 and is blocked by the light-blocking region 1570 (see FIG. 21A).

  The photomask 1566 includes a transmission region 1568 that transmits the laser beam 1572 and a light-shielding region 1570 that shields light, and a desired pattern is formed by the transmission region 1568 and the light-shielding region 1570. For example, the photomask 1566 may be formed by forming a pattern using a light-shielding material on a light-transmitting substrate surface. Note that the light-blocking region 1570 included in the photomask 1566 is formed using a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 1572.

  As the laser beam 1572, one having energy absorbed by the light absorption layer 1511 is appropriately selected. Typically, irradiation is performed by appropriately selecting a laser beam in an ultraviolet region, a visible region, or an infrared region. A laser oscillator or the like specifically used is in accordance with the fourth embodiment.

  As a cross-sectional shape of the laser beam 1572, a circular shape, an elliptical shape, a rectangular shape, or a linear shape (strictly, an elongated rectangular shape) may be used as appropriate. Further, it is preferable to process with an optical system so as to have such a cross-sectional shape.

  The energy of the laser beam 1572 is preferably such that gas is emitted from the light absorption layer 1511 or the light absorption layer is evaporated.

The laser beam 1572 transmitted through the photomask 1566 is absorbed by the light absorption layer 1511. The light absorption layer 1511 is removed by laser ablation in the irradiation region of the laser beam 1572. Then, the light absorption layer 1513 remains (see FIG. 21B). Note that after irradiation with the laser beam 1572, jetting of a gas such as N ₂ or air, or cleaning using a liquid may be performed.

  The semiconductor layer 1509 having one conductivity and part of the semiconductor layer 1507 are removed by etching using the light absorption layer 1513 as a mask to form the semiconductor layer 1510 and the semiconductor layer 1508 having one conductivity (see FIG. 21C). . The semiconductor layer 1510 and the semiconductor layer 1508 having one conductivity may be anisotropically etched or isotropically etched by appropriately applying a dry etching method or a wet etching method.

In this embodiment mode, anisotropic etching is performed to form a semiconductor layer 1508 having a side surface with a vertical shape and a semiconductor layer 1510 having one conductivity. The anisotropic etching is performed using chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl _4, fluorine-based gas typified by CF ₄ , CHF ₃ , SF ₆ or NF _3, or O ₂ . The dry etching used may be performed.

  Next, the laser beam 1576 is irradiated from the light absorption layer 1513 side through the photomask 1574. The laser beam 1576 is transmitted through the transmission region 1578 of the photomask 1574 and is blocked by the light-blocking region 1580 (see FIG. 21D).

  The photomask 1574 forms a desired pattern with a transmissive region 1578 and a light-shielding region 1580. As the photomask 1574, a light-transmitting substrate surface with a pattern formed using a light-blocking material may be used. For the light-blocking region 1580 included in the photomask 1574, a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 1576 is used, like the photomask 1566.

  As the laser beam 1576, a laser beam having energy absorbed by the light absorption layer 1513 (light absorption layer 1511) may be selected as appropriate, similarly to the laser beam 1572 described above. Further, it is preferable that the energy of the laser beam 1576 be such as to cause gas emission in the light absorption layer 1513 or evaporation of the light absorption layer.

The laser beam 1576 that has passed through the photomask 1574 is absorbed by the light absorption layer 1513. The light absorption layer 1513 is removed by laser ablation in the irradiation region of the laser beam 1576. Then, the light absorption layer 1512a and the light absorption layer 1512b remain (see FIG. 22A). The light absorption layers 1512a and 1512b are separated. After irradiation with the laser beam 1576, jetting of a gas such as N ₂ or air, or cleaning using a liquid may be performed. By doing in this way, the dust, residue, etc. resulting from ablation can be reduced.

  Using the light absorption layers 1512a and 1512b as masks, the semiconductor layer 1510 having one conductivity is etched so that a part of the semiconductor layer 1508 is exposed to form semiconductor layers 1514a and 1514b having one conductivity (FIG. 22 ( B)). Etching may be performed by anisotropic etching or isotropic etching using a dry etching method or a wet etching method.

In this embodiment, light absorption layers 1512a and 1512b and semiconductor layers 1514a and 1514b whose side surfaces are vertical are formed by anisotropic etching. For example, the anisotropic etching is performed by etching a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl ₄ or CCl ₄ , a fluorine-based gas typified by CF ₄ , SF ₆ or NF _3, or O _2. Dry etching using a gas may be performed. When dry etching is performed, the exposed portion of the semiconductor layer 1508 may be slightly etched to reduce the film thickness, and the exposed portion may be recessed compared to other portions of the semiconductor layer 1508.

  Next, an interlayer insulating layer 1516 is formed over the light absorption layers 1512a and 1512b (see FIG. 22C).

  The insulating layer 1516 is formed using a material that can transmit a laser beam. For example, the insulating layer 1516 is formed using a light-transmitting inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide by a sputtering method, a CVD method, or the like. The insulating layer 1516 may be formed using a light-transmitting organic insulating material such as polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene.

  Next, the laser beam 1584 is irradiated from the insulating layer 1516 side through the photomask 1582. The laser beam 1584 is transmitted through the transmission region 1586 of the photomask 1582 and is blocked by the light-blocking region 1588 (see FIG. 22C).

  The photomask 1582 is formed with a desired pattern of a transmissive region 1586 and a light-shielding region 1588. The photomask 1582 may be formed using a light-transmitting substrate surface with a pattern formed using a light-blocking material. For the light-blocking region 1588 included in the photomask 1582, a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 1584 is used, like the photomask 1566.

  As the laser beam 1584, a laser beam having energy absorbed by the light absorption layers 1512 a and 1512 b (light absorption layer 1513) may be selected as appropriate, similarly to the laser beam 1572 described above. The energy of the laser beam 1584 is preferably such that gas is emitted from the light absorption layers 1512a and 1512b and the light absorption layer evaporates.

  The laser beam 1584 that has passed through the photomask 1582 passes through the insulating layer 1516 and is absorbed by the light absorption layers 1512a and 1512b. The light absorption layers 1512a and 1512b are laser ablated in the irradiation region of the laser beam 1584, and the upper insulating layer 1516 is removed together with the light absorption layers 1512a and 1512b in the irradiation region.

After irradiation with the laser beam 1584, N ₂ , gas such as air, or cleaning using a liquid may be performed. By doing in this way, the dust, residue, etc. resulting from ablation can be reduced.

  Note that an opening may be formed in the insulating layer 1516 by a lithography technique using a photoresist. In that case, the insulating layer is not limited to a light-transmitting material which transmits a laser beam.

  Next, a conductive layer 1518a and a conductive layer 1518b are formed over the insulating layer 1516 in openings formed in the insulating layer 1516 and the light absorption layers 1512a and 1512b (see FIG. 22D). The conductive layers 1518a and 1518b are electrically connected to the light absorption layers 1512a and 1512b and the semiconductor layers 1514a and 1514b.

  The conductive layers 1518a and 1518b include elements such as Ag (silver), Au (gold), aluminum (Al), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr), and copper (Cu). Alternatively, a conductive material such as an alloy material or a compound containing the element as a main component may be used. Further, indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  Through the above steps, a transistor that is an inverted staggered transistor can be manufactured.

  In this embodiment mode, a pattern is formed by utilizing ablation by laser beam irradiation in various steps. However, the present invention is not limited to this, and the pattern is formed by using a lithography technique using a photoresist material. Also good. Of course, other techniques that can selectively form a pattern may be used. The present invention is characterized in that in at least one manufacturing process, a mask is formed using ablation by laser beam irradiation, and a desired pattern is obtained by etching using the mask.

  By applying the present invention, a transistor can be manufactured by reducing the number of lithography steps using a photoresist. Accordingly, since the lithography process is simplified, the throughput can be improved.

  In addition, by applying the present invention, contamination such as impurities contained in a photoresist can be prevented, and deterioration of transistor characteristics can be prevented. As a result, a highly reliable semiconductor device can be obtained.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, many patterns can be formed in a short time, and a semiconductor device can be manufactured with high productivity.

  This embodiment can be combined with any of Embodiments 1 to 4 as appropriate.

(Embodiment 6)
In this embodiment mode, a structure of a display panel according to the present invention will be described.

  FIG. 17A is a top view illustrating a structure of a display panel according to the present invention. A pixel portion 2701 in which pixels 2702 are arranged in a matrix over a substrate 2700 having an insulating surface, a scan line side input terminal 2703, a signal A line side input terminal 2704 is formed. The number of pixels may be provided in accordance with various standards. For full color display using XGA and RGB, 1024 × 768 × 3 (RGB), and for full color display using UXGA and RGB, 1600 × 1200. If it corresponds to x3 (RGB) and full spec high vision and is full color display using RGB, it may be 1920 x 1080 x 3 (RGB).

  The pixels 2702 are arranged in a matrix by a scan line extending from the scan line side input terminal 2703 and a signal line extending from the signal line side input terminal 2704 intersecting. Each of the pixels 2702 is provided with a switching element and a pixel electrode connected to the switching element. A typical example of a switching element is a transistor, and the gate electrode side of the transistor is connected to a scanning line, and the source electrode or drain electrode side is connected to a signal line, so that each pixel is controlled independently by a signal input from the outside. It is possible.

  FIG. 17A illustrates a structure of a display device in which signals input to the scan lines and the signal lines are controlled by an external driver circuit. As illustrated in FIG. 18A, COG (Chip on The driver IC 2751 may be mounted on the substrate 2700 by a glass method. As another mounting mode, a TAB (Tape Automated Bonding) method as shown in FIG. 18B may be used. The driver IC may be formed on a single crystal semiconductor substrate or may be a circuit in which a transistor is formed on a glass substrate. In FIG. 18, the driver IC 2751 is connected to the FPC 2750.

  In the case where the transistor provided in the pixel is formed using a polycrystalline (microcrystalline) semiconductor with high crystallinity, the scan line driver circuit 3702 may be formed over the substrate 3700 as illustrated in FIG. it can. In FIG. 17B, reference numeral 3701 denotes a pixel portion, and the signal line side driver circuit is controlled by an external driver circuit as in FIG. In the case where a transistor provided in a pixel is formed using a polycrystalline (microcrystalline) semiconductor, a single crystal semiconductor, or the like with high mobility, as illustrated in FIG. 17C, a pixel portion 4701, a scan line driver circuit 4702, and a signal The line driver circuit 4704 can be formed over the substrate 4700 integrally. In this embodiment mode, the present invention using laser ablation can be applied to a transistor or the like provided in a pixel in order to form a desired pattern as described in Embodiment Modes 1 to 5.

  By applying the present invention, a transistor can be manufactured by reducing the number of lithography steps using a photoresist. Therefore, the lithography process can be simplified and the throughput when manufacturing a display panel can be improved.

  In addition, since the number of steps using a photoresist can be reduced, contamination such as impurities contained in the photoresist can be prevented, and a highly reliable display panel can be manufactured.

(Embodiment 7)
In this embodiment, one embodiment of a method for manufacturing a display device including an inverted staggered transistor manufactured by applying the present invention will be described with reference to FIGS. In particular, a method for manufacturing a display device including a light-emitting element will be described. Note that components that are the same as those in the above-described embodiment are described using the same reference numerals, and are partially omitted or simplified.

  First, the transistor 520 described in Embodiment 4 is formed over the substrate 5000 with the base insulating layer 5002 interposed therebetween. Next, an insulating layer 5010 is formed so as to cover the transistor 520 (see FIG. 11A).

  As the substrate 5000, a glass substrate containing barium borosilicate glass, aluminoborosilicate glass, or the like, a quartz substrate, a sapphire substrate, a ceramic substrate, or a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process is used. Further, polishing may be performed by a CMP method or the like so that the surface of the substrate 5000 is planarized.

  The base insulating layer 5002 has a single-layer structure or a stacked structure using an insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide by various methods such as a CVD method, a sputtering method, and a spin coating method. Form. The base insulating layer 5002 is not necessarily formed, but has an effect of blocking contaminants from the substrate 5000.

  The insulating layer 5010 can be formed by a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), a CVD method such as a plasma CVD method (Chemical Vapor Deposition), a spin coating method, or the like.

  The insulating layer 5010 was selected from materials including silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, diamond-like carbon (DLC), nitrogen-containing carbon, polysilazane, and other inorganic insulating materials. Can be made of material. Further, a material containing siloxane may be used. An organic insulating material may be used, and as the organic material, polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene can be used. Moreover, an oxazole resin can also be used, for example, photocurable polybenzoxazole or the like can be used.

  Next, an opening 5038 reaching the conductive layer 512b is formed in the insulating layer 5010 (see FIG. 11C). Hereinafter, an example of a method for forming the opening 5038 will be described.

  As shown in FIG. 11B, irradiation with a laser beam 5036 is performed through a photomask 5030. The photomask 5030 includes a transmission region 5032 for the laser beam 5036 and a light shielding region 5034, and a desired opening pattern is formed by the transmission region 5032 and the light shielding region 5034. For example, the photomask 5030 is formed by forming a desired opening pattern on a light-transmitting substrate surface using a light-blocking material. Note that a material that forms the light-blocking region 5034 needs to be a material that has excellent light-blocking properties and is resistant to the energy of the laser beam 5036.

  In this case, the conductive layer 512b and the conductive layer 512a are formed using a material that can absorb the laser beam 5036, and the insulating layer 5010 is formed using a material that can transmit the laser beam 5036. Specific materials for forming the conductive layers 512b and 512a are the same as the conductive materials that can be used for the light absorption layers described in Embodiments 1 to 6.

  The laser beam 5036 is similar to the laser beam described in any of Embodiments 1 to 6, and a laser beam having energy absorbed by the conductive layer 512b corresponding to the light absorption layer described in the above embodiment is appropriately selected. do it. The energy of the laser beam 5036 is preferably such that gas is released from the conductive layer 512b or the conductive layer 512b is evaporated.

  In FIG. 11B, a laser beam 5036 passes through the transmission region 5032 of the photomask 5030 and reaches the surface of the insulating layer 5010. Further, the laser beam 5036 passes through the insulating layer 5010 and is absorbed by the conductive layer 512b. The conductive layer 512b is laser ablated in the irradiation region of the laser beam 5036 and removed together with the upper insulating layer 5010, so that an opening 5038 is formed (see FIG. 11C). The opening 5038 reflects the opening pattern formed in the photomask 5030. At this time, the conductive layer 512b is removed so as to penetrate through the laser ablation.

  The insulating layer 5010 can also be formed by a droplet discharge method, a printing method (a method for forming a pattern such as screen printing or offset printing), a dipping method, a dispenser method, or the like. When such a method is used, the opening 5038 can be formed at the same time as the insulating layer 5010 is formed.

  Next, a light-emitting element 5020 that is electrically connected to the transistor 520 is formed. As the light-emitting element 5020, a light-emitting element that emits red (R), green (G), or blue (B) light may be formed. Alternatively, a light-emitting element 5020 that emits white (W) light may be formed, and RGB light emission may be obtained in combination with a color filter. A method for forming the light emitting element 5020 is described below.

  First, a first electrode layer 5012 that functions as a pixel electrode is formed in the opening 5038 from which the conductive layer 512b is exposed. The conductive layer 512b and the first electrode layer 5012 are electrically connected (see FIG. 12A).

  The first electrode layer 5012 can be manufactured using laser ablation by laser beam irradiation through the photomask described in any of Embodiments 1 to 6. For example, a conductive layer and a light absorption layer are stacked over the insulating layer 5010.

  The conductive layer to be the first electrode layer 5012 is formed using a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), a CVD method (Chemical Vapor Deposition) such as a plasma CVD method, or the like. be able to. The conductive layer can be formed using a conductive material such as indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), or zinc oxide (ZnO). For example, indium tin oxide containing silicon oxide can be formed by a sputtering method using a target containing 2 wt% to 10 wt% of silicon oxide in ITO. In addition, indium zinc oxide which is an oxide conductive material formed using a conductive material in which ZnO is doped with gallium (Ga) and a target in which 2 wt% to 20 wt% of zinc oxide (ZnO) is mixed in ITO ( It may be formed using IZO (indium zinc oxide). The conductive layer is electrically connected to the conductive layer 512b.

  Then, a laser beam is irradiated from the light absorption layer side through a photomask in which a desired pattern is formed in the transmission region and the light shielding region. The light absorption layer absorbs the laser beam, and the irradiation region is laser ablated by the energy to be removed. Next, the first electrode layer 5012 is formed by etching the conductive layer using the remaining light absorption layer as a mask. The conductive layer may be etched using a dry etching method or a wet etching method as appropriate.

  After the conductive layer is etched into a desired shape, the light absorption layer used as a mask may be removed using etching such as a dry etching method or a wet etching method or laser ablation by laser beam irradiation.

  The first electrode layer 5012 is selectively formed at a desired place by a droplet discharge method, a printing method (a method for forming a pattern such as screen printing or offset printing), a dipping method, a dispenser method, or the like. You can also.

  In addition, the first electrode layer 5012 may be wiped with a CMP method or a polyvinyl alcohol-based porous body and polished so that the surface thereof is planarized. In addition, after polishing using the CMP method, the surface of the first electrode layer 5012 may be subjected to ultraviolet irradiation, oxygen plasma treatment, or the like.

  Next, a partition layer 5014 is formed so as to have an opening over the first electrode layer 5012 (see FIG. 12B). A partition layer 5014 is formed using an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, or aluminum oxynitride, acrylic acid, methacrylic acid, or a derivative thereof, polyimide, aromatic polyamide, polybenzo Heat-resistant polymers such as imidazole, or inorganic siloxanes containing Si-O-Si bonds among silicon, oxygen, and hydrogen compounds formed using siloxane-based materials as starting materials, and hydrogen bonded to silicon is methyl or phenyl. Such an organic siloxane-based insulating material substituted with an organic group can be used. You may form using photosensitive and non-photosensitive materials, such as an acryl and a polyimide.

  The partition layer 5014 can be selectively formed by a droplet discharge method, a printing method, a dispenser method, or the like. Alternatively, the partition layer 5014 having a desired shape may be formed by forming a partition layer over the entire surface using an insulating material, forming a resist mask or the like using a lithography process, and performing etching. In addition, the partition layer 5014 having a desired shape can be formed by forming a partition layer on the entire surface using a photosensitive material, and exposing and developing the partition layer made of the photosensitive material. Note that the partition wall layer 5014 preferably has a shape in which the radius of curvature continuously changes. With such a shape of the partition layer, the coverage with the layer 5016 and the second electrode layer 5018 formed above is improved.

  Further, after the partition wall layer 5014 is formed by discharging a composition by a droplet discharge method, the surface may be pressed and flattened by pressure in order to improve the flatness. As a pressing method, unevenness may be reduced by scanning a roller-shaped object on the surface, or the surface may be pressed vertically with a flat plate-like object. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied for the purpose of flattening the surface when irregularities are generated by the droplet discharge method. When flatness is improved by this step, display unevenness of the display device can be prevented and a high-definition image can be displayed.

  Next, a layer 5016 and a second electrode layer 5018 are stacked over the first electrode layer 5012 and the partition wall layer 5014. Then, a light-emitting element 5020 having a structure in which the layer 5016 is sandwiched between the first electrode layer 5012 and the second electrode layer 5018 is obtained (see FIG. 12C). The layer 5016 includes a layer containing a light-emitting material that can obtain at least a desired light emission wavelength (hereinafter also referred to as a light-emitting layer). Specifically, the layer 5016 is formed of an organic compound, an inorganic compound, or a layer containing both.

  Through the above steps, a display device including the light-emitting element 5020 can be obtained.

  Note that in this embodiment mode, a pattern is formed using ablation by laser beam irradiation in various steps. However, the present invention is not limited to this, and a lithography technique using a photoresist may be used. Of course, other techniques that can selectively form a pattern may be used. In this embodiment mode, a method of forming a pattern using ablation by laser beam irradiation is used in at least one manufacturing process.

  By applying the present invention, the number of lithography processes using a photoresist can be reduced, and a transistor or a display device including the transistor can be manufactured. Accordingly, since the lithography process is simplified, the throughput can be improved.

  Further, by applying the present invention, contamination such as impurities contained in a photoresist can be prevented, and a highly reliable display device can be obtained.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, many patterns can be formed in a short time, and a display device can be manufactured with high productivity.

  This embodiment mode can be combined with any of Embodiment Modes 1 to 6 as appropriate.

(Embodiment 8)
In this embodiment, an example of a display device according to the present invention will be described with reference to FIGS.

  FIG. 19A is a schematic view of the top surface of the display device described in this embodiment. FIG. 19B is a cross-sectional view taken along line QR in FIG.

  A display device 900 illustrated in FIG. 19 includes a pixel portion 902 and a driver circuit portion 904 over a substrate 901. A sealing substrate 908 is provided above the substrate 901 with a sealant 910 interposed therebetween. Further, a terminal portion 906 is provided on the substrate 901. A signal for controlling operations of a plurality of elements included in the pixel portion 902 and a power supply potential are input from the outside through the terminal portion 906.

  In the pixel portion 902, a light-emitting element 930, a driving transistor 924, a switching transistor 922, and a capacitor 920 are provided. In the light-emitting element 930, a layer including at least a light-emitting layer is sandwiched between a pair of electrode layers. The light-emitting element 930 is electrically connected to the driving transistor 924.

  An end portion of an electrode layer (an electrode layer electrically connected to the driving transistor 924) below the light-emitting element 930 is covered with a partition wall layer 918. The partition layer 918 is formed using an inorganic insulating material such as silicon oxide or silicon nitride, an organic insulating material such as acrylic, polyimide, or resist, or a siloxane material. A partition layer 918 can be separated from another light-emitting element provided adjacent to the partition layer 918. Note that, as in this embodiment, the partition wall layer 918 having a rounded end portion whose curvature radius continuously changes so that the coverage of the layer formed by stacking upward is provided. Is preferable.

  The driver circuit portion 904 is provided with a plurality of transistors 926 and forms a driver circuit that controls the operation of the pixel portion 902. The drive circuit portion 904 is provided with, for example, a shift register, a decoder, a buffer, a sampling circuit, a latch, and the like.

  The substrate 901 and the sealing substrate 908 are attached to each other with a sealant 910 so that the pixel portion 902 and the driver circuit portion 904 are sealed. The sealing substrate 908 is provided with a color filter 942 and a light shielding layer 944. Note that the present invention is not particularly limited, and the color filter 942 and the light-blocking layer 944 are not necessarily provided.

  This embodiment is significantly different from the above embodiment in that the gate electrode layer of the transistor is below or above the semiconductor layer. Other configurations are the same as those in the seventh embodiment.

  Next, a specific example of a manufacturing method will be described.

  Silicon nitride oxide is used as a base insulating layer over the substrate 901 by sputtering, PVD (Physical Vapor Deposition), low pressure CVD (LPCVD), or CVD (Chemical Vapor Deposition) such as plasma CVD. The base insulating layer 903a is formed with a thickness of 10 nm to 200 nm (preferably 50 nm to 150 nm), and the base insulating layer 903b is stacked with a thickness of 50 to 200 nm (preferably 100 nm to 150 nm) using silicon oxynitride. Alternatively, heat-resistant polymers such as acrylic acid, methacrylic acid and derivatives thereof, polyimide, aromatic polyamide, polybenzimidazole, or siloxane resin may be used. Moreover, resin materials such as vinyl resins such as polyvinyl alcohol and polyvinyl butyral, epoxy resins, phenol resins, novolac resins, acrylic resins, melamine resins, and urethane resins may be used. Alternatively, an organic material such as benzocyclobutene, parylene, fluorinated arylene ether, or polyimide, a composition material containing a water-soluble homopolymer and a water-soluble copolymer, or the like may be used. Moreover, an oxazole resin can also be used, for example, photocurable polybenzoxazole or the like can be used.

  Further, a droplet discharge method, a printing method (a method for forming a pattern such as screen printing or offset printing), a coating method such as a spin coating method, a dipping method, a dispenser method, or the like can also be used. In this embodiment, the base insulating layer 903a and the base insulating layer 903b are formed by a plasma CVD method. As the substrate 901, a glass substrate, a quartz substrate, a silicon substrate, a metal substrate, or a stainless substrate on which an insulating layer is formed may be used. Further, a plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may be used, or a flexible substrate such as a film may be used. As the plastic substrate, a substrate made of PET (polyethylene terephthalate), PEN (polyethylene naphthalate), or PES (polyethersulfone) can be used, and as the flexible substrate, a synthetic resin such as acrylic can be used.

  As the base insulating layer, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like can be used, and a single-layer structure or a stacked structure including two layers and three layers may be used.

  Next, a semiconductor layer is formed over the base insulating layer. The semiconductor layer may be formed with various thicknesses (sputtering method, LPCVD method, plasma CVD method, or the like) with a thickness of 25 nm to 200 nm (preferably 30 nm to 150 nm). In this embodiment mode, it is preferable to use a crystalline semiconductor layer obtained by crystallizing an amorphous semiconductor layer by laser crystallization.

  In order to control the threshold voltage of the transistor, the semiconductor layer obtained in this manner may be doped with a trace amount of an impurity element (boron or phosphorus). This doping of the impurity element may be performed on the amorphous semiconductor layer before the crystallization step. When an impurity element is doped in the state of the amorphous semiconductor layer, the impurity can be activated by heat treatment for subsequent crystallization. In addition, defects and the like generated during doping can be improved.

  Next, the crystalline semiconductor layer is patterned into a desired shape to form a semiconductor layer.

  In this embodiment mode, the semiconductor layer is processed using laser ablation by laser beam irradiation described in the above embodiment mode. In this case, a mask having a desired shape made of a light absorption layer may be formed and etched using the mask. Materials, methods, and the like may be selected as appropriate.

  Further, it may be formed by a lithography technique using a photoresist material. A resist mask that obtains a desired shape may be formed, and etching may be performed using the resist mask. In addition, various printing methods (screen (stencil) printing, offset (planographic) printing, methods of forming a desired pattern such as relief printing or gravure (intaglio printing)), nanoimprinting, droplet ejection method, dispenser method, selective It may be formed using any coating method.

As the etching process, either plasma etching (dry etching method) or wet etching method may be employed, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based gas such as CF ₄ , CHF ₃ , or NF ₃ or a chlorine-based gas such as Cl ₂ or BCl ₃ may be used, and an inert gas such as He or Ar may be added as appropriate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is possible, and it is not necessary to form a mask layer on the entire surface of the substrate. At this time, a lower electrode layer constituting a capacitor element to be completed later is also formed. The lower electrode layer is formed of the same layer as the semiconductor layer constituting the transistor.

  A gate insulating layer is formed to cover the semiconductor layer. The gate insulating layer is formed of an insulating layer containing silicon with a thickness of 10 nm to 150 nm by using a plasma CVD method, a sputtering method, or the like. The gate insulating layer may be formed of an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, or silicon nitride oxide, and may have a stacked structure or a single layer structure. Alternatively, the gate insulating layer may have a three-layer structure including a silicon nitride layer, a silicon oxide layer, and a silicon nitride layer, or a single layer or two layers of silicon oxynitride layers.

  Next, a gate electrode layer is formed over the gate insulating layer. The gate electrode layer can be formed by forming a conductive layer by a method such as sputtering, vapor deposition, or CVD, and processing the conductive layer into a desired shape. The gate electrode layer is an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), neodymium (Nd), or What is necessary is just to form with the alloy material or compound material which has the said element as a main component. Alternatively, a semiconductor layer typified by polycrystalline silicon doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used as the gate electrode layer. The gate electrode layer may have a single layer structure or a stacked structure.

  The gate electrode layer can be obtained by patterning a conductive layer into a desired shape. For the processing of the conductive layer, the ablation by laser beam irradiation described in the above embodiment mode can be used. In this case, a mask having a desired shape made of a light absorption layer may be formed and etched using the mask. What is necessary is just to select a material, a method, etc. suitably. At this time, an upper electrode layer of a capacitor element to be completed later is also formed. The upper electrode layer is made of the same material as the gate electrode layer.

  In this embodiment, the side surface of the gate electrode layer is formed to have a tapered shape. The tapered shape of the gate electrode layer can be formed by using a wet etching method in the etching process. Alternatively, after the dry etching method, the wet etching method can be performed. Note that the present invention is not particularly limited, and a gate electrode layer having a vertical side surface may be formed using a dry etching method. Alternatively, the gate electrode layer may have a two-layer structure, and each layer may have a different taper angle. By making the side surface of the gate electrode layer into a tapered shape, coverage with a layer stacked on the upper layer can be improved.

  Further, the gate electrode layer may be formed by forming a resist mask by a lithography technique using a photoresist material and performing etching. In addition, various printing methods (screen (stencil) printing, offset (planographic) printing, methods of forming a desired pattern such as relief printing or gravure (intaglio printing)), nanoimprinting, droplet ejection method, dispenser method, selective It may be formed using any coating method.

  Note that the exposed portion of the gate insulating layer may be slightly etched by etching when forming the gate electrode layer, and the film thickness may be reduced (so-called film reduction).

  An impurity element is added to the semiconductor layer to form a pair of impurity regions. The impurity region formed in the semiconductor layer functions as a source region or a drain region. As the impurity element to be added, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity may be appropriately selected and added. As the impurity element imparting n-type conductivity, phosphorus (P), arsenic (As), or the like can be used. As the impurity element imparting p-type conductivity, boron (B), aluminum (Al), gallium (Ga), or the like can be used. At this time, a channel formation region is formed between the pair of impurity regions.

  Note that in the semiconductor layer, an impurity region called an LDD (Light Doped Drain) region may be formed between an impurity region functioning as a source region or a drain region and a channel formation region. The LDD region is an impurity region having a lower concentration than the source region or the drain region. Further, the LDD region may have a structure overlapping with the gate electrode layer or a structure not overlapping.

  In order to activate the impurity element, heat treatment, intense light irradiation, or laser beam irradiation may be performed. Simultaneously with activation, plasma damage to the gate insulating layer and plasma damage to the interface between the gate insulating layer and the semiconductor layer can be recovered.

  Next, a first interlayer insulating layer is formed to cover the gate electrode layer and the gate insulating layer. In this embodiment, a stacked structure of the insulating layer 913 and the insulating layer 914 is employed. As the insulating layer 913 and the insulating layer 914, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxynitride layer, a silicon oxide layer, or the like using a sputtering method or plasma CVD can be used, and other insulating layers containing silicon can be used. A single layer structure or a stacked structure of three or more layers may be used.

  Further, a heat treatment is performed at 300 ° C. to 550 ° C. for 1 hour to 12 hours in a nitrogen atmosphere to perform a step of hydrogenating the semiconductor layer. Preferably, it is performed at 400 ° C to 500 ° C. This step is a step of terminating dangling bonds in the semiconductor layer with hydrogen contained in the insulating layer 913 which is an interlayer insulating layer. In this embodiment, heat treatment is performed at 410 ° C.

  As the insulating layer 913 and the insulating layer 914, aluminum nitride, aluminum oxynitride, aluminum nitride oxide or aluminum oxide whose nitrogen content is higher than oxygen content, diamond-like carbon (DLC), nitrogen-containing carbon, polysilazane, etc. It can be formed of a material selected from substances including inorganic insulating materials. Further, a material containing siloxane may be used. An organic insulating material may be used, and polyimide, acrylic, polyamide, polyimide amide, resist, or benzocyclobutene can be used. Moreover, an oxazole resin can also be used, for example, photocurable polybenzoxazole or the like can be used.

  Next, an opening reaching the semiconductor layer is formed in the insulating layer 913, the insulating layer 914, and the gate insulating layer.

  The opening is formed by a lithography technique using a photoresist material. A resist mask having a desired opening pattern may be formed and etched using the mask.

  The opening may be formed by using laser ablation by laser beam irradiation. For example, the source region and the drain region of the semiconductor layer are irradiated with a laser beam from the insulating layer 913 and the insulating layer 914 side through a photomask, and the source region is absorbed by the energy of the laser beam absorbed in the source region and the drain region. Then, the insulating layer 914, the insulating layer 913, and the gate insulating layer over the irradiation region of the drain region and the drain region are removed, so that an opening can be formed.

  In the photomask, a desired opening pattern is formed by a light shielding region and a transmission region. As the light shielding material for forming the light shielding region, a material having excellent light shielding properties and resistance to the energy of the laser beam is used. The laser beam preferably has energy absorbed by the source region or drain region of the semiconductor layer and causes gas emission or evaporation of the source region or drain region in the source region or drain region. By appropriately selecting the energy of the laser beam, only the insulating layers 914 and 913 and the gate insulating layer can be removed. The region where the laser beam has passed through the photomask becomes the irradiation region, and the insulating layer and the like are removed to form an opening.

  A source electrode layer or a drain electrode layer is formed in an opening reaching the source region and the drain region of the semiconductor layer, and the source region or the drain region of the semiconductor layer and the source electrode layer or the drain electrode layer can be electrically connected. .

  The source electrode layer or the drain electrode layer can be formed by forming a conductive layer by a PVD method, a CVD method, an evaporation method, or the like, and processing the conductive layer into a desired shape. The material of the source electrode layer or the drain electrode layer is Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, Al, Ta, Mo, Cd, Zn, Fe, Ti, Si, Ge, Zr, Ba Or an alloy material containing the element as a main component or a metal nitride containing the element as a main component. The source electrode layer or the drain electrode layer may have a single-layer structure or a stacked structure.

  The source electrode layer or the drain electrode layer can be obtained by patterning a conductive layer into a desired shape. For the processing of the conductive layer, the ablation by laser beam irradiation described in the above embodiment mode can be used.

  For example, a light absorption layer is formed on a conductive layer, a laser beam is irradiated through a photomask, and a mask made of the light absorption layer is formed by utilizing ablation by the energy of the laser beam absorbed by the light absorption layer. To do. Then, the conductive layer is etched using the mask to form a source electrode layer or a drain electrode layer.

  On the photomask, a desired pattern is formed by a light shielding region and a transmission region. As the light shielding material for forming the light shielding region, a material having excellent light shielding properties and resistance to the energy of the laser beam is used. The laser beam preferably has energy that is absorbed by the light absorption layer and causes gas emission or evaporation of the light absorption layer in the light absorption layer. The region where the laser beam has passed through the photomask becomes the irradiation region, the light absorption layer in the irradiation region is removed, and the light absorption layer remains so as to reflect the pattern formed on the photomask. Then, using the remaining light absorption layer as an etching mask, the conductive layer is etched using a dry etching method or a wet etching method to obtain a source electrode layer or a drain electrode layer. Note that details of the light absorption layer, the laser beam, the photomask, and the like are the same as those in the above embodiment.

  In addition, the source electrode layer or the drain electrode layer may be formed by etching using a resist mask formed by a lithography technique using a photoresist material.

  In addition, the source electrode layer or the drain electrode layer may be formed by various printing methods (a method of forming a desired pattern such as screen (stencil printing), offset (lithographic printing), relief printing or gravure printing (intaglio printing)), nanoimprinting method, liquid A droplet discharge method, a dispenser method, a selective coating method, or the like may be used. Furthermore, a reflow method or a damascene method may be used. When such a method is used, a conductive layer can be selectively formed at a desired place. Note that the terminal electrode layer 950 of the terminal portion 906 is also formed when the source electrode layer or the drain electrode layer is formed.

  Through the above steps, an active matrix substrate including the transistor 922 and the transistor 924 in the pixel portion 902 and the plurality of transistors 926 in the driver circuit portion 904 can be manufactured.

  Note that the present invention is not particularly limited, and the transistor may have a single gate structure in which one channel formation region is formed, a double gate structure in which two channel formation regions are formed, or a triple gate structure in which three transistors are formed.

  Next, an insulating layer 916 is formed as a second interlayer insulating layer. As the insulating layer 916, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum nitride, aluminum oxide containing nitrogen (also referred to as aluminum oxynitride), aluminum nitride containing oxygen (also referred to as aluminum nitride oxide), aluminum oxide , Diamond-like carbon (DLC), nitrogen-containing carbon film, PSG (phosphorus glass), BPSG (phosphorus boron glass), alumina, and other materials selected from materials including inorganic insulating materials. A siloxane resin may also be used. An organic insulating material may be used. The organic material may be photosensitive or non-photosensitive, and may be polyimide, acrylic, polyamide, polyimide amide, resist or benzocyclobutene, polysilazane, low dielectric constant (Low-k). ) Materials can be used. Moreover, an oxazole resin can also be used, for example, photocurable polybenzoxazole or the like can be used. As an interlayer insulating layer provided for planarization, a layer having high heat resistance and high insulating property and a high planarization rate is required. Therefore, a method for forming the insulating layer 916 is represented by a spin coat method. It is preferable to use a coating method.

  The insulating layer 916 can be formed by other dipping methods, spray coating, doctor knife, roll coater, curtain coater, knife coater, CVD method, vapor deposition method, or the like. The insulating layer 916 may be formed by a droplet discharge method. When the droplet discharge method is used, the material liquid can be saved. Further, a method capable of transferring or drawing a pattern, such as a droplet discharge method, for example, a printing method (a method for forming a pattern such as screen printing or offset printing), a dispenser method, or the like can be used.

  An opening reaching the source or drain electrode layer of the transistor 924 is formed in the insulating layer 916 of the pixel portion 902. The opening may be formed in the same manner as the opening for electrically connecting the source or drain electrode layer and the source or drain region of the semiconductor layer. In the case of using ablation by laser beam irradiation, a laser beam is irradiated from the insulating layer 916 side, and the source electrode or drain electrode layer is irradiated by the energy of the laser beam absorbed by the source electrode layer or the drain electrode layer. The region and the insulating layer 916 over the region are removed, so that an opening can be formed. For the laser beam irradiation, a photomask in which a desired opening pattern is formed is used. Note that in the case of utilizing ablation by laser beam irradiation, it is preferable to use a low-melting-point metal (chromium in this embodiment) that is relatively easy to evaporate in the source electrode layer or the drain electrode layer.

  A light-emitting element 930 is formed over the insulating layer 916 in the pixel portion 902. The light-emitting element 930 is electrically connected to the transistor 924.

  First, the first electrode layer 932 is formed in the opening provided in the insulating layer 916 and from which the source electrode layer or the drain electrode layer of the transistor 924 is exposed.

  Next, a partition layer 918 is formed so as to cover an end portion of the first electrode layer 932 and to have an opening over the first electrode layer 932. As the partition layer 918, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, or the like can be used, and a single-layer structure or a stacked structure including two layers and three layers may be used. As another material for the partition layer 918, aluminum nitride, aluminum oxynitride with an oxygen content higher than the nitrogen content, aluminum nitride oxide or aluminum oxide with a nitrogen content higher than the oxygen content, diamond like carbon (DLC) ), Nitrogen-containing carbon, polysilazane, and other materials including inorganic insulating materials can be used. A material containing siloxane may be used. An organic insulating material may be used, and the organic material may be either photosensitive or non-photosensitive, and polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, or polysilazane can be used. Moreover, an oxazole resin can also be used, for example, photocurable polybenzoxazole or the like can be used.

  The partition layer 918 is formed by a droplet discharge method that can selectively form a pattern, a printing method that can transfer or draw a pattern (a method that forms a pattern such as screen printing or offset printing), a dispenser method, and other spin coating methods. It can be formed using a coating method, a dipping method, or the like. In addition, a partition layer can be formed on the entire surface using a photosensitive material, and the partition layer made of a photosensitive material can be exposed and developed to be processed into a desired shape. Further, a sputtering method, a PVD method (Physical Vapor Deposition), a low pressure CVD method (LPCVD method), a CVD method such as a plasma CVD method (Chemical Vapor Deposition), or the like is formed on the entire surface, and a resist or the like is formed using a lithography technique. These masks may be formed and etched into a desired shape.

As an etching process for processing into a desired shape, either a dry etching method or a wet etching method may be employed. Plasma etching (a kind of dry etching method) is suitable for processing a large area substrate. As an etching gas, a fluorine-based gas such as CF ₄ , CHF ₃ , or NF ₃ or a chlorine-based gas such as Cl ₂ or BCl ₃ may be used, and an inert gas such as He or Ar may be added as appropriate. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is possible, and it is not necessary to form a mask such as a resist on the entire surface of the substrate.

  The partition layer 918 preferably has a shape in which the radius of curvature continuously changes. By forming the partition layer in such a shape, the coverage of the layer formed on the upper side is improved.

  Next, a layer 934 and a second electrode layer 936 are stacked over the first electrode layer 932 and the partition wall layer 918. Then, a light-emitting element 930 having a structure in which the layer 934 is sandwiched between the first electrode layer 932 and the second electrode layer 936 is obtained. The layer 934 includes a layer containing a light emitting material that can obtain at least a desired light emission wavelength.

  One of the first electrode layer 932 and the second electrode layer 936 functions as an anode, and the other functions as a cathode. The first electrode layer 932 and the second electrode layer 936 are formed using a target in which indium tin oxide (ITO), indium tin oxide containing silicon oxide, and 2 wt% to 20 wt% zinc oxide are mixed in ITO. In addition to indium zinc oxide (IZO), gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co ), Copper (Cu), palladium (Pd), or the like. In addition to aluminum, an alloy of magnesium and silver, an alloy of aluminum and lithium, or the like can also be used.

  Note that in order to extract light emitted from the layer 934 to the outside, one or both of the first electrode layer 932 and the second electrode layer 936 uses indium tin oxide or the like, or silver, aluminum, or the like Is preferably formed so as to allow visible light to pass therethrough.

  The first electrode layer 932 can be obtained by forming the above-described material over the entire surface and then patterning it into a desired shape. For the processing of the first electrode layer 932, ablation by laser beam irradiation described in the above embodiment mode can be used.

  For example, a conductive layer to be a first electrode layer is formed over the entire surface, a light absorption layer is formed over the conductive layer, a laser beam is irradiated through a photomask, and the laser beam absorbed by the light absorption layer A mask composed of a light absorption layer is formed using ablation by energy. Then, the conductive layer is etched using the mask, so that the first electrode layer 932 is obtained.

  On the photomask, a desired pattern is formed by a light shielding region and a transmission region. As the light shielding material for forming the light shielding region, a material having excellent light shielding properties and resistance to the energy of the laser beam is used. The laser beam preferably has energy that is absorbed by the light absorption layer and causes gas emission or evaporation of the light absorption layer in the light absorption layer. The region where the laser beam has passed through the photomask becomes the irradiation region, the light absorption layer in the irradiation region is removed, and the light absorption layer remains so as to reflect the pattern formed on the photomask. Then, using the remaining light absorption layer as an etching mask, the first electrode layer 932 is obtained by etching the conductive layer using a dry etching method or a wet etching method. Note that details of the light absorption layer, the laser beam, the photomask, and the like are the same as those in the above embodiment.

  Alternatively, the first electrode layer 932 may be formed by etching using a resist mask formed by a lithography technique using a photoresist material. In addition, the first electrode layer 932 can be formed by various printing methods (screen (stencil) printing, offset (planographic printing) printing, a method of forming a desired pattern such as relief printing or gravure printing (intaglio printing)), nanoimprinting method, droplets. You may form using the discharge method, the dispenser method, the selective application method, etc. Furthermore, a reflow method or a damascene method may be used. When such a method is used, a conductive layer can be selectively formed at a desired place.

  Alternatively, the first electrode layer 932 may be wiped with a CMP method or a polyvinyl alcohol-based porous body and polished so that the surface thereof is planarized. Further, after polishing using the CMP method, the surface of the first electrode layer 932 may be subjected to ultraviolet irradiation, oxygen plasma treatment, or the like.

  Heat treatment may be performed after the first electrode layer 932 is formed. By this heat treatment, moisture contained in the first electrode layer 932 is released. Therefore, the first electrode layer 932 does not cause degassing. Therefore, even when a light-emitting material that easily deteriorates due to moisture is formed over the first electrode layer 932, the light-emitting material is not deteriorated and the display has high reliability. A device can be made.

  The second electrode layer 936 can be formed by an evaporation method, a sputtering method, or the like. Further, an insulating layer may be provided as a passivation layer (protective layer) over the second electrode layer 936. In this way, it is effective to provide a passivation layer so as to cover the second electrode layer 936. As the passivation layer, silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide or aluminum oxide whose nitrogen content is higher than oxygen content, diamond like carbon (DLC), The insulating layer includes a nitrogen-containing carbon film, and a single layer structure of the insulating layer or a laminated structure in combination can be used. Alternatively, a siloxane resin may be used.

At this time, it is preferable to use a film with good coverage as the passivation layer, and it is effective to use a carbon film, particularly a DLC film. Since the DLC film can be formed in a temperature range from room temperature to 100 ° C., even when the heat resistance of the layer 934 is low, the DLC film can be easily stacked. The DLC film is formed by a plasma CVD method (typically, an RF plasma CVD method, a microwave CVD method, an electron cyclotron resonance (ECR) CVD method, a hot filament CVD method, etc.), a combustion flame method, a sputtering method, or an ion beam evaporation method. It can be formed by laser vapor deposition. The reaction gas used for film formation was hydrogen gas and a hydrocarbon-based gas (for example, CH ₄ , C ₂ H ₂ , C ₆ H _6, etc.), ionized by glow discharge, and negative self-bias was applied. Films are formed by accelerated collision of ions with the cathode. The nitrogen-containing carbon film may be formed using C ₂ H ₄ gas and N ₂ gas as reaction gases. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the layer 934. Therefore, the problem that the layer 934 is oxidized during the subsequent sealing process can be prevented.

  The layer 934 formed over the first electrode layer 932 is a light-emitting layer containing at least a light-emitting material. The light-emitting layer is formed using an organic compound, an inorganic compound, or a layer containing an organic compound and an inorganic compound. A layer 934 is provided between the first electrode layer 932 and the second electrode layer 936, whereby the light-emitting element 930 can be obtained.

  The substrate 901 over which the light-emitting element 930 is formed in this manner and the sealing substrate 908 are fixed with a sealant 910, and the light-emitting element 930 is sealed. As the sealant 910, typically, a visible light curable resin, an ultraviolet curable resin, or a thermosetting resin is preferably used. For example, bisphenol A type liquid resin, bisphenol A type solid resin, bromine-containing epoxy resin, bisphenol F type resin, bisphenol AD type resin, phenol type resin, cresol type resin, novolac type resin, cyclic aliphatic epoxy resin, epibis type epoxy Epoxy resins such as resins, glycidyl ester resins, glycidylamine resins, heterocyclic epoxy resins, and modified epoxy resins can be used. Note that the region 948 surrounded by the sealant may be filled with a filler, or nitrogen or the like may be sealed by sealing in a nitrogen atmosphere. In the case of a structure in which light is extracted through the filler, the filler needs to have translucency. Typically, a visible light curable, ultraviolet curable, or thermosetting epoxy resin may be used. Through the above steps, a display device having a display function using a light-emitting element is completed. Further, the filler can be dropped in a liquid state and filled in the display device. When a hygroscopic substance such as a desiccant is used as the filler, a further water absorption effect can be obtained and deterioration of the light-emitting element 930 can be prevented.

  In order to prevent deterioration of the element due to moisture, a desiccant may be provided so as to surround the pixel portion 902. For example, a desiccant may be installed in the recess formed in the sealing substrate. With such a structure, it is possible to achieve a configuration that does not hinder thinning. Moreover, if a desiccant is formed also in the area | region corresponding to a gate wiring layer and a water absorption area is taken widely, the water absorption effect will be high. Further, if a desiccant is formed on the gate wiring layer that does not directly contribute to light emission, the light extraction efficiency is not lowered.

  Note that in this embodiment mode, a case where a light-emitting element is sealed with a glass substrate is shown; however, the sealing process is a process for protecting the light-emitting element from moisture and is mechanically sealed with a cover material. Any of a method, a method of encapsulating with a thermosetting resin or an ultraviolet light curable resin, or a method of encapsulating with a thin film having a high barrier ability such as a metal oxide or a nitride is used. As the cover material, glass, ceramics, plastic, or metal can be used. However, when light is extracted to the cover material side, it must be translucent. In addition, the cover material and the substrate on which the light emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light curable resin, and the resin is cured by heat treatment or ultraviolet light irradiation treatment to form a sealed space. Form. It is also effective to provide a hygroscopic material typified by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on or around the partition layer so as not to block light from the light emitting element. Further, the space between the cover material and the substrate on which the light emitting element is formed can be filled with a thermosetting resin or an ultraviolet light curable resin. In this case, it is effective to add a moisture absorbing material typified by barium oxide in the thermosetting resin or the ultraviolet light curable resin.

  Alternatively, the source or drain electrode layer and the first electrode layer 932 may be in direct contact with each other and may not be electrically connected but may be connected through a wiring layer.

  In this embodiment mode, the terminal portion 906 has a structure in which the FPC 954 is connected to the terminal electrode layer 950 through the anisotropic conductive layer 952 and electrically connected to the outside.

  As shown in FIG. 19A, the display device manufactured in this embodiment includes a driver circuit portion 904 over the same substrate as the pixel portion 902. Note that the present invention is not particularly limited, and an IC chip may be mounted as a peripheral driver circuit by the above-described COG method or TAB method.

  In the display device of the present invention, the screen display driving method is not particularly limited. For example, a dot sequential driving method, a line sequential driving method, a surface sequential driving method, or the like may be used. Typically, a line sequential driving method is used, and a time-division gray scale driving method or an area gray scale driving method may be used as appropriate. The video signal input to the source line of the display device may be an analog signal or a digital signal, and a drive circuit or the like may be designed in accordance with the video signal as appropriate.

  Note that in this embodiment mode, a pattern is formed using ablation by laser beam irradiation in various steps. However, the present invention is not limited to this, and a lithography technique using a photoresist may be used. Of course, other techniques that can selectively form a pattern may be used. In this embodiment mode, a method of forming a pattern using ablation by laser beam irradiation is used in at least one manufacturing process.

  According to the present invention, a layer such as a wiring included in a display device can be formed in a desired shape. In addition, the number of lithography processes using a photoresist can be reduced, and a display device can be manufactured through a simplified process. Therefore, throughput can be improved.

  Further, by applying the present invention, contamination such as impurities contained in a photoresist can be prevented, and a highly reliable display device can be obtained.

  In addition, by using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. Therefore, by applying the present invention to a large-area substrate, many patterns can be formed in a short time, and a display device can be manufactured with high productivity.

  This embodiment mode can be combined with any of Embodiment Modes 1 to 7 as appropriate.

(Embodiment 9)
Various element structures can be applied to a light-emitting element having a display function of a display device. Generally, light-emitting elements are distinguished depending on whether the light-emitting material is an organic compound or an inorganic compound. The former is called an organic EL element, and the latter is called an inorganic EL element. Here, examples of light-emitting elements that can be applied to the present invention will be described with reference to FIGS.

  FIG. 13 shows an organic EL element. In the light-emitting element illustrated in FIG. 13, the layer 860 is sandwiched between the first electrode layer 870 and the second electrode layer 850. One of the first electrode layer 870 and the second electrode layer 850 serves as an anode, and the other serves as a cathode. The anode refers to an electrode that injects holes into the light emitting layer, and the cathode refers to an electrode that injects electrons into the light emitting layer. In this embodiment mode, the first electrode layer 870 is an anode and the second electrode layer 850 is a cathode. The layer 860 has a structure in which a hole injection layer 862, a hole transport layer 864, a light-emitting layer 866, an electron transport layer 868, and an electron injection layer 869 are sequentially stacked.

  The first electrode layer 870 and the second electrode layer 850 are formed using a target in which indium tin oxide (ITO), indium tin oxide containing silicon oxide, and 2 wt% to 20 wt% zinc oxide are mixed in ITO. In addition to indium zinc oxide, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), or the like can be used. In addition to aluminum, an alloy of magnesium and silver, an alloy of aluminum and lithium, or the like can be used to form the first electrode layer 870. The method for forming the first electrode layer 870 is the same as that of the first electrode layer 5012. There is no particular limitation on the method for forming the second electrode layer 850, and the second electrode layer 850 can be formed using, for example, a sputtering method or an evaporation method.

  Note that in order to extract emitted light to the outside, either one or both of the first electrode layer 870 and the second electrode layer 850 uses indium tin oxide or the like, or silver, aluminum, or the like is several nm. It is preferably formed so as to have a thickness of ˜tens of nm so that visible light can be transmitted.

The hole injection layer 862 is a layer having a function of assisting injection of holes from the first electrode layer 870 to the hole transport layer 864. By providing the hole-injecting layer 862, the difference in ionization potential between the first electrode layer 870 and the hole-transporting layer 864 is reduced, and holes are easily injected. The hole injection layer 862 has a lower ionization potential than the material forming the hole transport layer 864 and has a higher ionization potential than the material forming the first electrode layer 870, or the hole transport layer. It is preferable to use a substance whose energy band bends when it is provided as a thin film having a thickness of 1 nm to 2 nm between 864 and the first electrode layer 870. Specific examples of a substance that can be used to form the hole-injection layer 862 include phthalocyanine-based compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPC), or poly (ethylenedioxythiophene) / Examples thereof include a polymer such as a poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS). In other words, the hole injection layer 862 is formed by selecting a substance from which the ionization potential in the hole injection layer 862 is relatively smaller than the ionization potential in the hole transport layer 864 from among the hole transport materials. can do. In the case where the hole injecting layer 862 is provided, the first electrode layer 870 is preferably formed using a substance having a high work function such as indium tin oxide. Note that the present invention is not particularly limited, and the hole injection layer 862 may not be provided.

The hole-transport layer 864 is a layer having a function of transporting holes injected from the first electrode layer 870 side to the light-emitting layer 866. In this manner, by providing the hole transport layer 864, the distance between the first electrode layer 870 and the light-emitting layer 866 can be increased. As a result, the metal contained in the first electrode layer 870 and the like can be separated from the metal. This can prevent the emission of light from disappearing. The hole-transport layer 864 is preferably formed using a hole-transport substance, and particularly preferably formed using a substance having a hole mobility of 1 × 10 ⁻⁶ cm ² / Vs or higher. Note that the hole-transporting substance has higher hole mobility than electrons, and the ratio of the hole mobility to the electron mobility (= hole mobility / electron mobility) is preferably 100. Larger than the substance. Specific examples of a substance that can be used for forming the hole-transport layer 864 include 4,4′-bis [N- (1-naphthyl) -N-phenylamino] biphenyl (abbreviation: NPB), 4, 4′-bis [N- (3-methylphenyl) -N-phenylamino] biphenyl (abbreviation: TPD), 4,4 ′, 4 ″ -tris (N, N-diphenylamino) triphenylamine (abbreviation: TDATA), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenylamino] triphenylamine (abbreviation: MTDATA), 4,4′-bis {N- [4- ( N, N-di-m-tolylamino) phenyl] -N-phenylamino} biphenyl (abbreviation: DNTPD), 1,3,5-tris [N, N-di (m-tolyl) amino] benzene (abbreviation: m -MTDAB), 4,4 ', 4''- Squirrel (N- carbazolyl) triphenylamine (abbreviation: TCTA), phthalocyanine _{(abbreviation:} H 2 Pc), copper phthalocyanine (abbreviation: CuPc), or vanadyl phthalocyanine (abbreviation: VOPc), 4,4'-bis [N- ( 4-biphenylyl) -N-phenylamino] biphenyl (abbreviation: BBPB) and the like. Note that the hole-transport layer 864 may have a single-layer structure or a stacked structure.

  The light-emitting layer 866 is a layer having a light-emitting function and includes a light-emitting material made of an organic compound. Moreover, the inorganic compound may be included. The organic compound contained in the light-emitting layer 866 is not particularly limited as long as it is a light-emitting organic compound, and various low-molecular organic compounds and high-molecular organic compounds can be used. As the light-emitting organic compound, either a fluorescent light-emitting material or a phosphorescent light-emitting material can be used. The light-emitting layer 866 may be a layer including only a light-emitting organic compound, or may have a structure in which a light-emitting organic compound is dispersed in a host material having an energy gap larger than that of the organic compound. Note that in the case where the light-emitting layer 866 is a layer in which a plurality of compounds is mixed, such as a layer including a light-emitting material formed using an organic compound and a host material, the light-emitting layer 866 can be formed by a co-evaporation method. Here, co-evaporation refers to a vapor deposition method in which raw materials are vaporized from a plurality of vapor deposition sources provided in one processing chamber, the vaporized raw materials are mixed in a gas phase state, and deposited on an object to be processed.

The electron transport layer 868 is a layer having a function of transporting electrons injected from the second electrode layer 850 to the light emitting layer 866. In this manner, by providing the electron transport layer 868, the distance between the second electrode layer 850 and the light-emitting layer 866 can be increased, and as a result, the metal is contained in the second electrode layer 850 and the like. Thus, it is possible to prevent the light emission from disappearing. The electron transporting layer 868 is preferably formed using an electron transporting substance, and particularly preferably formed using a substance having an electron mobility of 1 × 10 ⁻⁶ cm ² / Vs or higher. Note that the electron transporting substance has higher electron mobility than holes, and the ratio of the electron mobility to the hole mobility (= electron mobility / hole mobility) is preferably from 100. Also refers to a large substance. Specific examples of a substance that can be used for forming the electron-transport layer 868 include tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (4-methyl-8-quinolinolato) aluminum (abbreviation: Almq _3). ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), bis [2- In addition to metal complexes such as (2-hydroxyphenyl) benzoxazolate] zinc (abbreviation: Zn (BOX) ₂ ), bis [2- (2-hydroxyphenyl) benzothiazolate] zinc (abbreviation: Zn (BTZ) ₂ ) 2- (4-biphenylyl) -5- (4-tert-butylphenyl) -1,3,4-oxadiazole (approximately) Name: PBD), 1,3-bis [5- (p-tert-butylphenyl) -1,3,4-oxadiazol-2-yl] benzene (abbreviation: OXD-7), 3- (4- tert-butylphenyl) -4-phenyl-5- (4-biphenylyl) -1,2,4-triazole (abbreviation: TAZ), 3- (4-tert-butylphenyl) -4- (4-ethylphenyl) -5- (4-biphenylyl) -1,2,4-triazole (abbreviation: p-EtTAZ), bathophenanthroline (abbreviation: BPhen), bathocuproin (abbreviation: BCP), 4,4-bis (5-methylbenzoxa) And sol-2-yl) stilbene (abbreviation: BzOs). The electron transport layer 868 may have a single layer structure or a stacked structure.

The electron injection layer 869 is a layer having a function of assisting injection of electrons from the second electrode layer 850 to the electron transport layer 868. The electron injection layer 869 has an electron affinity higher than that of a material used for forming the electron transport layer 868 among materials that can be used to form the electron transport layer 868 such as BPhen, BCP, p-EtTAZ, TAZ, and BzOs. It can be formed by selecting and using a substance having a relatively large value. By forming the electron injecting layer 869 in this manner, the difference in electron affinity between the second electrode layer 850 and the electron transporting layer 868 is reduced, and electrons are easily injected. The electron injection layer 869 includes an alkali metal such as lithium (Li) or cesium (Cs), an oxide of alkali metal such as lithium oxide, potassium oxide, or sodium oxide, calcium oxide, or magnesium oxide. Alkali earth metal oxides, fluorides of alkali metals such as lithium fluoride and cesium fluoride, fluorides of alkaline earth metals such as calcium fluoride, or alkalis such as magnesium (Mg) and calcium (Ca) Inorganic materials such as earth metals may be included. Further, the electron injection layer 869 may include an organic compound such as BPhen, BCP, p-EtTAZ, TAZ, or BzOs, an alkali metal fluoride such as LiF, or an alkaline earth metal such as CaF _2. It may be composed of an inorganic compound such as fluoride. In this way, the electron injection layer 869 is provided as a 1 nm to 2 nm thin film using an inorganic compound such as an alkali metal fluoride such as LiF or an alkaline earth metal fluoride such as CaF _2. When the energy band is bent or a tunnel current flows through the electron injection layer 869, injection of electrons from the second electrode layer 850 to the electron transport layer 868 is facilitated.

  Note that a hole generation layer may be provided instead of the hole injection layer 862, or an electron generation layer may be provided instead of the electron injection layer 869.

  Here, the hole generation layer is a layer that generates holes. The hole generating layer can be formed by mixing at least one substance selected from the hole transporting substances and a substance that exhibits an electron accepting property with respect to the hole transporting substance. Here, as the hole transporting substance, a substance similar to the substance that can be used for forming the hole transporting layer 864 can be used. As the substance exhibiting electron accepting properties, it is preferable to use a metal oxide such as molybdenum oxide, vanadium oxide, ruthenium oxide, or rhenium oxide.

  The electron generating layer is a layer that generates electrons. The electron generating layer can be formed by mixing at least one substance selected from electron transporting substances and a substance exhibiting an electron donating property with respect to the electron transporting substance. Here, as the electron transporting substance, a substance similar to the substance that can be used to form the electron transporting layer 868 can be used. Moreover, as the substance exhibiting electron donating property, a substance selected from alkali metals and alkaline earth metals, specifically, lithium (Li), calcium (Ca), sodium (Na), potassium (K), Magnesium (Mg) or the like can be used.

  The hole injection layer 862, the hole transport layer 864, the light-emitting layer 866, the electron transport layer 868, and the electron injection layer 869 may be formed using an evaporation method, a droplet discharge method, a coating method, or the like, respectively. The first electrode layer 870 or the second electrode layer 850 may be formed by a sputtering method, an evaporation method, or the like.

  In this embodiment mode, the layer 860 only needs to include at least the light-emitting layer 866, and has other functions (a hole injection layer 862, a hole transport layer 864, an electron transport layer 868, an electron injection layer 869, or the like). ) May be provided as appropriate.

  Alternatively, the first electrode layer 870 may be a cathode and the second electrode layer 850 may be an anode. In that case, the layer 860 has a structure in which an electron injection layer, an electron transport layer, a light-emitting layer, a hole transport layer, and a hole injection layer are sequentially stacked from the first electrode layer 870 side.

  Next, an inorganic EL element will be described with reference to FIGS. Inorganic EL elements are classified into a dispersion-type inorganic EL element and a thin-film inorganic EL element depending on the element structure. The former has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the latter has a light-emitting layer made of a thin film of the light-emitting material. It is common in the point that requires. Note that the obtained light emission mechanism includes donor-acceptor recombination light emission using a donor level and an acceptor level, and localized light emission using inner-shell electron transition of a metal ion. In general, the dispersion-type inorganic EL often has donor-acceptor recombination light emission, and the thin-film inorganic EL element often has localized light emission.

  A light-emitting material that can be used in the present invention includes a base material and an impurity element. The impurity element functions as a light emission center. By changing the impurity element to be contained, light emission of various colors can be obtained. As a method for manufacturing the light-emitting material, various methods such as a solid phase method and a liquid phase method (coprecipitation method) can be used. Also, spray pyrolysis method, metathesis method, precursor thermal decomposition method, reverse micelle method, method combining these methods with high temperature firing, liquid phase method such as freeze-drying method, etc. can be used.

  The solid phase method is a method in which a base material and an impurity element or a compound containing the impurity element are weighed, mixed in a mortar, heated and fired in an electric furnace, reacted, and the base material contains the impurity element. The firing temperature is preferably 700 ° C to 1500 ° C. This is because the solid phase reaction does not proceed when the temperature is too low, and the base material is decomposed when the temperature is too high. In addition, although baking may be performed in a powder state, it is preferable to perform baking in a pellet state. Although firing at a relatively high temperature is required, it is a simple method, so it has high productivity and is suitable for mass production.

  The liquid phase method (coprecipitation method) is a method in which a base material or a compound containing the base material and an impurity element or a compound containing the impurity element are reacted in a solution, dried, and then fired. The particles of the luminescent material are uniformly distributed, and the reaction can proceed even at a low firing temperature with a small particle size.

As a base material used for the light-emitting material, sulfide, oxide, or nitride can be used. Examples of sulfides that can be used include zinc sulfide, cadmium sulfide, calcium sulfide, yttrium sulfide, gallium sulfide, strontium sulfide, and barium sulfide. As the oxide, for example, zinc oxide, yttrium oxide, or the like can be used. As the nitride, for example, aluminum nitride, gallium nitride, indium nitride, or the like can be used. Furthermore, zinc selenide, zinc telluride, and the like can also be used, such as calcium sulfide-gallium sulfide (CaGa ₂ S ₄ ), strontium sulfide-gallium sulfide (SrGa ₂ S ₄ ), barium sulfide-gallium sulfide (BaGa ₂ S ₄ ), and the like. Or a ternary mixed crystal.

  As impurity elements for localized emission, manganese (Mn), copper (Cu), samarium (Sm), terbium (Tb), erbium (Er), thulium (Tm), europium (Eu), cerium (Ce), praseodymium (Pr) or the like can be used. Note that a halogen element such as fluorine (F) or chlorine (Cl) may be added. The halogen element can also function as charge compensation.

  On the other hand, a light-emitting material containing a first impurity element that forms a donor level and a second impurity element that forms an acceptor level can be used as the impurity element for donor-acceptor recombination light emission. As the first impurity element, for example, fluorine (F), chlorine (Cl), aluminum (Al), or the like can be used. For example, copper (Cu), silver (Ag), or the like can be used as the second impurity element.

  In the case where a light-emitting material for donor-acceptor recombination light emission is synthesized using a solid-phase method, a base material, a first impurity element or a compound containing the first impurity element, a second impurity element, or a second impurity element Each compound containing an impurity element is weighed and mixed in a mortar, and then heated and fired in an electric furnace. As the base material, the above-described base material can be used, and as the first impurity element or the compound containing the first impurity element, for example, fluorine (F), chlorine (Cl), aluminum sulfide, or the like is used. As the second impurity element or the compound containing the second impurity element, for example, copper (Cu), silver (Ag), copper sulfide, silver sulfide, or the like can be used. The firing temperature is preferably 700 ° C to 1500 ° C. This is because the solid phase reaction does not proceed when the temperature is too low, and the base material is decomposed when the temperature is too high. In addition, although baking may be performed in a powder state, it is preferable to perform baking in a pellet state.

  In addition, as an impurity element in the case of using a solid phase reaction, a compound including a first impurity element and a second impurity element may be used in combination. In this case, since the impurity element is easily diffused and the solid-phase reaction easily proceeds, a uniform light emitting material can be obtained. Further, since no extra impurity element is contained, a light-emitting material with high purity can be obtained. As the compound constituted by the first impurity element and the second impurity element, for example, copper chloride, silver chloride, or the like can be used.

  Note that the concentration of these impurity elements may be 0.01 atom% to 10 atom% with respect to the base material, and is preferably in the range of 0.05 atom% to 5 atom%.

In the case of a thin-film inorganic EL, the light emitting layer is a layer containing the above light emitting material, and a physical vapor deposition method (PVD) such as a resistance heating vapor deposition method, a vacuum vapor deposition method such as an electron beam vapor deposition (EB vapor deposition) method, or a sputtering method. ), Chemical vapor deposition (CVD) such as metal organic CVD, hydride transport low pressure CVD, atomic epitaxy (ALE), or the like.

  FIGS. 14A to 14C illustrate an example of a thin-film inorganic EL element that can be used as a light-emitting element. 14A to 14C, the light-emitting element includes a first electrode layer 50, a layer 51, and a second electrode layer 53. The layer 51 includes at least the light emitting layer 52.

  In the light-emitting element illustrated in FIG. 14A, a layer 51 including only the light-emitting layer 52 is sandwiched between the first electrode layer 50 and the second electrode layer 53. 14B and 14C is the same as the light-emitting element in FIG. 14A between the first electrode layer 50 or the second electrode layer 53 and the light-emitting layer 52. In this structure, an insulating layer is provided. 14B includes an insulating layer 54 between the first electrode layer 50 and the light-emitting layer 52, and the light-emitting element illustrated in FIG. 14C includes the first electrode layer 50 and the light-emitting element. An insulating layer 54 a is provided between the light emitting layer 52 and an insulating layer 54 b is provided between the second electrode layer 53 and the light emitting layer 52. Thus, the insulating layer may be provided only between one of the pair of electrode layers sandwiching the light emitting layer, or may be provided between both. The insulating layer may have a single layer structure or a laminated structure.

  14B, the insulating layer 54 is provided so as to be in contact with the first electrode layer 50. However, the order of the insulating layer and the light emitting layer is reversed so as to be in contact with the second electrode layer 53. An insulating layer 54 may be provided.

  Next, a dispersion-type inorganic EL element will be described. In the case of a dispersion-type inorganic EL element, a particulate light emitting material is dispersed in a binder to form a film light emitting layer. When particles having a desired size cannot be obtained sufficiently by the method for manufacturing a light emitting material, the particles may be processed into particles by pulverization or the like in a mortar or the like. A binder is a substance for fixing a granular light emitting material in a dispersed state and maintaining the shape as a light emitting layer. The light emitting material is uniformly dispersed and fixed in the light emitting layer by the binder.

  In the case of a dispersion-type inorganic EL element, a light emitting layer can be formed by a droplet discharge method capable of selectively forming a light emitting layer, a printing method (screen printing, offset printing, etc.), a coating method such as a spin coating method, or a dipping method. A dispenser method or the like can also be used. The film thickness is not particularly limited, but is preferably in the range of 10 nm to 1000 nm. In the light-emitting layer including the light-emitting material and the binder, the ratio of the light-emitting material may be 50 wt% or more and 80 wt% or less.

  FIGS. 15A to 15C illustrate an example of a dispersion-type inorganic EL element that can be used as a light-emitting element. 15A to 15C, the light-emitting element includes a first electrode layer 60, a layer 65, and a second electrode layer 63. The layer 65 includes at least a light emitting layer.

  The light-emitting element in FIG. 15A has a stacked structure of a first electrode layer 60, a light-emitting layer 62, and a second electrode layer 63, and includes a light-emitting material 61 held in the light-emitting layer 62 by a binder.

As a binder that can be used in this embodiment mode, an insulating material can be used. Specifically, an organic insulating material or an inorganic insulating material can be used, and a mixed material of an organic insulating material and an inorganic insulating material may be used. As the organic insulating material, a polymer having a relatively high dielectric constant such as a cyanoethyl cellulose resin, or a resin such as polyethylene, polypropylene, polystyrene resin, silicone resin, epoxy resin, or vinylidene fluoride can be used. Alternatively, a heat-resistant polymer such as aromatic polyamide, polybenzimidazole, or siloxane resin may be used. Note that a siloxane resin corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent. Moreover, resin materials such as vinyl resins such as polyvinyl alcohol and polyvinyl butyral, phenol resins, novolac resins, acrylic resins, melamine resins, urethane resins, and oxazole resins (polybenzoxazole) may be used. The dielectric constant can be adjusted by appropriately mixing fine particles of high dielectric constant such as barium titanate (BaTiO ₃ ) and strontium titanate (SrTiO ₃ ) with these resins.

Examples of the inorganic material contained in the binder include silicon oxide, silicon nitride, silicon containing oxygen and nitrogen, aluminum nitride, aluminum or aluminum oxide containing oxygen and nitrogen, titanium oxide, BaTiO ₃ , SrTiO ₃ , lead titanate, niobic acid It can be formed of a material selected from materials including potassium, lead niobate, tantalum oxide, barium tantalate, lithium tantalate, yttrium oxide, zirconium oxide, and other inorganic materials. By including an inorganic material having a high dielectric constant in the organic material (by addition or the like), the dielectric constant of the light emitting layer made of the light emitting material and the binder can be further controlled, and the dielectric constant can be further increased. When a mixed layer of an inorganic insulating material and an organic insulating material is used for the binder and the dielectric constant is high, a larger charge can be induced in the light emitting material.

  In the manufacturing process, the light-emitting material is dispersed in a solution containing a binder. As a solvent for the solution containing a binder that can be used in this embodiment mode, a method for forming a light-emitting layer by dissolving the binder material (various methods) The wet process) and a solvent capable of producing a solution having a viscosity suitable for a desired film thickness may be selected as appropriate. For example, when a siloxane resin is used as the binder, propylene glycol monomethyl ether, propylene glycol monomethyl ether acetate (also referred to as PGMEA), 3-methoxy-3-methyl-1-butanol (also referred to as MMB) can be used. ) Etc. can be used.

  The light-emitting element illustrated in FIGS. 15B and 15C includes the light-emitting element in FIG. 15A between the first electrode layer 60 or the second electrode layer 63 and the light-emitting layer 62. In this structure, an insulating layer is provided. The light-emitting element illustrated in FIG. 15B includes an insulating layer 64 between the first electrode layer 60 and the light-emitting layer 62, and the light-emitting element illustrated in FIG. An insulating layer 64 a is provided between the light emitting layer 62 and an insulating layer 64 b is provided between the second electrode layer 63 and the light emitting layer 62. Thus, the insulating layer may be provided only between one of the pair of electrode layers sandwiching the light emitting layer, or may be provided between both. The insulating layer may have a single layer structure or a laminated structure.

  In FIG. 15B, the insulating layer 64 is provided so as to be in contact with the first electrode layer 60, but the order of the insulating layer and the light emitting layer is reversed so as to be in contact with the second electrode layer 63. An insulating layer 64 may be provided.

  Insulating layers such as the insulating layer 54 in FIG. 14 and the insulating layer 64 in FIG. 15 are not particularly limited, but preferably have a high withstand voltage and a dense film quality. Furthermore, it is preferable that the dielectric constant is high. For example, silicon oxide, yttrium oxide, titanium oxide, aluminum oxide, hafnium oxide, tantalum oxide, barium titanate, strontium titanate, lead titanate, silicon nitride, zirconium oxide, etc. Can be used. These insulating layers can be formed by a sputtering method, a vapor deposition method, a CVD method, or the like. The insulating layer may be formed by dispersing particles of these insulating materials in a binder. The binder material may be formed using the same material and method as the binder contained in the light emitting layer. The film thickness is not particularly limited, but is preferably in the range of 10 nm to 1000 nm.

  The inorganic EL elements shown in FIGS. 14 and 15 can emit light by applying a voltage between a pair of electrode layers sandwiching the light emitting layer, but can operate in either DC driving or AC driving.

  The light-emitting element described in this embodiment (FIGS. 13 to 15) can be provided as the display element of the display device described in the above embodiment.

  For example, when the organic EL element shown in FIG. 13 is applied to the display device shown in FIG. 12, the first electrode layer 5012 or the second electrode layer 5018 is the first electrode layer 870 or the second electrode layer 850. It corresponds to. The layer 5016 corresponds to the layer 860. Similarly, in the display device illustrated in FIG. 19, the first electrode layer 932 or the second electrode layer 936 corresponds to the first electrode layer 870 or the second electrode layer 850. The layer 934 corresponds to the layer 860.

  The same applies to the case where the inorganic EL element shown in FIGS. 14 and 15 is applied to the display device shown in FIG. The first electrode layer 5012 or the second electrode layer 5018 is formed on the first electrode layer 50 or the second electrode layer 53 in FIG. 14 or the first electrode layer 60 or the second electrode layer 63 in FIG. Equivalent to. The layer 5016 corresponds to the layer 51 or the layer 65. Similarly, in the case of the display device illustrated in FIG. 19, the first electrode layer 932 or the second electrode layer 936 includes the first electrode layer 50 or the second electrode layer 53 in FIG. This corresponds to the first electrode layer 60 or the second electrode layer 63. The layer 934 corresponds to the layer 51 or the layer 65.

  According to the present invention, a layer such as an electrode constituting an element can be formed in a desired shape. In addition, the number of lithography processes using a photoresist can be reduced and simplified, and throughput can be improved.

  This embodiment mode can be freely combined with any of Embodiment Modes 1 to 8 as appropriate.

(Embodiment 10)
In this embodiment, a liquid crystal display device is described.

  26A is a top view of the liquid crystal display device, and FIG. 26B is a cross-sectional view taken along line GH in FIG.

  As shown in FIG. 26A, a pixel region 606, a driving circuit region 608a that is a scanning line driving circuit, and a driving circuit region 608b that is a scanning line driving region are separated from each other with a substrate 600 and a sealing substrate 695 by a sealant 692. A driving circuit region 607 which is a signal line driving circuit which is sealed between and formed on the substrate 600 by an IC driver is provided. A transistor 622 and a capacitor 623 are provided in the pixel region 606, and a driver circuit including a transistor 620 and a transistor 621 is provided in the driver circuit region 608b. As the substrate 600, a substrate similar to that in the above embodiment can be used. In general, a substrate made of a synthetic resin is feared to have a lower heat-resistant temperature than other substrates, but it can be adopted by transposing after a manufacturing process using a substrate with high heat resistance. It becomes possible.

  In the pixel region 606, a transistor 622 serving as a switching element is provided over the substrate 600 with the base insulating layer 604a and the base insulating layer 604b interposed therebetween. In this embodiment, a multi-gate thin film transistor is used as the transistor 622. The transistor 622 includes a semiconductor layer having an impurity region functioning as a source region and a drain region, a gate insulating layer, a gate electrode layer having a two-layer structure, a source electrode layer, and a drain electrode layer. The electrode layer is in contact with and electrically connected to the impurity region of the semiconductor layer and the pixel electrode layer 630.

  The source or drain electrode layer has a stacked structure, and the source or drain electrode layers 644 a and 644 b are electrically connected to the pixel electrode layer 630 through openings formed in the insulating layer 615. The opening formed in the insulating layer 615 can be formed using ablation by irradiation with a laser beam as described in the above embodiment mode. In this embodiment, a low-melting point metal (chromium in this embodiment) that is relatively easily evaporated is used for the source electrode layer or the drain electrode layer 644b, and the source electrode layer or the drain electrode is used for the source electrode layer or the drain electrode layer 644a. A refractory metal (tungsten in this embodiment) that is harder to evaporate than the layer 644b is used. A source or drain electrode layer 644b is irradiated with a laser beam from the insulating layer 615 side through a photomask, and an irradiation region of the source or drain electrode layer 644b and insulation on the irradiation region are irradiated by the irradiated energy. The layer 615 can be removed to form an opening reaching the source or drain electrode layer 644b. Further, with the insulating layer 615 as a mask, the source or drain electrode layer 644b is removed by etching, so that an opening reaching the source or drain electrode layer 644a is formed. When the opening is formed by etching, the opening may be performed using a wet etching method, a dry etching method, or both, or may be performed a plurality of times.

  The pixel electrode layer 630 is formed in the opening from which the source or drain electrode layers 644a and 644b are exposed, and the source or drain electrode layers 644a and 644b and the pixel electrode layer 630 can be electrically connected. Note that the pixel electrode layer 630 may be formed without forming an opening in the source or drain electrode layer 644b.

  Thin film transistors can be manufactured by a number of methods. For example, a crystalline semiconductor layer is applied as the active layer. A gate electrode layer is provided over the crystalline semiconductor layer with a gate insulating layer interposed therebetween. An impurity element can be added to the active layer using the gate electrode layer. In this manner, by adding the impurity element using the gate electrode layer, it is not necessary to form a mask for adding the impurity element. The gate electrode layer can have a single-layer structure or a stacked structure. The impurity region can be a high concentration impurity region and a low concentration impurity region by controlling the concentration thereof. A thin film transistor having such a low concentration impurity region is referred to as an LDD (Light Doped Drain) structure. The low-concentration impurity region can be formed so as to overlap with the gate electrode. Such a thin film transistor is referred to as a GOLD (Gate Overlapped LDD) structure. The polarity of the thin film transistor is n-type by using phosphorus (P) or the like in the impurity region. When p-type is used, boron (B) or the like may be added. After that, an insulating layer 611 and an insulating layer 612 that cover the gate electrode layer and the like are formed. A dangling bond in the crystalline semiconductor layer can be terminated by hydrogen mixed in the insulating layer 611 (and the insulating layer 612).

  In order to further improve the flatness, an insulating layer 615 may be formed as an interlayer insulating layer. The insulating layer 615 can be formed with a single-layer structure or a stacked structure using an organic insulating material or an inorganic insulating material. For example, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide or aluminum oxide whose nitrogen content is higher than oxygen content, diamond like carbon (DLC), polysilazane, nitrogen content It can be formed of a material selected from substances including carbon (CN), phosphorus glass (PSG), phosphorus boron glass (BPSG), alumina, and other inorganic insulating materials. An organic insulating material may be used, and the organic material may be either photosensitive or non-photosensitive, and polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, siloxane resin, or the like can be used. Note that a siloxane resin corresponds to a resin including a Si—O—Si bond. Siloxane has a skeleton structure formed of a bond of silicon (Si) and oxygen (O). As a substituent, an organic group containing at least hydrogen (for example, an alkyl group or an aromatic hydrocarbon) is used. A fluoro group may be used as a substituent. Alternatively, an organic group containing at least hydrogen and a fluoro group may be used as a substituent.

  In addition, by using a crystalline semiconductor layer, the pixel region and the driver circuit region can be formed over the same substrate. In that case, the transistor in the pixel region and the transistor in the driver circuit region 608b are formed at the same time. Transistors used for the driver circuit region 608b constitute a CMOS circuit. Although the thin film transistor included in the CMOS circuit has a GOLD structure, an LDD structure such as the transistor 622 can also be used.

  Although not limited to this embodiment mode, the thin film transistor in the pixel region 606 may have a single gate structure in which one channel formation region is formed, a double gate structure in which two channel formation regions are formed, or a triple gate structure in which three channel formation regions are formed. good. The thin film transistor in the peripheral driver circuit region may have a single gate structure, a double gate structure, or a triple gate structure.

  Note that not only the method for manufacturing the thin film transistor described in this embodiment mode, but a top gate type (for example, a forward staggered type), a bottom gate type (for example, an inverted staggered type), or a gate insulating film above and below a channel region is used. A dual gate type or other structure having two arranged gate electrode layers can also be applied.

  Next, an insulating layer 631 called an alignment film is formed by a printing method or a droplet discharge method so as to cover the pixel electrode layer 630. Note that the insulating layer 631 can be selectively formed by a screen printing method or an offset printing method. Thereafter, a rubbing process is performed. This rubbing process may not be performed in the liquid crystal mode, for example, the VA mode. The insulating layer 633 functioning as an alignment film is similar to the insulating layer 631. Subsequently, a sealant 692 is formed in a peripheral region where pixels are formed by a droplet discharge method.

  After that, a sealing substrate provided with an insulating layer 633 that functions as an alignment film, a conductive layer 634 that functions as a counter electrode, a colored layer 635 that functions as a color filter, a polarizer 641 (also referred to as a polarizing plate), and a polarizer 642. 695 and a substrate 600 which is a TFT substrate are attached to each other with a spacer 637, and a liquid crystal layer 632 is provided in the gap. Since the liquid crystal display device in this embodiment is a transmissive type, a polarizer (polarizing plate) 643 is provided on the side opposite to the surface of the substrate 600 having elements. The polarizer can be provided on the substrate by an adhesive layer. A filler may be mixed in the sealing material, and a sealing film (black matrix) or the like may be formed on the sealing substrate 695. Note that the color filter or the like may be formed from a material exhibiting red (R), green (G), and blue (B) when the liquid crystal display device is set to full color display. It may be formed of a material that eliminates or exhibits at least one color.

  When a continuous additive color mixing method (field sequential method) in which RGB light emitting diodes (LEDs) are arranged in the backlight and color display is performed in a time-sharing manner, a color filter may not be provided. The black matrix is preferably provided so as to overlap with the transistor or the CMOS circuit in order to reduce reflection of external light due to the wiring of the transistor or the CMOS circuit. Note that the black matrix may be formed so as to overlap with the capacitor. This is because reflection by the metal film constituting the capacitor element can be prevented.

  As a method for forming the liquid crystal layer, a dispenser method (dropping method) or an injection method in which liquid crystal is injected by using a capillary phenomenon after the substrate 600 having an element and the sealing substrate 695 are bonded to each other can be used. The dropping method is preferably applied when handling a large-area substrate to which it is difficult to apply the implantation method.

  The spacer may be provided by spraying particles of several μm, but in this embodiment, a method of forming a resin film on the entire surface of the substrate and then etching it is employed. After applying such a spacer material with a spinner, it is formed into a predetermined pattern by exposure and development processing. Further, it is cured by heating at 150 ° C. to 200 ° C. in a clean oven or the like. The spacers produced in this way can have different shapes depending on the conditions of exposure and development processing, but preferably, the spacers are columnar and the top is flat, so that the opposite substrate is When combined, the mechanical strength of the liquid crystal display device can be ensured. The shape can be a conical shape, a pyramid shape or the like, and there is no particular limitation.

  Subsequently, an FPC 694 which is a wiring board for connection is provided on the terminal electrode layers 678a and 678b electrically connected to the pixel region with an anisotropic conductive layer 696 interposed therebetween. The FPC 694 plays a role of transmitting an external signal or potential. Through the above steps, a liquid crystal display device having a display function can be manufactured.

Note that a wiring included in the transistor, a gate electrode layer, a pixel electrode layer 630, and a conductive layer 634 which is a counter electrode layer were formed using a target in which indium tin oxide (ITO) and indium oxide were mixed with zinc oxide (ZnO). IZO (indium zinc oxide), conductive material in which silicon oxide (SiO ₂ ) is mixed with indium oxide, organic indium, organic tin, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium containing titanium oxide Oxide, indium tin oxide including titanium oxide, tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr ), Cobalt (Co), nickel (Ni), h It can be selected from metals such as tan (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), or alloys or metal nitrides based on the metal.

  You may laminate | stack in the state which had the phase difference plate between the polarizing plate and the liquid-crystal layer.

  Note that although a TN liquid crystal panel is described in this embodiment mode, the above process can be similarly applied to other types of liquid crystal panels. For example, the present embodiment can be applied to a horizontal electric field type liquid crystal panel in which an electric field is applied in parallel with a glass substrate to align liquid crystals. Further, the present embodiment can be applied to a VA (Vertical Alignment) liquid crystal panel.

  23 and 24 show the pixel structure of the VA liquid crystal panel. FIG. 23 is a plan view, and FIG. 24 shows a cross-sectional structure corresponding to the line segment IJ shown in the figure. The following description will be given with reference to both the drawings.

  In this pixel structure, a single pixel has a plurality of pixel electrodes, and a TFT is connected to each pixel electrode. Each TFT is configured to be driven by a different gate signal. In other words, a multi-domain designed pixel has a configuration in which signals applied to individual pixel electrodes are controlled independently.

  The pixel electrode layer 1624 is connected to the TFT 1628 through a wiring layer 1618 through an opening (contact hole) 1623. The pixel electrode layer 1626 is connected to the TFT 1629 through an opening (contact hole) 1627 through a wiring layer 1619. The gate wiring layer 1602 of the TFT 1628 and the gate electrode layer 1603 of the TFT 1629 are separated so that different gate signals can be given. On the other hand, the wiring layer 1616 functioning as a data line is used in common by the TFT 1628 and the TFT 1629.

  The pixel electrode layer 1624 and the pixel electrode layer 1626 may be formed by ablation by laser beam irradiation through a photomask as described in the above embodiment mode. A desired pixel electrode layer can be obtained by forming a mask made of a light absorption layer by laser ablation and etching the lower layer to be processed using the mask. Thus, when the present invention is used, the number of lithography processes can be reduced, so that the process can be simplified and the throughput can be improved. In addition, impurity contamination caused by photoresist can be prevented.

  The pixel electrode layer 1624 and the pixel electrode layer 1626 have different shapes and are separated by a slit 1625. A pixel electrode layer 1626 is formed so as to surround the outside of the V-shaped pixel electrode layer 1624. The timing of the voltage applied to the pixel electrode layer 1624 and the pixel electrode layer 1626 is varied depending on the TFT 1628 and the TFT 1629, thereby controlling the alignment of the liquid crystal. A counter substrate 1601 is provided with a light-blocking layer 1632, a coloring layer 1636, and a counter electrode layer 1640. In addition, a planarization layer 1637 is formed between the colored layer 1636 and the counter electrode layer 1640 to prevent alignment disorder of the liquid crystal. FIG. 25 shows a structure on the counter substrate side. The counter electrode layer 1640 is a common electrode between different pixels, but a slit 1641 is formed. By arranging the slits 1641 and the slits 1625 on the pixel electrode layer 1624 side and the pixel electrode layer 1626 side to alternately engage with each other, an oblique electric field can be effectively generated to control the alignment of the liquid crystal. Thereby, the direction in which the liquid crystal is aligned can be varied depending on the location, and the viewing angle is widened.

  This embodiment mode can be freely combined with any of Embodiment Modes 1 to 6 as appropriate.

  By applying the present invention, the number of lithography processes can be reduced and the manufacturing process can be simplified; thus, throughput can be improved. As a result, a display device can be manufactured with high productivity.

  In addition, since it is possible to omit the resist coating, the developing process, etc., it is not necessary to rotate the substrate, and the large area substrate can be easily processed. Further, by using a planar laser beam having a large area, such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. As a result, many patterns can be formed on a large-area substrate in a short time, and a display device can be manufactured with high productivity.

(Embodiment 11)
In this embodiment, a liquid crystal display device using a liquid crystal display element as a display element will be described.

  In the display device illustrated in FIG. 27, a transistor 220 which is an inverted staggered transistor, a pixel electrode layer 251, an insulating layer 252, an insulating layer 253, a liquid crystal layer 254, a spacer 281, an insulating layer 235, and a counter region are formed over a substrate 250. Electrode layer 256, color filter 258, black matrix 257, counter substrate 210, polarizing plate (polarizer) 231, polarizing plate (polarizer) 233, sealing material 282 in sealing region, terminal electrode layer 287, anisotropic conductive layer 288 and FPC 286 are provided.

  A gate electrode layer, a semiconductor layer, a source electrode layer, a drain electrode layer, and a pixel electrode layer 251 of the transistor 220 which is an inverted staggered transistor manufactured in this embodiment are formed using a laser beam as described in Embodiment 1 and the like. A mask may be formed by using ablation by irradiation and then etched using the mask. As described above, when the present invention is used, the number of lithography processes using a photoresist can be reduced and simplified, and the throughput can be improved.

  In this embodiment, an amorphous semiconductor layer is used as a semiconductor layer for forming a channel, and a semiconductor layer having one conductivity type provided between the source or drain electrode layer and the semiconductor layer is necessary. It may be formed according to. In this embodiment mode, an amorphous n-type semiconductor layer is stacked as a semiconductor layer and a semiconductor layer having one conductivity type. In addition, an n-type semiconductor layer is formed as a semiconductor layer for forming a channel, and an NMOS structure of an n-channel thin film transistor, a PMOS structure of a p-channel thin film transistor in which a p-type semiconductor layer is formed, an n-channel thin film transistor and a p-channel thin film transistor A CMOS structure can be produced.

In order to impart conductivity, an element imparting conductivity is added by doping, and an impurity region is formed in the semiconductor layer, whereby an n-channel transistor or a P-channel transistor can be formed. Instead of forming the n-type semiconductor layer, conductivity may be imparted to the semiconductor layer by performing plasma treatment with PH ₃ gas.

  In this embodiment, the transistor 220 is an n-channel inverted staggered thin film transistor. Alternatively, a channel-protective inverted staggered thin film transistor in which a protective layer is provided over the channel region of the semiconductor layer can be used.

  Next, the configuration of the backlight unit 352 will be described. The backlight unit 352 includes a cold cathode tube, a hot cathode tube, a light emitting diode, an inorganic EL, and an organic EL as a light source 361 that emits fluorescence, a lamp reflector 362 that efficiently guides the fluorescence to the light guide plate 365, and total reflection of the fluorescence. However, a light guide plate 365 for guiding light to the entire surface, a diffusion plate 366 for reducing unevenness in brightness, and a reflection plate 364 for reusing light leaked under the light guide plate 365 are provided. .

  A control circuit for adjusting the luminance of the light source 361 is connected to the backlight unit 352. The luminance of the light source 361 can be controlled by supplying a signal from the control circuit.

  A source electrode layer or a drain electrode layer of the transistor 220 is electrically connected to the pixel electrode layer 251 through an opening formed in the insulating layer 252. The opening formed in the insulating layer 252 may be formed using ablation by laser beam irradiation as shown in the above embodiment mode or may be formed using a lithography technique. In this embodiment, a low-melting-point metal (chromium in this embodiment) that is relatively easily evaporated is used for the source electrode layer or the drain electrode layer. The source electrode layer or the drain electrode layer is irradiated with a laser beam from the insulating layer 252 side through a photomask, and the irradiation region of the source electrode layer or the drain electrode layer and the insulating layer 252 on the irradiation region are irradiated with the irradiated energy. Can be removed to form an opening reaching the semiconductor layer of one conductivity type.

  A pixel electrode layer 251 is formed in the opening from which the source or drain electrode layer and the one-conductivity type semiconductor layer are exposed, and the one-conductivity type semiconductor layer, the source or drain electrode layer, and the pixel electrode layer 251 are electrically connected. Can be connected.

  By applying the present invention, the number of lithography processes can be reduced and the manufacturing process can be simplified, so that throughput can be improved. As a result, a display device can be manufactured with high productivity.

  In addition, since it is possible to omit the resist coating, the developing process, etc., it is not necessary to rotate the substrate, and the large area substrate can be easily processed. Further, by using a planar laser beam having a large area, such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. As a result, many patterns can be formed on a large-area substrate in a short time, and a display device can be manufactured with high productivity.

  This embodiment mode can be combined with any of Embodiment Modes 1 to 6 as appropriate.

(Embodiment 12)
In this embodiment, an example of a display device which is different from the above embodiment will be described.

  FIG. 29 shows active matrix electronic paper to which the present invention is applied. Although an active matrix type is shown in FIG. 29, the present invention can also be applied to a passive matrix type.

  A twist ball display system can be used as the electronic paper. In the twist ball display system, spherical particles that are separately painted in white and black are arranged between the first electrode layer and the second electrode layer, and a potential difference is generated between the first electrode layer and the second electrode layer. In this method, display is performed by controlling the orientation of the spherical particles.

  The transistor 5801 is an inverse coplanar thin film transistor and includes a gate electrode layer 5802, a gate insulating layer 5804, a wiring layer 5805a, a wiring layer 5805b, and a semiconductor layer 5806. The wiring layer 5805a and the wiring layer 5805b function as a source electrode layer or a drain electrode layer. The wiring layer 5805b is in contact with and electrically connected to the first electrode layer 5807 through an opening formed in the insulating layer 5908. Between the first electrode layer 5807 and the second electrode layer 5808, spherical particles 5809 including a cavity 5904 having a black region 5900a and a white region 5900b and being filled with a liquid are provided. The periphery of the spherical particle 5809 is filled with a filler 5905 such as a resin.

  In this embodiment, the gate electrode layer 5802, the semiconductor layer 5806, the wiring layers 5805a, 5805b, and the like included in the transistor 5801 are formed over a processed layer which is a target layer as described in the above embodiment. The mask is formed using laser ablation by laser beam irradiation through a photomask, and the layer to be processed is etched using the mask.

  The wiring layer 5805b is electrically connected to the first electrode layer 5807 through an opening formed in the insulating layer 5908. The opening formed in the insulating layer 5908 can be formed by utilizing laser ablation by laser beam irradiation as described in the above embodiment mode. In this embodiment mode, a low melting point metal (chromium in this embodiment mode) that is relatively easily evaporated is used for the wiring layer 5805b. The wiring layer 5805b is selectively irradiated with a laser beam from the insulating layer 5908 side, and the irradiated region of the wiring layer 5805b and the insulating layer 5908 thereabove are removed by the irradiated energy to form an opening reaching the wiring layer 5805b. Can do. Etching for forming the opening may be performed using a wet etching method, a dry etching method, or both, or may be performed a plurality of times.

  A first electrode layer 5807 is formed in an opening through which the wiring layer 5805b is penetrated, and the wiring layer 5805b and the first electrode layer 5807 can be electrically connected.

  By utilizing laser ablation, an opening can be formed in the insulating layer by laser beam irradiation without performing a complicated lithography process.

  Further, instead of the twisting ball, an electrophoretic element can be used. A microcapsule having a diameter of about 10 μm to 200 μm in which transparent liquid, positively charged white microparticles, and negatively charged black microparticles are enclosed is used. In the microcapsule provided between the first electrode layer and the second electrode layer, when an electric field is applied by the first electrode layer and the second electrode layer, the white particles and the black particles are in opposite directions. And can display white or black. A display element using this principle is an electrophoretic display element, and is generally called electronic paper. Since the electrophoretic display element has higher reflectance than the liquid crystal display element, an auxiliary light is unnecessary, power consumption is small, and the display portion can be recognized even in a dim place. In addition, even when power is not supplied to the display unit, it is possible to retain the image once displayed. Therefore, even when the display device with a display function is moved away from the radio wave source, it is displayed. The image can be stored.

  The transistor may have any structure as long as it can function as a switching element. As the semiconductor layer, various semiconductors such as an amorphous semiconductor, a crystalline semiconductor, a polycrystalline semiconductor, and a microcrystalline semiconductor can be used, and an organic transistor may be formed using an organic compound.

  In this embodiment mode, specifically, the case where the structure of the display device is an active matrix type is shown; however, the present invention can also be applied to a passive matrix type display device. Even in a passive matrix display device, a wiring layer, an electrode layer, or the like is formed into a desired shape by etching using a mask formed by laser ablation by laser beam irradiation through a photomask. be able to.

  By applying the present invention, the number of lithography processes can be reduced and the manufacturing process can be simplified, so that throughput can be improved. Therefore, a display device can be manufactured with high productivity.

  In addition, since it is possible to omit the resist coating, the developing process, etc., it is not necessary to rotate the substrate, and the large area substrate can be easily processed. Further, in the case of using a planar laser beam having a large area such as a linear laser beam, a rectangular laser beam, or a circular laser beam, a plurality of regions can be irradiated with a laser beam in a short time. As a result, many patterns can be formed on a large-area substrate in a short time, and a display device can be manufactured with high productivity.

  This embodiment mode can be freely combined with any of Embodiment Modes 1 to 6 as appropriate.

(Embodiment 13)
Next, a mode in which a driver circuit for driving is mounted on the display panel manufactured according to Embodiments 6 to 11 will be described.

  First, a display device employing a COG method is described with reference to FIG. A pixel portion 2701 for displaying information such as characters and images is provided over the substrate 2700. A substrate provided with a plurality of drive circuits is divided into a rectangular shape, and a divided drive circuit (also referred to as a driver IC) 2751 is mounted on the substrate 2700. FIG. 18A illustrates a mode in which an FPC 2750 is mounted on the tip of a plurality of driver ICs 2751 and driver ICs 2751. Further, the size to be divided may be substantially the same as the length of the side of the pixel portion on the signal line side, and a tape may be mounted on the tip of the driver IC on a single driver IC.

  Alternatively, a TAB method may be employed. In that case, a plurality of tapes may be attached and driver ICs may be mounted on the tapes as shown in FIG. As in the case of the COG method, a single driver IC may be mounted on a single tape. In this case, a metal piece or the like for fixing the driver IC may be attached together due to strength problems.

  A plurality of driver ICs mounted on these display panels may be formed on a rectangular substrate having a side of 300 mm to 1000 mm or more from the viewpoint of improving productivity.

  That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit may be formed on the substrate, and finally divided and taken out. The long side of the driver IC may be formed in a rectangular shape having a long side of 15 to 80 mm and a short side of 1 to 6 mm in consideration of the length of one side of the pixel portion and the pixel pitch. Or a length obtained by adding one side of the pixel portion and one side of each driver circuit.

  The advantage of the external dimensions of the driver IC over the IC chip lies in the length of the long side. When a driver IC having a long side of 15 mm to 80 mm is used, the number required for mounting corresponding to the pixel portion is as follows. This is less than when an IC chip is used, and the manufacturing yield can be improved. Further, when a driver IC is formed over a glass substrate, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  In the case where the scan line side driver circuit 3702 is formed over the substrate as shown in FIG. 17B, a driver IC in which a signal line side driver circuit is formed is mounted in a region outside the pixel portion 3701. Is done. These driver ICs are drive circuits on the signal line side. In order to form a pixel region corresponding to RGB full color, the number of signal lines in the XGA class is 3072 and the number in the UXGA class is 4800. The signal lines formed in such a number are divided into several blocks at the end of the pixel portion 3701 to form lead lines, and are collected according to the pitch of the output terminals of the driver IC.

  The driver IC is preferably formed of a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiation with a continuous wave laser beam. Therefore, a continuous wave solid laser or gas laser is used as an oscillator for generating the laser beam. When a continuous wave laser is used, a transistor can be manufactured using a polycrystalline semiconductor layer having a large grain size with few crystal defects. In addition, since the mobility and response speed are good, high-speed driving is possible, the operating frequency of the element can be improved as compared with the prior art, and there is less variation in characteristics, so that high reliability can be obtained. Note that for the purpose of further improving the operating frequency, the channel length direction of the transistor and the scanning direction of the laser beam are preferably matched. This is because, in the laser crystallization process using a continuous wave laser, the highest mobility is obtained when the channel length direction of the transistor and the scanning direction of the laser beam with respect to the substrate are substantially parallel (preferably −30 ° to 30 °). Is obtained. Note that the channel length direction corresponds to the direction in which current flows in the channel formation region, in other words, the direction in which charges move. The transistor thus fabricated has an active layer composed of a polycrystalline semiconductor layer in which crystal grains extend in the channel direction, which means that the crystal grain boundaries are formed substantially along the channel direction. means.

  In order to perform laser crystallization, it is preferable to significantly narrow the laser beam, and the width of the shape (beam spot) of the laser beam should be about 1 mm to 3 mm which is the same width of the short side of the driver IC. Is good. In order to ensure a sufficient and efficient energy density for the irradiated object, the laser beam irradiation region is preferably linear. However, the line shape here does not mean a line in a strict sense, but means a rectangle or an ellipse having a large aspect ratio. For example, the aspect ratio is 2 or more (preferably 10 or more and 10,000 or less). In this manner, a method for manufacturing a display device with improved productivity can be provided by setting the width of the shape of the laser beam (beam spot) to the same length as the short side of the driver IC.

  As shown in FIGS. 18A and 18B, driver ICs may be mounted as both the scanning line driver circuit and the signal line driver circuit. In that case, the specifications of the driver ICs used on the scanning line side and the signal line side may be different.

In the pixel region, signal lines and scanning lines intersect to form a matrix, and transistors are arranged corresponding to the respective intersections. This embodiment is characterized in that a TFT having an amorphous semiconductor or a semi-amorphous semiconductor as a channel portion is used as a transistor arranged in a pixel region. The amorphous semiconductor is formed by a method such as a plasma CVD method or a sputtering method. A semi-amorphous semiconductor can be formed at a temperature of 300 ° C. or less by a plasma CVD method. For example, even a non-alkali glass substrate having an outer dimension of 550 mm × 650 mm has a film thickness necessary for forming a transistor. Is formed in a short time. Such a feature of the manufacturing technique is effective in manufacturing a large-screen display device. Further, a semi-amorphous TFT can obtain field effect mobility of ^{2cm 2 / V · sec~10cm 2 /} V · sec by forming a channel formation region using a SAS. Thus, a display panel that realizes system-on-panel can be manufactured. In addition, a transistor arranged in the pixel region can be manufactured by applying the present invention. Therefore, the manufacturing process is simplified, and a display panel can be manufactured with high productivity.

  By using a TFT in which the semiconductor layer is formed of SAS, the scanning line side driver circuit can also be integrally formed on the substrate. In the case of using a TFT having a semiconductor layer formed of SAS, driver ICs may be mounted on both the scanning line side driver circuit and the signal line side driver circuit.

  In that case, it is preferable that the specifications of the driver ICs used on the scanning line side and the signal line side are different. For example, although a transistor constituting the driver IC on the scanning line side is required to have a withstand voltage of about 30 V, the driving frequency is 100 kHz or less, and a relatively high speed operation is not required. Therefore, it is preferable to set the channel length (L) of the transistors forming the driver on the scanning line side to be sufficiently large. On the other hand, it is sufficient for the transistor of the driver IC on the signal line side to have a withstand voltage of about 12V, but the drive frequency is about 65 MHz at 3V, and high speed operation is required. Therefore, it is preferable to set the channel length and the like of the transistors constituting the driver on the micron rule.

  The method for mounting the driver IC is not particularly limited, and a COG method, a wire bonding method, or a TAB method can be used.

  By setting the thickness of the driver IC to be the same as that of the counter substrate, the height between the two becomes substantially the same, which contributes to the reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

  As described above, a driver circuit can be incorporated in the display panel.

(Embodiment 14)
In a display panel (an EL display panel or a liquid crystal display panel) manufactured according to Embodiments 6 to 11, an example in which a semiconductor layer is formed using an amorphous semiconductor or SAS and a driver circuit on the scan line side is formed over a substrate Indicates.

Figure 31 ^shows a block diagram of a scanning line driver circuit including the n-channel TFT using the SAS that field-effect mobility of ^{1cm 2 / V · sec~15cm 2 /} V · sec can be obtained.

  In FIG. 31, a block denoted by reference numeral 8500 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. Reference numeral 8501 denotes a buffer circuit to which a pixel 8502 is connected.

  FIG. 32 shows a specific structure of the pulse output circuit 8500, and the circuit is composed of n-channel TFTs 8601 to 8612. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

  A specific configuration of the buffer circuit 8501 is shown in FIG. Similarly, the buffer circuit includes n-channel TFTs 8620 to 8635. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 μm to 1800 μm.

  In order to realize such a circuit, it is necessary to connect the TFTs by wiring.

  As described above, a driver circuit can be incorporated in the display panel.

(Embodiment 15)
This embodiment will be described with reference to FIG. FIG. 10 shows an example in which an EL display module is formed using a TFT substrate 2800 manufactured by applying the present invention. In FIG. 10, a pixel portion including pixels is formed on the TFT substrate 2800.

  In FIG. 10, outside the pixel portion and between the driver circuit and the pixel, a TFT similar to that formed in the pixel or a gate electrode layer and a source electrode layer of a TFT similar to those formed in the pixel. Alternatively, a protection circuit portion 2801 that is connected to one of the drain electrode layers and operated in the same manner as a diode is provided. As the driver circuit 2809, a driver IC formed of a single crystal semiconductor, a stick driver IC formed of a polycrystalline semiconductor layer over a glass substrate, a driver circuit formed of SAS, or the like is applied.

  The TFT substrate 2800 is fixed to the sealing substrate 2820 through spacers 2806a and 2806b formed by a droplet discharge method. The spacer is preferably provided to keep the distance between the two substrates constant even when the substrate is thin and the area of the pixel portion is increased. Resin material having light-transmitting property at least in the visible region in the gap between the TFT substrate 2800 and the sealing substrate 2820 on the light-emitting element 2804 and the light-emitting element 2805 connected to the TFT 2802 and the TFT 2803, respectively. May be solidified by filling, or may be filled with anhydrous nitrogen or inert gas.

  FIG. 10 shows a case where the light-emitting element 2804 and the light-emitting element 2805 are configured as an upward emission type (top emission type), in which light is emitted in the direction of the arrow shown in the drawing. Each pixel can perform multicolor display by changing the emission color of the pixels to red, green, and blue. At this time, by forming the colored layer 2807a, the colored layer 2807b, and the colored layer 2807c corresponding to each color on the sealing substrate 2820 side, the color purity of the emitted light can be increased. Alternatively, the pixel may be combined with a colored layer 2807a, a colored layer 2807b, or a colored layer 2807c as a white light emitting element.

  A driver circuit 2809 which is an external circuit is connected to a scanning line or a signal line connection terminal provided at one end of the external circuit board 2811 through a wiring board 2810. Further, a heat pipe 2813 and a heat radiating plate 2812 which are pipe-like high-efficiency heat conduction devices used for transferring heat to the outside of the device in contact with or close to the TFT substrate 2800 are provided to enhance the heat radiation effect. It is good also as a structure.

  In FIG. 10, the top emission type EL display module is used. However, the configuration of the light emitting element and the arrangement of the external circuit board may be changed to have a bottom emission structure or a dual emission structure in which light is emitted from both the upper and lower surfaces. . In the case of a top emission type structure, an insulating layer serving as a partition wall may be colored and used as a black matrix. The partition walls can be formed by a droplet discharge method, and may be formed by mixing a resin material such as polyimide with a pigment-based black resin, carbon black, or the like, or may be a laminate thereof.

  In addition, the EL display module may block reflected light of light incident from the outside using a retardation plate or a polarizing plate. In the case of an upward emission display device, an insulating layer serving as a partition wall may be colored and used as a black matrix. This partition wall can also be formed by a droplet discharge method or the like. Carbon black or the like may be mixed with a pigment-based black resin or a resin material such as polyimide, or may be laminated. A different material may be discharged to the same region a plurality of times by a droplet discharge method to form a partition wall. As the retardation plate, a λ / 4 plate or a λ / 2 plate may be used and designed so that light can be controlled. The structure is a light emitting element, a sealing substrate (sealing material), a retardation plate (λ / 4 plate or λ / 2 plate), and a polarizing plate in order from the TFT element substrate side. The emitted light passes through these and is emitted to the outside from the polarizing plate side. The retardation plate and the polarizing plate may be installed on the side from which light is emitted, and may be installed on both in the case of a dual emission type display device that emits both. Further, an antireflection film may be provided outside the polarizing plate. This makes it possible to display a higher-definition and precise image.

  In the TFT substrate 2800, a sealing structure may be formed by attaching a resin film to the side where the pixel portion is formed using a sealing material or an adhesive resin. Although glass sealing using a glass substrate is described in this embodiment mode, various sealing methods such as resin sealing using a resin, plastic sealing using a plastic, and film sealing using a film can be used. A gas barrier film for preventing the permeation of water vapor may be provided on the surface of the resin film. By adopting a film sealing structure, further reduction in thickness and weight can be achieved.

  In a display device including a TFT substrate or the like manufactured by applying the present invention, a part of the process is simplified, and the throughput is improved in manufacturing the display device. Therefore, a display module can be manufactured with high productivity.

  This embodiment mode can be combined with any of Embodiment Modes 1 to 9 and Embodiments 13 and 14 as appropriate.

(Embodiment 16)
This embodiment will be described with reference to FIGS. 28A and 28B. 28A and 28B illustrate an example in which a liquid crystal display module is formed using a TFT substrate 2600 manufactured by applying the present invention.

  FIG. 28A illustrates an example of a liquid crystal display module, in which a TFT substrate 2600 and a counter substrate 2601 are fixed to each other with a sealant 2602, and a pixel portion 2603 and a liquid crystal layer 2604 are provided therebetween to form a display region. The colored layer 2605 is necessary for color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. Polarizing plates 2606 and 2607 and a diffusion plate 2613 are disposed outside the TFT substrate 2600 and the counter substrate 2601. The light source is composed of a cold cathode tube 2610 and a reflection plate 2611. The circuit board 2612 is connected to the TFT substrate 2600 by a flexible wiring board 2609, and an external circuit such as a control circuit or a power supply circuit is incorporated. Moreover, you may laminate | stack in the state which had the phase difference plate between the polarizing plate and the liquid-crystal layer.

  The liquid crystal display module includes a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an FFS (Fringe Field Switching) mode, an MVA (Multi-domain Vertical Alignment) mode, and a PVA (Pattern Vertical Alignment) mode. (Axial Symmetrical Aligned Micro-cell) mode, OCB (Optical Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (Anti-Ferroelectric Crystal) mode, etc. It is possible to have.

  FIG. 28B shows an example in which the OCB mode is applied to the liquid crystal display module of FIG. 28A, which is an FS-LCD (Field sequential-LCD). The FS-LCD emits red light, green light, and blue light in one frame period, and can perform color display by combining images using time division. Further, since each light emission is performed by a light emitting diode or a cold cathode tube, a color filter is unnecessary. Therefore, it is not necessary to arrange the color filters of the three primary colors and limit the display area of each color, and it is possible to display all three colors in any area. On the other hand, since three colors of light are emitted in one frame period, a high-speed response of the liquid crystal is required. By applying the FLC mode using the FS method and the OCB mode to the display device of the present invention, a high-performance and high-quality display device and a liquid crystal television device can be completed.

  The liquid crystal layer in the OCB mode has a so-called π cell structure. The π cell structure is a structure in which the pretilt angles of liquid crystal molecules are aligned in a plane-symmetric relationship with respect to the center plane between the active matrix substrate and the counter substrate. The alignment state of the π cell structure is splay alignment when no voltage is applied between the substrates, and shifts to bend alignment when a voltage is applied. This bend orientation is white. When a voltage is further applied, the bend-aligned liquid crystal molecules are aligned perpendicularly to both substrates, and light is not transmitted. In the OCB mode, high-speed response that is about 10 times faster than the conventional TN mode can be realized.

  Further, as a mode corresponding to the FS method, HV (Half V) -FLC using a ferroelectric liquid crystal (FLC) capable of high-speed operation, SS (Surface Stabilized) -FLC, or the like can be used. . A nematic liquid crystal having a relatively low viscosity is used for the OCB mode, and a smectic liquid crystal having a ferroelectric phase can be used for HV-FLC and SS-FLC.

  In addition, the high-speed optical response speed of the liquid crystal display module is increased by narrowing the cell gap of the liquid crystal display module. The speed can also be increased by reducing the viscosity of the liquid crystal material. The increase in speed is more effective when the pixel pitch of the pixel region of the TN mode liquid crystal display module is 30 μm or less. Further, the speed can be further increased by the overdrive method in which the applied voltage is increased (or decreased) for a moment.

  The liquid crystal display module in FIG. 28B is a transmissive liquid crystal display module, and a red light source 2910a, a green light source 2910b, and a blue light source 2910c are provided as light sources. The light source is provided with a controller 2912 for controlling on / off of the red light source 2910a, the green light source 2910b, and the blue light source 2910c. The light emission of each color is controlled by the control unit 2912, light enters the liquid crystal, an image is synthesized using time division, and color display is performed.

  The liquid crystal display module described above uses a TFT substrate manufactured by applying the present invention. Accordingly, part of the steps can be simplified and the throughput can be improved, so that it can be manufactured with high productivity. In addition, since the number of lithography steps using a photoresist can be reduced, a highly reliable liquid crystal display module can be manufactured.

  This embodiment mode can be combined with any of Embodiment Modes 1 to 6 and Embodiments 10 and 11, as appropriate.

(Embodiment 17)
With the display device formed according to the present invention, a television device (also simply referred to as a television or a television receiver) can be completed. FIG. 30 is a block diagram illustrating a main configuration of the television device.

  FIG. 17A is a top view illustrating a structure of a display panel according to the present invention. A pixel portion 2701 in which pixels 2702 are arranged in a matrix over a substrate 2700 having an insulating surface, a scan line side input terminal 2703, a signal A line side input terminal 2704 is formed. The number of pixels may be provided in accordance with various standards. For full color display using XGA and RGB, 1024 × 768 × 3 (RGB), and for full color display using UXGA and RGB, 1600 × 1200. If it corresponds to x3 (RGB) and full spec high vision and is full color display using RGB, it may be 1920 x 1080 x 3 (RGB).

  The pixels 2702 are arranged in a matrix by a scan line extending from the scan line side input terminal 2703 and a signal line extending from the signal line side input terminal 2704 intersecting. Each pixel of the pixel portion 2701 is provided with a switching element and a pixel electrode layer connected to the switching element. A typical example of a switching element is a TFT. By connecting the gate electrode layer side of the TFT to a scanning line and the source or drain side to a signal line, each pixel can be controlled independently by a signal input from the outside. It is said.

  FIG. 17A shows the structure of a display panel in which signals input to the scan lines and signal lines are controlled by an external driver circuit. As shown in FIG. 18A, COG (Chip on The driver IC 2751 may be mounted on the substrate 2700 by a glass method. As another mounting mode, a TAB (Tape Automated Bonding) method as shown in FIG. 18B may be used. The driver IC may be formed on a single crystal semiconductor substrate or may be a circuit in which a TFT is formed on a glass substrate. In FIG. 18, the driver IC 2751 is connected to an FPC (Flexible Printed Circuit) 2750.

  In the case where a TFT provided for a pixel is formed using a crystalline semiconductor, a scan line driver circuit 3702 can be formed over a substrate 3700 as shown in FIG. In FIG. 17B, the pixel portion 3701 is controlled by an external driver circuit as in FIG. 17A connected to the signal line side input terminal 3704. In the case where a TFT provided for a pixel is formed using a polycrystalline (microcrystalline) semiconductor, a single crystal semiconductor, or the like with high mobility, as illustrated in FIG. 17C, a pixel portion 4701, a scan line driver circuit 4702, and a signal The line driver circuit 4704 can be formed over the substrate 4700 integrally.

  In the display panel, as shown in FIG. 17A, only the pixel portion 9011 in FIG. 30 is formed, and the scan line side driver circuit 9013 and the signal line side driver circuit 9012 are formed as shown in FIG. TFTs are formed as shown in FIG. 17B when mounted by the TAB method as shown in FIG. 18A, when mounted by the COG method as shown in FIG. In the case where the driver circuit 9013 is formed over the substrate and the signal line driver circuit 9012 is separately mounted as a driver IC, as shown in FIG. 17C, the pixel portion 9011, the signal line driver circuit 9012, and the scanning line driver circuit Although 9013 may be integrally formed on the substrate, any form may be used.

  In FIG. 30, as other external circuit configurations, on the video signal input side, among the signals received by the tuner 9014, the video signal amplification circuit 9015 for amplifying the video signal and the signal output therefrom are red, green The video signal processing circuit 9016 converts the color signal into a color signal corresponding to each blue color, and the control circuit 9017 converts the video signal into the input specifications of the driver IC. The control circuit 9017 outputs a signal to each of the scanning line side and the signal line side. In the case of digital driving, a signal dividing circuit 9018 may be provided on the signal line side so that an input digital signal is divided into m pieces and supplied.

  Of the signals received by the tuner 9014, the audio signal is sent to the audio signal amplifier circuit 9019, and the output is supplied to the speaker 9113 through the audio signal processing circuit 9110. The control circuit 9111 receives control information on the receiving station (reception frequency) and volume from the input unit 9112, and sends a signal to the tuner 9014 and the audio signal processing circuit 9110.

  As shown in FIGS. 16A and 16B, these display modules can be incorporated into a housing to complete a television device. If a liquid crystal display module is used as the display module, a liquid crystal television device can be manufactured. If an EL module is used, an EL television device, plasma television, electronic paper, or the like can be manufactured. In FIG. 16A, a main screen 2403 is formed by a display module, and a speaker portion 2409, operation switches, and the like are provided as accessory equipment. Thus, a television device can be completed according to the present invention.

  In FIG. 16A, a display panel 2402 is incorporated in a housing 2401, and by receiving a general television broadcast by a receiver 2405, it is connected to a wired or wireless communication network through a modem 2404. Information communication can be performed in the direction (from the sender to the receiver) or in both directions (between the sender and the receiver, or between the receivers). The television device can be operated by a switch incorporated in the housing or a separate remote control device 2406. Even if this remote control device is provided with a display portion 2407 for displaying information to be output. good.

  In addition, the television device may have a configuration in which a sub screen 2408 is formed using the second display panel in addition to the main screen 2403 to display a channel, a volume, and the like. In this structure, the main screen 2403 and the sub-screen 2408 can be formed using the liquid crystal display panel of the present invention. Alternatively, the main screen 2403 may be formed using an EL display panel with an excellent viewing angle, and the sub screen may be formed using a liquid crystal display panel that can display with low power consumption. In order to prioritize low power consumption, the main screen 2403 may be formed of a liquid crystal display panel, the sub screen may be formed of an EL display panel, and the sub screen may be blinkable. When the present invention is used, a highly reliable display device can be obtained even when such a large-area substrate is used and a large number of TFTs and electronic components are used.

  FIG. 16B illustrates a television device having a large display portion of 20 inches to 80 inches, for example, which includes a housing 2410, a display portion 2411, a remote control device 2412 that is an operation portion, a speaker portion 2413, and the like. The present invention is applied to manufacturing the display portion 2411. The television device in FIG. 16B is a wall-hanging type and does not require a large installation space.

  Of course, the present invention is not limited to a television device, but can be applied to various uses such as a monitor for a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

  By applying the present invention, a TFT or the like of a display device can be manufactured. As a result, a display device can be manufactured with high productivity by being manufactured through a simplified process.

  This embodiment mode can be freely combined with any of Embodiment Modes 1 to 16 as appropriate.

(Embodiment 18)
As electronic devices according to the present invention, portable information such as a television device (also simply referred to as a television or a television receiver), a digital camera, a digital video camera, a cellular phone device (also simply referred to as a cellular phone or a cellular phone), a PDA, etc. Examples include a terminal, a portable game machine, a computer monitor, a computer, an audio playback device such as a car audio, and an image playback device including a recording medium such as a home game machine. A specific example will be described with reference to FIG.

  A portable information terminal device illustrated in FIG. 20A includes a main body 9201, a display portion 9202, and the like. The display device according to the present invention can be applied to the display portion 9202. As a result, since it can be manufactured by a simplified process, a portable information terminal device can be manufactured with high mass productivity.

  A digital video camera shown in FIG. 20B includes a display portion 9701, a display portion 9702, and the like. The display device according to the present invention can be applied to the display portion 9701. As a result, since it can be manufactured by a simplified process, a digital video camera can be manufactured with high mass productivity.

  A cellular phone shown in FIG. 20C includes a main body 9101, a display portion 9102, and the like. The display device according to the present invention can be applied to the display portion 9102. As a result, since it can be manufactured through a simplified process, a mobile phone can be manufactured with high productivity.

  A portable television device illustrated in FIG. 20D includes a main body 9301, a display portion 9302, and the like. The display device according to the present invention can be applied to the display portion 9302. As a result, since it can be manufactured through a simplified process, a portable television device can be manufactured with high productivity. In addition, the present invention can be applied to a wide variety of television devices, from a small one mounted on a portable terminal such as a cellular phone to a medium-sized one that can be carried and a large one (for example, 40 inches or more). A display device according to the above can be applied.

  A portable computer illustrated in FIG. 20E includes a main body 9401, a display portion 9402, and the like. The display device according to the present invention can be applied to the display portion 9402. As a result, since it can be manufactured by a simplified process, a portable computer can be manufactured with high productivity.

  As described above, the display device according to the present invention can provide an electronic device with high productivity.

  This embodiment mode can be freely combined with any of Embodiment Modes 1 to 17 as appropriate.

  In this embodiment, characteristics of an inverted staggered transistor manufactured by applying the present invention will be described. First, a method for manufacturing a transistor used for measurement is described.

  As shown in FIG. 35A, a silicon nitride oxide layer 7002 (layer thickness 50 nm), a silicon oxynitride layer 7004 (layer thickness 100 nm), a tungsten layer 7006 (layer thickness 100 nm), and a silicon nitride layer 7008 are formed over a glass substrate 7000. (Layer thickness 300 nm), first amorphous silicon layer 7010 (film thickness 150 nm), phosphorus-added second amorphous silicon layer 7012 (film thickness 50 nm), molybdenum layer 7014 (film thickness 200 nm), polyimide layer 7016 (film thickness) 100 nm) was provided in order. Note that the silicon nitride oxide layer 7002 and the silicon oxynitride layer 7004 form a base insulating layer, and the silicon nitride layer 7008 forms a gate insulating layer. As the first amorphous silicon layer 7010, a semiconductor layer including a region where a channel is formed later is formed. The second amorphous silicon layer 7012 functions as a semiconductor layer that improves the ohmic contact between the semiconductor layer forming the channel and the source or drain electrode. The tungsten layer 7006 forms a gate electrode, and the molybdenum layer 7014 forms a source electrode or a drain electrode. The polyimide layer 7016 forms a light absorption layer.

A laminated structure formed over the glass substrate 7000 was irradiated with a laser beam 7104 through a photomask 7108. As the laser beam 7104, an excimer laser was applied and irradiated with an energy density of about 250 mJ / cm ² . Note that a photomask 7108 in which a desired pattern is formed using a transmission region 7100 of the laser beam 7104 and a light-shielding region 7102 of the laser beam 7104 is used. In this embodiment, a photomask 7108 on which a mask pattern for forming a source electrode or a drain electrode is formed is used. The laser beam 7104 passes through the transmission region 7100 of the photomask 7108 and is absorbed by the polyimide layer 7016.

  As shown in FIG. 35B, the polyimide layer 7016 was laser ablated in the region where the laser beam 7104 reached, and polyimide layers 7016b and 7016c were formed. Here, the remaining polyimide layers 7016 b and 7016 c correspond to the pattern of the photomask 7108, specifically, the light shielding region 7102.

  As shown in FIG. 35C, the molybdenum layer 7014 was etched using the polyimide layers 7016b and 7016c as masks to form molybdenum layers 7014b and 7014c functioning as gate electrodes. Etching of the molybdenum layer was performed using a mixed acid aluminum solution. After forming the desired molybdenum layers 7014b and 7014c, the polyimide layers 7016b and 7016c were removed.

  As shown in FIG. 35D, the second amorphous silicon layer 7012b was etched using the molybdenum layers 7014b and 7014c as masks to form second amorphous silicon layers 7012b and 7012c.

  As shown in FIG. 35E, the first amorphous silicon layer 7010 was selectively etched to form an island-shaped first amorphous silicon layer 7010b. Then, the silicon nitride layer 7008 around the glass substrate 7000 was etched to form a silicon nitride layer 7008b. Thus, an inverted staggered transistor of this example was obtained. Note that the inverted staggered transistor was formed so that the channel length L was 9 μm and the channel width W was 146 μm. The thickness of the gate insulating layer (silicon nitride layer 7008b) was 300 nm.

Gate voltage _(I d -V _g) characteristics, and field-effect mobility - - drain current of the inverted staggered transistor results gate voltage (μ _FE -V _g) characteristics were measured are shown in Figure 36. Here, in the graph showing the I _d -V _g characteristic, the vertical axis represents current (A), and the horizontal axis represents voltage (V). In the graph showing the μ _FE -V _g characteristics, the vertical axis represents mobility (cm ² / Vs), and the horizontal axis represents voltage (V). The measurement was performed by setting the drain voltage (V _d ) to 1 V or 15 V and varying the gate voltage (V _g ) from −20 V to 30 V.

In FIG. 36, the I _d -V _g characteristic under the condition of V _d = 1V is indicated by Y, and the μ _FE -V _g characteristic is indicated by Y ′. Further, the I _d -V _g characteristic under the condition of V _d = 15 V is indicated by X, and the μ _FE -V _g characteristic is indicated by X ′. From FIG. 36, it was found that the field effect mobility was 0.40 cm ² / Vs and the threshold voltage was 4.20 V.

The conceptual diagram explaining this invention. The conceptual diagram explaining this invention. The figure which shows the structural example of the laser irradiation apparatus which can be applied to this invention. The conceptual diagram explaining this invention. FIG. 11 illustrates an example of a semiconductor device of the invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. The figure which shows the example of the display module of this invention. 4A and 4B illustrate an example of a method for manufacturing a display device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a display device of the present invention. FIG. 6 illustrates a structure of a light-emitting element that can be applied to the present invention. FIG. 6 illustrates a structure of a light-emitting element that can be applied to the present invention. FIG. 6 illustrates a structure of a light-emitting element that can be applied to the present invention. FIG. 11 illustrates an example of an electronic device to which the present invention is applied. The top view of the display apparatus of this invention. The top view of the display apparatus of this invention. FIG. 11 illustrates an example of a display device of the present invention. FIG. 11 illustrates an example of an electronic device to which the present invention is applied. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. 4A and 4B illustrate an example of a method for manufacturing a semiconductor device of the present invention. FIG. 11 illustrates an example of a display device of the present invention. FIG. 11 illustrates an example of a display device of the present invention. FIG. 11 illustrates an example of a display device of the present invention. FIG. 11 illustrates an example of a display device of the present invention. FIG. 11 illustrates an example of a display device of the present invention. The figure which shows the structural example of the display module of this invention. FIG. 11 illustrates an example of a display device of the present invention. 1 is a block diagram illustrating a main configuration of an electronic device to which the present invention is applied. FIG. 11 illustrates an example of a circuit configuration of a display device of the present invention. FIG. 11 illustrates an example of a circuit configuration of a display device of the present invention. FIG. 11 illustrates an example of a circuit configuration of a display device of the present invention. The conceptual diagram explaining this invention. 10A and 10B illustrate an example of a method for manufacturing a transistor to which the present invention is applied. FIG. 13 shows characteristics of a transistor to which the present invention is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Substrate 102 Work layer 104 Light absorption layer 108 Photomask 110 Transmission region 112 Light shielding region 114 Laser beam

Claims (3)

A method for manufacturing a semiconductor device including a gate electrode layer, a gate insulating layer, a semiconductor layer, a semiconductor layer having one conductivity, an inverted staggered transistor having a source electrode layer and a drain electrode layer,
A first step of forming the gate electrode layer;
A second step of forming the gate insulating layer;
A third step of forming the semiconductor layer and the semiconductor layer having one conductivity;
A fourth step of forming the source electrode layer and the drain electrode layer;
Have
The first step includes
Forming a first conductive layer;
Forming a first light absorption layer to which hydrogen or an inert gas is added on the first conductive layer;
By irradiating the first laser beam from the first light absorption layer side through the first photomask, the first light absorption layer in the region irradiated with the first laser beam is removed. Process,
Forming the gate electrode layer by etching the first conductive layer using the remaining first light absorption layer as a first mask;
Removing the first light absorption layer used as the first mask,
The second step includes
Forming the gate insulating layer on the gate electrode layer;
The third step includes
Forming a first semiconductor layer on the gate insulating layer;
Forming a second semiconductor layer having one conductivity on the first semiconductor layer;
Forming a second light absorption layer to which hydrogen or an inert gas is added on the second semiconductor layer;
By irradiating the second laser beam from the second light absorption layer side through the second photomask, the second light absorption layer in the region irradiated with the second laser beam is removed. Process,
By using the remaining second light absorption layer as a second mask and etching the second semiconductor layer and the first semiconductor layer, the semiconductor layer having one conductivity and the semiconductor layer are respectively etched. Forming, and
Removing the second light absorption layer used as the second mask,
The fourth step includes
Forming a second conductive layer on the semiconductor layer having one conductivity;
Forming a third light-absorbing layer to which hydrogen or an inert gas is added on the second conductive layer;
By irradiating a third laser beam from the third light absorption layer side through a third photomask, the third light absorption layer in the region irradiated with the third laser beam is removed. Process,
Forming the source electrode layer and the drain electrode layer by etching the second conductive layer using the remaining third light absorption layer as a third mask;
Removing the third light absorption layer used as the third mask,
The method for manufacturing a semiconductor device, wherein the first to third light absorption layers are each formed using a material that absorbs the first to third laser beams. A method for manufacturing a semiconductor device including a gate electrode layer, a gate insulating layer, a semiconductor layer, a semiconductor layer having one conductivity, an inverted staggered transistor having a source electrode layer and a drain electrode layer,
A first step of forming the gate electrode layer;
A second step of forming the gate insulating layer;
A third step of forming the semiconductor layer and the semiconductor layer having one conductivity;
A fourth step of forming the source electrode layer and the drain electrode layer;
Have
The first step includes
Forming a first conductive layer;
Forming a first light absorption layer to which hydrogen or an inert gas is added on the first conductive layer;
By irradiating the first laser beam from the first light absorption layer side through the first photomask, the first light absorption layer in the region irradiated with the first laser beam is removed. Process,
Forming the gate electrode layer by etching the first conductive layer using the remaining first light absorption layer as a first mask;
Removing the first light absorption layer used as the first mask,
The second step includes
Forming the gate insulating layer on the gate electrode layer;
The third step includes
Forming a first semiconductor layer on the gate insulating layer;
Forming a second semiconductor layer having one conductivity on the first semiconductor layer;
Forming a second light absorption layer to which hydrogen or an inert gas is added on the second semiconductor layer;
By irradiating the second laser beam from the second light absorption layer side through the second photomask, the second light absorption layer in the region irradiated with the second laser beam is removed. Process,
By using the remaining second light absorption layer as a second mask and etching the second semiconductor layer and the first semiconductor layer, the semiconductor layer having one conductivity and the semiconductor layer are respectively etched. Forming, and
The fourth step includes
By irradiating the third laser beam through the third photomask from the side of the second light absorption layer used as the second mask, the region of the region irradiated with the third laser beam is irradiated with the third laser beam. Removing the second light absorption layer, and using the remaining second light absorption layer as the source electrode layer and the drain electrode layer,
The first light absorption layer is formed of a material that absorbs the first laser beam,
The method for manufacturing a semiconductor device, wherein the second light absorption layer is formed using a material that absorbs the second and third laser beams. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the first to third laser beams are linear laser beams.

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