JP5327824B2 - 飽和電圧と閾値電圧間の変調を達成するための多重ピクセルを備えたディスプレイ - Google Patents
飽和電圧と閾値電圧間の変調を達成するための多重ピクセルを備えたディスプレイ Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3659—Control of matrices with row and column drivers using an active matrix the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
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- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0469—Details of the physics of pixel operation
- G09G2300/0478—Details of the physics of pixel operation related to liquid crystal pixels
- G09G2300/0491—Use of a bi-refringent liquid crystal, optically controlled bi-refringence [OCB] with bend and splay states, or electrically controlled bi-refringence [ECB] for controlling the color
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0823—Several active elements per pixel in active matrix panels used to establish symmetry in driving, e.g. with polarity inversion
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0809—Several active elements per pixel in active matrix panels
- G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G2300/0857—Static memory circuit, e.g. flip-flop
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
- G09G2310/061—Details of flat display driving waveforms for resetting or blanking
- G09G2310/063—Waveforms for resetting the whole screen at once
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0204—Compensation of DC component across the pixels in flat panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
- G09G3/2025—Display of intermediate tones by time modulation using two or more time intervals using sub-frames the sub-frames having all the same time duration
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2077—Display of intermediate tones by a combination of two or more gradation control methods
- G09G3/2081—Display of intermediate tones by a combination of two or more gradation control methods with combination of amplitude modulation and time modulation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
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Description
(発明の分野)
本発明は、一般に電子ドライバ回路に関し、さらに詳細には、液晶ディスプレイにおけるピクセル電極の飽和電圧と閾値電圧との間の変調を達成する所定の電圧を多重化することにより、ディスプレイを駆動する新規な回路および方法に関する。
図1は、典型的な液晶ディスプレイの単一のピクセルセル100を示す。ピクセルセル100は、透明共通電極104と、ピクセル記憶電極106との間に挟まれた液晶層102、および記憶素子108を含む。記憶素子108は、相補型データ入力端子110および112、データ出力端子114、および制御端子116を含む。制御端子116上の書込み信号に応答して、記憶素子108は、1対のビット線(B+およびB−)118および120上に有効な状態とされた相補データ信号を読み出し、且つ出力端子114、および接続されたピクセル電極106上にその信号をラッチする。
新規なディスプレイを駆動する新規の方法が記載される。このディスプレイの例示的な実施形態において、各ピクセルセルが、ピクセルセル内に記憶されたデータビットに応答して、ピクセル電極と、2つのグローバル電圧供給端子(global voltage supply terminal)の内の1つとを選択的に接続させるマルチプレクサを含む新規なディスプレイを説明する。この構成は、記憶されたデータビットをピクセル電極に直接有効な状態とする従来のディスプレイに対して、多くの利点を提供する。例えば、本発明では、ピクセル電極が、ディスプレイの論理回路を駆動するために用いられる電圧よりも高いか、または低い電圧を用いて、デジタル方式で駆動され得るので、特定のビットがピクセルに書き込まれる時間に関して柔軟性を提供する。また、オフ状態(すなわち、ピクセルセル全体にわたって電圧がない)が、ピクセルセル内に記憶されたいずれのデータも変更することなく、グローバル電圧供給端子、およびピクセルアレイ全体をオーバーレイする共通電極に適切な電圧を有効な状態とすることにより、ディスプレイのピクセル全てに一度に書き込まれ得る。本発明により提供されるさらに別の利点は、グローバル電圧供給端子にさまざまな所定の電圧を単に有効にすることにより、相補データビットをディスプレイにロードする特別の工程を用いることなく、ピクセルセルがデバイアシングされ得る。
本発明は、添付の図面を用いて説明され、各図面において、同じ参照番号は実質的に同様の要素を示す。
【図面の簡単な説明】
【図1】
図1は、典型的な液晶ピクセルセルのブロック図を示す。
【図2】
図2は、4ビット2値重みつきパルス幅変調データの1つのフレームを示す。
【図3】
図3は、図2の4ビットのパルス幅変調データが、正味0ボルトのDCバイアスであるスプリットフレームの適用を示す。
【図4】
図4は、典型的な液晶輝度応答対RMS電圧曲線を示す。
【図5】
図5は、RMS電圧対8ビットのグレースケール値曲線を示す。
【図6】
図6は、本発明にもとづく多重ピクセルディスプレイのブロック図を示す。
【図7】
図7は、図6のディスプレイの単一ピクセルセルを詳細に示す。
【図8】
図8は、図7の電圧コントローラの1つの実施形態のブロック図である。
【図9】
図9は、図6のディスプレイの1つの実施形態に、多数の2値重みつきデータビットを書き込むためのタイミング図を示す。
【図10】
図10は、図9のタイミング図を実行するための方法を要約したフローチャートである。
【図11】
図11は、グレースケール値をRMS電圧の有効な範囲に限定するために、本発明にもとづいて修正されたRMS電圧対グレースケール値曲線である。
【図12A】
図12Aは、本発明の1つの実施形態に用いられる変調方式およびデバイアシング方式を示す電圧方式である。
【図12B】
図12Bは、図12Aに示される電圧のサンプル値を示す表である。
【図13】
図13は、本発明にもとづいて特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図14】
図14は、図12Aの電圧方式の実行を示すタイミング図である。
【図15】
図15は、図13の駆動方式の方法を要約したフローチャートである。
【図16】
図16は、本発明にもとづいて特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図17】
図17は、図12Aの電圧方式の実行を示すタイミング図である。
【図18】
図18は、図17の駆動方式にもとづいて図6のディスプレイを駆動するための方法を要約したフローチャートである。
【図19A】
図19Aは、本発明の1つの実施形態に用いられる変調方式およびデバイアス方式を示す電圧方式である。
【図19B】
図19Bは、図19Aに示される電圧のサンプル値を示す表である。
【図20】
図20は、本発明にもとづいて特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図21A】
図21Aは、図19Aの電圧方式の実行を示すタイミング図である。
【図21B】
図21Bは、図19Aの電圧方式の別の実行を示すタイミング図ある。
【図22】
図22は、図21Aおよび21Bの駆動方式にもとづいて、図6のディスプレイを駆動するための方法を要約したフローチャートである。
【図23A】
図23Aは、本発明の1つの実施形態に用いられる変調方式およびデバイアシング方式を示す図である。
【図23B】
図23Bは、図23Aに示されるサンプル値を示す表である。
【図24】
図24は、本発明にもとづいて、特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図25】
図25は、図23Aの電圧方式の実行を示すタイミング図である。
【図26】
図26は、図25の駆動方式にもとづいて、図6のディスプレイを駆動するための方法を要約したフローチャートである。
【図27】
図27は、本発明にもとづいて、特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図28】
図28は、図6のディスプレイを用いて別の駆動方式を示すタイミング図である。
【図29】
図29は、図28の駆動方式にもとづいて、図6のディスプレイを駆動するための方法を要約したフローチャートである。
【図30】
図30は、図6のディスプレイを用いて別の駆動方式を示すタイミング図である。
【図31】
図31は、図30の駆動方式にもとづいて、図6のディスプレイを駆動するための方法を要約したフローチャートである。
【図32】
図32は、本発明にもとづいて、特定の駆動方式を実行するための別の電圧コントローラのブロック図である。
【図33】
図33は、本発明にもとづいて、別の駆動方式を示すタイミング図である。
【図34】
図34は、本発明にもとづいて、特定の駆動方式を実行することが可能な別の電圧コントローラのブロック図である。
【図35】
図35は、本発明にもとづいて、別の駆動方式を示すタイミング図である。
【図36】
図36は、単一の制御信号により動作可能な別の電圧コントローラである。
Claims (2)
- 複数のピクセル電極、複数の記憶素子、第1の電圧供給端子、第2の電圧供給端子、共通電極、および複数のマルチプレクサを備えるディスプレイ上にマルチビットデータワードを表示する方法であって、該複数のマルチプレクサの各々は、該記憶素子のうちの関連付けられた1つに記憶されたデータビットの値に応答して、該ピクセル電極のうちの関連付けられた1つを該第1の電圧供給端子および該第2の電圧供給端子のうちの1方と選択的に接続し、ここで該方法は、第1の所定の電圧を該第1の電圧供給端子に、第2の所定の電圧を該第2の電圧供給端子に、そして第3の所定の電圧を該共通電極に有効な状態とする工程と、該マルチビットデータワードの各ビットを該記憶素子に連続的に書き込む工程と、該ビットの各々を、該ビットの各々の位に依存する期間の間、該記憶素子中に残留させる工程と、を包含し、
前記第1の所定の電圧と前記第2の所定の電圧が前記ディスプレイの論理レベルから独立し、前記ディスプレイが液晶ディスプレイであり、前記第1の所定の電圧と前記第3の所定の電圧との差が液晶セルの飽和電圧に対応し、前記第2の所定の電圧と前記第3の所定の電圧との差が当該液晶セルの閾値電圧に対応し、第4の所定の電圧を前記共通電極に有効な状態とする工程と、前記記憶素子に書き込まれた前記マルチビットデータワードの各ビットの相補ビットを前記記憶素子に書き込む工程と、該マルチビットデータワードの各ビットの該相補ビットを該ビットの各々の位に依存する期間の間、該記憶素子中に残留させる工程と、をさらに包含する
ことを特徴とする方法。
- ディスプレイ駆動回路に請求項1に記載の工程を行わせるためのプログラムを備えるコンピュータに実行させるためのプログラムを記録したコンピュータ読み取り可能な記録媒体。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US09/075,472 US6067065A (en) | 1998-05-08 | 1998-05-08 | Method for modulating a multiplexed pixel display |
US09/075,472 | 1998-05-08 | ||
PCT/US1999/010115 WO1999059127A1 (en) | 1998-05-08 | 1999-05-07 | Method for modulating a multiplexed pixel display |
Related Child Applications (1)
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JP2011278841A Division JP2012098745A (ja) | 1998-05-08 | 2011-12-20 | 飽和電圧と閾値電圧間の変調を達成するための多重ピクセルを備えたディスプレイ |
Publications (3)
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JP2002514796A JP2002514796A (ja) | 2002-05-21 |
JP2002514796A5 JP2002514796A5 (ja) | 2010-09-24 |
JP5327824B2 true JP5327824B2 (ja) | 2013-10-30 |
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JP2000548859A Expired - Lifetime JP5327824B2 (ja) | 1998-05-08 | 1999-05-07 | 飽和電圧と閾値電圧間の変調を達成するための多重ピクセルを備えたディスプレイ |
JP2011278841A Pending JP2012098745A (ja) | 1998-05-08 | 2011-12-20 | 飽和電圧と閾値電圧間の変調を達成するための多重ピクセルを備えたディスプレイ |
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Country Status (8)
Country | Link |
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US (4) | US6067065A (ja) |
EP (1) | EP1093654B1 (ja) |
JP (2) | JP5327824B2 (ja) |
CN (1) | CN1174358C (ja) |
AT (1) | ATE450029T1 (ja) |
CA (1) | CA2331695C (ja) |
DE (1) | DE69941706D1 (ja) |
WO (1) | WO1999059127A1 (ja) |
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- 1999-05-07 JP JP2000548859A patent/JP5327824B2/ja not_active Expired - Lifetime
- 1999-05-07 AT AT99920403T patent/ATE450029T1/de not_active IP Right Cessation
- 1999-05-07 WO PCT/US1999/010115 patent/WO1999059127A1/en active Application Filing
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- 1999-05-07 EP EP99920403A patent/EP1093654B1/en not_active Expired - Lifetime
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2000
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-
2005
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-
2008
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Also Published As
Publication number | Publication date |
---|---|
US6980188B1 (en) | 2005-12-27 |
EP1093654A1 (en) | 2001-04-25 |
US20060012594A1 (en) | 2006-01-19 |
US7379043B2 (en) | 2008-05-27 |
US6067065A (en) | 2000-05-23 |
EP1093654B1 (en) | 2009-11-25 |
JP2012098745A (ja) | 2012-05-24 |
CA2331695A1 (en) | 1999-11-18 |
CN1308756A (zh) | 2001-08-15 |
EP1093654A4 (en) | 2007-10-31 |
ATE450029T1 (de) | 2009-12-15 |
CA2331695C (en) | 2008-03-04 |
US8344980B2 (en) | 2013-01-01 |
DE69941706D1 (de) | 2010-01-07 |
WO1999059127A1 (en) | 1999-11-18 |
CN1174358C (zh) | 2004-11-03 |
US20080225030A1 (en) | 2008-09-18 |
JP2002514796A (ja) | 2002-05-21 |
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