JPS54100224A - Luminance modulator for liquid crystal display unit - Google Patents
Luminance modulator for liquid crystal display unitInfo
- Publication number
- JPS54100224A JPS54100224A JP612578A JP612578A JPS54100224A JP S54100224 A JPS54100224 A JP S54100224A JP 612578 A JP612578 A JP 612578A JP 612578 A JP612578 A JP 612578A JP S54100224 A JPS54100224 A JP S54100224A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- register
- output
- gate
- display unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
- Transforming Electric Information Into Light Information (AREA)
Abstract
PURPOSE: To display the picture of the intermediate gradation on the liquid crystal matrix panel for the device which controls the luminance of each picture element forming the screen of the liquid crystal TV by controlling the pulse duration of the luminance modulation signal and then controlling the effective voltage to be applied to the liquid crystal.
CONSTITUTION: For the liquid crystal display unit which displays the picture featuring the intermediate gradation of K2 on the liquid crystal matrix, shift register 21 of 2K-1 bits is provided along with clock pulse generator 22 to generate the clock to actuate register 21 plus 2-input AND gate 18 and 19 to form the bistable circuit which supplies produced by inverting the 1st-bit output of register 21 via inverter 29 and the signal to start the display of the contents of the information about one scanning period. In addition, the following units are provided: OR gate 20 to supply the output of gate 18 and 19 plus the output of 2K-1 bits of register 21; FF26 to give the AC driving to the liquid crystal using the 2K-1 bit output of register 21 as the input; and the logic circuit to give the logic operation to each output of register 21 and to generate the basic pulse signal of K units twice in one scanning period.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP612578A JPS54100224A (en) | 1978-01-25 | 1978-01-25 | Luminance modulator for liquid crystal display unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP612578A JPS54100224A (en) | 1978-01-25 | 1978-01-25 | Luminance modulator for liquid crystal display unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS54100224A true JPS54100224A (en) | 1979-08-07 |
Family
ID=11629780
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP612578A Pending JPS54100224A (en) | 1978-01-25 | 1978-01-25 | Luminance modulator for liquid crystal display unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54100224A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5997192A (en) * | 1982-11-26 | 1984-06-04 | セイコーエプソン株式会社 | Driving of matrix type liquid crystal display |
JPS62201790U (en) * | 1986-06-13 | 1987-12-23 | ||
JP2002514796A (en) * | 1998-05-08 | 2002-05-21 | オーロラ システムズ, インコーポレイテッド | How to modulate a multi-pixel display |
-
1978
- 1978-01-25 JP JP612578A patent/JPS54100224A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5997192A (en) * | 1982-11-26 | 1984-06-04 | セイコーエプソン株式会社 | Driving of matrix type liquid crystal display |
JPH0469392B2 (en) * | 1982-11-26 | 1992-11-06 | Seiko Epson Corp | |
JPS62201790U (en) * | 1986-06-13 | 1987-12-23 | ||
JP2002514796A (en) * | 1998-05-08 | 2002-05-21 | オーロラ システムズ, インコーポレイテッド | How to modulate a multi-pixel display |
US8344980B2 (en) | 1998-05-08 | 2013-01-01 | Omnivision Technologies, Inc. | Display with multiplexed pixels and driving methods |
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