JP5308007B2 - 異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet - Google Patents
異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet Download PDFInfo
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- JP5308007B2 JP5308007B2 JP2007274832A JP2007274832A JP5308007B2 JP 5308007 B2 JP5308007 B2 JP 5308007B2 JP 2007274832 A JP2007274832 A JP 2007274832A JP 2007274832 A JP2007274832 A JP 2007274832A JP 5308007 B2 JP5308007 B2 JP 5308007B2
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001339 C alloy Inorganic materials 0.000 description 1
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- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1211—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/845—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body including field-effect transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
態様は、半導体フィン13の中の半導体材料は同じであるとして説明される。半導体フィン13を構成する半導体材料は、シリコン、ゲルマニウム、シリコン−ゲルマニウム合金、シリコン−カーボン合金、シリコン−ゲルマニウム−カーボン合金、ヒ化ガリウム、ヒ化インジウム、リン化インジウム、III−V族化合物半導体材料、II−VI族化合物半導体材料、有機半導体材料、およびその他の化合物半導体材料の一つであればよい。
Claims (4)
- 第1の上面を有する少なくとも1つの第1の半導体フィンと、第2の上面を有する少なくとも1つの第2の半導体フィンとを半導体基板の上に形成する工程と、
前記少なくとも1つの第2の半導体フィンの一部分の中に注入化学種を導入する工程と、
前記少なくとも1つの第2の半導体フィンの前記一部分を除去する工程と、
を含み、
前記第1の上面の高さと前記第2の上面の高さとは等しく、前記第2の垂直寸法は前記第1の垂直寸法のより小さく、前記少なくとも1つの第2の半導体フィンの側壁は、前記少なくとも1つの第1の半導体フィンの側壁に接触して隣接する半導体構造体を製造するための方法。 - 前記少なくとも1つの第2の半導体フィンの前記部分は、前記第1の半導体フィン中の半導体材料と、前記第2の半導体フィン中の前記注入化学種と合金を形成していない半導体材料と、に対して前記一部分を選択的にエッチングする選択的エッチング・プロセスによって除去される、請求項1に記載の方法。
- 前記少なくとも1つの第2の半導体フィンの前記一部分の除去によって形成された空間の中に誘電体材料を堆積する工程をさらに含む、請求項1に記載の方法。
- 前記少なくとも1つの第1の半導体フィンと前記少なくとも1つの第2の半導体フィンとのそれぞれの側壁上にゲート誘電体を形成する工程と、
前記ゲート誘電体上にゲート電極を形成する工程と
をさらに含む、請求項1に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/564961 | 2006-11-30 | ||
US11/564,961 US7655989B2 (en) | 2006-11-30 | 2006-11-30 | Triple gate and double gate finFETs with different vertical dimension fins |
Related Child Applications (1)
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JP2013105310A Division JP2013179343A (ja) | 2006-11-30 | 2013-05-17 | 異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet |
Publications (2)
Publication Number | Publication Date |
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JP2008141177A JP2008141177A (ja) | 2008-06-19 |
JP5308007B2 true JP5308007B2 (ja) | 2013-10-09 |
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JP2007274832A Expired - Fee Related JP5308007B2 (ja) | 2006-11-30 | 2007-10-23 | 異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet |
JP2013105310A Pending JP2013179343A (ja) | 2006-11-30 | 2013-05-17 | 異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet |
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JP2013105310A Pending JP2013179343A (ja) | 2006-11-30 | 2013-05-17 | 異なる垂直寸法のフィンを有するトリプル・ゲート・フィンfetおよびダブル・ゲート・フィンfet |
Country Status (3)
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US (2) | US7655989B2 (ja) |
JP (2) | JP5308007B2 (ja) |
CN (1) | CN101192605B (ja) |
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JP4504214B2 (ja) * | 2005-02-04 | 2010-07-14 | 株式会社東芝 | Mos型半導体装置及びその製造方法 |
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