JP5306730B2 - Half bridge circuit - Google Patents

Description

  The present invention relates to a half-bridge circuit including a high-side FET switch and a low-side FET switch used in a power supply circuit or the like.

Conventionally, a half-bridge circuit that includes a high-side FET switch and a low-side FET switch and is driven by a drive circuit using a driver IC or the like has been used for a power supply circuit or the like. The driver IC charges the gate capacitance of the FET switch via a resistor when the FET switch is turned on, and short-circuits the gate capacitance via the resistor when the FET switch is turned off, thereby reducing the energy of the charge charged in the gate capacitance. Convert to heat with resistance. Energy is lost because energy is converted to heat. The half-bridge circuit requires a high breakdown voltage FET when a high voltage is applied, the gate capacity of the FET increases, and the energy loss due to the gate capacity per switching operation increases. Further, this energy loss increases in proportion to the switching frequency because the number of times of switching per unit time increases as the switching frequency increases. For this reason, in the half bridge circuit, when the applied voltage is high and high frequency switching is required, problems such as heat generation and a decrease in efficiency occur. Further, although a half bridge circuit using a transformer or the like in the drive circuit is known (see, for example, Patent Document 1), energy loss due to gate capacity is not reduced by the transformer.
JP 2004-40942 A

  The present invention solves the above problem and provides a high-efficiency half-bridge circuit that reduces energy loss due to gate capacitance and prevents heat generation in a half-bridge circuit having a high-side FET switch and a low-side FET switch. For the purpose.

  In order to achieve the above object, the invention of claim 1 includes a high-side FET switch and a low-side FET switch connected in series, and a half-bridge driver for alternately turning on and off each gate capacitance of the FET switches by charging and discharging. A half-bridge circuit that generates an output at a connection point of both FET switches, the half-bridge driver includes a power source for charging a gate capacitance of the FET switch, and when the FET switch is turned off. And a transformer for discharging the charge charged in the gate capacitance of the FET switch and regenerating the energy to the power source.

  According to a second aspect of the present invention, in the half-bridge circuit according to the first aspect, a switch for controlling the charging of the gate capacitance from the power source, a switch for controlling the discharging of the gate capacitance and the regenerative operation by the transformer, and these switches And a timing circuit for controlling the opening / closing timing of the device.

  According to the first aspect of the present invention, the energy of the electric charge charged in the gate capacitance of the FET switch is regenerated to the power source, so that the energy loss due to the gate capacitance is reduced. Therefore, even if the switching frequency of the FET switch is high, heat generation is prevented and high efficiency is achieved.

  According to the second aspect of the present invention, the regeneration of the gate capacitance of the one FET switch that is turned off is controlled by the switch at an opening / closing timing that has priority over the charging of the gate capacitance of the other FET switch that is turned on. The efficiency of.

  FIG. 1 shows a circuit configuration of a half bridge circuit 10 according to an embodiment of the present invention. The half-bridge circuit 10 alternately charges and discharges the gate capacity of the output stage 11 of the half-bridge circuit having the high-side FET switch FET1 and the low-side FET switch FET2 connected in series and the FET switches FET1 and FET2. A half-bridge driver 12 for turning on and off. The output of the output stage 11 of the half bridge circuit is generated at the connection point 111 of both FET switches FET1 and FET2.

  The FET switches FET1 and FET2 (hereinafter referred to as FET1 and FET2 respectively) are drain, gate, and source terminals, and are voltage-driven semiconductor switches that control the current between the drain and source by the voltage applied to the gate. For example, a MOSFET (Metal Oxide Semiconductor FET). The output stage 11 of the half-bridge circuit is configured by connecting FET switches of the same polarity (usually N-channel) in series, and the upper (high voltage side) FET 1 is a high side FET switch and the lower side (low voltage side) FET 2. Is called a low-side FET switch. The source of the FET 1 and the drain of the FET 2 are connected, and the output terminal OUT is connected to the connection point 111. The gates G1 and G2 of the FET1 and FET2 have an input capacitance called a gate capacitance, and when a driving voltage is applied to the gates G1 and G2, the gate capacitance is charged. The charge charged in the gate capacitance is called gate charge.

  The half bridge driver 12 is a gate drive circuit that applies a drive voltage to the gates G1 and G2. The half-bridge driver 12 discharges the electric charge charged in the gate capacitance when the FET1 is turned off and regenerates the energy to the power supply VG when the FET1 is turned off. And the transformer TR2 for discharging the charge charged in the gate capacitance and regenerating the energy to the power source VG when the FET2 is turned off.

  The half-bridge driver 12 includes switches S1 and S2 that control charging of the gate capacitance from the power source VG, switches S4 and S3 that control discharge of the gate capacitance and regeneration operation by the transformers TR2 and TR3, and switches S1 to S1. And a timing circuit 13 composed of a digital circuit or the like for controlling the opening / closing timing of S4. The switches S1 to S4 are semiconductor switches, for example, and perform on / off control of currents of the transformers TR1 to TR3.

  The half bridge driver 12 includes a transformer TR1 for driving the FET1 and FET2. The current from the power supply VG is turned on / off by the switches S1 and S2 and flows to the primary side of the transformer TR1 via the capacitor C1. The charging currents flowing from the secondary side of the transformer TR1 to the gates G1 and G2 are rectified by the diodes D1 and D4, respectively, and the gate capacitances of the gates G1 and G2 are alternately charged.

  The discharge current flowing from the gate G1 to the primary side of the transformer TR3 is rectified by the diode D3 and turned on / off by the switch S3. The regenerative current flowing from the secondary side of the transformer TR3 to the power supply VG is rectified by the diode D6. The discharge current flowing from the gate G2 to the primary side of the transformer TR2 is rectified by the diode D5 and turned on / off by the switch S4. The regenerative current flowing from the secondary side of the transformer TR2 to the power supply VG is rectified by the diode D2.

  2A and 2B show circuit operations of the half-bridge circuit 10 configured as described above in order of time series. FIG. 2A shows a state transition as transition 1 in which FET1 is turned off and FET2 is turned on, and FET1 is turned on and FET2 is turned off. This transition 1 is performed by the timing circuit 13 with the switches S2 and S3 turned off and the switches S4 and S1 turned on with a certain time difference from the off state. 2A shows the first, second, and third states in transition 1, respectively. In the first state, when the switch S4 is turned on, the electric charge charged in the gate capacitance of the FET2 is discharged to the primary side of the transformer TR2 via the switch S4 and the diode D5, and the FET2 is turned off. The transformer TR2 is excited by this discharge current to store energy. Subsequently, in the second state, the energy stored in the transformer TR2 is released to the secondary side, and is regenerated from the secondary side of the transformer TR2 to the power source VG via the diode D2. Subsequently, in the third state, when the switch S1 is turned on, a current flows through the transformer TR1, the electric charge is charged from the secondary side of the transformer TR1 to the gate capacitance of the FET1 through the diode D1, and the FET1 is turned on. .

  Next, FIG. 2B shows a state transition in which the FET 1 is turned on and the FET 2 is turned off, and the FET 1 is turned off and the FET 2 is turned on as the transition 2. This transition 2 is performed by the timing circuit 13 with the switches S1 and S4 being turned off and the switches S3 and S2 being turned on with a certain time difference from the off state. FIG. 2B shows the first, second, and third states in the transition 2, respectively. In the first state, when the switch S3 is turned on, the electric charge charged in the gate capacitance of the FET1 is discharged to the primary side of the transformer TR3 through the switch S3 and the diode D3, and the FET1 is turned off. The transformer TR3 is excited by this discharge current to store energy. Subsequently, in the second state, the energy stored in the transformer TR3 is released to the secondary side, and is regenerated from the secondary side of the transformer TR3 to the power source VG via the diode D6. Subsequently, in the third state, when the switch S2 is turned on, a current flows through the transformer TR1, and the gate capacitance of the FET 2 is charged from the secondary side of the transformer TR1 via the diode D4, so that the FET 2 is turned on. .

  Thus, when the FET 1 or FET 2 is turned off, the half bridge circuit 10 of the present embodiment uses the transformers TR3 and TR2 without converting the energy of the electric charge charged in the gate capacitance into heat by the resistor. Therefore, the energy loss due to the gate capacitance is reduced. Therefore, even if the switching frequency of FET1 and FET2 is high, heat generation is prevented and high efficiency is achieved. Also, the regeneration of the gate capacitance of the one FET switch that is turned off (second state of transition 1 and transition 2) takes precedence over the charging of the gate capacitance of the other FET switch that is turned on (third state). The efficiency of regeneration is improved by controlling the switches S1 to S4 at the opening and closing timing. In addition, because of the opening / closing timing, the turn-off of one FET switch precedes the turn-on of the other FET switch, thereby preventing the FET1 and FET2 from being turned on simultaneously.

  In addition, this invention is not restricted to the structure of said embodiment, A various deformation | transformation is possible in the range which does not change the summary of invention. For example, in order to reduce the size of the half bridge circuit 10, a small transformer applying MEMS (Micro Electro Mechanical Systems) may be used as the transformer, or a plurality of transformers may be integrated.

The circuit diagram of the half bridge circuit concerning one embodiment of the present invention. (A) is a circuit diagram showing a state transition in the circuit operation of the circuit, (b) is a circuit diagram showing another state transition in the circuit operation.

Explanation of symbols

10 Half Bridge Circuit 11 Half Bridge Circuit Output Stage 12 Half Bridge Driver 13 Timing Circuit FET1 High Side FET Switch FET2 Low Side FET Switch TR1, TR2, TR3 Transformers S1 to S4 Switch

Claims (2)

A high-side FET switch and a low-side FET switch connected in series, and a half-bridge driver for alternately turning on and off each gate capacitance of the FET switches, and outputting to the connection point of the FET switches In a half-bridge circuit that generates
The half-bridge driver includes a power source for charging the gate capacitance of the FET switch,
A half-bridge circuit comprising: a transformer for discharging the charge charged in the gate capacitance of the FET switch and regenerating the energy to the power source when the FET switch is turned off. A switch for controlling the charging of the gate capacitance from the power source;
A switch for controlling the discharge of the gate capacitance and the regenerative operation by the transformer;
The half-bridge circuit according to claim 1, further comprising a timing circuit that controls opening / closing timing of the switches.

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