JP2006081382A - Drive device and control method of element - Google Patents

Drive device and control method of element Download PDF

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JP2006081382A
JP2006081382A JP2004294339A JP2004294339A JP2006081382A JP 2006081382 A JP2006081382 A JP 2006081382A JP 2004294339 A JP2004294339 A JP 2004294339A JP 2004294339 A JP2004294339 A JP 2004294339A JP 2006081382 A JP2006081382 A JP 2006081382A
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inductance element
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igbt
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Akira Okawa
晃 大川
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method and device for driving an element, capable of reducing the drive power for the element, and is capable of reducing the weight and the volume of the drive device. <P>SOLUTION: A power supply B1 that can both supply and charge electric power has two kinds of states, depending on switches Q1 and Q2 connected to the power supply B1: a state 1, where the switch Q1 is closed and the switch Q2 is opened and a state 2, where the switch Q1 is opened and the switch Q2 is closed. At transition when the electric charge charged in the gate capacitance of a driven element is discharged, the electric charge charged in the gate capacitance in the state 2 is discharged via an inductance element L1, while energy is stored in the inductance element L1. After that, the energy stored in the inductance element L1 in the state 1 discharges the electric charge charged in the gate capacitance of IGBT1, while a current is regenerated and charged in the power supply B1. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は,駆動信号入力端子に静電容量(ゲート容量またはミラー容量など)をもつ素子(MOS−FETやIGBTなど)の駆動装置および素子の駆動制御方法に関する.  The present invention relates to a device for driving an element (such as a MOS-FET or IGBT) having a capacitance (gate capacitance or mirror capacitance) at a drive signal input terminal, and a method for controlling the drive of the device.

駆動信号入力端子に静電容量(ゲート容量またはミラー容量など)をもつ素子(MOS−FETやIGBTなど)は駆動信号入力端子(ゲート)に,ゲート容量(MOS−FETの場合:ゲート−ソース間にある静電容量,IGBTの場合:ゲート−エミッタ間にある容量)やミラー容量(MOS−FETの場合:ゲート−ドレイン間にある静電容量,IGBTの場合:ゲート−コレクタ間にある容量)などの静電容量をもつ.従来,このようなゲートに静電容量をもつ素子の駆動は,電源を備えたプッシュプル回路と駆動信号入力端子への電流を制限するゲート抵抗から構成される装置がある.この装置は,プッシュプル回路によって駆動電圧を素子のゲートに対して出力する.素子の駆動状態を変化させる過渡時,ゲート抵抗は素子のゲートへ供給される電流を制限する.
(例えば,特許文献1参照.).
特開平08−27550号
An element (such as a MOS-FET or IGBT) having a capacitance (gate capacitance or mirror capacitance) at the drive signal input terminal is connected to the drive signal input terminal (gate), and a gate capacitance (in the case of MOS-FET: between gate and source) Capacitance in IGBT, IGBT: capacitance between gate and emitter) and Miller capacitance (for MOS-FET: capacitance between gate and drain, for IGBT: capacitance between gate and collector) Etc. Conventionally, there is a device composed of a push-pull circuit equipped with a power source and a gate resistor that limits the current to the drive signal input terminal for driving such an element having a capacitance at the gate. This device outputs a drive voltage to the gate of the element by a push-pull circuit. During a transient that changes the driving state of the device, the gate resistance limits the current supplied to the gate of the device.
(For example, see Patent Document 1).
JP 08-27550 A

ところで,駆動信号入力端子に静電容量をもつ素子はMOS−FETやIGBTなどが知られる.これらの素子には駆動信号入力端子(ゲート)と,素子のその他の端子間に,素子の構成上つくられる静電容量(ゲート容量やミラー容量)や,素子の駆動信号入力端子と素子ケース間,素子の駆動信号入力端子とグランドやその他の導電体との間などの静電容量が存在する(以下この静電容量を駆動信号入力端子の静電容量という).
素子の駆動は,駆動信号入力端子電圧の変化によって素子抵抗(MOS−FETの場合:ドレイン−ソース間の抵抗,IGBTの場合:コレクタ−エミッタ間抵抗)の変化をさせる.そのためには,電源を備えたプッシュプル回路と駆動信号入力端子への電流を制限するためのゲート抵抗から構成される装置によって素子の駆動信号入力端子の静電容量に対し充電電流または放電電流を流し駆動信号入力端子の電圧を変化させる必要がある.
By the way, MOS-FET, IGBT, etc. are known as elements having capacitance at the drive signal input terminal. These elements have a drive signal input terminal (gate) and the other terminals of the element, electrostatic capacity (gate capacity and mirror capacity) created by the element configuration, and between the drive signal input terminal of the element and the element case. There is a capacitance between the drive signal input terminal of the element and the ground or other conductors (hereinafter, this capacitance is referred to as the capacitance of the drive signal input terminal).
The element is driven by changing the element resistance (in the case of MOS-FET: drain-source resistance, in the case of IGBT: collector-emitter resistance) by changing the drive signal input terminal voltage. For this purpose, a charge current or a discharge current is generated with respect to the capacitance of the drive signal input terminal of the element by a device composed of a push-pull circuit having a power source and a gate resistor for limiting the current to the drive signal input terminal. It is necessary to change the voltage of the sink drive signal input terminal.

しかし従来,素子の駆動状態を変化させる過渡で駆動信号入力端子の静電容量に対して流す充電電流または放電電流によって,ゲート抵抗にジュール熱が発生しエネルギー消費が大きく,駆動装置の効率を悪化させ,さらに駆動装置に備えた電源の供給電力が大きく,重量および容積が増加してしまうという問題があった.  Conventionally, however, Joule heat is generated in the gate resistance due to the charging current or discharging current that flows to the capacitance of the drive signal input terminal during the transition that changes the driving state of the element, resulting in large energy consumption, deteriorating the efficiency of the driving device. In addition, there was a problem that the power supply of the power supply provided in the drive unit was large and the weight and volume increased.

本発明は,上記課題に鑑みてなされたもので,素子の駆動装置の効率改善,重量および容積の小型化に寄与する素子駆動効率向上の方法を提供することを目的とする.  The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for improving element drive efficiency that contributes to improvement in efficiency of an element drive device and reduction in weight and volume.

上記課題を解決するために請求項1の発明に係わる素子の駆動装置は,素子の駆動信号を生成する制御装置(例えば実施形態の3)を備え,電力の供給と蓄電が可能な電源(例えば実施形態のB1)を備え,その電源に2個のスイッチ(例えば実施形態のQ1,Q2)がトーテンポールに接続される構造によって電源と出力を導通する状態1(例えば実施形態のQ1を導通,Q2を遮断)と電源と出力を切り離しかつ出力端を短絡する状態2(例えば実施形態のQ1を遮断,Q2を導通)の切り替えが可能なプッシュプル回路(例えば実施形態の2)にインダクタンス素子(例えば実施形態のL1)が直列に接続される構造の素子の駆動装置(例えば実施形態の1)であって,素子の駆動信号入力端子に存在する静電容量に充電されている電荷の放電を,プッシュプル回路(例えば実施形態の2)を状態2とし素子の駆動信号入力端子に存在する静電容量の充電電荷をインダクタンス素子(例えば実施形態のL1)を介して放電し,これと同時にインダクタンス素子(例えば実施形態のL1)に放電電流が流れインダクタンス素子(例えば実施形態のL1)にエネルギーが蓄えられる状態を経て,プッシュプル回路(例えば実施形態の2)を状態1としインダクタンス素子(例えば実施形態のL1)に蓄えられているエネルギーを電源(例えば実施形態のB1)に回生し充電することを特徴とする.  In order to solve the above problems, an element driving device according to the invention of claim 1 includes a control device (for example, the third embodiment) that generates an element driving signal, and is capable of supplying power and storing power (for example, State 1 (for example, Q1 of the embodiment is conducted, Q2 of the embodiment is conducted, Q2 of the embodiment is provided, and B2) of the embodiment is provided and the power supply and the output are conducted by the structure in which two switches (for example, Q1 and Q2 of the embodiment) are connected to the totem pole. The push-pull circuit (for example, 2 of the embodiment) that can be switched between the state 2 (for example, Q1 of the embodiment is shut off and Q2 is turned on), which disconnects the power source and the output and short-circuits the output terminal. L1) of the embodiment is a device driving apparatus (for example, 1 of the embodiment) having a structure connected in series, and the electric charge charged in the capacitance existing in the driving signal input terminal of the device is In the state 2, the push-pull circuit (for example, 2 in the embodiment) is set to the state 2 to discharge the charged charge of the capacitance existing at the drive signal input terminal of the element through the inductance element (for example, L1 in the embodiment). At the same time, a state in which a discharge current flows through the inductance element (for example, L1 of the embodiment) and energy is stored in the inductance element (for example, L1 of the embodiment), and the push-pull circuit (for example, 2 of the embodiment) is changed to the state 1 The energy stored in (for example, L1 in the embodiment) is regenerated and charged in a power source (for example, B1 in the embodiment).

以上の構成を備えた駆動装置は,素子の駆動信号入力端子に存在する静電容量の充電および放電を行う際,プッシュプル回路(例えば実施形態の2)が設定する,状態1または状態2の駆動内容と駆動内容の状態が保持される時間と駆動状態の時間遷移に関するスケジュール情報をもち,同スケジュールに基づきプッシュプル回路(例えば実施形態の2)の状態設定を実施して,素子の駆動信号入力端子に流れる電流の調整および素子の駆動信号入力端子電圧の調整ができる.  The drive device having the above configuration is in the state 1 or the state 2 set by the push-pull circuit (for example, 2 in the embodiment) when charging and discharging the capacitance existing in the drive signal input terminal of the element. It has schedule information regarding the driving contents and the time during which the driving contents are held and the time transition of the driving conditions, and performs the state setting of the push-pull circuit (for example, embodiment 2) based on the schedule, The current flowing through the input terminal and the drive signal input terminal voltage of the element can be adjusted.

本発明は,素子の駆動電力を小さく抑えることができ装置全体の駆動効率が向上する利点があるばかりでなく,素子の駆動装置に備える電源の重量および容積を小さくすることが可能になる.  The present invention not only has the advantage that the driving power of the element can be kept small and the driving efficiency of the entire apparatus is improved, but also the weight and volume of the power source provided in the driving apparatus of the element can be reduced.

以下,図面を参照して本発明の実施の形態について説明する.
(全体構成)
本実施の形態の駆動装置は,例えば電力変換器などを構成するMOS−FET,IGBTなどの素子を駆動をする際に有用な装置である.図1は,本発明の実施形態の素子の駆動装置の構成を示すブロック図である.図1において被駆動素子は,駆動信号入力端子間にゲート容量やミラー容量をもつMOS−FETやIGBTなどの素子である.
Embodiments of the present invention will be described below with reference to the drawings.
(overall structure)
The drive device according to the present embodiment is a device that is useful when driving elements such as MOS-FETs and IGBTs constituting a power converter, for example. FIG. 1 is a block diagram showing the configuration of an element driving apparatus according to an embodiment of the present invention. In FIG. 1, the driven element is an element such as a MOS-FET or IGBT having a gate capacitance or a mirror capacitance between the drive signal input terminals.

(素子の駆動装置)
また,図1において電源B1は電力を供給および充電ができる装置で化学電池,コンデンサ,蓄電装置,電力変換装置などや,またこれらの組み合わせにより構成される電源である.電源B1の正極端子と負極端子との間にはスイッチQ1,Q2がトーテンポールに接続されプッシュプル回路2を構成する.スイッチQ1,Q2への制御信号は制御装置3によって与えられる.プッシュプル回路2の出力はスイッチQ1,Q2の状態により2種類の状態をもつ.スイッチQ1が導通でスイッチQ2が遮断の状態を状態1,スイッチQ1が遮断でスイッチQ2が導通の状態を状態2とする.よってプッシュプル回路2は状態1においては電源B1がインダクタンス素子L1を介してMOS−FET,IGBTなどの素子の駆動信号入力端子であるゲートに接続される状態である.また,プッシュプル回路2は状態2においては電源B1とインダクタンス素子L1が切り離されかつMOS−FET,IGBTなどの素子の駆動信号入力端子はインダクタンス素子L1を介して短絡接続される状態である.
(Element drive unit)
In FIG. 1, a power source B1 is a device that can supply and charge electric power, and is a power source constituted by a chemical battery, a capacitor, a power storage device, a power conversion device, or a combination thereof. Switches Q1 and Q2 are connected to the totem pole between the positive terminal and the negative terminal of the power supply B1 to constitute a push-pull circuit 2. The control signal to the switches Q1 and Q2 is given by the control device 3. The output of the push-pull circuit 2 has two states depending on the states of the switches Q1 and Q2. The state where the switch Q1 is conductive and the switch Q2 is cut off is referred to as state 1, and the state where the switch Q1 is cut off and the switch Q2 is conductive is referred to as state 2. Therefore, in the state 1, the push-pull circuit 2 is in a state where the power source B1 is connected to the gate which is a drive signal input terminal of an element such as a MOS-FET or IGBT via the inductance element L1. In the state 2 of the push-pull circuit 2, the power source B1 and the inductance element L1 are disconnected, and the drive signal input terminals of elements such as MOS-FET and IGBT are short-circuited via the inductance element L1.

(制御方法)
図2はIGBT素子の駆動装置の実施形態の動作を示す回路図である.図2はIGBT1のゲート容量に充電されている電荷を放電をすることによりIGBT1の駆動状態に変化を与える過渡において,電源B1に回生充電する動作を示している.スイッチQ1が遮断しスイッチQ2が導通する状態として,IGBT1のゲート容量に充電されている電荷をインダクタンス素子L1を介してQ2を導通する電流ループ(A)を形成する.するとIGBT1のゲート容量に充電されている電荷がインダクタンス素子L1を介し放電される.同時にインダクタンス素子L1に電流が流れることによってインダクタンス素子L1にエネルギーが蓄えられる.この状態を経てスイッチQ2を電気的に遮断してスイッチQ1を導通状態(ただしMOS−FETに寄生するダイオードによる導通とMOS−FETを導通状態にしての導通のいずれかまたは両方のケースがある)にして,IGBT1のゲート容量とインダクタンス素子L1と導通するスイッチQ1と電源B1とからなる電流ループ(B)を形成して,インダクタンス素子L1に蓄えられたエネルギーによりIGBT1のゲート容量に充電された電荷を放電するとともに電源B1に電流を充電する.
(Control method)
FIG. 2 is a circuit diagram showing the operation of the embodiment of the drive device for the IGBT element. FIG. 2 shows the operation of regeneratively charging the power supply B1 in a transient that changes the driving state of the IGBT1 by discharging the charge charged in the gate capacitance of the IGBT1. In a state where the switch Q1 is cut off and the switch Q2 is turned on, a current loop (A) is formed in which the charge charged in the gate capacitance of the IGBT 1 is turned on through the inductance element L1. Then, the charge charged in the gate capacitance of the IGBT 1 is discharged through the inductance element L1. At the same time, energy is stored in the inductance element L1 by a current flowing through the inductance element L1. Through this state, the switch Q2 is electrically cut off and the switch Q1 is in a conductive state (however, there are cases of either or both of conduction by a diode parasitic on the MOS-FET and conduction by making the MOS-FET conductive). Thus, a current loop (B) composed of the gate capacitance of the IGBT 1 and the switch Q1 conducting to the inductance element L1 and the power source B1 is formed, and the charge charged in the gate capacitance of the IGBT 1 by the energy stored in the inductance element L1. And the power source B1 is charged with current.

図3はIGBT素子の駆動装置の実施形態の動作を示す回路図である.図3はIGBT1のゲート容量に対して電荷を充電することによりIGBT1の駆動状態に変化を与える過渡の動作を示している.スイッチQ1が導通しスイッチQ2が遮断する状態として,電源B1と導通したQ1とインダクタンス素子L1とIGBT1のゲート容量からなる電流ループ(D)を形成する.すると電源B1からインダクタンス素子L1を介しIGBT1のゲート容量に充電される.同時にインダクタンス素子L1に電流が流れることによってインダクタンス素子L1にエネルギーが蓄えられる.この状態を経てスイッチQ1を電気的に遮断してスイッチQ2を導通状態(ただしMOS−FETに寄生するダイオードによる導通とMOS−FETを導通状態にしての導通のいずれかまたは両方のケースがある)にして,IGBT1のゲート容量とインダクタンス素子L1と導通するスイッチQ2とからなる電流ループ(C)を形成して,インダクタンス素子L1に蓄えられたエネルギーによりIGBT1のゲート容量を充電する.  FIG. 3 is a circuit diagram showing the operation of the embodiment of the drive device for the IGBT element. FIG. 3 shows a transient operation that changes the driving state of the IGBT 1 by charging the gate capacitance of the IGBT 1. As a state in which the switch Q1 is turned on and the switch Q2 is turned off, a current loop (D) is formed that includes the gate capacitance of Q1, the inductance element L1, and the IGBT 1 that are connected to the power source B1. Then, the gate capacitance of the IGBT 1 is charged from the power source B1 through the inductance element L1. At the same time, energy is stored in the inductance element L1 by a current flowing through the inductance element L1. Through this state, the switch Q1 is electrically cut off and the switch Q2 is in a conductive state (however, there are cases of either or both of conduction by a diode parasitic on the MOS-FET and conduction by making the MOS-FET conductive). Thus, a current loop (C) composed of the gate capacitance of the IGBT 1 and the switch Q2 conducting with the inductance element L1 is formed, and the gate capacitance of the IGBT 1 is charged by the energy stored in the inductance element L1.

図4はIGBT1のゲート容量に充電または放電することによりIGBT1の駆動状態に変化を与える過渡において,スイッチQ1,Q2のスイッチングの状態とIGBT1のゲートの電流,電圧の関係を示した波形図である.  FIG. 4 is a waveform diagram showing the relationship between the switching state of the switches Q1 and Q2 and the current and voltage of the gate of the IGBT 1 in a transition that changes the driving state of the IGBT 1 by charging or discharging the gate capacitance of the IGBT 1. .

表1は本実施の形態の駆動装置にあらかじめもち,IGBT1のゲート容量とインダクタンス素子L1のインダクタンスによるLC共振でIGBT1のゲートに過大な電流が流れることを抑制,およびIGBT1のゲートに過大な電圧が与えられることを抑制することのできるスイッチQ1,Q2の駆動情報で,スイッチQ1,Q2の状態と次のシーケンスへの遷移時間についてを示したスイッチ駆動のスケジュール表である.  Table 1 is provided in advance in the driving apparatus of the present embodiment, and suppresses an excessive current from flowing to the gate of IGBT 1 due to LC resonance caused by the gate capacitance of IGBT 1 and the inductance of inductance element L1, and an excessive voltage is applied to the gate of IGBT 1. This is a switch drive schedule table showing the state of the switches Q1 and Q2 and the transition time to the next sequence with the drive information of the switches Q1 and Q2 that can be suppressed.

たとえばIGBT1のゲート容量を充電する際,同スケジュール表(ゲート容量の充電)の状態(1)に示すQ1,Q2に従ってのスイッチQ1,Q2を設定しTc1時間経過後,同スケジュール表の状態の次項(2)に遷移し,スイッチの設定と時間保持についてを同様に実施し状態項(1)から(n)まで順番に行うことによってIGBT1のゲートに流れる電流および電圧を調整することができる.ただし遷移時間Tc1からTcnおよびnは任意の値である.  For example, when charging the gate capacity of the IGBT 1, the switches Q1 and Q2 according to Q1 and Q2 shown in the state (1) of the schedule table (charging of the gate capacity) are set, and after the time Tc1 has elapsed, the next item of the state of the schedule table Transition to (2), switch setting and time holding are performed in the same manner, and the current and voltage flowing through the gate of the IGBT 1 can be adjusted by sequentially performing the state terms (1) to (n). However, the transition times Tc1 to Tcn and n are arbitrary values.

たとえばIGBT1のゲート容量を放電する場合の過渡において,同スケジュール表(ゲート容量の放電)の状態(1)に示すスイッチQ1,Q2の駆動状態に設定しTd1時間経過後,同スケジュール表の状態の次項(2)に遷移し,スイッチの設定と時間保持についてを同様に実施し状態項(1)から(m)まで順番に行うことによってIGBT1のゲートに流れる電流および電圧を調整することができる.ただし遷移時間Td1からTdmおよびmは任意の値である.  For example, in the transition when the gate capacitance of the IGBT 1 is discharged, the switches Q1 and Q2 shown in the state (1) of the schedule table (gate capacitance discharge) are set to the driving state, and after the time Td1 has elapsed, It is possible to adjust the current and voltage flowing through the gate of the IGBT 1 by making the transition to the next term (2) and performing the setting of the switch and the time holding in the same manner and sequentially performing the state terms (1) to (m). However, the transition times Td1 to Tdm and m are arbitrary values.

(全体構成)
本実施の形態の駆動装置は,例えば高電圧の電力変換器を構成するMOS−FET,IGBTなどの素子の駆動において,これらの素子を制御および駆動するために必要な低電圧の電源と本実施の形態の駆動装置によって駆動されるMOS−FET,IGBTなどの素子に導通される高電圧の電源との2系統の電源を用いるシステムで,これら2系統の電源を電気的に絶縁の必要性がある素子駆動をする際に有用な装置である.図5は,本発明の実施形態の素子の駆動装置の構成を示すブロック図である.図5においてIGBT1は,駆動信号入力端子間にゲート容量やミラー容量をもつ素子の例として示すものでMOS−FETなどの素子も駆動することが可能である.IGBT1の駆動信号入力端子であるゲートへの電力の授受はインダクタンス素子L2,L3から構成されるトランスを介して素子の駆動装置1より行われる.
(overall structure)
The driving device of the present embodiment includes, for example, a low-voltage power source necessary for controlling and driving these elements in driving of elements such as MOS-FETs and IGBTs constituting a high-voltage power converter. There is a need to electrically insulate these two power sources in a system using two power sources with a high-voltage power source conducted by an element such as a MOS-FET or IGBT driven by a driving device of the form This device is useful for driving certain elements. FIG. 5 is a block diagram showing the configuration of the element driving apparatus according to the embodiment of the present invention. In FIG. 5, the IGBT 1 is shown as an example of an element having a gate capacity or a mirror capacity between the drive signal input terminals, and can also drive an element such as a MOS-FET. The power transfer to the gate which is the drive signal input terminal of the IGBT 1 is performed by the element drive device 1 through a transformer composed of the inductance elements L2 and L3.

(トランス)
インダクタンス素子L2,L3から構成されるトランスT1は,相互誘導作用によってインダクタンス素子L2からL3への電力伝達,およびインダクタンス素子L3からL2への電力伝達が可能なトランスである.このトランスのインダクタンス素子L2の巻き数をN2とし,インダクタンス素子L3の巻き数をN3とする.また,インダクタンス素子L2にかかる電圧をVL2とし,インダクタンス素子L3にかかる電圧をVL3とすると電圧と巻き数には式(イ)の関係がある.
(Trance)
The transformer T1 composed of the inductance elements L2 and L3 is a transformer capable of transmitting power from the inductance elements L2 to L3 and transmitting power from the inductance elements L3 to L2 by mutual induction. The number of turns of the inductance element L2 of this transformer is N2, and the number of turns of the inductance element L3 is N3. Further, assuming that the voltage applied to the inductance element L2 is VL2 and the voltage applied to the inductance element L3 is VL3, the relationship between the voltage and the number of turns is represented by the formula (A).

VL2:VL3≒N2:N3(N2,N3は任意の数) ・・・(イ)VL2: VL3≈N2: N3 (N2 and N3 are arbitrary numbers) (A)

VL3には常にIGBT1のゲート容量に充電された電圧が接続されているためVL2は式(イ)に応じた電圧(VL3とは比例関係)が現れ,IGBT1のゲート容量に充電された電圧の変化に比例してVL2も連動して変動する特徴がある.Since a voltage charged to the gate capacitance of the IGBT 1 is always connected to VL3, a voltage (proportional relationship with VL3) corresponding to the equation (A) appears in VL2, and a change in the voltage charged to the gate capacitance of the IGBT 1 occurs. VL2 also varies in proportion to

(素子の駆動装置)
素子の駆動装置1を構成する電源B1は電気エネルギーを充放電できる装置で化学電池,コンデンサ,蓄電装置,電力変換装置などや,またこれらの組み合わせにより構成される電源である.電源B1の正極端子と負極端子との間にはスイッチQ1,Q2がトーテンポールに接続されプッシュプル回路2を構成する.スイッチQ1,Q2への制御信号は制御装置3によって与えられる.プッシュプル回路2の出力はスイッチQ1,Q2の状態により2種類の状態をもつ.スイッチQ1が導通でスイッチQ2が遮断の状態を状態1,スイッチQ1が遮断でスイッチQ2が導通の状態を状態2とする.よって状態1は電源B1と導通状態のスイッチQ1とインダクタンス素子L1とL2とによって環状の電路を形成する.すると電源B1はインダクタンス素子L1を介してインダクタンス素子L2,L3間の電磁誘導によってIGBT1のゲートに対して電力の授受が行われる.状態2は電源B1とインダクタンス素子L1が切り離されかつ導通状態のスイッチQ2とインダクタンス素子L1とL2とによって環状の電路を形成する.するとIGBT1のゲートはインダクタンス素子L2,L3間の相互誘導によって電力の授受が可能で,インダクタンス素子L2に現れる電圧をインダクタンス素子L1を介して短絡接続される状態である.
(Element drive unit)
The power source B1 constituting the element driving device 1 is a device that can charge and discharge electric energy, and is a power source constituted by a chemical battery, a capacitor, a power storage device, a power conversion device, and the like, or a combination thereof. Switches Q1 and Q2 are connected to the totem pole between the positive terminal and the negative terminal of the power supply B1 to constitute a push-pull circuit 2. The control signal to the switches Q1 and Q2 is given by the control device 3. The output of the push-pull circuit 2 has two states depending on the states of the switches Q1 and Q2. The state where the switch Q1 is conductive and the switch Q2 is cut off is referred to as state 1, and the state where the switch Q1 is cut off and the switch Q2 is conductive is referred to as state 2. Therefore, in the state 1, an annular electric circuit is formed by the power source B1, the conductive switch Q1, and the inductance elements L1 and L2. Then, the power source B1 transmits and receives power to the gate of the IGBT 1 by electromagnetic induction between the inductance elements L2 and L3 via the inductance element L1. In state 2, the power source B1 and the inductance element L1 are disconnected, and a conductive switch Q2 and the inductance elements L1 and L2 form an annular electric circuit. Then, the gate of the IGBT 1 can transmit and receive power by mutual induction between the inductance elements L2 and L3, and the voltage appearing on the inductance element L2 is short-circuited via the inductance element L1.

トランスT1には漏れ磁束によりインダクタンス素子L2,L3間で相互に誘導されるインダクタンスの他に相互に誘導されない自己インダクタンスが存在する.図5におけるインダクタンス素子L1は前記トランスT1の漏れ磁束による自己インダクタンスによって実現することも可能である.また,トランスT1と別に設置することも可能である.  The transformer T1 has a self-inductance that is not mutually induced in addition to the inductance that is mutually induced between the inductance elements L2 and L3 due to the leakage magnetic flux. The inductance element L1 in FIG. 5 can also be realized by self-inductance due to the leakage magnetic flux of the transformer T1. It can also be installed separately from the transformer T1.

(制御方法)
図6はIGBT素子の駆動装置の実施形態の動作を示す回路図である.図6はIGBT1のゲート容量に充電されている電荷を放電をすることによりIGBT1の駆動状態に変化を与える過渡において,電源B1に回生充電する動作を示している.スイッチQ1が遮断しスイッチQ2が導通する状態として,インダクタンス素子L2に現れる電圧をインダクタンス素子L1を介してQ2を導通する電流ループ(E)を形成する.するとインダクタンス素子L1に電流が流れることによってインダクタンス素子L1にエネルギーが蓄えられる.同時にIGBT1のゲート容量に充電されている電荷がインダクタンス素子L3を介し放電される.この状態を経てスイッチQ2を電気的に遮断してスイッチQ1を導通状態(ただしMOS−FETに寄生するダイオードによる導通とMOS−FETを導通状態にしての導通のいずれかまたは両方のケースがある)にして,インダクタンス素子L2とインダクタンス素子L1と導通するスイッチQ1と電源B1とからなる電流ループ(F)を形成して,インダクタンス素子L1に蓄えられたエネルギーにより電源B1に電流を充電する.同時にIGBT1のゲート容量に充電された電荷はインダクタンス素子L3を介して放電される.
(Control method)
FIG. 6 is a circuit diagram showing the operation of the embodiment of the drive device for the IGBT element. FIG. 6 shows the operation of regeneratively charging the power supply B1 in a transient that changes the driving state of the IGBT1 by discharging the charge charged in the gate capacitance of the IGBT1. In a state where the switch Q1 is cut off and the switch Q2 is turned on, a current loop (E) is formed in which the voltage appearing on the inductance element L2 is turned on through the inductance element L1. Then, energy is stored in the inductance element L1 by a current flowing through the inductance element L1. At the same time, the charge charged in the gate capacitance of the IGBT 1 is discharged through the inductance element L3. Through this state, the switch Q2 is electrically cut off and the switch Q1 is in a conductive state (however, there are cases of either or both of conduction by a diode parasitic on the MOS-FET and conduction by making the MOS-FET conductive). Thus, a current loop (F) composed of the inductance element L2 and the switch Q1 conducting to the inductance element L1 and the power source B1 is formed, and the current is charged to the power source B1 by the energy stored in the inductance element L1. At the same time, the electric charge charged in the gate capacitance of the IGBT 1 is discharged through the inductance element L3.

図7はIGBT素子の駆動装置の実施形態の動作を示す回路図である.図7はIGBT1のゲート容量に対して電荷を充電することによりIGBT1の駆動状態に変化を与える過渡の動作を示している.スイッチQ1が導通しスイッチQ2が遮断する状態として,電源B1と導通したQ1とインダクタンス素子L1とインダクタンス素子L2からなる電流ループ(H)を形成する.すると同時にインダクタンス素子L2に供給される電力は相互誘導作用によりインダクタンス素子L3を介しIGBT1のゲート容量に充電される.さらに同時にインダクタンス素子L1に電流が流れることによってインダクタンス素子L1にエネルギーが蓄えられる.この状態を経てスイッチQ1を電気的に遮断してスイッチQ2を導通状態(ただしMOS−FETに寄生するダイオードによる導通とMOS−FETを導通状態にしての導通のいずれかまたは両方のケースがある)にして,インダクタンス素子L1とインダクタンス素子L2と導通するスイッチQ2とからなる電流ループ(G)を形成して,インダクタンス素子L1に蓄えられたエネルギーをインダクタンス素子L2に供給する.同時に相互誘導作用によりインダクタンス素子L3からIGBT1のゲート容量を充電する.  FIG. 7 is a circuit diagram showing the operation of the embodiment of the drive device for the IGBT element. FIG. 7 shows a transient operation that changes the driving state of the IGBT 1 by charging the gate capacitance of the IGBT 1. As a state in which the switch Q1 is turned on and the switch Q2 is turned off, a current loop (H) composed of Q1, the inductance element L1, and the inductance element L2 connected to the power source B1 is formed. At the same time, the electric power supplied to the inductance element L2 is charged to the gate capacitance of the IGBT 1 through the inductance element L3 by mutual induction. At the same time, the current flows through the inductance element L1, whereby energy is stored in the inductance element L1. Through this state, the switch Q1 is electrically cut off and the switch Q2 is in a conductive state (however, there are cases of either or both of conduction by a diode parasitic on the MOS-FET and conduction by making the MOS-FET conductive). Thus, a current loop (G) composed of the inductance element L1 and the switch Q2 that conducts with the inductance element L2 is formed, and the energy stored in the inductance element L1 is supplied to the inductance element L2. At the same time, the gate capacitance of the IGBT 1 is charged from the inductance element L3 by mutual induction.

本発明の実施形態の素子駆動の構成を示すブロック図である.  It is a block diagram which shows the structure of the element drive of embodiment of this invention. 同実施形態の駆動装置の動作を示す回路図である.  It is a circuit diagram which shows operation | movement of the drive device of the embodiment. 同実施形態の駆動装置の動作を示す回路図である.  It is a circuit diagram which shows operation | movement of the drive device of the embodiment. 同実施形態の駆動動作を示す波形図である.  It is a waveform diagram showing the drive operation of the same embodiment. 本発明の一実施の形態の素子駆動の構成の例を示すブロック図である  It is a block diagram which shows the example of the structure of the element drive of one embodiment of this invention 同実施例の駆動装置の動作を示す回路図である.  It is a circuit diagram which shows operation | movement of the drive device of the Example. 同実施例の駆動装置の動作を示す回路図である.  It is a circuit diagram which shows operation | movement of the drive device of the Example.

符号の説明Explanation of symbols

1 素子の駆動装置
2 プッシュプル回路
3 制御装置
B1 直流電源
Q1,Q2 スイッチ(寄生ダイオードを含むMOS−FET)
L1 インダクタンス素子
T1 トランス
L2,L3 トランスを構成するインダクタンス素子
IGBT1 素子(駆動信号入力端子に静電容量をもつ)

Figure 2006081382
1 device drive device 2 push-pull circuit 3 control device B1 DC power supply Q1, Q2 switch (MOS-FET including parasitic diode)
L1 Inductance element T1 Transformer L2, L3 Inductance element IGBT1 element constituting transformer (drive signal input terminal has capacitance)
Figure 2006081382

Claims (2)

素子の駆動信号を生成する制御装置を備え,電力の供給と蓄電が可能な電源を備え,その電源に2個のスイッチがトーテンポールに接続される構造によって電源と出力を導通する状態1と電源と出力を切り離しかつ出力端を短絡する状態2の切り替えが可能なプッシュプル回路にインダクタンス素子が直列に接続される構造の素子の駆動装置であって,素子の駆動信号入力端子に存在する静電容量に充電されている電荷の放電を,プッシュプル回路を状態2とし素子の駆動信号入力端子に存在する静電容量の充電電荷をインダクタンス素子を介して放電し,これと同時にインダクタンス素子に放電電流が流れインダクタンス素子にエネルギーが蓄えられる状態を経て,プッシュプル回路を状態1としインダクタンス素子に蓄えられているエネルギーを電源に回生し充電することを特徴とする装置.  A control device for generating a drive signal for the element, and a power source capable of supplying and storing power, wherein the power source and the output are connected by a structure in which two switches are connected to the totem pole; An element driving device having an inductance element connected in series to a push-pull circuit capable of switching between a state 2 in which an output is disconnected and an output terminal is short-circuited, and a capacitance existing at a driving signal input terminal of the element When the push-pull circuit is in state 2 and the electrostatic charge charged at the drive signal input terminal of the element is discharged through the inductance element, a discharge current is simultaneously applied to the inductance element. After the energy is stored in the flow inductance element, the energy stored in the inductance element is changed to the push-pull circuit in state 1. Apparatus characterized by regenerated ghee to power charger. 請求項1に記載の駆動装置であって,素子の駆動信号入力端子に存在する静電容量の充電および放電を行う際,プッシュプル回路が設定する,状態1または状態2の駆動内容と駆動内容の状態が保持される時間と駆動状態の時間遷移に関するスケジュール情報をもち,同スケジュールに基づきプッシュプル回路の状態設定を実施して,素子の駆動信号入力端子に流れる電流の調整および素子の駆動信号入力端子電圧の調整ができることを特徴とする制御方式.  The driving device according to claim 1, wherein the push-pull circuit sets the driving contents and driving contents in the state 1 or 2 when charging and discharging the capacitance existing in the driving signal input terminal of the element. The schedule information about the time during which the state is held and the time transition of the driving state are held, the state of the push-pull circuit is set based on the schedule, the adjustment of the current flowing through the drive signal input terminal of the device, and the drive signal of the device A control method characterized by the ability to adjust the input terminal voltage.
JP2004294339A 2004-09-07 2004-09-07 Drive device and control method of element Pending JP2006081382A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100423400C (en) * 2006-08-01 2008-10-01 北京航空航天大学 Low ripple high reliable high-capacity capacitance voltage stabilizing charging circuit
JP2010022094A (en) * 2008-07-08 2010-01-28 Panasonic Electric Works Co Ltd Half bridge circuit
CN111181363A (en) * 2019-07-01 2020-05-19 苏州纳芯微电子股份有限公司 Isolated power supply circuit and control method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100423400C (en) * 2006-08-01 2008-10-01 北京航空航天大学 Low ripple high reliable high-capacity capacitance voltage stabilizing charging circuit
JP2010022094A (en) * 2008-07-08 2010-01-28 Panasonic Electric Works Co Ltd Half bridge circuit
CN111181363A (en) * 2019-07-01 2020-05-19 苏州纳芯微电子股份有限公司 Isolated power supply circuit and control method thereof
CN111181363B (en) * 2019-07-01 2020-10-16 苏州纳芯微电子股份有限公司 Isolated power supply circuit and control method thereof

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