JP5278584B2 - Electro-optical device and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform display with high quality in an electro-optical device such as a liquid crystal device. <P>SOLUTION: On a substrate 10, an electro-optical device comprises: a plurality of data lines 6a and a plurality of scan lines 11a; pixel electrodes 9a formed at each of a plurality of pixels; a transistor 30 for switch-controlling the pixel electrodes 9a; a light shielding section 71 that has a transistor light shielding portion; and a relay electrode 95 that has a first portion overlapped with the transistor light shielding portion and a second portion not overlapped with the transistor light shielding portion. Further, the pixel electrodes 9a and the relay electrode 95 are electrically connected to each other through a first contact hole 86 bored so as to be overlapped with the first portion, and the transistor 30 and the relay electrode 95 are electrically connected to each other through a second contact hole 85 bored so as to be overlapped with the second portion. <P>COPYRIGHT: (C)2013,JPO&amp;INPIT

Description

  The present invention relates to a technical field of an electro-optical device such as a liquid crystal device, and an electronic apparatus such as a liquid crystal projector including the electro-optical device.

  A liquid crystal device which is an example of this type of electro-optical device is often used as, for example, a light modulation means (light valve) of a projection display device. In particular, in the case of a projection display device, strong light from a light source is incident on a liquid crystal light valve, and this thin film transistor (TFT: Thin Film Transistor) in the liquid crystal light valve does not cause an increase in leakage current or malfunction. As described above, a light shielding film as a light shielding means for blocking incident light is built in the liquid crystal light valve. More specifically, in order to drive the pixel electrode for each pixel, such a light-shielding film is, for example, a data line and a scanning line that are wired vertically and horizontally in the display area, and further, a scanning line and a pixel for each pixel. It is formed of at least a part of a conductive film constituting various electronic elements including TFTs electrically connected to the data line. A contact hole for electrically connecting the pixel electrode and the transistor is formed in a region where the light shielding film is formed on the substrate, that is, a non-opening region where light is not transmitted on the substrate.

  For example, according to Patent Document 1, a light-shielding portion having an overlapping portion overlapping with a transistor is disposed on the upper layer side of the transistor, and the pixel electrode and the transistor are electrically connected by a contact hole opened so as to overlap the overlapping portion. A technique of connecting to the network has been proposed.

JP 2008-26773 A

  However, in the above-described technique, it is required that the contact hole that electrically connects the pixel electrode and the transistor is arranged at a certain distance so as not to be electrically connected to the data line. Therefore, in order to properly arrange the data lines and the contact holes, the light shielding region must be made relatively wide, resulting in a technical problem that the opening region is narrowed.

  The present invention has been made in view of the above-described problems. For example, the present invention is an electro-optical device such as a liquid crystal device driven by an active matrix method, and realizes a high aperture ratio while reducing the light leakage current in a transistor. It is an object of the present invention to provide an electro-optical device and an electronic apparatus that can reduce generation.

In order to solve the above problems, an electro-optical device of the present invention includes a data line extending in a first direction, a transistor having a semiconductor layer extending in the first direction so as to overlap the data line, and the transistor A relay electrode electrically connected to the semiconductor layer of the transistor, a relay electrode electrically connecting the relay layer and the pixel electrode, and a semiconductor layer of the transistor A light shielding portion provided so as to overlap with the main body, the light shielding portion overlapping a channel region of the semiconductor layer of the transistor, and extending in the first direction from the main body portion, A first extension portion overlapping one source / drain region electrically connected to the data line, and extending from the main body portion to the opposite side of the first extension portion, and half of the transistor A second extending portion that overlaps with the other source / drain region electrically connected to the pixel electrode of the body layer and has a width in the first direction wider than the first extending portion. The first contact hole that electrically connects the relay electrode and the pixel electrode is disposed so as to overlap the second extending portion of the light shielding portion, and the relay electrode and the relay layer are electrically connected to each other. The second contact hole connected to is arranged between the data line and another data line adjacent to the data line .
The semiconductor layer of the transistor includes a first junction region formed between the channel region and the one source / drain region, and a second junction formed between the channel region and the other source / drain region. A first extending portion of the light shielding portion is formed so as to overlap with the first bonding region, and a second extending portion of the light shielding portion overlaps with the second bonding region. It is formed as follows.
The data line has an overlapping portion that at least partially overlaps the transistor, and the first contact hole is opened to at least partially overlap the overlapping portion.
The relay layer is formed in the same layer as the data line and is not electrically connected to the data line.

  According to the electro-optical device of the present invention, it is possible to display an image by a so-called active matrix system in which the supply of an image signal from a data line to a pixel electrode is controlled, for example. More specifically, each pixel is in a selected state when a scanning signal is supplied from the scanning line to the gate electrode of the transistor, and one source / drain region of the semiconductor layer of the transistor is electrically connected to the data line. The other source / drain region is electrically connected to the pixel electrode, whereby an image signal is supplied from the data line to the pixel electrode through the transistor.

  Here, the “opening region” according to the present invention is a region in the pixel that substantially emits display light, for example, a pixel electrode made of a transparent conductive material such as ITO (Indium Tin Oxide) is formed, This is a region through which light is transmitted, and is a region in which the gradation of outgoing light that has passed through an electro-optical material such as liquid crystal can be changed in accordance with a change in transmittance. In other words, the “opening region” is a light shielding body such as a wiring, a light shielding film, and various elements in which the light collected on the pixel does not transmit the light or the light transmittance is relatively smaller than that of the transparent electrode. An area that is not obstructed. On the other hand, the “non-opening region” according to the present invention means a region where light contributing to display is not transmitted. For example, a non-transparent wiring or electrode, or a light shielding body such as various elements is arranged in a pixel. Means the area. Further, the “aperture ratio” means the ratio of the opening area in the pixel size including the opening area and the non-opening area.

  In the present invention, a plurality of pixel electrodes are provided in a matrix in a region to be a display region on the substrate corresponding to the intersection of the data line and the scanning line. In each pixel, a data line, a scanning line, a transistor, and various other components for driving the pixel are formed in a non-opening region.

  In the present invention, the transistor is formed along one direction in the display region. The “one direction” according to the present invention is, for example, the row direction of a plurality of pixels defined in a matrix on the substrate, that is, the direction in which a plurality of data lines are arranged or the direction in which each of a plurality of scanning lines extends. (That is, the X direction) or, for example, the column direction of a plurality of pixels defined in a matrix on the substrate, that is, the direction in which the plurality of scanning lines are arranged or the direction in which each of the plurality of data lines extends (that is, the Y direction). Means.

  Particularly in the present invention, the light shielding portion is formed on the lower layer side than the pixel electrode and on the upper layer side of the transistor so as to at least partially define the non-opening region in each pixel. Further, the transistor light-shielding portion in the light-shielding portion overlaps at least a part of the transistor along one direction when viewed in plan on the substrate. In addition, the transistor light-shielding portion is wider in the other direction intersecting in one direction than the transistor. That is, the transistor light shielding portion is formed so as to cover at least a part of the transistor. Therefore, light incident on at least part of the transistor can be effectively blocked, and the amount of light incident on the transistor can be reduced. Thereby, generation | occurrence | production of the optical leakage current in a transistor can be reduced reliably. In particular, it is possible to more effectively generate light leakage current by arranging the transistor light-shielding part to overlap the part where the light leakage current is likely to occur empirically, for example, by shielding the incident light. It becomes possible to reduce.

  In addition to the transistor light-shielding portion described above, the light-shielding portion may be formed, for example, to have a portion along another direction intersecting with one direction. Depending on the portion other than the transistor light-shielding portion, It is also possible to block other areas to be shielded from light.

  In the present invention, a relay electrode is further formed on the lower layer side than the pixel electrode and on the upper side of the light shielding portion and the plurality of data lines. The relay electrode has a first portion that overlaps the transistor light-shielding portion in the light-shielding portion and a second portion that does not overlap the transistor light-shielding portion when viewed in plan on the substrate. That is, the relay electrode extends from a position overlapping the light shielding portion of the transistor to a position not overlapping the light shielding portion. Specifically, the second portion is a non-opening region along another direction intersecting with one direction, or a region that does not overlap with the transistor light-shielding portion in the non-opening region along one direction.

  Here, the pixel electrode and the relay electrode are electrically connected via a first contact hole that is opened so as to overlap the first portion of the relay electrode when viewed in plan on the substrate. Therefore, the pixel electrode and the relay electrode are electrically connected in a region overlapping with the transistor light shielding portion. Further, the transistor and the relay electrode are electrically connected through a second contact hole that is opened so as to overlap the second portion of the relay electrode when viewed in plan on the substrate. Therefore, the transistor and the relay electrode are electrically connected via a region that does not at least partially overlap with the transistor light-shielding portion. For this reason, when connecting the relay electrode and the transistor, for example, so as not to have an electrical connection to the portion formed in the layer between the relay electrode and the transistor, the transistor light-shielding portion is more than necessary. Can be configured without spreading.

  Specifically, for example, when a data line is formed between a relay electrode and a transistor, if the above-described relay electrode is not formed, the data line is electrically connected between the relay electrode and the transistor. The contact holes are formed so as to be spaced from each other in a region overlapping the transistor light-shielding portion. Thereby, the width of the transistor light-shielding portion is determined not only for the purpose of shielding the transistor but also for the purpose of securing a region for arranging the above-described members. That is, the transistor light-shielding portion is formed even in a portion that is not required for light shielding.

  However, in the present invention, in particular, as described above, the relay electrode has the second portion that does not overlap the transistor light-shielding portion, and the transistor and the relay electrode are formed by the second contact hole formed so as to overlap the second portion. Are electrically connected. That is, the transistor and the relay electrode are electrically connected at least partially in a region that does not overlap with the transistor light-shielding portion. Therefore, the transistor and the relay electrode can be electrically connected without increasing the area of the light shielding portion of the transistor more than necessary. Typically, the pixel electrode and the relay electrode are directly electrically connected via the first contact hole. However, the transistor and the relay electrode are not limited to the second contact hole. Electrical connection is made through a contact hole.

  As described above, according to the electro-optical device of the present invention, the aperture ratio can be improved while reducing the occurrence of light leakage current in each pixel, and as a result, high-quality display is possible.

  In one aspect of the electro-optical device according to the aspect of the invention, the plurality of data lines have an overlapping portion that at least partially overlaps the transistor light-shielding portion when viewed in plan on the substrate, and the first contact The hole is opened so as to at least partially overlap the overlapping portion when viewed in plan on the substrate.

  According to this aspect, the plurality of data lines are formed so as to have an overlapping portion that at least partially overlaps the transistor light-shielding portion when viewed in plan on the substrate. The first contact hole that electrically connects the pixel electrode and the relay electrode is opened so as to at least partially overlap the above-described overlapping portion when viewed in plan on the substrate. Therefore, the pixel electrode and the relay electrode are reliably electrically connected in the non-opening region.

  Further, as described above, the second contact hole that electrically connects the transistor and the relay electrode is formed in a region that does not overlap the transistor light-shielding region. Therefore, it is possible to effectively prevent the device from being defective due to the data line and the second contact hole being electrically connected to each other or being too close to each other. .

  In another aspect of the electro-optical device according to the aspect of the invention, a relay layer that is formed in the same layer as the data line and not electrically connected to the data line and electrically connected to the transistor is further provided. And the second contact hole electrically connects the relay electrode and the relay layer, thereby electrically connecting the transistor and the relay electrode.

  According to this aspect, the relay layer electrically connected to the transistor is provided in the same layer as the data line (that is, a layer formed by the same film forming process). The relay layer and the transistor are electrically connected by, for example, a contact hole opened in a region that does not overlap with the transistor light-shielding portion. Further, the relay electrode and the relay layer are electrically connected to each other through the second contact hole. Thereby, the transistor and the relay electrode are electrically connected.

  Here, the relay layer is formed so as not to be electrically connected to the data line. Therefore, it is possible to prevent the data line from being electrically connected to the member connecting the relay electrode and the transistor. Therefore, it can prevent effectively that a malfunction will arise in an apparatus.

  In another aspect of the electro-optical device of the present invention, the relay electrode is a transparent electrode.

  According to this aspect, the relay electrode is a transparent electrode made of a transparent material such as ITO. Therefore, for example, even when the relay electrode extends to the opening region, the aperture ratio does not change. For this reason, the relay electrode is suitably arranged while avoiding other wirings and electrodes. Therefore, a high aperture ratio can be realized while increasing the degree of freedom of the layout of the device configuration.

  In the aspect in which the relay electrode described above is a transparent electrode, the relay electrode is formed so as to at least partially overlap the opening region when viewed in plan on the substrate, and the relay electrode is interposed through the first contact hole. A storage capacitor may be formed with the pixel electrode electrically connected.

  In this case, the relay electrode, which is a transparent electrode, is formed so as to at least partially overlap the opening region when viewed in plan on the substrate. For example, a dielectric film is provided between the relay electrode and the pixel electrode to form a storage capacitor.

  By forming a storage capacitor with the relay electrode and the pixel electrode, display characteristics can be improved. In addition, since the storage capacitor formed as described above can be formed, for example, in the entire open region, it can hold a very large capacity compared to the storage capacitor formed in the non-open region. be able to. Therefore, it is possible to effectively improve the image quality.

  In another aspect of the electro-optical device according to the aspect of the invention, the relay electrode may have a predetermined distance from another pixel electrode that is different from the pixel electrode electrically connected through the first contact hole. It is formed to have.

  According to this aspect, the relay electrode and the other pixel electrode different from the pixel electrode electrically connected to the relay electrode via the first contact hole are formed to have a predetermined interval. . That is, the pixel electrode that should not be electrically connected to the relay electrode is formed to have a predetermined distance. Here, the “predetermined distance” means a distance that does not cause capacitive coupling. That is, since the relay electrode and the other pixel electrode have a predetermined distance, it is possible to prevent capacitive coupling from occurring. By preventing capacitive coupling, it is possible to effectively prevent problems in the apparatus.

  In another aspect of the electro-optical device of the invention, the transistor includes a channel region, a data line side source / drain region electrically connected to the data line, and a pixel electrode electrically connected to the pixel electrode. Side source / drain region, a first junction region formed between the channel region and the data line side source / drain region, and a second junction region formed between the channel region and the pixel electrode side source / drain region. Having a semiconductor layer.

  According to this aspect, in the semiconductor layer of the transistor, the first junction region is a region formed at the junction between the channel region and the data line side source / drain region, and the second junction region is the channel region. This is a region formed at the junction with the pixel electrode side source / drain region. That is, the first and second junction regions are, for example, a PN junction region when the transistor is formed as an NPN type or PNP type transistor (ie, an N channel type or P channel type transistor), or the transistor has an LDD structure. Means an LDD region (that is, an impurity region formed by implanting impurities into the semiconductor layer by implanting impurities such as an ion plantation method).

  Here, among the regions constituting the above-described transistor, the first and second junction regions tend to generate light leakage current relatively easily. In this aspect, the light incident on the first and second junction regions of the semiconductor layer can be shielded by the light shielding portion. Therefore, it is possible to effectively reduce the occurrence of light leakage current in the transistor.

  In the aspect in which the above-described transistor has the first and second junction regions, the first and second junction regions may be configured as LDD regions.

  In this case, for a transistor having an LDD structure, when the transistor is not operating, the off-current that flows through the data line side source / drain region and the pixel electrode side source / drain region is reduced, and the on-current that flows when the transistor is operating is reduced. Can be suppressed. In particular, the second junction region formed between the channel region and the pixel electrode side source / drain region is liable to generate a light leakage current. Therefore, the second junction region is shielded from light by the light shielding portion, so that a decrease in on-current can be effectively suppressed.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention (including various aspects thereof).

  According to the electronic apparatus of the present invention, since the electro-optical device according to the present invention described above is provided, a projection display device, a television, a mobile phone, an electronic notebook, and a word processor capable of performing high-quality display. Various electronic devices such as a viewfinder type or a monitor direct view type video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

1 is a plan view illustrating an overall configuration of an electro-optical device according to an embodiment. It is the HH 'sectional view taken on the line of FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like that form an image display area of the electro-optical device according to the embodiment. FIG. 3 is a plan view of a plurality of adjacent pixel units in the electro-optical device according to the first embodiment. FIG. 5 is a cross-sectional view taken along line A-A ′ of FIG. 4. FIG. 6 is a plan view of a plurality of adjacent pixel units in an electro-optical device according to a second embodiment. FIG. 7 is a sectional view taken along line B-B ′ of FIG. 6. FIG. 10 is a plan view illustrating a modification of the electro-optical device according to the second embodiment. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Electro-optical device>
The electro-optical device according to this embodiment will be described with reference to FIGS. In the following embodiments, a TFT active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of the electro-optical device of the present invention, is taken as an example.

<First Embodiment>
First, the overall configuration of the electro-optical device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view showing the overall configuration of the electro-optical device according to this embodiment, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the electro-optical device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are disposed to face each other. The TFT array substrate 10 is, for example, a transparent substrate such as a quartz substrate or a glass substrate, a silicon substrate, or the like. The counter substrate 20 is a transparent substrate such as a quartz substrate or a glass substrate. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films. The TFT array substrate 10 and the counter substrate 20 are bonded to each other by a sealing material 52 provided in a sealing region located around the image display region 10a provided with a plurality of pixel electrodes.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In the sealing material 52, a gap material such as glass fiber or glass bead is dispersed for setting the distance between the TFT array substrate 10 and the counter substrate 20 (that is, the inter-substrate gap) to a predetermined value. Note that the gap material may be arranged in the image display region 10a or a peripheral region located around the image display region 10a in addition to or instead of the material mixed in the seal material 52.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. A part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display region 10 a in this way, a plurality of the pixel lines are covered along the remaining side of the TFT array substrate 10 and covered with the frame light shielding film 53. Wiring 105 is provided.

  On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, a laminated structure in which pixel switching TFTs as drive elements, wiring lines such as scanning lines and data lines are formed is formed. Although the detailed structure of this laminated structure is not shown in FIG. 2, pixel electrodes 9a made of a transparent material such as ITO are formed in an island shape in a predetermined pattern for each pixel on the laminated structure. Has been.

  The pixel electrode 9 a is formed in the image display area 10 a on the TFT array substrate 10 so as to face the counter electrode 21. On the surface of the TFT array substrate 10 facing the liquid crystal layer 50, that is, on the pixel electrode 9a, an alignment film 16 is formed so as to cover the pixel electrode 9a.

  A light shielding film 23 is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. For example, the light shielding film 23 is formed in a lattice shape when viewed in plan on the facing surface of the facing substrate 20. In the counter substrate 20, a non-opening area is defined by the light shielding film 23, and an area partitioned by the light shielding film 23 is an opening area that transmits light emitted from, for example, a projector lamp or a direct viewing backlight. The light shielding film 23 may be formed in a stripe shape, and the non-opening region may be defined by the light shielding film 23 and various components such as data lines provided on the TFT array substrate 10 side.

  On the light shielding film 23, a counter electrode 21 made of a transparent material such as ITO is formed so as to face the plurality of pixel electrodes 9a. Further, in order to perform color display in the image display region 10a, a color filter (not shown in FIG. 2) may be formed on the light shielding film 23 in a region including a part of the opening region and the non-opening region. Good. An alignment film 22 is formed on the counter electrode 21 on the counter surface of the counter substrate 20.

  1 and 2, on the TFT array substrate 10, in addition to the drive circuits such as the data line drive circuit 101 and the scanning line drive circuit 104, the image signal on the image signal line is sampled to obtain data. Sampling circuit that supplies lines, precharge circuit that supplies pre-charge signals of a predetermined voltage level to multiple data lines in advance of image signals, inspection of quality, defects, etc. of the electro-optical device during production or shipment An inspection circuit or the like may be formed.

  Next, an electrical configuration of the pixel portion of the electro-optical device according to the present embodiment will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix forming the image display area of the electro-optical device according to this embodiment.

  In FIG. 3, a pixel electrode 9 a and a TFT 30 which is an example of the “transistor” of the present invention are formed in each of a plurality of pixels formed in a matrix form constituting the image display region 10 a. The TFT 30 is electrically connected to the pixel electrode 9a, and performs switching control of the pixel electrode 9a during the operation of the electro-optical device according to the present embodiment. The data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. May be.

  The scanning line 11a is electrically connected to the gate of the TFT 30, and the electro-optical device according to the present embodiment pulses the scanning signals G1, G2,... To the scanning line 11a at a predetermined timing. Gm is applied in this order in a line sequential manner. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,... Supplied from the data line 6a is closed by closing the switch of the TFT 30 serving as a switching element for a certain period. Sn is written at a predetermined timing. A predetermined level of image signals S1, S2,..., Sn written in the liquid crystal as an example of the electro-optical material via the pixel electrode 9a is held for a certain period with the counter electrode formed on the counter substrate. The

  The liquid crystal constituting the liquid crystal layer 50 (see FIG. 2) modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The transmittance for light is increased, and light having a contrast corresponding to an image signal is emitted from the electro-optical device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode 21 (see FIG. 2). The storage capacitor 70 is a capacitive element that functions as a storage capacitor that temporarily holds the potential of each pixel electrode 9a in response to supply of an image signal. One electrode of the storage capacitor 70 is electrically connected to the drain of the TFT 30 in parallel with the pixel electrode 9a, and the other electrode is electrically connected to the capacitor line 300 having a fixed potential so as to have a constant potential. ing. According to the storage capacitor 70, the potential holding characteristic in the pixel electrode 9a is improved, and display characteristics such as contrast improvement and flicker reduction can be improved.

  Next, a specific configuration of the pixel portion that realizes the above-described operation will be described with reference to FIGS. FIG. 4 is a plan view of a plurality of adjacent pixel portions in the electro-optical device according to the first embodiment, and FIG. 5 is a cross-sectional view taken along the line A-A ′ of FIG. 4. In FIGS. 4 and 5, the scale of each layer / member is different for each layer / member to have a size that can be recognized on the drawing. This also applies to the subsequent FIG. 6 and subsequent figures. 4 and 5 show only the main configuration of the pixel on the TFT array substrate 10 side of the electro-optical device, and this configuration will be described in detail below. In FIG. 4, for convenience of explanation, only one transistor is provided for each pixel, the other transistors are omitted, and a scanning line formed so as to intersect the data line shown in FIG. 3 is omitted. Show.

  As shown in FIG. 4 or FIG. 3, the image display area 10a on the TFT array substrate 10 is composed of a plurality of pixels each provided with a pixel electrode 9a.

  A plurality of pixel electrodes 9 a are provided in a matrix on the TFT array substrate 10. Data lines 6a and scanning lines 11a are provided along the vertical and horizontal boundaries of the pixel electrode 9a. The scanning line 11a extends along the X direction in FIG. 3 or FIG. 4, and the data line 6a extends along the Y direction in the drawing so as to intersect the scanning line 11a. A pixel switching TFT 30 is provided at each of the points where the scanning line 11a and the data line 6a intersect each other.

  The data line 6a, the scanning line 11a, the storage capacitor 70, the TFT 30, the relay layer 90, and the relay electrode 95 define an opening area of each pixel in which the pixel electrode 9a is disposed when viewed in plan on the TFT array substrate 10. It is arranged in the non-opening region.

  4 and 5, the TFT 30 includes a semiconductor layer 1a and a gate electrode 3a electrically connected to the scanning line 11a.

  The semiconductor layer 1a is made of, for example, polysilicon, and has a channel region 1a ′ having a channel length along the Y direction in FIG. 4, a data line side LDD region 1b, a pixel electrode side LDD region 1c, and a data line side source / drain region 1d. And the pixel electrode side source / drain region 1e. That is, the TFT 30 has an LDD structure. The data line side LDD region 1b is an example of the “first junction region” according to the present invention, and the pixel electrode side LDD region 1c is an example of the “second junction region” according to the present invention.

  As shown in FIG. 4, the data line side source / drain region 1d and the pixel electrode side source / drain region 1e are formed substantially in mirror symmetry along the Y direction with respect to the channel region 1a ′. The data line side LDD region 1b is formed between the channel region 1a 'and the data line side source / drain region 1d. The pixel electrode side LDD region 1c is formed between the channel region 1a 'and the pixel electrode side source / drain region 1e. The data line side LDD region 1b, the pixel electrode side LDD region 1c, the data line side source / drain region 1d, and the pixel electrode side source / drain region 1e are impurities formed by implanting impurities into the semiconductor layer 1a by, for example, ion implantation. It is an area. The data line side LDD region 1b and the pixel electrode side LDD region 1c are formed as low concentration impurity regions with less impurities than the data line side source / drain region 1d and the pixel electrode side source / drain region 1e, respectively. According to such an impurity region, when the TFT 30 is not operating, it is possible to reduce the off current flowing in the source region and the drain region, and to suppress the decrease in the on current flowing when the TFT 30 is operating. The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity implantation is performed in the data line side LDD region 1b and the pixel electrode side LDD region 1c. A self-alignment type in which the data line side source / drain region and the pixel electrode side source / drain region are formed by implanting the concentration may be used.

  4 and 5, the gate electrode 3a of the TFT 30 is formed as a part of the scanning line 11a, and is formed of, for example, conductive polysilicon. The gate electrode 3a and the semiconductor layer 1a are electrically insulated by the gate insulating film 2. The gate electrode 3a is electrically connected to the scanning line 11a through a contact hole (not shown).

  The scanning line 11 a is formed on the TFT array substrate 10 on the lower layer side of the TFT 30 via the base insulating film 12. The scanning line 11 a shields the channel region 1 a ′ of the TFT 30 and its periphery from the return light that enters the device from the TFT array substrate 10 side. That is, the scanning line 11a also functions as a lower light shielding film. The scanning line 11a includes at least one of refractory metals such as titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), molybdenum (Mo), palladium (Pd), for example. It consists of a single metal, an alloy, a metal silicide, a polysilicide, or a laminate of these.

  In addition to the function of interlayer insulating the TFT 30 from the scanning line 11a, the base insulating film 12 is formed on the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 is roughened during polishing, dirt remaining after cleaning, etc. Thus, the pixel switching TFT 30 has a function of preventing deterioration of characteristics.

  In FIG. 5, a storage capacitor 70 is provided on the upper layer side of the TFT 30 on the TFT array substrate 10 via the interlayer insulating film 41. The storage capacitor 70 is formed by disposing a lower capacitor electrode 71 and an upper capacitor electrode 300 sequentially stacked from the lower layer side on the TFT array substrate 10 with a dielectric film 75 therebetween.

  The lower capacitor electrode 71 is a pixel potential side capacitor electrode that is electrically connected to the pixel electrode side source / drain region 1 e of the TFT 30 and the relay layer 90. More specifically, the lower capacitor electrode 71 is electrically connected to the relay layer 90 via the contact hole 84 and electrically connected to the pixel electrode side source / drain region 1e via the contact hole 83. The electrical connection between the pixel electrode side source / drain region 1e and the relay layer 90 is relayed.

  The lower capacitor electrode 71 is a non-transparent metal film that includes, for example, a metal or an alloy and is provided on the upper side of the TFT 30. The lower capacitor electrode 71 also functions as an upper light shielding film (or a built-in light shielding film) that shields the TFT 30 as described later. The lower capacitor electrode 71 is formed to contain a metal such as Al (aluminum) or Ag (silver).

  The lower capacitor electrode 71 is at least one of refractory metals such as Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), and Pd (palladium). It may be composed of a simple metal, an alloy, a metal silicide, a polysilicide, or a laminate of these. In this case, the function of the lower capacitor electrode 71 as the upper light shielding film can be further enhanced.

  Although the detailed illustration of the structure of the upper capacitor electrode 300 is omitted, on the TFT array substrate 10, the upper capacitor electrode 300 extends from the image display region 10a (see FIG. 1) where the pixel electrode 9a is disposed to the periphery thereof. The upper capacitor electrode 300 is a fixed potential side capacitor electrode that is electrically connected to a constant potential source and maintained at a fixed potential.

  Similar to the lower capacitor electrode 71, the upper capacitor electrode 300 is also a non-transparent metal film. Therefore, the storage capacitor 70 has a so-called MIM structure having a three-layer structure of metal film-dielectric film (insulating film) -metal film. Therefore, according to such a configuration of the storage capacitor 70, the power consumption consumed by the pair of capacitor electrodes can be reduced according to various signals supplied to the pair of upper and lower capacitor electrodes 300 and 71. In addition, compared with the case where one of the pair of capacitor electrodes is formed of a semiconductor layer, the conductivity of the one electrode is increased, the function as the storage capacitor of the storage capacitor 70 is further improved, and high-speed operation is achieved. It becomes possible.

  The dielectric film 75a has a single layer structure or a multilayer structure composed of a silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, or a silicon nitride film.

  In this embodiment, the scanning line 11a and data line 6a on the TFT array substrate 10 side, the storage capacitor 70, and the various constituent elements of the scanning line 11a are formed of a light-shielding conductive film, so that FIG. 2 is referred to. In addition to the light shielding film 23 on the counter substrate 20 side described above, a non-opening region is defined in each pixel by various components on the TFT array substrate 10 side. In particular, the upper and lower capacitor electrodes 300 and 71 of the storage capacitor 70 are each made of a metal film as described above to have a light-shielding property, and thereby a non-opening region is partially defined in each pixel. . In the present embodiment, by making the storage capacitor 70 function as an example of the “light-shielding portion” according to the present invention, the configuration relating to the arrangement of various components constituting each pixel can be further simplified.

  In addition, the lower capacitor electrode 71 of the storage capacitor 70 overlaps at least a part of the semiconductor layer 1a along the Y direction on the TFT array substrate 10 on the upper side of the semiconductor layer 1a of the TFT 30 in plan view. It has a part arranged in. More specifically, as viewed in a plan view, a part of the data line side source / drain region 1d is disposed along the Y direction in FIG. 6 from the part to the lower side in FIG. The data line side LDD region 1b, the channel region 1a ′, the pixel electrode side LDD region 1c, and the pixel electrode side source / drain region 1e are arranged so as to overlap with a part of the semiconductor layer 1a. Therefore, in the present embodiment, on the TFT array substrate 10, in each pixel, the light incident on a part of the semiconductor layer 1a is shielded by the lower capacitor electrode 71, thereby reducing the amount of light incident on the semiconductor layer 1a. It becomes possible to reduce. Thereby, in the semiconductor layer 1a of the TFT 30, generation of light leakage current can be reduced.

  Here, in particular, according to the study of the present inventor, when the TFT 30 operates, the pixel electrode side LDD region 1c tends to generate a light leakage current relatively more easily than the data line side LDD region 1b. In the electro-optical device according to the present embodiment, the pixel electrode side LDD region 1c is arranged in an intersecting region where the data line 6a and the scanning line 11a intersect, and light is also shielded by the lower capacitor electrode 71. Therefore, it is possible to effectively shield light that is about to enter the pixel electrode side LDD region 1c of the semiconductor layer 1a. As a result, it is possible to more effectively reduce the occurrence of light leakage current in the TFT 30.

  4 and 5, the data line 6a and the same conductive film are patterned and formed simultaneously with the data line 6a on the upper layer side of the storage capacitor 70 on the TFT array substrate 10 via the interlayer insulating film 42. A relay layer 90 is provided.

  The data line 6a is electrically connected to the data line side source / drain region 1d of the semiconductor layer 1a through a contact hole 81 penetrating the interlayer insulating films 41 and 42 and the gate insulating film 2. The data line 6a and the inside of the contact hole 81 are made of, for example, an Al (aluminum) -containing material such as Al—Si—Cu or Al—Cu, Al alone, or a multilayer film including an Al layer and a TiN layer. The data line 6a also has a function of shielding the TFT 30 from light.

  A relay electrode 95 is provided on the upper layer side of the data line 6 a on the TFT array substrate 10 and the relay layer 90 via the interlayer insulating film 43. The relay electrode 95 is made of, for example, ITO or the like, and extends from the region overlapping the transistor 30 along the direction in which the scanning line 11a is arranged. The relay electrode 95 is electrically connected to the relay layer 90 through a contact hole 85 which is an example of the “second contact hole” in the present invention.

  The pixel electrode 9 a is formed on the upper layer side through the interlayer insulating film 44 from the relay electrode 95. The pixel electrode 9a is electrically connected to the relay electrode 95 through a contact hole 86 which is an example of the “first contact hole” in the present invention. Thereby, the pixel electrode 9a is electrically connected to the pixel electrode side source / drain region 1e of the semiconductor layer 1a via the relay electrode 95, the relay layer 90, and the lower capacitor electrode 71. That is, the pixel electrode 9a and the TFT 30 are electrically connected. Note that an alignment film (not shown) subjected to a predetermined alignment process such as a rubbing process is provided on the upper surface of the pixel electrode 9a.

  As shown in FIG. 4, the contact hole 86 is formed so as to overlap the central portion of the lower capacitor electrode 71 as a light shielding portion. Therefore, the pixel electrode 9a and the relay electrode 95 can be electrically connected in a light shielding region (so-called pinpoint light shielding region) with respect to the TFT 30. Further, as described above, the relay electrode 95 and the relay layer 90 are electrically connected via the contact hole 85 at a position away from the TFT 30 (that is, a region that does not overlap the pinpoint light shielding region).

  Here, if the relay electrode 95 and the relay layer 90 are not provided, the pixel electrode 9a is required to be electrically connected to the lower capacitor electrode 71 in the pinpoint light shielding region. Therefore, for example, the data line 6a is required to be arranged so as to avoid the contact hole so as not to contact the data line 6a existing between the pixel electrode 9a and the lower capacitor electrode 71. Accordingly, the width of the lower capacitor electrode 71 is determined not only for the purpose of shielding the TFT 30 but also for the purpose of securing a region for arranging the above-described members. That is, the non-opening area is expanded to a part that is not required for light shielding.

  However, in the electro-optical device according to the present embodiment, as described above, the pixel electrode 9a is electrically connected to the lower capacitor electrode 71 via the relay electrode 95 and the relay layer 90. Therefore, the pixel electrode 9a and the TFT 30 can be electrically connected without increasing the area of the lower capacitor electrode 71 more than necessary. Accordingly, it is possible to prevent the area where the lower capacitor electrode 71 and the pixel electrode 9a overlap and increase the aperture ratio.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIG. In the image display region 10a (see FIG. 1) on the TFT array substrate 10, such pixel portions are periodically formed. In the electro-optical device according to the present embodiment, as described with reference to FIGS. 1 and 2, the scanning line driving circuit 104 and the data line driving circuit 101 are driven in the peripheral region on the TFT array substrate 10. A circuit is formed.

  As described above, according to the electro-optical device according to the first embodiment, it is possible to improve the aperture ratio by ensuring a larger size of the aperture region while preventing the occurrence of light leakage current in each pixel. As a result, high-quality display can be performed.

Second Embodiment
Next, an electro-optical device according to a second embodiment will be described with reference to FIGS. FIG. 6 is a plan view of a plurality of adjacent pixel portions in the electro-optical device according to the second embodiment, and FIG. 7 is a cross-sectional view taken along the line BB ′ of FIG. FIG. 8 is a plan view showing a modification of the electro-optical device according to the second embodiment. The second embodiment is different from the first embodiment in the configuration of the transistors, and the other configurations are substantially the same. Therefore, in the second embodiment, portions different from the first embodiment will be described in detail, and descriptions of other overlapping portions will be omitted as appropriate. 6 to 8, the same reference numerals are assigned to the same components as the components according to the first embodiment shown in FIGS. 4 and 5.

  6 and 7, in the electro-optical device according to the second embodiment, the TFT 30 is provided so as to extend in the direction in which the scanning line 11a extends (that is, the X direction in the drawing). The gate electrode 3a in the TFT 30 is electrically connected to the scanning line 11a through a contact hole 82 provided on the side of the semiconductor layer 1a. The contact hole 82 also has a function of shielding light that is about to enter the semiconductor layer 1a obliquely.

  A data line 6 a and a relay layer 90 are formed on the upper layer side of the TFT 30 via the interlayer insulating film 41. The data line 6 a is electrically connected to the data line side source / drain region 1 d in the TFT 30 through the contact hole 81. The relay layer 90 is electrically connected to the pixel electrode side source / drain region 1 e of the TFT 30 through the contact hole 83.

  A storage capacitor 70 is provided above the data line 6 a and the relay layer 90 via the interlayer insulating film 42. As in the first embodiment described above, the storage capacitor 70 has a lower capacitor electrode 71 and an upper capacitor electrode (capacitor line) 300 sequentially stacked from the lower layer side on the TFT array substrate 10 with a dielectric film 75 therebetween. It is formed by arranging. However, as shown in FIG. 6, the capacitor line 300 is electrically connected to the capacitor line 300 in other pixels in the Y direction in the figure. Accordingly, it is possible to prevent the capacitor line 300 from being formed to be partially thin in order to avoid the contact hole 84 as in the electro-optical device according to the first embodiment illustrated in FIG. 4, for example. Therefore, the resistance value in the capacitor line 300 can be sufficiently reduced, and stable operation of the device can be ensured.

  The lower capacitor electrode 71 also has a function as a “light-shielding part” according to the present invention, and shields light that is about to enter the TFT 30 (particularly, the pixel electrode-side LDD region 1c) from the upper layer side. As a result, the amount of light incident on the semiconductor layer 1a is reduced, and generation of light leakage current can be reduced in the semiconductor layer 1a of the TFT 30.

  A relay electrode 95 is provided on the upper layer side of the storage capacitor 70 via the interlayer insulating film 43. The relay electrode 95 is electrically connected to the lower capacitor electrode 71 through the contact hole 85.

  A pixel electrode 9 a is provided on the upper layer side through the interlayer insulating film 44 from the relay electrode 95. The pixel electrode 9 a is electrically connected to the relay electrode 95 through the contact hole 86.

  As shown in FIG. 6, the contact hole 86 is provided in a pinpoint light shielding region with respect to the TFT 30. The contact hole 85 is provided at a position away from the TFT 30 (that is, a region that does not overlap the pinpoint light shielding region). Therefore, similarly to the first embodiment described above, the pixel electrode 9a and the TFT 30 can be electrically connected without increasing the area of the lower capacitor electrode 71 more than necessary. Accordingly, it is possible to prevent the area where the lower capacitor electrode 71 and the pixel electrode 9a overlap and increase the aperture ratio.

  In FIG. 8, when the relay electrode 95 is formed as a transparent electrode using a transparent material such as ITO, the pixel electrode 9a and the relay electrode 95 may be formed so as to overlap each other in the opening region. . For example, as shown in the figure, if the relay electrode 95 is configured to bypass the opening region, the distance between the relay electrode 95 and the pixel electrode 9a in the lower right of the figure is compared with the case shown in FIG. Can be enlarged. As a result, it is possible to prevent capacitive coupling from occurring between the relay electrode 95 and the pixel electrode 9a that should not be electrically connected to the relay electrode 95. Therefore, it is possible to stabilize the operation of the apparatus.

  As described above, according to the electro-optical device according to the second embodiment, similarly to the electro-optical device according to the first embodiment, the size of the opening region is reduced in each pixel while preventing the occurrence of light leakage current. It is possible to ensure a larger size and improve the aperture ratio, and as a result, high-quality display can be performed.

<Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. FIG. 9 is a plan view showing a configuration example of the projector. Hereinafter, a projector using the liquid crystal device as a light valve will be described.

  As shown in FIG. 9, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 9, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, an electronic device Examples include a notebook, a calculator, a word processor, a workstation, a videophone, a POS terminal, and a device equipped with a touch panel. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal devices described in the above embodiments, the present invention includes a reflective liquid crystal device (LCOS), a plasma display (PDP), a field emission display (FED, SED), an organic EL display, and a digital micromirror device. (DMD), electrophoresis apparatus and the like are also applicable.

  The present invention is not limited to the above-described embodiment, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification, and an electro-optical device with such a change, In addition, an electronic apparatus including the electro-optical device is also included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 1a ... Semiconductor layer, 1a '... Channel region, 1b ... Data line side LDD region, 1c ... Pixel electrode side LDD region, 1d ... Data line side source / drain region, 1e ... Pixel electrode side source / drain region, 2 ... Gate oxide film 3a ... Gate electrode, 6a ... Data line, 9a ... Pixel electrode, 10 ... TFT array substrate, 10a ... Image display area, 11a ... Scanning line, 20 ... Counter substrate, 30 ... TFT, 50 ... Liquid crystal layer, 70 ... Storage Capacitance 71. Lower capacitance electrode 75. Dielectric film 101. Data line driving circuit 102. External circuit connection terminal 104. Scanning line driving circuit 300.

Claims (5)

A data line extending in a first direction;
A transistor having a semiconductor layer extending in the first direction so as to overlap the data line;
A pixel electrode provided corresponding to the transistor;
A relay layer electrically connected to the semiconductor layer of the transistor;
A relay electrode that electrically connects the relay layer and the pixel electrode;
A light shielding portion provided so as to overlap with the semiconductor layer of the transistor,
The light shielding portion includes a main body portion that overlaps a channel region of the semiconductor layer of the transistor, and one of the light shielding portions that extends from the main body portion in the first direction and is electrically connected to the data line of the semiconductor layer of the transistor. A first extension overlapping the source / drain region, and the other source extending from the main body to the opposite side of the first extension and electrically connected to the pixel electrode of the semiconductor layer of the transistor A second extending portion that overlaps with the drain region and is formed to have a width in the second direction that intersects the first direction larger than the first extending portion;
The first contact hole that electrically connects the relay electrode and the pixel electrode is disposed so as to overlap the second extending portion of the light shielding portion,
An electro-optical device, wherein a second contact hole that electrically connects the relay electrode and the relay layer is disposed between the data line and another data line adjacent to the data line. . The semiconductor layer of the transistor includes a first junction region formed between the channel region and the one source / drain region, and a second junction region formed between the channel region and the other source / drain region. Have
The first extending part of the light shielding part is formed so as to overlap the first joining region,
The electro-optical device according to claim 1, wherein the second extending portion of the light shielding portion is formed so as to overlap the second bonding region. The data line has an overlapping portion at least partially overlapping the transistor;
The electro-optical device according to claim 1, wherein the first contact hole is opened so as to at least partially overlap the overlapping portion . The electro-optical device according to claim 1, wherein the relay layer is formed in the same layer as the data line and is not electrically connected to the data line. An electronic device characterized by being provided with the electro-optical device according to claim 1, any one of four.

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