JP5292738B2 - Electro-optical device substrate, electro-optical device, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce optical leak current generation in a TFT for picture element switching, and to make it possible to display a high-quality image. <P>SOLUTION: An electro-optical device is equipped with: a substrate 10; plural picture element electrodes 9a which are arranged in a picture element region 10a on the substrate; and plural thin film transistors 30 which carry out switching control over the plural picture element electrodes, respectively. A semiconductor layer 1a of the thin film transistor longitudinally extends between a source region 1d and a drain region 1e with a channel region 1a' as a center. A gate electrode 31a of the thin film transistor has a projection 32a which projects along the semiconductor layer with a distance to the semiconductor layer from a side of a part overlapping on the channel region. The projection has such a shape that a second distance &beta; to the source region or the drain region at a tip side thereof becomes shorter than a first distance &alpha; to a junction region 1c between the channel region at a base side thereof and the source region or the drain region. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to an electro-optical device substrate used in an electro-optical device such as a liquid crystal device, an electro-optical device including the electro-optical device substrate, and a liquid crystal projector including the electro-optical device. The present invention relates to the technical field of electronic equipment.

  A liquid crystal device, which is an example of this type of electro-optical device, is frequently used, for example, as a direct-view display, a modulation means (for example, a liquid crystal light valve) of a projection display device, or the like. In particular, in the case of a projection display device, strong light from a light source is incident on a liquid crystal light valve, so that a thin film transistor (TFT) in the liquid crystal light valve does not cause an increase in leakage current or malfunction due to this light. As described above, a light shielding film as a light shielding means for blocking incident light is built in the liquid crystal light valve.

  Regarding such a light shielding means or light shielding film, for example, Patent Document 1 describes a technique of shielding light by a scanning line functioning as a gate electrode in a channel region of a TFT. Patent Document 2 describes a technique for reducing light reaching the channel region of the TFT by providing a plurality of light-shielding films formed on the channel region and a layer that absorbs internal reflection light. In Patent Document 3, when four pixel electrodes are assumed, the TFT is formed so that the channel region of the TFT is located at an intermediate point between adjacent and opposite corners, and the channel region of the TFT is formed. Describes a technique for preventing light incident on the channel region as much as possible by a scanning line having a wide portion as a gate electrode in a portion facing the gate electrode.

JP 2004-4722 A Japanese Patent No. 3731447 JP 2003-262888 A

  However, in the case where the TFT is shielded by the light shielding film as described above, the light shielding film and the semiconductor layer constituting the TFT are separated from each other through, for example, an insulating film when viewed in three dimensions. Incident light incident obliquely from the side of the light reaches the semiconductor layer constituting the TFT, which may cause a light leakage current in the TFT. Due to the light leakage current in the TFT, there is a technical problem that flicker, pixel unevenness and the like may occur and the quality of the display image may be deteriorated.

  The present invention has been made in view of the above problems, for example, an electro-optical device such as a liquid crystal device driven by an active matrix method, and can reduce generation of light leakage current in a pixel switching TFT. Electro-optical device substrates used in electro-optical devices capable of displaying high-quality images, electro-optical devices including such electro-optical device substrates, and electrons including such electro-optical devices It is an object to provide a device.

A substrate for an electro-optical device according to one embodiment of the present invention includes a substrate, a plurality of pixel electrodes arranged in a pixel region on the substrate, and a plurality of thin film transistors that respectively perform switching control of the plurality of pixel electrodes. Each of the semiconductor layers of the plurality of thin film transistors includes a source region and a drain region with a channel region interposed therebetween, the semiconductor layer extends from the source region to the drain region, and the gate electrode of the thin film transistor includes the channel region. A protrusion projecting along the source region or the drain region electrically connected to the pixel electrode from the side of the portion overlapping with the pixel electrode, and the projecting portion from the channel region to the source region or the drain A first protrusion projecting with a first width in a direction toward the region, and further from the channel region to the source from the channel region. A second projecting portion projecting with a second width in a direction toward the drain region or the drain region, wherein the first width is narrower than the second width, and the first projecting portion and the semiconductor From the first distance, which is the distance between the channel region of the layer and the junction region between the source region or the drain region, the second protrusion, the source region or the drain region of the semiconductor layer, The second distance, which is the distance, is characterized by being short.
The substrate for an electro-optical device according to the present invention includes a substrate, a plurality of pixel electrodes arranged in a pixel region on the substrate, and a plurality of thin film transistors that respectively control the switching of the plurality of pixel electrodes. The semiconductor layer of the thin film transistor extends in a longitudinal shape between the source region and the drain region with the channel region interposed therebetween, and the gate electrode of the thin film transistor is electrically connected to the pixel electrode from the side overlapping the channel region. A protrusion protruding along the source region or the drain region, and the protrusion is more than a first distance between the channel region and a junction region between the source or drain region on a base side thereof; The second distance from the source or drain region on the tip side is shorter.

  According to the substrate for an electro-optical device of the present invention, for example, an image signal is controlled from a data line to a pixel electrode, and an image display by a so-called active matrix method can be performed. The image signal is supplied from the data line to the pixel electrode through the thin film transistor at a predetermined timing when a thin film transistor which is a switching element electrically connected between the data line and the pixel electrode is turned on or off. . The pixel electrode is a transparent electrode made of a transparent conductive material such as ITO (Indium Tin Oxide), for example, and a plurality of pixel electrodes are provided in a matrix in the pixel region on the substrate corresponding to the intersection of the data line and the scanning line. Here, the “pixel area” according to the present invention means an area to be an image display area.

The semiconductor layer of the thin film transistor extends in a longitudinal shape between the source region and the drain region with the channel region interposed therebetween . The longitudinal direction of such a semiconductor layer is, for example, a row direction of a plurality of pixels defined in a matrix on the substrate, that is, an arrangement direction in which a plurality of data lines are arranged or a direction in which each of a plurality of scanning lines extends (that is, X direction), or a column direction of a plurality of pixels defined in a matrix on the substrate, for example, an arrangement direction in which a plurality of scanning lines are arranged, or a direction in which each of a plurality of data lines extends (ie, a Y direction). The

  The data line side source region or drain region (for example, drain region) is electrically connected to the data line, and the pixel electrode side source region or drain region (for example, source region) is electrically connected to the pixel electrode. Furthermore, a first junction region exists between the channel region of the semiconductor layer and the data line side source region or drain region, and a second junction region exists between the channel region of the semiconductor layer and the pixel electrode side source region or drain region. There is a junction region.

  That is, the first and second junction regions are, for example, a PN junction region when the thin film transistor is formed as an NPN type or PNP type transistor (ie, an N channel type or P channel type transistor), or an LDD (Lightly). It means an LDD region (that is, an impurity region formed by implanting impurities into the semiconductor layer by implanting impurities such as an ion plantation method) in the case of having a Doped Drain) structure.

  For example, the gate electrode is disposed on the upper layer side of the semiconductor layer via the gate insulating film. The gate insulating film is typically laminated on the entire surface of the substrate so as to cover the semiconductor layer. Typically, light shielding means such as a light shielding film covering at least a part of the semiconductor layer (for example, the channel region of the semiconductor layer, the first and second junction regions) is provided above the thin film transistor. Thereby, generation | occurrence | production of the light leakage current in a thin-film transistor is reduced.

  In the present invention, the gate electrode typically extends along the semiconductor layer while being separated from the semiconductor layer by a distance from the side of the portion overlapping the channel region, as viewed planarly or three-dimensionally on the substrate. That is, it has the protrusion part which protrudes along the longitudinal direction of a semiconductor layer. Here, “sides overlapping the channel region” may be both sides, that is, a pair of protruding portions may protrude on both sides of the semiconductor layer extending in the longitudinal direction. Alternatively, the “side that overlaps the channel region” may be one side. In addition, “side over the channel region” means that there is a distance from the channel region in the direction intersecting with the longitudinal direction of the semiconductor layer, and the protruding portion protrudes with the distance from the semiconductor layer at the base side in this way. Yes. Furthermore, the protrusion may protrude from both sides or sides of the semiconductor layer only on the side toward the source region, or may protrude from both sides or sides of the semiconductor layer only on the side toward the drain region. However, it may protrude to each of the source region and the drain region. That is, up to four protrusions may protrude from the four sides of one semiconductor layer. Preferably, if the pair of projecting portions project from both sides of the semiconductor layer only on the side toward the source or drain region connected to the pixel electrode as will be described later, the benefit of light shielding can be obtained efficiently.

  Here, in particular, the protrusion has a second distance to the source or drain region on the tip side rather than a first distance to the junction region on the base side (that is, the first or second junction region described above). However, it has a shortened shape.

  According to the research of the present inventor, if the distance between the protrusion and the junction region is shortened in plan view on the substrate, the protrusion having the same potential as the gate electrode becomes larger than the junction region. It will function as an electrode for applying a gate voltage and a dynamic potential to a smaller extent. That is, an unexpected change in carrier density occurs even in the bonding region. For this reason, in a thin film transistor that is supposed to have a channel formed by applying a gate voltage to the channel region, an operation failure typified by the occurrence of a leakage current or a change in an on / off threshold value is caused. On the other hand, if the distance between the protrusion and the junction region is increased, the effect of blocking light that enters obliquely from the direction along the longitudinal direction and reaches at least one of the first and second junction regions in the semiconductor layer is reduced. It has been found that.

  However, in the present invention, the first distance between the protrusion and the junction is increased so that the leakage current does not increase, and the second distance between the protrusion and the source or drain region is decreased. Accordingly, it is possible to more reliably reduce light that reaches the junction region, such as oblique light, while suppressing generation of a leakage current due to application of an electric field from the protruding portion to the junction region.

  Note that the change from the first distance to the second distance may change continuously (for example, the shape of the protrusion is “trapezoid”) or may change discontinuously (for example, protrusion). The shape of the part is “L-shaped”). As a material for the gate electrode, it is desirable to use a material having excellent light shielding properties such as a polysilicon gate or a metal gate. However, any material can be used for light shielding by placing it close to the semiconductor layer. Is obtained accordingly.

  As described above, according to the electro-optical device substrate of the present invention, it is possible to reduce the light leakage current in the transistor electrically connected to the pixel electrode, and display a high-quality image with reduced flicker and pixel unevenness. It is possible to provide a possible electro-optical device.

In one aspect of the electro-optical device substrate of the present invention, the semiconductor layer extends in the longitudinal shape when viewed in plan on the substrate, and the protrusion is viewed in plan on the substrate. Projecting from the semiconductor layer, the second distance is shorter than the first distance.

  According to this aspect, the semiconductor layer extends in a longitudinal shape when viewed in plan on the substrate, and the protruding portion has a shape protruding from the semiconductor layer and having the second distance shorter than the first distance. In addition to a plane, the distance may be three-dimensionally, that is, three-dimensionally separated.

  In another aspect of the present invention, the distance between the protruding portion and the semiconductor layer changes discontinuously from the first distance to the second distance when viewed in plan on the substrate.

  According to this aspect, the photolithographic process is relatively easy if each of the pair of protrusions is formed in a simple L shape in which the tip side is bent inward.

  In another aspect of the present invention, the distance between the projecting portion and the semiconductor layer changes continuously from the first distance to the second distance as viewed in plan on the substrate.

  According to this aspect, for example, if the pair of protrusions are each formed into a simple elongated rectangular shape or a trapezoidal bar shape that narrows toward the tip side, the photolithography process is very easy and practically very advantageous. is there.

  In another aspect of the present invention, the gate electrode is formed on the semiconductor layer via a gate insulating film, and the projecting portion is embedded in a groove or a through hole dug in the gate insulating film. Including parts.

  According to this aspect, the portion embedded in the through hole is formed as a wall-shaped light shielding body along at least one of the first and second junction regions in the semiconductor layer as viewed three-dimensionally. Therefore, the light shielding performance of light incident obliquely on the semiconductor layer can be enhanced by the portion embedded in the through-hole as the wall-shaped light shielding body arranged in the vicinity of the semiconductor layer.

  In another aspect of the invention, the junction region is an LDD region.

  According to this aspect, the thin film transistor has an LDD structure. Therefore, when the thin film transistor is not in operation, the off current flowing in the data line side source region or drain region and the pixel electrode side source region or drain region can be reduced, and the electric field relaxation at the drain end in the saturation operation of the thin film transistor can be reduced. Further, it is possible to suppress a decrease in on-state current due to an increase in threshold value due to a hot carrier phenomenon (reliability problem related to transistor characteristic deterioration).

  In particular, the LDD on the pixel electrode side is more likely to cause light leakage than the LDD on the data line side, even if there is some leakage, the potential is not recovered by supplying a signal with a predetermined potential. For this reason, it is preferable to shield the LDD on the pixel electrode potential side more thickly using such protrusions than the LDD on the data line side. Alternatively, if the LDD on the data line side is shielded by using such a protruding portion or the like, it is preferable to shield the LDD on the pixel electrode potential side more than equivalent.

  In order to solve the above-described problems, an electro-optical device of the present invention includes the above-described substrate for an electro-optical device of the present invention.

  According to the electro-optical device of the present invention, since the electro-optical device substrate of the present invention described above (including various aspects thereof) is provided, a high-quality image with reduced flicker and pixel unevenness can be displayed. An electro-optical device can be provided.

  In order to solve the above-described problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention.

  According to the electronic apparatus of the present invention, since it includes the electro-optical device of the present invention described above, a projection display device, a mobile phone, an electronic notebook, a word processor, and a viewfinder capable of performing high-quality display. Various electronic devices such as a video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. In addition, as an electronic apparatus according to the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

  Hereinafter, embodiments of an electro-optical device substrate, an electro-optical device, and an electronic apparatus according to the present invention will be described with reference to the drawings. In this embodiment, as an example of the electro-optical device, a TFT active matrix driving type liquid crystal device with a built-in driving circuit is taken as an example.

  First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view of the TFT array substrate as viewed from the side of the counter substrate together with the components formed thereon, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG.

  1 and 2, in the liquid crystal device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. The TFT array substrate 10 is made of a transparent substrate such as a quartz substrate, a glass substrate, or a silicon substrate, and the counter substrate 20 is made of a transparent substrate such as a quartz substrate or a glass substrate, for example. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 correspond to a region where a plurality of pixels 100c are provided. They are bonded to each other by a sealing material 52 provided in a sealing area located around the image display area 10a as an example of the “pixel area”.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or an ultraviolet / heat combination type curable resin for bonding the two substrates, and is applied to the TFT array substrate 10 in the manufacturing process, and then irradiated with ultraviolet rays. And cured by heating or the like. In the sealing material 52, a gap material such as glass fiber or glass beads for dispersing the distance (ie, gap) between the TFT array substrate 10 and the counter substrate 20 to a predetermined value is dispersed. Note that the gap material may be arranged in the image display region 10a or a peripheral region located around the image display region 10a in addition to or instead of the material mixed in the seal material 52.

  In FIG. 1, a light-shielding frame light-shielding film 53 that defines the frame area of the image display region 10a is provided on the counter substrate 20 side in parallel with the inside of the seal region where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The sampling circuit 7 is provided so as to be covered with the frame light shielding film 53 on the inner side of the seal region along the one side. The scanning line driving circuit 104 is provided so as to be covered with the frame light-shielding film 53 inside the seal region along two sides adjacent to the one side.

  On the TFT array substrate 10, vertical conduction terminals 106 for connecting the two substrates with the vertical conduction material 107 are arranged in regions facing the four corner portions of the counter substrate 20. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20. Further, a lead wiring 90 for electrically connecting the external circuit connection terminal 102 to the data line driving circuit 101, the scanning line driving circuit 104, the vertical conduction terminal 106, and the like is formed.

  In FIG. 2, on the TFT array substrate 10, a laminated structure in which pixel switching TFTs as drive elements, wiring lines such as scanning lines and data lines are formed is formed. Although the detailed structure of this laminated structure is not shown in FIG. 2, pixel electrodes 9a made of a transparent material such as ITO are formed in an island shape in a predetermined pattern for each pixel on the laminated structure. Has been.

  The pixel electrode 9a is formed in the image display region 10a on the TFT array substrate 10 so as to face a counter electrode 21 described later. On the surface of the TFT array substrate 10 facing the liquid crystal layer 50, that is, on the pixel electrode 9a, an alignment film 16 is formed so as to cover the pixel electrode 9a.

  A light shielding film 23 is formed on the surface of the counter substrate 20 facing the TFT array substrate 10. For example, the light shielding film 23 is formed in a lattice shape when viewed in plan on the facing surface of the facing substrate 20. In the counter substrate 20, a non-opening area is defined by the light shielding film 23, and an area partitioned by the light shielding film 23 is an opening area that transmits light emitted from, for example, a projector lamp or a direct viewing backlight. The light shielding film 23 may be formed in a stripe shape, and the non-opening region may be defined by the light shielding film 23 and various components such as data lines provided on the TFT array substrate 10 side.

  On the light shielding film 23, a counter electrode 21 made of a transparent material such as ITO is formed so as to face the plurality of pixel electrodes 9a. In order to perform color display in the image display region 10a on the light shielding film 23, a color filter (not shown in FIG. 2) may be formed in a region including a part of the opening region and the non-opening region. An alignment film 22 is formed on the counter electrode 21 on the counter surface of the counter substrate 20.

  In addition to the data line driving circuit 101, the scanning line driving circuit 104, the sampling circuit 7, and the like on the TFT array substrate 10 shown in FIG. 1 and FIG. 2, a plurality of data lines 100b have a predetermined voltage level. A precharge circuit for supplying a precharge signal prior to the image signal, an inspection circuit for inspecting the quality, defects, etc. of the liquid crystal device during manufacture or at the time of shipment may be formed.

  Next, an electrical configuration of the pixel portion of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix forming the image display area of the liquid crystal device according to this embodiment.

  In FIG. 3, a pixel electrode 9 a and a TFT 30 as an example of the “thin film transistor” according to the present invention are formed in each of a plurality of pixels formed in a matrix form constituting the image display region 10 a. The TFT 30 is electrically connected to the pixel electrode 9a, and performs switching control of the pixel electrode 9a during operation of the liquid crystal device. The data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. Good.

  The scanning line 11 is electrically connected to the gate of the TFT 30, and the liquid crystal device according to this embodiment applies the scanning signals G1, G2,..., Gm to the scanning line 11 in this order at a predetermined timing. It is configured to apply line-sequentially. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the TFT 30 as a switching element for a certain period. It is written at a predetermined timing. Image signals S 1, S 2,..., Sn written in a liquid crystal as an example of an electro-optical material via the pixel electrode 9 a are held for a certain period with the counter electrode formed on the counter substrate.

  The liquid crystal constituting the liquid crystal layer 50 (see FIG. 2) modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The transmittance for light is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole.

  In order to prevent the image signal held here from leaking, a storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode 21 (see FIG. 2). The storage capacitor 70 is a capacitive element that functions as a storage capacitor that temporarily holds the potential of each pixel electrode 9a in response to supply of an image signal. One electrode of the storage capacitor 70 is connected to the drain of the TFT 30 in parallel with the pixel electrode 9a, and the other electrode is connected to the capacitor line 300 with a fixed potential so as to have a constant potential. According to the storage capacitor 70, the potential holding characteristic in the pixel electrode 9a is improved, and display characteristics such as contrast improvement and flicker reduction can be improved. As will be described later, the storage capacitor 70 also functions as a built-in light shielding film that blocks light incident on the TFT 30.

  Next, a specific configuration of the pixel portion that realizes the above-described operation will be described with reference to FIGS. FIG. 4 is a plan view of a plurality of adjacent pixel portions. 5 is a cross-sectional view taken along line AA ′ of FIG. 6 is a cross-sectional view taken along the line BB ′ of FIG. In FIGS. 4 to 6, the scales of the layers and members are different from each other so that the layers and members can be recognized on the drawings. The same applies to FIGS. 7 to 10 described later. In FIG. 4 to FIG. 6, for convenience of explanation, illustration of a portion located above the pixel electrode 9 a is omitted. In FIG. 5, the portion from the TFT array substrate 10 to the pixel electrode 9a constitutes an example of the “electro-optical device substrate” according to the present invention.

  In FIG. 4, a plurality of pixel electrodes 9 a are provided in a matrix on the TFT array substrate 10. Data lines 6a and scanning lines 11 (that is, scanning lines 11a and 11b) are provided along the vertical and horizontal boundaries of the pixel electrode 9a, respectively. That is, the scanning lines 11a and 11b extend along the X direction, and the data line 6a extends along the Y direction so as to intersect the scanning line 11a or 11b. A pixel switching TFT 30 is provided at each of the locations where the scanning line 11 and the data line 6a intersect each other.

  The scanning line 11, the data line 6 a, the storage capacitor 70, the lower light shielding film 11 a, the relay layer 93, and the TFT 30 are viewed on the TFT array substrate 10 in a plan view, that is, an opening area of each pixel corresponding to the pixel electrode 9 a (that is, In each pixel, the pixel is disposed in a non-opening region surrounding a region where light that actually contributes to display is transmitted or reflected. That is, the scanning line 11, the storage capacitor 70, the data line 6a, the lower light-shielding film 11a, and the TFT 30 are arranged not in the opening area of each pixel but in the non-opening area so as not to hinder display. Yes.

  4 and 5, the TFT 30 includes a semiconductor layer 1a and gate electrodes 31a and 31b.

  The semiconductor layer 1a is made of, for example, polysilicon, and has a channel region 1a ′ having a channel length along the Y direction, a data line side LDD region 1b, a pixel electrode side LDD region 1c, a data line side source / drain region 1d, and a pixel electrode. The side source / drain region 1e is formed. That is, the TFT 30 has an LDD structure. The “data line side LDD region 1b” and the “pixel electrode side LDD region 1c” according to the present embodiment are examples of the “first junction region” and the “second junction region” according to the present invention, respectively.

  The data line side source / drain region 1d and the pixel electrode side source / drain region 1e are formed substantially in mirror symmetry along the Y direction with respect to the channel region 1a ′. The data line side LDD region 1b is formed between the channel region 1a 'and the data line side source / drain region 1d. The pixel electrode side LDD region 1c is formed between the channel region 1a 'and the pixel electrode side source / drain region 1e. The data line side LDD region 1b, the pixel electrode side LDD region 1c, the data line side source / drain region 1d, and the pixel electrode side source / drain region 1e are impurities formed by implanting impurities into the semiconductor layer 1a by, for example, ion implantation. It is an area.

  The data line side LDD region 1b and the pixel electrode side LDD region 1c are formed as low concentration impurity regions with less impurities than the data line side source / drain region 1d and the pixel electrode side source / drain region 1e, respectively. According to such an impurity region, when the TFT 30 is not operating, it is possible to reduce the off current flowing in the source region and the drain region, and to suppress the decrease in the on current flowing when the TFT 30 is operating. The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity implantation is performed in the data line side LDD region 1b and the pixel electrode side LDD region 1c. A self-alignment type in which the data line side source / drain region and the pixel electrode side source / drain region are formed by implanting the concentration may be used.

  As shown in FIGS. 4 and 5, the gate electrode 31a is formed as a part of the scanning line 11a. The scanning line 11a is disposed on the upper layer side of the semiconductor layer 1a via the insulating film 12, and is made of, for example, conductive polysilicon. The scanning line 11a has a main line portion extending along the X direction and a portion extending along the Y direction so as to overlap with a region of the channel region 1a ′ of the TFT 30 where the main line portion does not overlap. The portion of the scanning line 11a that overlaps the channel region 1a ′ functions as the gate electrode 31a. The gate electrode 31a and the semiconductor layer 1a are insulated by an insulating film 2 (see FIG. 5) as an example of the “gate insulating film” according to the present invention.

  As shown in FIGS. 4 and 5, the gate electrode 31b is formed as a part of the scanning line 11b. The scanning line 11b is disposed on the lower layer side of the semiconductor layer 1a with the base insulating film 12 interposed therebetween. For example, the scanning line 11b shields light from a refractory metal material such as tungsten (W), titanium (Ti), or titanium nitride (TiN). Made of a conductive material. The scanning line 11b has a main line part 11bx patterned in a stripe shape along the X direction in a plan view, and an extension part 11by extending from the main line part 11bx along the Y direction. Yes.

  The portion of the scanning line 11b that overlaps the channel region 1a ′ functions as the gate electrode 31b. The scanning line 11b includes a region facing the channel region 1a ′ of the TFT 30, the data line side LDD region 1b and the pixel electrode side LDD region 1c, and the data line side source / drain region 1d and the pixel electrode side source / drain region 1e. Is formed. Therefore, the scanning line 11b causes the channel region 1a of the TFT 30 to return light such as back-surface reflection on the TFT array substrate 10 or light that is emitted from another liquid crystal device by a multi-plate projector or the like and penetrates the composite optical system. ′ Can be shielded almost or completely. That is, the scanning line 11b can function as a wiring for supplying a scanning signal, and can also function as a light shielding film of the TFT 30 for return light. Therefore, during the operation of the liquid crystal device, the light leakage current in the TFT 30 is reduced, the contrast ratio can be improved, and high-quality image display is possible.

  The scanning line 11b and the semiconductor layer 1a are insulated by the base insulating film 12. In addition to the function of insulating the TFT 30 from the scanning line 11b, the base insulating layer 12 is formed on the entire surface of the TFT array substrate 10 so that the surface of the TFT array substrate 10 is roughened when it is polished, or remains after cleaning. It has a function of preventing deterioration of the characteristics of the pixel switching TFT 30.

  As described above, in this embodiment, the TFT 30 includes the semiconductor layer 1a, the gate electrode 31a configured as a part of the scanning line 11a formed on the upper layer side of the semiconductor layer 1a via the insulating film 2, and the semiconductor layer 1a. A gate electrode 31b configured as a part of the scanning line 11b formed on the lower layer side of the layer 1a with the base insulating film 12 interposed therebetween. That is, the TFT 30 has a double gate structure. Therefore, a channel can be formed on both the upper surface side and the lower surface side in the channel region 1a ′ of the semiconductor layer 1a. Therefore, it is possible to increase the on-current of the TFT 30 as compared with the case where the gate electrode is formed only on one of the upper layer side and the lower layer side of the semiconductor layer 1a.

  In FIG. 4, in this embodiment, the gate electrode 31a (in other words, a part of the scanning line 11a) extends along both sides of the pixel electrode side LDD region 1c as an example of the “projection” according to the present invention. The extending portion 32a is provided. In other words, the gate electrode 31a has a shape that overlaps the channel region 1a ′ and partially surrounds the pixel electrode side LDD region 1c from both sides thereof (ie, an inverted U shape). As will be described in detail later with reference to FIGS. 7 and 8, a groove 810 (not shown) is formed in the insulating film 2 and the base insulating film 12, and the gate electrode 31a has an extending portion 32a. Is formed in the groove 810 and has an in-groove portion 33.

  In FIG. 5, a storage capacitor 70 is provided on the upper layer side of the TFT 30 on the TFT array substrate 10 via the interlayer insulating film 41.

  The storage capacitor 70 is formed by disposing the lower capacitor electrode 71 and the upper capacitor electrode 300a so as to face each other with the dielectric film 75 therebetween.

  The upper capacitor electrode 300 a is formed as a part of the capacitor line 300. The capacitance line 300 extends from the image display area 10a where the pixel electrode 9a is disposed to the periphery thereof. The upper capacitor electrode 300a is a fixed potential side capacitor electrode that is electrically connected to a constant potential source via the capacitor line 300 and maintained at a fixed potential. The upper capacitor electrode 300a is formed of a non-transparent metal film containing a metal or alloy such as Al (aluminum) or Ag (silver), for example, and also functions as an upper light shielding film (built-in light shielding film) that shields the TFT 30. To do. The upper capacitor electrode 300a is, for example, Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), Pd (palladium) as the "conductive light shielding film" according to the present invention. ) Or the like containing at least one of high melting point metals such as metal, alloy, metal silicide, polysilicide, or a laminate of these.

  4 to 6, the lower capacitor electrode 71 is a pixel potential side capacitor electrode electrically connected to the pixel electrode side source / drain region 1e of the TFT 30 and the pixel electrode 9a. More specifically, the lower capacitor electrode 71 is electrically connected to the pixel electrode side source / drain region 1e via the contact hole 83 (see FIGS. 4 and 5), and the contact hole 84 (see FIGS. 4 and 5). 6) and is electrically connected to the relay layer 93. Further, the relay layer 93 is electrically connected to the pixel electrode 9a through a contact hole 85 (see FIGS. 4 and 6). That is, the lower capacitor electrode 71 relays the electrical connection between the pixel electrode side source / drain region 1e and the pixel electrode 9a together with the relay layer 93. The lower capacitor electrode 71 is made of conductive polysilicon. Therefore, the storage capacitor 70 has a so-called MIS structure. The lower capacitance electrode 71 has a function as a light absorption layer or a light shielding film disposed between the upper capacitance electrode 300a as the upper light shielding film and the TFT 30 in addition to the function as the pixel potential side capacitance electrode.

  The dielectric film 75 has a single-layer structure or a multilayer structure composed of a silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, a silicon nitride film, or the like.

  The lower capacitor electrode 71 may be formed of a metal film in the same manner as the upper capacitor electrode 300a. That is, the storage capacitor 70 may be formed to have a so-called MIM structure having a three-layer structure of metal film-dielectric film (insulating film) -metal film. In this case, compared to the case where the lower capacitor electrode 71 is configured using polysilicon or the like, the power consumption consumed by the entire liquid crystal device can be reduced when the liquid crystal device is driven, and the element in each pixel unit can be reduced. High speed operation is possible.

  5 and 6, a data line 6a and a relay layer 93 are provided on the upper layer side of the storage capacitor 70 on the TFT array substrate 10 with the interlayer insulating film 42 interposed therebetween.

  The data line 6a is electrically connected to the data line side source / drain region 1d of the semiconductor layer 1a through a contact hole 81 penetrating the interlayer insulating film 41, the dielectric film 75, and the interlayer insulating film. The data line 6a and the inside of the contact hole 81 are made of, for example, an Al (aluminum) -containing material such as Al—Si—Cu or Al—Cu, Al alone, or a multilayer film including an Al layer and a TiN layer. The data line 6a also has a function of shielding the TFT 30 from light.

  4 and 6, the relay layer 93 is formed on the interlayer insulating film 42 in the same layer as the data line 6a (see FIG. 5). For the data line 6a and the relay layer 93, a thin film made of a conductive material such as a metal film is formed on the interlayer insulating film 42 using a thin film forming method, and the thin film is partially removed, that is, patterned. Thus, they are formed apart from each other. Therefore, since the data line 6a and the relay layer 93 can be formed in the same process, the manufacturing process of the device can be simplified.

  5 and 6, the pixel electrode 9a is formed on the upper layer side through the interlayer insulating film 43 with respect to the data line 6a. The pixel electrode 9a is electrically connected to the pixel electrode side source / drain region 1e of the semiconductor layer 1a through the lower capacitor electrode 71, the contact holes 83, 84 and 85, and the relay layer 93. The contact hole 85 is formed by depositing a conductive material constituting the pixel electrode 9a such as ITO on the inner wall of a hole formed so as to penetrate the interlayer insulating layer 43. An alignment film subjected to a predetermined alignment process such as a rubbing process is provided on the upper surface of the pixel electrode 9a.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIG. Such pixel portions are periodically formed in the image display area 10a (see FIG. 1).

  Next, the shape of the scanning line and the storage capacitor of the liquid crystal device according to the present embodiment will be described in detail with reference to FIGS. FIG. 7 is a plan view showing the planar shape of a pair of capacitor electrodes constituting the scanning line and the storage capacitor of the liquid crystal device according to this embodiment. 8 is a cross-sectional view taken along the line CC ′ of FIG. In FIG. 7, among the components constituting the pixel portion shown in FIG. 4, the TFT 30, the scanning line 11, and the storage capacitor 70 are shown enlarged, and the other components are not shown. Further, in FIG. 8, the illustration of the components above the interlayer insulating film 42 is omitted.

  As shown in FIG. 7, the upper capacitor electrode 300a constituting the storage capacitor 70 has a first capacitor portion 301 that covers the data line side LDD region 1b and a second capacitor portion 302 that covers the pixel electrode side LDD region 1c. doing. Therefore, light incident on the data line side LDD region 1b and the pixel electrode side LDD region 1c from the upper layer side can be shielded by the first capacitor portion 301 and the second capacitor portion 302, respectively. Therefore, it is possible to reduce the occurrence of light leakage current in the data line side LDD region 1b and the pixel electrode side LDD region 1c.

  Further, in the present embodiment, in particular, the second capacitor portion 302 in the upper capacitor electrode 300 a is configured to have a width in the X direction wider than that of the first capacitor portion 301. That is, the width W2 in the X direction of the second capacitor portion 302 is wider than the width W1 in the X direction of the first capacitor portion 301. Therefore, the light incident on the pixel electrode side LDD region 1c can be shielded more reliably than the light incident on the data line side LDD region 1b. That is, the light blocking property for blocking the light reaching the pixel electrode side LDD region 1c can be enhanced or enhanced than the light blocking property for blocking the light reaching the data line side LDD region 1b.

  Here, the inventor of the present application concludes that a light leakage current is more likely to occur in the pixel electrode side LDD region 1c than in the data line side LDD region 1b during the operation of the TFT 30. That is, it is concluded that light leakage current in the TFT 30 is more likely to occur when the pixel electrode side LDD region 1c is irradiated with light than when the data line side LDD region 1b is irradiated during operation of the TFT 30. ing. Therefore, the second capacitor portion 302 is formed so as to have a width W2 wider than the width W1 of the first capacitor portion 301, thereby providing a light shielding property to the pixel electrode side LDD region 1c where the light leakage current is relatively likely to occur. The light leakage current flowing through the TFT 30 can be effectively reduced.

  In other words, the first capacitor portion 301 that covers the data line side LDD region 1b in which the light leakage current is relatively less likely to occur than the pixel electrode side LDD region 1c has a width W1 that is narrower than the second capacitor portion 302. By being formed so as to have, it is possible to prevent a wasteful decrease in the aperture ratio. Here, the “aperture ratio” means the ratio of the opening area in the size of the pixel including the opening area and the non-opening area. The larger the opening ratio, the better the display performance of the liquid crystal device.

  In FIG. 7, as described above, the scanning line 11 b includes the main line portion 11 bx along the X direction and the extension portion 11 by (see FIG. 4) extending from the main line portion 11 bx along the Y direction. Yes. The extending portion 11by includes a first capacitor portion 11by1 formed to include a region facing the data line side LDD region 1b, and a second capacitor formed to include a region facing the pixel electrode side LDD region 1c. It consists of a part 11by2. Therefore, light incident on the data line side LDD region 1b and the pixel electrode side LDD region 1c from the lower layer side can be shielded by the first capacitor portion 11by1 and the second capacitor portion 11by2. Therefore, it is possible to reduce the occurrence of light leakage current in the data line side LDD region 1b and the pixel electrode side LDD region 1c.

  Further, in the present embodiment, in particular, the second capacitance portion 11by2 in the scanning line 11b is configured to have a width in the X direction wider than that of the first capacitance portion 11by1. That is, the width W4 in the X direction of the second capacitor portion 11by2 is wider than the width W3 in the X direction of the first capacitor portion 11by1. Therefore, the light incident on the pixel electrode side LDD region 1c can be shielded more reliably than the light incident on the data line side LDD region 1b. Therefore, it is possible to improve the light shielding property with respect to the pixel electrode side LDD region 1c where the light leakage current is relatively likely to occur, and the light leakage current flowing through the TFT 30 can be effectively reduced.

  As shown in FIGS. 7 and 8, the insulating film 2 is formed with a longitudinal groove 810 along the pixel electrode side LDD region 1 c as viewed in plan on the TFT array substrate 10. The groove 810 is formed in a longitudinal shape along the Y direction at a predetermined distance L1 on both sides along the pixel electrode side LDD region 1c in the semiconductor layer 1a formed so as to extend along the Y direction. . The groove 810 can be formed, for example, by etching the surface of the insulating film 2. The groove 810 is formed so as to penetrate the insulating film 2 and the base light-shielding film 12 and expose the surface of the scanning line 11b (more precisely, the scanning line 11by2).

  Further, the gate electrode 31 a has an in-groove portion 33 extending in the groove 810. More specifically, the gate electrode 31a (in other words, a part of the scanning line 11a) has an extending portion 32a extending along both sides of the pixel electrode side LDD region 1c. A part of the portion 32 a is formed as an in-groove portion 33 formed in the groove 810. The groove inner portion 33 is formed along the inner wall portion 810a on the semiconductor layer 1a side in the groove 810, the outer wall portion 810c facing the inner wall portion 810a, and the bottom portion 810b.

  Therefore, the in-groove portion 33 is formed as a wall-shaped light shielding body along the pixel electrode side LDD region 1c in the semiconductor layer 1a when viewed three-dimensionally. Accordingly, light incident obliquely on the pixel electrode side LDD region 1c (that is, light having a component along the X or Y direction, for example, incident along the direction indicated by the arrow P1 or P2 in FIG. 8). Light) can be blocked by the in-groove portion 33. That is, the light shielding property of blocking light incident obliquely on the pixel electrode side LDD region 1c can be enhanced by the in-groove portion 33 formed as a wall-shaped light shielding body arranged in the vicinity of the pixel electrode side LDD region 1c. . As a result, flicker and pixel unevenness in image display can be reduced.

  7 and 8, the in-groove portions 33 are formed on both sides of the pixel electrode side LDD region 1c. Therefore, it is possible to block light incident obliquely from both sides of the pixel electrode side LDD region 1c that tends to generate a light leakage current relatively easily compared to the data line side LDD region 1b. That is, the in-groove portion 33 can reliably block light incident from either the left or right side in FIG. 8 with respect to the pixel electrode side LDD region 1c where light leakage current is relatively likely to occur. Therefore, the light leakage current in the TFT 30 can be efficiently and reliably reduced.

  The groove 810 may be provided only on one side of the pixel electrode side LDD region 1c (that is, the left side or the right side in FIG. 7), and the in-groove portion 33 may be formed only on one side of the pixel electrode side LDD region 1c. Also in this case, the light shielding property of blocking light incident obliquely on the pixel electrode side LDD region 1c can be enhanced accordingly. However, from the viewpoint of enhancing the light shielding property, it is preferable to form the in-groove portions 33 on both sides of the pixel electrode side LDD region 1c as in the present embodiment.

  As shown in FIG. 8, the groove 810 is dug through the insulating film 2 and the base insulating film 12 until reaching the scanning line 11b, and the in-groove portion 33 and the scanning line 11b are electrically connected to each other. Has been. In other words, the groove 810 is formed as a contact hole for electrically connecting the gate electrode 31a and the scanning line 11b to each other by the in-groove portion 33. Therefore, the depth of the groove 810 is larger than the interlayer distance from the upper surface of the interlayer insulating film 41 to the upper surface of the semiconductor layer 1a. The in-groove portion 33 is formed in a wall shape so as to reach the scanning line 11b disposed on the lower layer side than the semiconductor layer 1a from the upper surface of the insulating film 2.

  Accordingly, light incident on the semiconductor layer 1a obliquely from above (that is, light incident along the direction indicated by the arrow P1 in FIG. 8, for example, light having an X-direction or Y-direction component in the incident light). ) Can be reliably blocked, and light incident on the semiconductor layer 1a from an obliquely lower side (that is, light incident along a direction indicated by an arrow P2 in FIG. 8, for example, return light) Light having an X-direction or Y-direction component) can be blocked.

  As shown in FIG. 8, the in-groove portion 33 formed by extending the gate electrode 31a includes the storage capacitor 70 (more specifically, for example, the second capacitor portion 302) and the scanning line 11b (more specifically, Is formed so as to surround the pixel electrode side LDD region 1c in the stacked structure (or in a sectional view) together with the second capacitor portion 11by2). Therefore, most of the light traveling toward the pixel electrode side LDD region 1c can be blocked by the in-groove portion 33, the storage capacitor 70, and the scanning line 11b.

  As shown in FIG. 7, in this embodiment, in particular, the distance α between the extended portion 32a and the pixel electrode side LDD region 1c is longer than the distance β between the extended portion 32a and the pixel electrode side source / drain region 1e. An extending portion 32a is formed in the upper portion. Therefore, the extending portion 32a can more reliably reduce the light incident on the semiconductor layer 1a along the direction indicated by the arrow Py in FIG. The “distance α” and “distance β” according to the present embodiment are examples of the “first distance” and the “second distance” according to the present invention, respectively.

  Here, the distance α will be described with reference to FIG. FIG. 9 is a characteristic diagram showing an example of the Vgs-Id characteristic in the TFT 30. In FIG. 9, a solid line a indicates a case where the distance α is large, and a broken line b indicates a case where the distance α is small.

  As shown in FIG. 9, when the distance α is large and the gate-source voltage Vgs is negative, the value of the drain current Id is small and almost constant. On the other hand, when the distance α is small and the gate-source voltage Vgs is negative, the value of the drain current Id increases in proportion to the absolute value of the gate-source voltage Vgs. According to the research of the present inventor, when the distance α is within about 10 times the thickness of the gate insulating film (that is, the insulating film 2 in FIG. 8), the tendency as shown by the broken line b in FIG. It has been found to show. Therefore, by keeping the distance α larger than about 10 times the thickness of the insulating film 2, the drain current Id when the gate-source voltage Vgs is negative can be suppressed, and a bright spot can be prevented.

  On the other hand, the smaller the distance β, the higher the light shielding property, and flicker and pixel unevenness in image display can be reduced. The distance β may be zero.

(Modification)
Next, a first modification of the dichroic mirror 1104 and the actuator 1105 will be described with reference to FIG. A modification of the shape of the scanning line and the storage capacitor of the liquid crystal device according to this embodiment will be described. FIG. 10 is a plan view showing the planar shape of the pair of capacitor electrodes constituting the storage lines and the scanning lines of the liquid crystal device according to the modified example of the present embodiment having the same meaning as FIG.

  As shown in FIG. 10, the distance between the extended portion 32a and the semiconductor layer 1a is continuously changed (that is, the width in the X direction of the extended portion 32a is continuously changed). In the photolithography process when manufacturing the apparatus, the extending portion 32a can be formed relatively easily. The extending portion 32a is formed such that the distance α in FIG. 10 is greater than about 10 times the thickness of the insulating film 2.

<Electronic equipment>
Next, a case where the above-described electro-optical device is applied to a projector that is an example of an electronic apparatus will be described with reference to FIG. The liquid crystal panel 100 in the electro-optical device 200 described above is used as a light valve of a projector. FIG. 11 is a plan view showing a configuration example of the projector.

  As shown in FIG. 11, a projector 1100 includes a lamp unit 1102 made up of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G have the same configuration as that of the above-described liquid crystal device, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit, respectively. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In this dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display images by the liquid crystal panels 1110R and 1110B need to be horizontally reversed with respect to the display images by the liquid crystal panel 1110G.

  Since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 11, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type or a monitor direct view type video tape recorder, a car navigation device, a pager, and an electronic notebook , Calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the present invention can be applied to these various electronic devices.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the spirit or idea of the invention that can be read from the claims and the entire specification. An optical device substrate, an electro-optical device including such an electro-optical device substrate, and an electronic apparatus including such an electro-optical device are also included in the technical scope of the present invention. .

It is a top view which shows the whole structure of the liquid crystal device which concerns on embodiment of this invention. It is the HH 'sectional view taken on the line of FIG. FIG. 4 is an equivalent circuit diagram of a plurality of pixel units of the liquid crystal device according to the embodiment of the present invention. It is a top view of a plurality of pixel parts of a liquid crystal device concerning an embodiment of the present invention. FIG. 5 is a cross-sectional view taken along line AA ′ in FIG. 4. FIG. 5 is a sectional view taken along line BB ′ in FIG. 4. It is a top view of the scanning line and storage capacitor of the liquid crystal device concerning the embodiment of the present invention. It is CC 'sectional view taken on the line of FIG. It is a characteristic view which shows an example of the Vgs-Id characteristic in TFT which concerns on embodiment of this invention. It is a top view of the scanning line and storage capacity of a liquid crystal device concerning a modification of an embodiment of the present invention. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1a ... Semiconductor layer, 1a '... Channel region, 1b ... Data line side LDD region, 1c ... Pixel electrode side LDD region, 1d ... Data line side source / drain region, 1e ... Pixel electrode side source / drain region, 2 ... Insulating film, DESCRIPTION OF SYMBOLS 11, 11a, 11b ... Scanning line, 6a ... Data line, 9a ... Pixel electrode, 10 ... TFT array substrate, 10a ... Image display area, 12 ... Underlayer insulating film, 20 ... Counter substrate, 21 ... Counter electrode, 23 ... Light shielding Films 31a, 31b ... Gate electrodes 33, 35 ... In-groove portions 41, 42, 43 ... Interlayer insulating film 50 ... Liquid crystal layer 52 ... Sealing material 53 ... Frame light shielding film 70 ... Storage capacity 71 ... Lower capacitance electrode, 75 ... dielectric film, 101 ... data line drive circuit, 102 ... external circuit connection terminal, 104 ... scanning line drive circuit, 300 ... capacitance line, 300a ... upper capacitance electrode, 301 ... first capacitance portion 302 ... second capacitor portion, 810 ... groove, 810a ... inner wall portion, 810b ... bottom, 810c ... outer wall portion

Claims (7)

A substrate,
A plurality of pixel electrodes arranged in a pixel region on said substrate,
A plurality of thin film transistors for controlling the switching of the plurality of pixel electrodes, respectively ;
With
Each semiconductor layer of the plurality of thin film transistors has a source region and a drain region across a channel region, and the semiconductor layer extends from the source region to the drain region,
The gate electrode of the thin film transistor has a protruding portion that protrudes along the source region or the drain region electrically connected to the pixel electrode from a side of a portion overlapping the channel region,
The protrusion includes a first protrusion protruding with a first width in a direction from the channel region toward the source region or the drain region, and further from the channel region to the source region or the drain from the first protrusion. A second projecting portion projecting with a second width in a direction toward the region,
The first width is narrower than the second width;
From the first distance that is the distance between the first protrusion and the channel region of the semiconductor layer and the junction region between the source region or the drain region, the second protrusion and the semiconductor layer A substrate for an electro-optical device , wherein a second distance, which is a distance from the source region or the drain region, is short . In plan view from above of the substrate, the distance between the projecting portion and the semiconductor layer, according to claim 1, characterized in that changes discontinuously to the second distance from the first distance Electro-optical device substrate. In plan view from above of the substrate, the distance between the projecting portion and the semiconductor layer, according to claim 1, characterized in that continuously changes to said second distance from said first distance Electro-optical device substrate. The gate electrode is formed on the semiconductor layer via a gate insulating film,
The protrusion electro-optical device substrate according to any one of claims 1 to 3, characterized in that it comprises a portion that is embedded in a groove or through the mouth dug in the gate insulating film. The junction region, electro-optical device substrate according to any one of claims 1 to 4, characterized in that an LDD region. Electro-optical apparatus comprising the electro-optical device substrate according to an item to any one of claims 1 to 5. An electronic apparatus comprising the electro-optical device according to claim 6 .

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