JP4967556B2 - Electro-optical device substrate, electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to an electro-optical device substrate used in an electro-optical device such as a liquid crystal device, an electro-optical device including the electro-optical device substrate, and a liquid crystal projector including the electro-optical device. The present invention relates to the technical field of electronic equipment.

  In this type of electro-optical device, a pixel electrode, a scanning line for selectively driving the pixel electrode, a data line, and a TFT (Thin Film Transistor) as a pixel switching element are formed on a substrate. The active matrix driving is possible. In order to prevent an increase in light leakage current or malfunction in the TFT due to incident light incident on the electro-optical device, the TFT is formed with, for example, a scanning line, a data line, a light-shielding film, etc., and does not transmit light. It is formed in a region (that is, a region excluding an opening region in each pixel). In general, the non-opening region is provided with a holding capacitor (or auxiliary capacitor) that holds the potential of the pixel electrode for a certain period by temporarily holding an image signal supplied to the pixel electrode ( For example, see Patent Document 1).

  On the other hand, in this type of electro-optical device, for example, a microlens corresponding to each pixel is formed on the counter substrate, or a microlens array plate in which such a plurality of microlenses are formed is attached. (See, for example, Patent Document 2). With such a microlens, the light that travels toward the non-opening region as it is is condensed in units of pixels so that it is guided into the opening region of each pixel when passing through the electro-optic material layer. ing. As a result, bright display is possible in the electro-optical device.

JP-A-8-43854 JP 2003-185803 A

  However, the shape of the opening region in each pixel is often a rectangle as disclosed in Patent Document 1, for example. Therefore, if the increase in light leakage current or malfunction in the TFT is to be suppressed while the opening area is kept rectangular, the non-opening area must be increased and the opening area must be reduced. There is a technical problem that must be reduced. Furthermore, there is a technical problem that it becomes difficult to realize the transmittance required when mounted on a display device such as a data projector or a rear projection television due to such a decrease in aperture ratio. . On the other hand, when the microlens as described above is provided, there is a technical problem that the heat of light collected by the microlens may damage an electro-optical material such as liquid crystal or an alignment film. .

  The present invention has been made in view of, for example, the above-described problems. For example, the present invention is an electro-optical device such as a liquid crystal device driven by an active matrix method, and is high while reducing generation of light leakage current in a TFT. It is an object of the present invention to provide an electro-optical device substrate used in an electro-optical device capable of realizing transmittance, an electro-optical device including such an electro-optical device substrate, and an electronic apparatus.

In order to solve the above problems, an electro-optical device substrate according to the present invention includes a substrate, a data line,
And Jo Tokoro pixel pitch a plurality of pixel electrodes arranged in a matrix, is electrically connected to the data line side source drain regions, which are electrically connected to the pixel electrode side source to the pixel electrode before Symbol data lines A drain region; a channel region formed between the data line side source / drain region and the pixel electrode side source / drain region ; a first junction region formed between the channel region and the data line side source / drain region; , have a said channel region and a second junction region formed between the pixel electrode side source drain regions, a semiconductor layer extending in a first direction, in the layer of the pixel electrode and the semiconductor layer, A first portion extending along a second direction intersecting the first direction so as to overlap the channel region, and the first portion overlapping the first junction region. A second portion protruding in the direction of the first bonding region from the first portion, and a third portion protruding in the direction of the second bonding region from the first portion so as to overlap the second bonding region. and a light-shielding film, the predetermined pixel pitch is at and 12.0um inclusive 3.0Um, before Symbol width of the second portion is at and 1.5um inclusive 0.5um, the third portion Is wider than the width of the second portion.

  According to the substrate for an electro-optical device of the present invention, for example, an image signal is controlled from a data line to a pixel electrode, and an image display by a so-called active matrix method is possible. The image signal is supplied from the data line to the pixel electrode through the transistor at a predetermined timing by turning on and off the transistor electrically connected between the data line and the pixel electrode.

  The pixel electrodes are transparent electrodes made of a transparent conductive material such as ITO (Indium Tin Oxide), for example, and are arranged in a matrix at a predetermined pixel pitch in a region to be a display region on the substrate.

  For example, the light shielding portion is formed on the upper layer side or the lower layer side of the transistor with an insulating film interposed therebetween. The light shielding portion includes a wiring and an electronic element electrically connected to the pixel electrode, or a light shielding film having a light shielding property to block light, and defines a non-opening region that separates the opening regions of the pixel electrodes from each other. Here, the “opening region” according to the present invention is a region in a pixel through which light is substantially transmitted, for example, a region in which a pixel electrode is formed, and a liquid crystal or the like according to a change in transmittance. This is a region where the gradation of the emitted light that has passed through the electro-optical material can be changed. In other words, the “opening area” means that light incident on the pixel does not transmit light or is shielded by a light shielding portion including a wiring, an electronic element, and a light shielding film whose light transmittance is relatively smaller than that of the transparent electrode. It means the area that is never done. The “non-opening region” according to the present invention means a region where light contributing to display is not transmitted, and means a region where a light-shielding portion composed of non-transparent wiring, an electronic element, and a light-shielding film is arranged in a pixel. To do.

  The light shielding part has a first part and a second part extending along each of the first and second directions. The “first direction” according to the present invention means a column direction (that is, a Y direction) of a plurality of pixel electrodes arranged in a matrix on the substrate, and each of the plurality of data lines extends, for example, It can also be said to be an arrangement direction in which a plurality of scanning lines are arranged. The “second direction” according to the present invention means a row direction (that is, an X direction) of a plurality of pixel electrodes arranged in a matrix on the substrate, and an arrangement direction in which a plurality of data lines are arranged, or for example, It can be said that each of the plurality of scanning lines extends. The light shielding portion is formed, for example, in a generally lattice shape between adjacent pixel electrodes so as to separate the opening regions of the pixel electrodes arranged in a matrix. The first portion is configured to include data lines extending along the first direction, and the second portion is typically configured to include scanning lines extending along the second direction. From the viewpoint of improving the light blocking property of blocking light reaching the transistor, it is preferable that the width of the first portion and the second portion is wider.

  Note that a storage capacitor that is electrically connected to the pixel electrode and holds the potential of the pixel electrode may be formed as a part of the light shielding portion.

  The transistor is provided for each pixel electrode so that the first portion and the second portion of the light shielding portion partially overlap each other at a crossing portion when viewed in plan on the substrate. That is, the transistor is provided for each pixel electrode so as to partially overlap an intersection region where the first region extending along the first direction and the second region extending along the second direction in the non-opening region intersect. It has been.

  The transistor includes a semiconductor layer having a channel region, a data line side source / drain region, and a pixel electrode side source / drain region. For example, the gate electrode is formed so as to overlap the channel region.

  The channel region has a channel length along the first direction in the display region.

  The data line side source / drain region is electrically connected to the data line, and the pixel electrode side source / drain region is electrically connected to the pixel electrode. Further, a first junction region is formed between the channel region of the semiconductor layer and the data line side source / drain region, and a second junction region is formed between the channel region of the semiconductor layer and the pixel electrode side source / drain region. Is formed. The first junction region is a region formed at the junction between the channel region and the data line side source / drain region, and the second junction region is formed at the junction between the channel region and the pixel electrode side source / drain region. It is an area to be done. That is, the first and second junction regions include, for example, a PN junction region when the transistor is formed as, for example, a PNP type or NPN type transistor (that is, a P channel type or N channel type transistor), and the transistor has an LDD structure. Means an LDD region (that is, an impurity region formed by implanting impurities into the semiconductor layer by implanting impurities such as an ion plantation method).

  In the present invention, in particular, the first portion of the light shielding portion extends to both sides along the second direction from the main line portion extending along the first direction and the portion overlapping the second bonding region in the main line portion. And an extending portion. The extending portion extends from the main line portion to both sides, and two extending portions are provided for each pixel electrode. In other words, the portion of the first portion that covers the second bonding region is configured to be wider by the extending portion than the portion that covers the first bonding region. That is, the portion of the first portion that covers the second bonding region is wider than the portion of the first portion that covers the first bonding region with respect to the semiconductor layer extending along the first direction. Composed. Therefore, the light incident on the second bonding region can be shielded more reliably than the light incident on the first bonding region. That is, the extending portion can improve (that is, enhance) the light blocking property for blocking light reaching the second bonding region, compared to the light blocking property for blocking light reaching the first bonding region. Here, the inventor of the present application speculates that a light leakage current is more likely to occur in the second junction region than in the first junction region during the operation of the transistor. Accordingly, the first portion in the light shielding portion has the extending portions extending on both sides along the second direction from the portion overlapping the second bonding region in the main line portion, so that the light leakage current is relatively reduced. Therefore, it is possible to improve the light shielding property with respect to the second junction region, which is likely to occur, and to effectively reduce the light leakage current flowing through the transistor. In other words, the aperture ratio is wasted by reducing the width of the portion (or main line portion) that covers the first junction region in which the light leakage current is relatively less likely to occur compared to the second junction region. Can be prevented.

  In other words, by forming the extended portion, the light shielding performance for the second junction region where light leakage current is relatively likely to be generated is improved, and the width of the main line portion is narrowed, so that the aperture ratio is wasted. Decline can be prevented. In other words, by increasing the light-shielding property for the second junction region where light leakage current is likely to occur, so to speak, the light leakage current in the transistor can be effectively reduced without causing a wasteful decrease in the aperture ratio. Here, the “aperture ratio” means the ratio of the aperture area in the size of the pixel including the aperture area and the non-aperture area. The larger the aperture ratio, the more the electro-optic device provided with the electro-optic device substrate according to the present invention The display performance of the device is improved.

  Further, particularly in the present invention, the predetermined pixel pitch is 3.0 μm or more and 12.0 μm or less, and the widths of the main line part and the second part are 0.5 μm or more and 1.5 μm or less, respectively, and the extension part The length and width of each are 0.8 um or more and 3.5 um or less, respectively. Here, the length and width of the extending portion are the length and width of each of the two extending portions extending from the main line portion to both sides. The “length of the extending portion” according to the present invention means the length of one side along the second direction of the extending portion, and the “width of the extending portion” according to the present invention is the length of the extending portion. It means the length of the other side along the first direction.

  Therefore, it is possible to realize a relatively high transmittance such as 25% or 20% or more required when mounted on a display device such as a data projector or a rear projection television. Here, “transmittance” means the transmittance for incident light of the entire electro-optical device including the electro-optical device substrate according to the present invention. That is, for example, if the predetermined pixel pitch is 12.0 μm, the width of the main line portion and the second portion is 1.5 μm, the length of the extended portion is 1.5 μm, and the width of the extended portion is 3.5 μm. The aperture ratio can be set to 70% or more, and the transmittance can be set to, for example, 25% or more which is a transmittance required for the data projector. Alternatively, for example, if the predetermined pixel pitch is 8.5 μm, the width of the main line portion and the second portion is 1.5 μm, the length of the extended portion is 1.5 μm, and the width of the extended portion is 3.5 μm. The aperture ratio can be set to 60% or more, and the transmittance can be set to, for example, 20% or more which is a transmittance required for a rear projection television. Alternatively, for example, if the predetermined pixel pitch is 3.0 μm, the width of each main line portion and the second portion is 0.5 μm, the length of the extended portion is 1.0 μm, and the width of the extended portion is 0.8 μm. The aperture ratio can be set to 60% or more, and the transmittance can be set to, for example, 20% or more which is a transmittance required for a rear projection television. In other words, the predetermined pixel pitch is within a range of 3.0 μm or more and 12.0 μm or less, and the width of each of the main line portion and the second portion is within a range of 0.5 μm or more and 1.5 μm or less. By setting each of the height and width within the range of 0.8 μm or more and 3.5 μm or less, for example, 25% required when mounted on a display device such as a data projector or a rear projection television, for example. Alternatively, a relatively high transmittance such as 20% or more can be easily and reliably realized. Furthermore, by setting each of the length and the width of the extended portion to 0.8 um or more, it is possible to practically sufficiently enhance the light shielding property for the second bonding region as described above. In addition, since the width of each of the main line portion and the second portion is set to 0.5 μm or more, display defects such as light leakage due to alignment failure of liquid crystal molecules in a region between adjacent pixel electrodes can be obtained. It can be reduced or prevented sufficiently in practice. In addition, the alignment defect of the liquid crystal molecules includes a horizontal electric field (that is, an electric field parallel to the substrate surface or a component parallel to the substrate surface) generated between the pixel electrodes according to a difference in potential between adjacent pixel electrodes. Can be caused by an oblique electric field. In addition, by setting the predetermined pixel pitch to 12.0 μm or less, it is possible to reduce the size of the apparatus while realizing high-definition display in the display area.

  Furthermore, according to the electro-optical device substrate of the present invention, as described above, the aperture ratio can be increased, so that the light use efficiency can be increased and bright display can be achieved. Therefore, in the electro-optical device including the substrate for the electro-optical device according to the present invention, it is not necessary to provide the microlens as in the related art described above, and the light is condensed by the microlens that may occur when the microlens is provided. For example, it is possible to avoid a situation where the heat of light damages an electro-optical material such as liquid crystal or an alignment film. Thereby, the reliability of the electro-optical device is improved. Further, by not providing the microlens, it is possible to reduce the manufacturing cost for manufacturing the electro-optical device as compared with the case where the microlens is provided.

  As described above, according to the electro-optical device substrate of the present invention, it is possible to provide an electro-optical device capable of realizing high transmittance while reducing the occurrence of light leakage current in the transistor.

In one aspect of the electro-optical device substrate according to the invention, the predetermined pixel pitch is more 8.5Um.

  According to this aspect, it is possible to more surely realize a relatively high transmittance such as 20% or more required when mounted on a display device such as a rear projection television.

  In another aspect of the electro-optical device substrate of the present invention, the second bonding region is an LDD region.

  According to this aspect, when the transistor is not operating, the off-current that flows in the data line side source / drain region and the pixel electrode side source / drain region can be reduced, and the decrease in the on-current that flows when the transistor is operating can be suppressed.

In another aspect of the substrate for an electro-optical device according to the aspect of the invention, the first light-shielding film includes a capacitive element having a pair of capacitive electrodes and a dielectric film sandwiched between the pair of capacitive electrodes. When the image signal is supplied to the pixel electrode via the data line, the potential of the pixel electrode is held.

  According to this aspect, the capacitive element is also used as a part of the light shielding portion, thereby simplifying the circuit configuration of the electro-optical device substrate and the layout of the wirings constituting the circuit as compared with the case where a separate light shielding film is provided. Can be

  In the aspect in which the light shielding portion includes the capacitive element, at least one of the pair of capacitive electrodes may include a conductive light shielding film.

  According to this aspect, the light incident on the semiconductor layer from the upper layer side can be surely shielded by the capacitive element that can be disposed close to the transistor via the interlayer insulating film, for example. As the conductive light shielding film, for example, at least one of conductive polysilicon, refractory metal such as titanium (Ti), chromium (Cr), tungsten (W), tantalum (Ta), molybdenum (Mo), etc. A single metal containing one, an alloy, a metal silicide, a polysilicide, a laminate of these, or tungsten silicide.

In another aspect of the electro-optic device substrate of the present invention, a fourth portion extending in the second direction so as to overlap the channel region in the layer between the first light-shielding film and the pixel electrode; A fifth portion projecting from the fourth portion in the direction of the first joining region so as to overlap the first joining region, and a second portion from the second portion so as to overlap the second joining region. A sixth portion projecting in the direction of the bonding region, and a width of the sixth portion including a second light shielding film wider than a width of the fifth portion.
In order to solve the above problems, an electro-optical device of the present invention includes the above-described substrate for an electro-optical device of the present invention.

  According to the electro-optical device of the present invention, since the electro-optical device substrate of the present invention described above is provided, an electro-optical device having excellent display performance can be provided.

  In order to solve the above-described problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention.

  According to the electronic apparatus of the present invention, since it includes the electro-optical device of the present invention described above, a projection display device, a mobile phone, an electronic notebook, a word processor, a viewfinder type, or a monitor capable of high-quality display. Various electronic devices such as a direct-view video tape recorder, a workstation, a videophone, a POS terminal, and a touch panel can be realized. Further, as the electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper can be realized.

  The operation and other advantages of the present invention will become apparent from the best mode for carrying out the invention described below.

Hereinafter, embodiments of an electro-optical device substrate, an electro-optical device, and an electronic apparatus according to the present invention will be described with reference to the drawings. In this embodiment, as an example of the electro-optical device, a TFT active matrix driving type liquid crystal device with a built-in driving circuit is taken as an example.
<First Embodiment>
First, the overall configuration of the liquid crystal device according to the present embodiment will be described with reference to FIGS. 1 and 2. FIG. 1 is a plan view of the liquid crystal device as viewed from the counter substrate side together with the components formed on the TFT array substrate, and FIG. 2 is a cross-sectional view taken along the line H-H ′ in FIG. 1. is there.

  1 and 2, in the liquid crystal device according to the present embodiment, a TFT array substrate 10 and a counter substrate 20 are arranged to face each other. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20. The TFT array substrate 10 and the counter substrate 20 are provided by a sealing material 52 provided in a seal region located around the image display region 10a as an example of the “display region” according to the present invention, in which a plurality of pixel portions are provided. They are glued together.

  The sealing material 52 is made of, for example, an ultraviolet curable resin, a thermosetting resin, or the like for bonding the two substrates, and is applied on the TFT array substrate 10 in the manufacturing process and then cured by ultraviolet irradiation, heating, or the like. It is. In the sealing material 52, a gap material such as glass fiber or glass bead is dispersed for setting the distance between the TFT array substrate 10 and the counter substrate 20 (that is, the inter-substrate gap) to a predetermined value. The liquid crystal device according to this embodiment is small and suitable for performing enlarged display for a light valve of a projector.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side.

  A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. The scanning line driving circuit 104 is provided along two sides adjacent to the one side so as to be covered with the frame light shielding film 53. Further, in order to connect the two scanning line driving circuits 104 provided on both sides of the image display region 10 a in this way, a plurality of the pixel lines are covered along the remaining side of the TFT array substrate 10 and covered with the frame light shielding film 53. Wiring 105 is provided.

  Vertical conductive members 106 functioning as vertical conductive terminals between the two substrates are disposed at the four corners of the counter substrate 20. On the other hand, the TFT array substrate 10 is provided with vertical conduction terminals in a region facing these corner portions. Thus, electrical conduction can be established between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, an alignment film is formed on the pixel electrode 9a after the pixel switching TFT, the scanning line, the data line and the like are formed. On the other hand, on the counter substrate 20, in addition to the counter electrode 21, a lattice-shaped or striped light-shielding film 23 and an alignment film are formed on the uppermost layer portion. The liquid crystal layer 50 is made of, for example, a liquid crystal in which one or several types of nematic liquid crystals are mixed, and takes a predetermined alignment state between the pair of alignment films.

  The TFT array substrate 10 is a transparent substrate such as a quartz substrate, a glass substrate, or a silicon substrate. The counter substrate 20 is also a transparent substrate like the TFT array substrate 10.

  The TFT array substrate 10 is provided with a pixel electrode 9a, and an alignment film on which a predetermined alignment process such as a rubbing process has been performed is provided above the pixel electrode 9a. For example, the pixel electrode 9a is made of a transparent conductive film such as an ITO film, and the alignment film is made of an organic film such as a polyimide film.

  A counter electrode 21 is provided on the entire surface of the counter substrate 20, and an alignment film 22 subjected to a predetermined alignment process such as a rubbing process is provided below the counter electrode 21. The counter electrode 21 is made of a transparent conductive film such as an ITO film, for example. The alignment film 22 is made of an organic film such as a polyimide film.

  The counter substrate 20 is provided with a light shielding film 23 having a lattice shape or a stripe shape. By adopting such a configuration, it is possible to more reliably prevent the incident light from the TFT array substrate 10 side from entering the channel region 1a ′ or its periphery together with the light shielding unit 500 described later.

  A liquid crystal layer 50 is formed between the TFT array substrate 10 and the counter substrate 20 that are configured as described above and are arranged so that the pixel electrode 9a and the counter electrode 21 face each other. The liquid crystal layer 50 takes a predetermined alignment state by the alignment film in a state where an electric field from the pixel electrode 9a is not applied.

  1 and 2, on the TFT array substrate 10, in addition to the drive circuits such as the data line drive circuit 101 and the scanning line drive circuit 104, the image signal on the image signal line is sampled to obtain data. Sampling circuit that supplies lines, precharge circuit that supplies pre-charge signals of a predetermined voltage level to multiple data lines in advance of image signals, inspection of quality, defects, etc. of the electro-optical device during production or shipment An inspection circuit or the like may be formed.

  Next, an electrical connection configuration of the pixel portion of the liquid crystal device according to the present embodiment will be described with reference to FIG. FIG. 3 is an equivalent circuit diagram of various elements, wirings, and the like in a plurality of pixels formed in a matrix forming the image display area of the liquid crystal device according to this embodiment.

  In FIG. 3, a pixel electrode 9 a and a TFT 30 which is an example of a “transistor” according to the present invention are formed in each of a plurality of pixels formed in a matrix that forms the image display region 10 a. The TFT 30 is electrically connected to the pixel electrode 9a, and performs switching control of the pixel electrode 9a during operation of the liquid crystal device. The data line 6a to which the image signal is supplied is electrically connected to the source of the TFT 30. The image signals S1, S2,..., Sn written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. Good.

  The scanning line 3a is electrically connected to the gate of the TFT 30, and the liquid crystal device according to the present embodiment applies the scanning signals G1, G2,..., Gm to the scanning line 3a in a pulsed manner in this order at a predetermined timing. It is configured to apply line-sequentially. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,..., Sn supplied from the data line 6a is obtained by closing the TFT 30 as a switching element for a certain period. It is written at a predetermined timing. Image signals S 1, S 2,..., Sn written in a liquid crystal as an example of an electro-optical material via the pixel electrode 9 a are held for a certain period with the counter electrode formed on the counter substrate.

  The liquid crystal constituting the liquid crystal layer 50 modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The transmittance for light is increased, and light having a contrast corresponding to an image signal is emitted from the liquid crystal device as a whole. In order to prevent the image signal held here from leaking, an example of the “capacitance element” according to the present invention in parallel with the liquid crystal capacitance formed between the pixel electrode 9a and the counter electrode 21 (see FIG. 2). The storage capacitor 70a is electrically connected. The storage capacitor 70a functions as a storage capacitor that temporarily holds the potential of each pixel electrode 9a in response to the supply of the image signal. According to the storage capacitor 70a, the potential holding characteristic of the pixel electrode 9a is improved, and display characteristics such as contrast improvement and flicker reduction can be improved.

  Next, a specific configuration of the pixel portion that realizes the above-described operation will be described with reference to FIGS. FIG. 4 is a plan view of a plurality of adjacent pixel portions. 5 is a cross-sectional view taken along line AA ′ of FIG. In FIGS. 4 and 5, the scale of each layer / member is different for each layer / member to have a size that can be recognized on the drawing. In FIG. 4 and FIG. 5, for convenience of explanation, illustration of a portion located above the pixel electrode 9a is omitted. In FIG. 5, the portion from the TFT array substrate 10 to the pixel electrode 9a constitutes an example of the “electro-optical device substrate” according to the present invention.

  In FIG. 4, the image display area 10a on the TFT array substrate 10 is composed of a plurality of pixels each provided with a pixel electrode 9a.

  The plurality of pixel electrodes 9a are arranged in a matrix on the TFT array substrate 10 at a pixel pitch D1 as an example of the “predetermined pixel pitch” according to the present invention. Data lines 6a and scanning lines 3a are provided along the vertical and horizontal boundaries of the pixel electrode 9a. The scanning line 3a extends along the X direction, and the data line 6a extends along the Y direction so as to intersect the scanning line 3a. A pixel switching TFT 30 is provided at each of the locations where the scanning line 3a and the data line 6a intersect each other.

  The scanning line 3a, the data line 6a, the storage capacitor 70a, the lower light-shielding film 11a, the relay layer 93, and the TFT 30 are viewed on the TFT array substrate 10 in plan view, that is, an opening area of each pixel corresponding to the pixel electrode 9a (that is, In each pixel, the pixel is disposed in a non-opening region surrounding a region where light that actually contributes to display is transmitted or reflected. The scanning line 3a, the storage capacitor 70a, the data line 6a, and the lower light-shielding film 11a constitute a light-shielding part 500 described later as an example of the “light-shielding part” according to the present invention. Each of the scanning line 3a, the storage capacitor 70a, the data line 6a, and the lower light-shielding film 11a partially defines the above-described non-opening region. In other words, a region where the light shielding portion including the scanning line 3a, the storage capacitor 70a, the data line 6a, and the lower light shielding film 11a is formed is a non-opening region. The TFT 30 is provided so as to partially overlap each intersecting region where the scanning line 3a and the data line 6a intersect each other.

  4 and 5, the TFT 30 includes a semiconductor layer 1a and a part of the scanning line 3a serving as a gate electrode.

  The semiconductor layer 1a is made of, for example, polysilicon, and has a channel region 1a ′ having a channel length along the Y direction, a data line side LDD region 1b, a pixel electrode side LDD region 1c, a data line side source / drain region 1d, and a pixel electrode. It consists of a line-side source / drain region 1e. That is, the TFT 30 has an LDD structure. The data line side LDD region 1b is an example of a first junction region according to the present invention, and the pixel electrode side LDD region 1c is an example of a second junction region according to the present invention.

  The data line side source / drain region 1d and the pixel electrode line side source / drain region 1e are formed substantially in mirror symmetry along the Y direction with respect to the channel region 1a ′. The data line side LDD region 1b is formed between the channel region 1a 'and the data line side source / drain region 1d. The pixel electrode side LDD region 1c is formed between the channel region 1a 'and the pixel electrode line side source / drain region 1e. The data line side LDD region 1b, the pixel electrode side LDD region 1c, the data line side source / drain region 1d, and the pixel electrode line side source / drain region 1e are formed by implanting impurities into the semiconductor layer 1a by, for example, ion implantation. This is an impurity region. The data line side LDD region 1b and the pixel electrode side LDD region 1c are formed as low concentration impurity regions with less impurities than the data line side source / drain region 1d and the pixel electrode line side source / drain region 1e, respectively. According to such an impurity region, when the TFT 30 is not operating, it is possible to reduce the off-current that flows to the source region and the drain region, and to suppress the decrease of the on-current that flows when the TFT 30 is operating. The TFT 30 preferably has an LDD structure. However, the TFT 30 may have an offset structure in which no impurity implantation is performed in the data line side LDD region 1b and the pixel electrode side LDD region 1c. A self-aligned type in which the data line side source / drain region and the pixel electrode line side source / drain region are formed by implanting the concentration may be used.

  As shown in FIGS. 4 and 5, the gate electrode of the TFT 30 is formed as a part of the scanning line 3a, and is made of, for example, conductive polysilicon. The scanning line 3a has a main line portion extending along the X direction and a portion extending from the main line portion along the Y direction to both sides so as to overlap with a region where the main line portion does not overlap in the channel region 1a ′ of the TFT 30. Have. A portion of the scanning line 3a that overlaps the channel region 1a ′ functions as a gate electrode. The gate electrode and the semiconductor layer 1a are insulated by a gate insulating film 2 (more specifically, two insulating films 2a and 2b).

  The lower light-shielding film 11a provided in a grid pattern below the TFT 30 via the base insulating film 12 shields the channel region 1a ′ of the TFT 30 and its surroundings from the return light that enters the device from the TFT array substrate 10 side. It functions as a part of the light shielding part. The lower light-shielding film 11a includes, for example, a metal simple substance, an alloy, a metal silicide, a polysilicide, or a laminate of at least one of refractory metals such as Ti, Cr, W, Ta, Mo, and Pd. Etc.

  The base insulating film 12 is formed on the entire surface of the TFT array substrate 10 in addition to the function of interlayer insulating the TFT 30 from the lower light-shielding film 11a, and thus remains rough after polishing the surface of the TFT array substrate 10 and after cleaning. It has a function of preventing deterioration of the characteristics of the pixel switching TFT 30 due to dirt or the like.

  In FIG. 5, a storage capacitor 70 a is provided on the upper layer side of the TFT 30 on the TFT array substrate 10 via the interlayer insulating film 41. The storage capacitor 70a is formed by disposing the lower capacitor electrode 71m and the upper capacitor electrode 300 to face each other with the dielectric film 75a interposed therebetween.

  The upper capacitor electrode 300 is a pixel potential side capacitor electrode electrically connected to the pixel electrode line side source / drain region 1e of the TFT 30 and the pixel electrode 9a. More specifically, the upper capacitor electrode 300 is electrically connected to the relay layer 93 through the contact hole 84a, and together with the relay layer 93, the electrical connection between the pixel electrode line side source / drain region 1e and the pixel electrode 9a. A simple connection. In addition, the relay layer 93 is electrically connected to the pixel electrode 9a through a convex portion 93a that is a part of the relay layer 93 and a contact hole 85a that is electrically connected to the convex portion 93a. Therefore, the pixel electrode 9a and the upper capacitor electrode 300 are electrically connected.

  The upper capacitor electrode 300 is a non-transparent metal film that includes, for example, a metal or an alloy and is provided on the upper side of the TFT 30. The upper capacitor electrode 300 also functions as a part of a light shielding part that shields the TFT 30. The upper capacitor electrode 300 is formed including a metal such as Al (aluminum) or Ag (silver).

  The upper capacitor electrode 300 is, for example, Ti (titanium), Cr (chromium), W (tungsten), Ta (tantalum), Mo (molybdenum), Pd (palladium) as the “conductive light shielding film” according to the present invention. ) Or the like, and may be composed of a single metal, an alloy, a metal silicide, a polysilicide, or a laminate of these. In this case, the function of the upper capacitor electrode 300 as the upper light shielding film can be further enhanced.

  The lower capacitor electrode 71m extends from the image display area 10a where the pixel electrode 9a is disposed to the periphery thereof. The lower capacitor electrode 71m is a fixed potential side capacitor electrode that is electrically connected to a constant potential source and maintained at a fixed potential.

  The lower capacitive electrode 71m is also a non-transparent metal film like the upper capacitive electrode 300. Therefore, the storage capacitor 70a has a so-called MIM structure having a three-layer structure of metal film-dielectric film (insulating film) -metal film. Here, the lower capacitor electrode 71m extends over a plurality of pixels and is shared by the plurality of pixels.

  In the present embodiment, since the lower capacitor electrode 71m is formed as a metal film, the power consumption consumed by the entire liquid crystal device when the liquid crystal device is driven as compared with the case where the lower capacitor electrode 71m is configured using a semiconductor. And the high-speed operation of the element in each pixel portion becomes possible. Therefore, the liquid crystal device according to this embodiment can display a high-quality image.

  The dielectric film 75a has a single layer structure or a multilayer structure composed of a silicon oxide film such as an HTO (High Temperature Oxide) film, an LTO (Low Temperature Oxide) film, or a silicon nitride film.

  In FIG. 5, a data line 6a and a relay layer 93 are provided on the upper layer side of the storage capacitor 70a on the TFT array substrate 10 via the interlayer insulating film 42.

  The data line 6a is electrically connected to the data line side source / drain region 1d of the semiconductor layer 1a through a contact hole 81a penetrating the interlayer insulating films 41 and 42 and the gate insulating film 2. The data line 6a and the inside of the contact hole 81a are made of, for example, an Al (aluminum) -containing material such as Al—Si—Cu or Al—Cu, or a single Al layer, or a multilayer film including an Al layer and a TiN layer. The data line 6a functions as a part of a light shielding part that shields the TFT 30 from light.

  The relay layer 93 is formed in the same layer as the data line 6 a on the interlayer insulating film 42. For the data line 6a and the relay layer 93, a thin film made of a conductive material such as a metal film is formed on the interlayer insulating film 42 using a thin film forming method, and the thin film is partially removed, that is, patterned. Thus, they are formed apart from each other. Therefore, since the data line 6a and the relay layer 93 can be formed in the same process, the manufacturing process of the device can be simplified.

  In FIG. 5, the pixel electrode 9a is formed on the upper layer side of the data line 6a via the interlayer insulating film 43. The pixel electrode 9a is electrically connected to the pixel electrode line side source / drain region 1e of the semiconductor layer 1a through the upper capacitor electrode 300, contact holes 83a, 84a and 85a, and the relay layer 93. The contact hole 85a is formed by depositing a conductive material constituting the pixel electrode 9a, such as ITO, on the inner wall of the hole formed in the interlayer insulating layer 43. An alignment film subjected to a predetermined alignment process such as a rubbing process is provided on the upper surface of the pixel electrode 9a.

  The configuration of the pixel portion described above is common to each pixel portion as shown in FIG. In the image display area 10a (see FIG. 1), such pixel portions are formed in a matrix with a pixel pitch D1. On the other hand, in the liquid crystal device according to the present embodiment, as described with reference to FIGS. 1 and 2, the scanning line driving circuit 104, the data line driving circuit 101, and the like are provided in the peripheral area located around the image display area 10a. The drive circuit is formed.

  Next, the planar shape of the pair of capacitor electrodes constituting the storage capacitor as a part of the light shielding portion of the liquid crystal device according to the present embodiment will be described in detail with reference to FIG. FIG. 6 is a plan view showing a planar shape of a pair of capacitor electrodes constituting the storage capacitor of the liquid crystal device according to this embodiment. In FIG. 6, among the components constituting the pixel portion shown in FIG. 4, the TFT 30, the scanning line 3a, and the storage capacitor 70a are shown enlarged.

  As shown in FIG. 6, the upper capacitor electrode 300 constituting the storage capacitor 70a has a first electrode portion 301 covering the data line side LDD region 1b and a second electrode portion 302 covering the pixel electrode side LDD region 1c. is doing. Therefore, the light incident on the data line side LDD region 1b and the pixel electrode side LDD region 1c from the upper layer side can be shielded by the first electrode portion 301 and the second electrode portion 302, respectively. Therefore, it is possible to reduce the occurrence of light leakage current in the data line side LDD region 1b and the pixel electrode side LDD region 1c.

  Particularly in the present embodiment, the second electrode portion 302 of the upper capacitor electrode 300 is configured to have a width in the X direction wider than that of the first electrode portion 301. That is, the width W1b in the X direction of the second electrode portion 302 is wider than the width W1a in the X direction of the first electrode portion 301. Note that the width W1a of the first electrode portion 301 matches the width of the main line portion 511 of the first portion 510 in the light shielding portion 500 described later. Therefore, the light incident on the pixel electrode side LDD region 1c can be shielded more reliably than the light incident on the data line side LDD region 1b. That is, the light blocking property for blocking the light reaching the pixel electrode side LDD region 1c can be enhanced or enhanced than the light blocking property for blocking the light reaching the data line side LDD region 1b. Here, the inventor of the present application speculates that a light leakage current is more likely to occur in the pixel electrode side LDD region 1c than in the data line side LDD region 1b during the operation of the TFT 30. That is, it is presumed that when the pixel electrode side LDD region 1c is irradiated with light during the operation of the TFT 30, light leakage current in the TFT 30 is more likely to occur than when the data line side LDD region 1b is irradiated with light. is doing. Therefore, by forming the second electrode portion 302 so as to have a width W1b wider than the width W1a of the first electrode portion 301, the light-shielding property for the pixel electrode side LDD region 1c that is relatively likely to cause a light leakage current is provided. The light leakage current flowing through the TFT 30 can be effectively reduced. In other words, the first electrode portion 301 that covers the data line side LDD region 1b in which the light leakage current is relatively less likely to occur than the pixel electrode side LDD region 1c has a narrower width than the second electrode portion 302. By being formed in this way, it is possible to prevent an unnecessary decrease in the aperture ratio.

  In other words, by forming the width W2a of the second electrode portion 302 wider, the light shielding property to the pixel electrode side LDD region 1c where light leakage current is relatively likely to occur is improved, and the width of the first electrode portion 301 is increased. By making W1a narrower, it is possible to prevent a wasteful decrease in the aperture ratio. In other words, only the light shielding property for the pixel electrode side LDD region 1c where the light leakage current is likely to occur is increased by so-called pinpoint, so that the light leakage current in the transistor is effectively reduced without causing a wasteful decrease in the aperture ratio. it can.

  Next, the light shielding portion of the liquid crystal device according to the present embodiment will be described mainly with reference to FIG. 7 in addition to FIGS. FIG. 7 is a plan view showing a planar layout of the light shielding portion of the liquid crystal device according to the present invention.

  4 to 7, the light-shielding portion 500 includes the scanning line 3a, the storage capacitor 70a, the data line 6a, and the lower light-shielding film 11a described above, and separates the opening region 9aa for each pixel electrode 9a from each other. An opening area is defined.

  The light shielding unit 500 includes a first portion 510 and a second portion 520 that extend along each of the Y direction and the X direction. The first portion 510 is an example of the “first portion” according to the present invention, and the second portion 520 is an example of the “second portion” according to the present invention. The light shielding portion 500 is formed in a substantially lattice shape between adjacent pixel electrodes 9a so as to separate the opening regions 9aa for the pixel electrodes 9a arranged in a matrix. The first portion 510 includes a data line 6a extending along the Y direction and a portion extending along the Y direction in the lower light-shielding film 11a, and the second portion 520 is scanned extending along the X direction. The line 3a and a portion extending along the X direction in the lower light-shielding film 11a are included. Further, each of the first portion 510 and the second portion 520 is configured to partially include the storage capacitor 70a.

  As shown in FIGS. 4 and 7, the TFT 30 partially includes an intersecting portion 550 where the first portion 510 and the second portion 520 of the light shielding portion 500 intersect with each other when viewed in plan on the TFT array substrate 10. It is provided for each pixel electrode 9a so as to overlap.

  Particularly in this embodiment, as described above with reference to FIG. 6, the upper capacitor electrode 300 constituting the storage capacitor 70a includes the first electrode portion 301 that covers the data line side LDD region 1b and the pixel electrode side LDD region 1c. And a second electrode portion 302 covering the surface. That is, as shown in FIG. 7, the first portion 510 in the light-shielding portion 500 extends along the X direction from the main line portion 511 extending along the Y direction and the portion overlapping the pixel electrode side LDD region 1 c in the main line portion 511. Extension portions 512a and 512b extending on both sides are provided. That is, a part of the second electrode portion 302 is formed as the extending portions 512a and 512b. Therefore, the extension portions 512a and 512b improve the light shielding property with respect to the pixel electrode side LDD region 1c where light leakage current is relatively likely to occur, and the width W1a of the main line portion 511 is narrowed, thereby reducing the aperture ratio. Unnecessary decline can be prevented.

  Further, particularly in the present embodiment, the pixel pitch D1 is 12.0 μm, the width W1a of the main line portion 511 and the width W2 of the second portion are 1.5 μm, respectively, and the length La and width of the extending portion 512a. W3a is 1.5 um and 3.5 um, respectively, and the length Lb and the width W3b of the extending part 512b are 1.5 um and 3.5 um, respectively. In the present embodiment, the extended portions 512a and 512b are formed in the same shape as each other. Therefore, in the following, each of the extended portions 512a and 512b is also simply referred to as an extended portion 512, and its length Each of La and Lb is simply referred to as a length L, and each of the widths W3a and W3b is simply referred to as a width W3. In the present embodiment, the extending portions 512a and 512b are formed to have the same shape, but may be formed to be different from each other. Therefore, for example, it is possible to achieve a relatively high transmittance such as 25% or more required when mounted on a data projector. That is, as described above, the pixel pitch D1 is 12.0 μm, the width W1a of the main line portion 511 and the width W2 of the second portion 520 are each 1.5 μm, and the length L of the extending portion 512 is 1.5 μm. By setting the width W3 of the existing portion 512 to 3.5 μm, the aperture ratio can be set to 70% or more, and for example, the transmittance of 25% or more required for the data projector can be realized. Note that the relationship between the pixel pitch D1, the width W1a of the main line portion 511, the width W2 of the second portion 520, the length L and the width W3 of the extending portion 512, and the aperture ratio and transmittance will be described in detail later. To do.

  In addition, in this embodiment, in particular, the length L and the width W3 of the extension part 512 are 1.5 μm and 3.5 μm, respectively, and set to 0.8 μm or more. It is possible to practically sufficiently enhance the light shielding property for the side LDD region 1c. In addition, since each of the width W1a of the main line portion 511 and the width W2 of the second portion 520 is 1.5 μm and is set to 0.5 μm or more, the alignment of the liquid crystal molecules in the region between the adjacent pixel electrodes 9a Indications such as light omission due to defects can be reduced or prevented in practice. Further, since the pixel pitch D1 is 12.0 μm and is set to 12.0 μm or less, it is possible to reduce the size of the apparatus while realizing high-definition display in the image display region 10a (see FIG. 1). .

  In addition, according to the present embodiment, as described above, the aperture ratio can be increased to 70% or more, so that bright display is possible. Therefore, in the liquid crystal device according to the present embodiment, it is not necessary to provide the microlens as in the prior art described above, and the liquid crystal layer 50 is generated by the heat of the light condensed by the microlens that may occur when the microlens is provided. It is possible to avoid a situation that damages the alignment film and the like. This improves the reliability of the device. Furthermore, by not providing the microlens, it is possible to reduce the manufacturing cost for manufacturing the device as compared with the case where the microlens is provided.

  8 and 9, the combination of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, the length L and the width W3 of the extending portion 512, the aperture ratio, and The relationship with the transmittance will be described. FIG. 8A shows the relationship between the aperture ratio and the pixel pitch, the width of the main portion of the first portion of the light shielding portion, the width of the second portion of the light shielding portion, and the length and width of the extending portion. FIG. 8B is a table showing numerical data corresponding to the graph shown in FIG. FIG. 9A is a graph showing the relationship between the pixel pitch, the width of the main portion of the first portion of the light shielding portion, the width of the second portion of the light shielding portion, the length and width of the extending portion, and the transmittance. FIG. 9B is a table showing numerical data corresponding to the graph shown in FIG.

  8A and 8B, the data E1, E2, and E3 are the pixel pitch D1 (in the case where the length L and the width W3 of the extending portion 512 are 1.5 um and 3.5 um, respectively. The unit is um) and the aperture ratio (unit is%). In data E1, the width W1a of the main line portion 511 is set to 1.25 μm and the width W2 of the second portion 512 is set to 1.5 μm. In data E2, the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set. Are both set to 1.5 μm, and in the data E3, the width W1a of the main line portion 511 and the width W2 of the second portion 512 are both set to 1.75 μm.

  9A and 9B, the data T1, T2, and T3 are represented by the pixel pitch D1 (when the length L and the width W3 of the extending portion 512 are 1.5 μm and 3.5 μm, respectively. The unit is um) and the transmittance (unit is%). In the data T1, corresponding to the data E1 in FIG. 8A, the width W1a of the main line portion 511 is set to 1.25 μm, and the width W2 of the second portion 512 is set to 1.5 μm. Corresponding to the data E2 in FIG. 8 (a), both the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set to 1.5 μm. In the data T3, the data in FIG. Corresponding to E2, both the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set to 1.75 μm.

  8A and 8B, particularly in the present embodiment, as described above, the pixel pitch D1 is 12.0 μm, the width W1a of the main line portion 511 and the width W2 of the second portion are each 1.5 μm. Since the length L of the extending portion 512 is 1.5 μm and the width W3 of the extending portion 512 is 3.5 μm, the aperture ratio corresponds to the data point P1 in the data E2, and is 72.92%. 9A and 9B, the transmittance in the present embodiment corresponds to the data point P1t in the data T2, and is 25.14%. As described above, according to the present embodiment, it is possible to realize 25% or more which is the transmittance required for the data projector (“transmittance required for the data system” in the drawing), for example, The aperture ratio can be set to 70% or more, which is a value that can achieve a transmittance of 25% or more.

8 and 9, a combination of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, and the length L and the width W3 of the extending portion 512, the pixel pitch D1 is 8. Within the range of 5 μm or more and 12.0 μm or less, the width W1a of the main line portion 511 and the width W2 of the second portion 520 are each within the range of 0.5 μm or more and 1.5 μm or less, and the length of the extension 512 Each of L and width W3 is set within a range of 0.8 μm or more and 3.5 μm or less, and an area of the extension portion 512 is 5.25 μm ² (= 1.5 μm × 3.5 μm) or less. May be. In this case, it corresponds to the data range P2 (see FIG. 8B), and the aperture ratio can be reliably set to 60% or more. The transmittance at this time corresponds to the data range P2t (see FIG. 9B), and is, for example, the transmittance required for the rear projection television (in the figure, “transmittance required for the PTV system”) 20. % Or more can be reliably realized.

  10A differs from FIG. 8A in that the pixel pitch D1, the width W1a of the main portion 511 of the first portion 510 of the light shielding portion 500, the width W2 of the second portion 520 of the light shielding portion 500, and the extension. FIG. 10B is a graph showing the relationship between the combination of the length L and width W3 of the portion 512 and the aperture ratio, and FIG. 10B is a table showing numerical data corresponding to the graph shown in FIG.

  10A and 10B, the data E4, E5, E6, and E7 are the pixel pitches when the length L and the width W3 of the extending portion 512 are 0.8 um and 1.0 um, respectively. The relationship between D1 (unit is um) and aperture ratio (unit is%) is shown. In the data E4, both the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set to 0.5 um. In the data E5, the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set. Both are set to 0.6 um. In the data E6, both the width W1a of the main line portion 511 and the width W2 of the second portion 512 are set to 0.8 um. In the data E7, the main line portion 511 is set. Both the width W1a and the width W2 of the second portion 512 are set to 1.25 um.

  10A and 10B, a combination of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, and the length L and width W3 of the extending portion 512 is extended. Each of the length L and the width W3 of the portion 512 is set to 0.8 um and 1.0 um, and the width W1a of the main line portion 511 and the width W2 of the second portion 520 are both set to 0.5 um. You may set so that the pixel pitch D1 may be in the range of 3.0 um or more and 10 um or less. In this case, it corresponds to the data range P3 (see FIG. 10B), and the aperture ratio can be reliably set to 60% or more. Therefore, for example, it is possible to reliably realize 20% or more, which is a transmittance required for a rear projection television.

  Alternatively, in FIG. 10A and FIG. 10B, combinations of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, and the length L and width W3 of the extending portion 512 are Each of the length L and the width W3 of the extending part 512 is set to 0.8 um and 1.0 um, and the width W1a of the main line part 511 and the width W2 of the second part 520 are both set to 0.6 um. However, the pixel pitch D1 may be set to be in the range of 3.5 μm or more and 10 μm or less. In this case, it corresponds to the data range P4 (see FIG. 10B), and the aperture ratio can be reliably set to 60% or more. Therefore, for example, it is possible to reliably realize 20% or more, which is a transmittance required for a rear projection television.

  Alternatively, in FIG. 10A and FIG. 10B, combinations of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, and the length L and width W3 of the extending portion 512 are Each of the length L and the width W3 of the extending part 512 is set to 0.8 um and 1.0 um, and the width W1a of the main line part 511 and the width W2 of the second part 520 are both set to 0.8 um. However, the pixel pitch D1 may be set within a range of 4.5 μm or more and 10 μm or less. In this case, it corresponds to the data range P5 (see FIG. 10B), and the aperture ratio can be reliably set to 60% or more. Therefore, for example, it is possible to reliably realize 20% or more, which is a transmittance required for a rear projection television.

  Alternatively, in FIG. 10A and FIG. 10B, combinations of the pixel pitch D1, the width W1a of the main line portion 511 and the width W2 of the second portion 520, and the length L and width W3 of the extending portion 512 are Each of the length L and the width W3 of the extending portion 512 is set to 0.8 um and 1.0 um, and the width W1a of the main line portion 511 and the width W2 of the second portion 520 are both set to 1.25 um. However, the pixel pitch D1 may be set to be in the range of 6.0 μm or more and 10 μm or less. In this case, it corresponds to the data range P6 (see FIG. 10B), and the aperture ratio can be reliably set to 60% or more. Therefore, for example, it is possible to reliably realize 20% or more, which is a transmittance required for a rear projection television.

  As illustrated with reference to FIGS. 8 to 10, each of the width W1a of the main line portion 511 and the width W2 of the second portion 520 is set to 0. 0 within a range of the pixel pitch D1 of 3.0 μm or more and 12.0 μm or less. By setting each of the length L and width W3 of the extending portion 512 within the range of 0.8 um to 3.5 um within the range of 5 um to 1.5 um, for example, a data projector, A relatively high transmittance such as 25% or 20% or more required when mounted on a display device such as a rear projection television can be easily and reliably realized.

As described above, according to the liquid crystal device including the electro-optical device substrate according to the present embodiment, high transmittance can be realized while reducing the occurrence of light leakage current in the TFT 30.
<Electronic equipment>
Next, the case where the liquid crystal device which is the above-described electro-optical device is applied to various electronic devices will be described. FIG. 11 is a plan view showing a configuration example of the projector. Hereinafter, a projector using the liquid crystal device as a light valve will be described.

  As shown in FIG. 11, a projector 1100 includes a lamp unit 1102 made up of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and serves as a light valve corresponding to each primary color. The light enters the liquid crystal panels 1110R, 1110B, and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G are the same as those of the liquid crystal device described above, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Therefore, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  Here, paying attention to the display images by the liquid crystal panels 1110R, 1110B, and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  In addition, since light corresponding to each primary color of R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  In addition to the electronic device described with reference to FIG. 11, a mobile personal computer, a mobile phone, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, and an electronic notebook , Calculators, word processors, workstations, videophones, POS terminals, devices with touch panels, and the like. Needless to say, the present invention can be applied to these various electronic devices.

  In addition to the liquid crystal device described in the above embodiment, the present invention also includes a reflective liquid crystal device (LCOS) in which elements are formed on a silicon substrate, a plasma display (PDP), a field emission display (FED, SED), The present invention can also be applied to an organic EL display, a digital micromirror device (DMD), an electrophoresis apparatus, and the like.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification. For electro-optical devices with such changes A substrate, an electro-optical device including the substrate for the electro-optical device, and an electronic apparatus including the electro-optical device are also included in the technical scope of the present invention.

It is a top view which shows the whole structure of the liquid crystal device which concerns on 1st Embodiment. It is the HH 'sectional view taken on the line of FIG. 3 is an equivalent circuit diagram of a plurality of pixel units of the liquid crystal device according to the first embodiment. FIG. 2 is a plan view of a plurality of pixel units of the liquid crystal device according to the first embodiment. FIG. FIG. 5 is a cross-sectional view taken along line AA ′ in FIG. 4. It is a top view which shows the planar shape of the storage capacitor as a part of light-shielding part of the liquid crystal device which concerns on 1st Embodiment. It is a top view which shows the plane layout of the light-shielding part of the liquid crystal device which concerns on 1st Embodiment. FIG. 11 is a diagram (part 1) illustrating a relationship between a pixel pitch, a width of a main line portion of a first portion of a light shielding portion, a width of a second portion of the light shielding portion, a length and a width of an extending portion, and an aperture ratio. It is a figure which shows the relationship between a pixel pitch, the width | variety of the main part of the 1st part of a light shielding part, the width | variety of the 2nd part of a light shielding part, and the length and width | variety of an extending part, and the transmittance | permeability. FIG. 6 is a diagram (part 2) illustrating a relationship between a pixel pitch, a width of a main line portion of a first portion of a light shielding portion, a width of a second portion of the light shielding portion, a length and a width of an extending portion, and an aperture ratio. It is a top view which shows the structure of the projector which is an example of the electronic device to which the electro-optical apparatus is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1a ... Semiconductor layer, 1a '... Channel region, 1b ... Data line side LDD region, 1c ... Pixel electrode side LDD region, 1d ... Data line side source / drain region, 1e ... Pixel electrode side source / drain region, 3a ... Scan line, 6a ... Data line, 9a ... Pixel electrode, 9aa ... Opening area, 10 ... TFT array substrate, 10a ... Image display area, 20 ... Counter substrate, 21 ... Counter electrode, 23 ... Light-shielding film, 30 ... TFT, 50 ... Liquid crystal layer 70a, storage capacitor, 71m, lower capacitor electrode, 81a, 83a, contact hole, 101, data line driving circuit, 102, external circuit connection terminal, 104, scanning line driving circuit, 106, vertical conduction terminal, 300, upper capacitance Electrode 510 ... first part 511 ... main line part 512 512a 512b ... extension part 520 ... second part D1 ... pixel pitch W1a ... main line part , W2 ... second portion of the width, W3, W3a, W3b ... extending portion of the width, La, Lb, of L ... extending portion length

Claims (8)

A substrate,
Data lines,
A plurality of pixel electrodes arranged in a matrix in Jo Tokoro pixel pitch,
And electrically connected to the data line side source drain regions before Symbol data lines, electrically connected to the pixel electrode side source drain regions in the pixel electrode, the data line side source drain region and the pixel electrode side source A channel region formed between the drain regions; a first junction region formed between the channel region and the data line side source / drain region; and a channel region formed between the channel region and the pixel electrode side source / drain region. a semiconductor layer have a second junction region, extending in a first direction,
In the layer between the pixel electrode and the semiconductor layer, a first portion extending along a second direction intersecting with the first direction so as to overlap with the channel region and a first junction region overlapping with each other. A second portion protruding from the first portion in the direction of the first bonding region, and a third portion protruding from the first portion in the direction of the second bonding region so as to overlap the second bonding region. A first light-shielding film having
The predetermined pixel pitch is 3.0 μm or more and 12.0 μm or less,
Width before Symbol second part is a and 1.5um or less than 0.5um,
The substrate for an electro-optical device , wherein the width of the third portion is wider than the width of the second portion . Wherein the predetermined pixel pitch, an electro-optical device substrate according to claim 1, characterized in that at least 8.5Um.   The electro-optical device substrate according to claim 1, wherein the second bonding region is an LDD region. The first light shielding film includes a capacitive element having a pair of capacitive electrodes and a dielectric film sandwiched between the pair of capacitive electrodes,
The said capacitive element hold | maintains the electric potential of the said pixel electrode, when an image signal is supplied to the said pixel electrode via the said data line. Electro-optic device substrate.   The electro-optical device substrate according to claim 4, wherein at least one of the pair of capacitive electrodes includes a conductive light-shielding film. In the layer between the first light shielding film and the pixel electrode, a fourth portion extending along the second direction so as to overlap the channel region and the fourth portion overlapping with the first junction region. A fifth portion protruding from the portion toward the first bonding region, and a sixth portion protruding from the second portion toward the second bonding region so as to overlap the second bonding region. 6. The electro-optical device substrate according to claim 1, wherein the sixth portion includes a second light-shielding film having a width wider than that of the fifth portion. Electro-optical apparatus comprising the electro-optical device substrate according to any one of claims 1 to 6. An electronic apparatus comprising the electro-optical device according to claim 7 .

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