JP5244650B2 - Soiウェーハの製造方法 - Google Patents

Soiウェーハの製造方法 Download PDF

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Publication number
JP5244650B2
JP5244650B2 JP2009043403A JP2009043403A JP5244650B2 JP 5244650 B2 JP5244650 B2 JP 5244650B2 JP 2009043403 A JP2009043403 A JP 2009043403A JP 2009043403 A JP2009043403 A JP 2009043403A JP 5244650 B2 JP5244650 B2 JP 5244650B2
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JP
Japan
Prior art keywords
wafer
insulating film
soi
bonded
bond
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009043403A
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English (en)
Japanese (ja)
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JP2010199353A5 (enExample
JP2010199353A (ja
Inventor
浩司 阿賀
功 横川
宣彦 能登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2009043403A priority Critical patent/JP5244650B2/ja
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Priority to PCT/JP2010/000076 priority patent/WO2010098007A1/ja
Priority to US13/145,275 priority patent/US20110281420A1/en
Priority to KR1020117019761A priority patent/KR20110116036A/ko
Priority to EP10745896.0A priority patent/EP2402983B1/en
Priority to CN2010800086820A priority patent/CN102326227A/zh
Publication of JP2010199353A publication Critical patent/JP2010199353A/ja
Publication of JP2010199353A5 publication Critical patent/JP2010199353A5/ja
Application granted granted Critical
Publication of JP5244650B2 publication Critical patent/JP5244650B2/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10P90/1916
    • H10P14/20
    • H10P30/20
    • H10P50/283
    • H10P50/644
    • H10W10/181

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  • Element Separation (AREA)
  • Weting (AREA)
JP2009043403A 2009-02-26 2009-02-26 Soiウェーハの製造方法 Active JP5244650B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2009043403A JP5244650B2 (ja) 2009-02-26 2009-02-26 Soiウェーハの製造方法
US13/145,275 US20110281420A1 (en) 2009-02-26 2010-01-08 Method for manufacturing soi wafer
KR1020117019761A KR20110116036A (ko) 2009-02-26 2010-01-08 Soi 웨이퍼의 제조 방법
EP10745896.0A EP2402983B1 (en) 2009-02-26 2010-01-08 Method for manufacturing soi wafer
PCT/JP2010/000076 WO2010098007A1 (ja) 2009-02-26 2010-01-08 Soiウェーハの製造方法
CN2010800086820A CN102326227A (zh) 2009-02-26 2010-01-08 Soi晶片的制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009043403A JP5244650B2 (ja) 2009-02-26 2009-02-26 Soiウェーハの製造方法

Publications (3)

Publication Number Publication Date
JP2010199353A JP2010199353A (ja) 2010-09-09
JP2010199353A5 JP2010199353A5 (enExample) 2012-04-19
JP5244650B2 true JP5244650B2 (ja) 2013-07-24

Family

ID=42665227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009043403A Active JP5244650B2 (ja) 2009-02-26 2009-02-26 Soiウェーハの製造方法

Country Status (6)

Country Link
US (1) US20110281420A1 (enExample)
EP (1) EP2402983B1 (enExample)
JP (1) JP5244650B2 (enExample)
KR (1) KR20110116036A (enExample)
CN (1) CN102326227A (enExample)
WO (1) WO2010098007A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI430348B (zh) 2008-03-31 2014-03-11 Memc電子材料公司 蝕刻矽晶圓邊緣的方法
KR20110099108A (ko) 2008-11-19 2011-09-06 엠이엠씨 일렉트로닉 머티리얼즈, 인크. 반도체 웨이퍼의 에지를 스트리핑하기 위한 방법 및 시스템
JP5477277B2 (ja) * 2010-12-20 2014-04-23 信越半導体株式会社 Soiウェーハの製造方法
US8853054B2 (en) 2012-03-06 2014-10-07 Sunedison Semiconductor Limited Method of manufacturing silicon-on-insulator wafers
JP5978764B2 (ja) 2012-05-24 2016-08-24 信越半導体株式会社 Soiウェーハの製造方法
JP5862521B2 (ja) * 2012-09-03 2016-02-16 信越半導体株式会社 Soiウェーハの製造方法
JP6056516B2 (ja) * 2013-02-01 2017-01-11 信越半導体株式会社 Soiウェーハの製造方法及びsoiウェーハ
US9177967B2 (en) * 2013-12-24 2015-11-03 Intel Corporation Heterogeneous semiconductor material integration techniques
CN105280541A (zh) * 2015-09-16 2016-01-27 中国电子科技集团公司第五十五研究所 一种用于超薄半导体圆片的临时键合方法及去键合方法
FR3076393A1 (fr) * 2017-12-28 2019-07-05 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de transfert d'une couche utile

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11121310A (ja) * 1997-10-09 1999-04-30 Denso Corp 半導体基板の製造方法
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
JP3030545B2 (ja) 1997-07-19 2000-04-10 信越半導体株式会社 接合ウエーハの製造方法
DE69917819T2 (de) * 1998-02-04 2005-06-23 Canon K.K. SOI Substrat
JP4313874B2 (ja) * 1999-02-02 2009-08-12 キヤノン株式会社 基板の製造方法
JP4304879B2 (ja) 2001-04-06 2009-07-29 信越半導体株式会社 水素イオンまたは希ガスイオンの注入量の決定方法
FR2880184B1 (fr) * 2004-12-28 2007-03-30 Commissariat Energie Atomique Procede de detourage d'une structure obtenue par assemblage de deux plaques
CN101124657B (zh) * 2005-02-28 2010-04-14 信越半导体股份有限公司 贴合晶圆的制造方法及贴合晶圆
JP2007141946A (ja) * 2005-11-15 2007-06-07 Sumco Corp Soi基板の製造方法及びこの方法により製造されたsoi基板

Also Published As

Publication number Publication date
WO2010098007A1 (ja) 2010-09-02
US20110281420A1 (en) 2011-11-17
EP2402983A1 (en) 2012-01-04
KR20110116036A (ko) 2011-10-24
EP2402983B1 (en) 2015-11-25
CN102326227A (zh) 2012-01-18
EP2402983A4 (en) 2012-07-25
JP2010199353A (ja) 2010-09-09

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