JP5237853B2 - Constant current circuit - Google Patents

Description

  The present invention relates to a constant current circuit for supplying a constant current.

  Currently, semiconductor devices often have a constant current circuit for supplying a constant current. Using this constant current circuit, for example, a comparison circuit and an amplifier circuit are operating.

  A conventional constant current circuit will be described. FIG. 2 is a diagram illustrating a conventional constant current circuit.

  The K value (drive capability) of the PMOS transistor M3 is higher than the K value of the PMOS transistor M4, or the K value of the NMOS transistor M2 is higher than the K value of the NMOS transistor M1. At this time, a differential voltage between the gate-source voltages of the NMOS transistor M1 and the NMOS transistor M2 is generated in the resistor R1, and the current flowing through the resistor R1 becomes a constant constant current.

  Here, the starting circuit 10 is required so that the constant current circuit operates stably at the operating point where the desired current I2 flows and the operating point where the current I2 becomes 0 amperes. In this starting circuit 10, when the current I2 flowing through the PMOS transistor M4 and the NMOS transistor M2 is less than a predetermined current, the current I2 flowing through the resistor R1 is less than the predetermined current, and the gate voltage of the PMOS transistor M4 is equal to or higher than the predetermined voltage. The activation circuit 10 activates the constant current circuit by supplying current from the power supply terminal to the gates of the NMOS transistors M1 and M2 (see, for example, Patent Document 1).

Japanese Patent No. 2803291 (FIG. 1)

  However, in the conventional technique, since the starting circuit 10 exists, the circuit scale of the constant current circuit is increased accordingly.

  The present invention has been made in view of such problems, and provides a constant current circuit having a small circuit scale.

  In order to solve the above-described problems, the present invention provides a depletion type NMOS transistor having a negative threshold voltage and having a gate and a source connected to each other, and a PMOS transistor having a saturation connection in a constant current circuit for supplying a constant current. A voltage based on the source voltage of the depletion type NMOS transistor is applied to the gate, and a drain current equal to the drain current of the depletion type NMOS transistor is passed, and the gate voltage of the first NMOS transistor A second NMOS transistor that is applied to the gate and flows a drain current equal to the drain current of the PMOS transistor, and is provided between a source of the second NMOS transistor and a ground terminal, and the first NMOS transistor And the second NMOS transistor To provide a constant current circuit, characterized in that it comprises a resistor for flowing the constant current generates a differential voltage between the gate-source voltage of the motor.

  In the present invention, the depletion type NMOS transistor whose gate and source are connected causes the starting current for starting the constant current circuit to flow to the gates of the first and second NMOS transistors, so that the starting circuit for starting the constant current circuit Becomes unnecessary, and the circuit scale of the constant current circuit is reduced.

It is a figure which shows a constant current circuit. It is a figure which shows the conventional constant current circuit.

  Embodiments of the present invention will be described below with reference to the drawings.

  First, the configuration of a constant current circuit for supplying a constant current will be described. FIG. 1 is a diagram illustrating a constant current circuit.

  [Element] The constant current circuit includes a PMOS transistor P1, a depletion type NMOS transistor ND1, an NMOS transistor N2, an NMOS transistor NL3, and a resistor R1.

  [Element Connection Relationship] The gate of the depletion type NMOS transistor ND1 is connected to the source, the gate and drain of the NMOS transistor N2, and the gate of the NMOS transistor NL3, and the drain is connected to the power supply terminal. The source of the NMOS transistor N2 for saturation connection is connected to the ground terminal. The gate of the PMOS transistor P1 to be saturated is connected to the drain and the drain of the NMOS transistor NL3, and the source is connected to the power supply terminal. The NMOS transistor N2 and the NMOS transistor NL3 are current mirror connected. The resistor R1 is provided between the source of the NMOS transistor NL3 and the ground terminal.

  [Function of Element] The depletion type NMOS transistor ND1 has a negative threshold voltage. The depletion type NMOS transistor ND1 has a gate and a source connected to each other, and allows a current to flow even when the gate-source voltage is 0 volts. The NMOS transistor NL3 has a lower threshold voltage than the NMOS transistor N2.

  The resistor R1 is a polysilicon resistor, and the sheet resistance value of the resistor R1 is about 300Ω to 400Ω. Therefore, the resistance value of the resistor R1 hardly changes due to manufacturing variations of semiconductor devices and temperature changes.

  In the NMOS transistor N2, the source voltage of the depletion type NMOS transistor ND1 is applied to the gate, and a drain current equal to the drain current of the depletion type NMOS transistor ND1 flows. In the NMOS transistor NL3, the gate voltage of the NMOS transistor N2 is applied to the gate, and a drain current equal to the drain current of the PMOS transistor P1 flows. The current I1 flows through the depletion type NMOS transistor ND1 and the NMOS transistor N2, and the current I2 flows through the PMOS transistor P1, the NMOS transistor NL3, and the resistor R1 due to the current mirror connection of the NMOS transistor N2 and the NMOS transistor NL3. The resistor R1 generates a differential voltage between the gate and source voltages of the NMOS transistor N2 and the NMOS transistor NL3, and allows a constant constant current to flow.

  Next, the operation of the constant current circuit will be described.

  [Operation at Startup] For example, when the power is turned on, the depletion type NMOS transistor ND1 has a gate and a source connected to each other, so that a current flows. This current functions as a starting current for starting the constant current circuit, flows from the power supply terminal to the gates of the NMOS transistor N2 and the NMOS transistor NL3, and charges the gate capacitances of the NMOS transistor N2 and the NMOS transistor NL3. By this charging, the constant current circuit operates stably at the former operating point at the operating point where the desired current I2 flows and the operating point where the current I2 becomes 0 amperes. That is, the constant current circuit is always activated.

[Operation after Startup] The threshold voltage in the NMOS transistor N2 is Vt2, the overdrive voltage is Vo2, the gate-source voltage is Vgs2, the threshold voltage in the NMOS transistor NL3 is Vt3, and the overdrive voltage is Assuming that Vo3 is Vgs3 and the gate-source voltage is Vgs3, the voltages Vref and I2 generated in the resistor R1 are Vref.
= Vgs2-Vgs3
= (Vo2 + Vt2)-(Vo3 + Vt3)
= (Vo2-Vo3) + (Vt2-Vt3) (1)
I2 = Vref / R1 (2)
Is calculated by That is, a total voltage of the differential voltage (Vo2-Vo3) of the overdrive voltage and the differential voltage (Vt2-Vt3) of the threshold voltage is generated in the resistor R1, and the current I2 flows. . This current I2 is taken out of the constant current circuit by a current mirror circuit (not shown) or the like provided in the PMOS transistor P1 connected in saturation.

  Here, since the current I2 is not fed back to the current I1, the ratio between the current I1 and the current I2 is not controlled, and the overdrive voltage Vo2 and the overdrive voltage Vo3 are not equal. However, when the circuit is designed so that the K value (drive capability) of the NMOS transistor N2 and the NMOS transistor NL3 is large, the overdrive voltages Vo2 to Vo3 are reduced, and the differential voltage (Vo2 to Vo3) is also reduced. In addition, when the threshold voltage Vt2 varies and increases due to manufacturing variations of semiconductor devices and temperature changes, the threshold voltage Vt3 also varies and increases, and when the threshold voltage Vt2 decreases, the threshold voltage Vt3 decreases. That is, the threshold voltages Vt2 to Vt3 vary similarly. That is, the difference voltage (Vt2−Vt3) between the threshold voltages Vt2 to Vt3 hardly changes due to manufacturing variations of semiconductor devices and temperature changes. Therefore, from the equation (1), the voltage Vref generated in the resistor R1 is a constant voltage that hardly depends on manufacturing variations of semiconductor devices and temperature changes.

  Further, as described above, the resistance value of the resistor R1 hardly changes with respect to manufacturing variations of semiconductor devices and temperature changes. Therefore, from equation (2), the current I2 flowing through the resistor R1 is a constant constant current that hardly depends on manufacturing variations of semiconductor devices or temperature changes.

  [Effect] In this way, the depletion type NMOS transistor ND1 whose gate and source are connected flows the starting current for starting the constant current circuit to the gates of the NMOS transistor N2 and the NMOS transistor NL3, so the constant current circuit is started. This eliminates the need for a start-up circuit to reduce the circuit scale of the constant current circuit.

  When the current I1 flows, the current I2 is determined by the current mirror connection of the NMOS transistor N2 and the NMOS transistor NL3, and the current I2 is not fed back to the current I1. Therefore, for example, when the power is turned on, the time until the desired current I2 in the constant current circuit flows (settling time) is shortened. Then, the start-up of other circuits that require the desired current I2 becomes faster, and the semiconductor device can cope with an application that starts up at high speed.

  In addition, since the K values of the NMOS transistor N2 and the NMOS transistor NL3 are designed to be large, the overdrive voltages Vo2 and Vo3 are reduced, so that the differential voltage (Vo2-Vo3) is also reduced. Then, although the differential voltage (Vo2-Vo3) has temperature characteristics, the influence of the temperature characteristics is almost eliminated. Further, the threshold voltages Vt2 and Vt3 vary in the same manner due to manufacturing variations and temperature changes of the semiconductor device, so that the difference voltage (Vt2−Vt3) between the threshold voltages Vt2 and Vt3 hardly changes. Then, from equation (1), the voltage Vref generated in the resistor R1 is a constant voltage that hardly depends on manufacturing variations of semiconductor devices and temperature changes. Further, as described above, the resistance value of the resistor R1 hardly changes with respect to manufacturing variations of semiconductor devices and temperature changes. Therefore, from equation (2), the current I2 flowing through the resistor R1 is a constant constant current that hardly depends on manufacturing variations of semiconductor devices or temperature changes.

  [Supplement] In the above description, since the NMOS transistor NL3 has a lower threshold voltage than the NMOS transistor N2, the differential voltage {(Vo2−) between the gate-source voltage of the NMOS transistor N2 and the NMOS transistor NL3. Vo3) + (Vt2−Vt3)} is generated in the resistor R1. That is, the total voltage of the differential voltage (Vo2-Vo3) of the overdrive voltage and the differential voltage (Vt2-Vt3) of the threshold voltage between the NMOS transistor N2 and the NMOS transistor NL3 is generated in the resistor R1.

  However, since the NMOS transistor NL3 has the same threshold voltage as the NMOS transistor N2, and the NMOS transistor NL3 has a higher K value than the NMOS transistor N2, the gate-source connection between the NMOS transistor N2 and the NMOS transistor NL3 A voltage difference voltage (Vgs2-Vgs3 = Vo2-Vo3) may be generated in the resistor R1. That is, the differential voltage (Vo2-Vo3) of the overdrive voltage between the NMOS transistor N2 and the NMOS transistor NL3 may be generated in the resistor R1. Although these differential voltages (Vo2−Vo3) have temperature characteristics, the NMOS transistor N2 and the NMOS transistor NL3 have the same threshold value, and therefore a manufacturing process for manufacturing NMOS transistors having different threshold values. Becomes unnecessary, and the manufacturing process of the semiconductor device is facilitated.

P1... PMOS transistor ND1, N2, NL3... NMOS transistor R1.

Claims (3)

In a constant current circuit for passing a constant current,
A depletion type NMOS transistor having a negative threshold voltage and having a gate and a source connected;
A PMOS transistor for saturation connection;
A voltage applied to a gate based on a source voltage of the depletion-type NMOS transistor, and a first NMOS transistor that flows a drain current equal to a drain current of the depletion-type NMOS transistor;
A voltage applied to the gate based on the gate voltage of the first NMOS transistor, and a second NMOS transistor that flows a drain current equal to the drain current of the PMOS transistor;
A resistor provided between a source and a ground terminal of the second NMOS transistor, generating a differential voltage of a gate-source voltage between the first NMOS transistor and the second NMOS transistor, and flowing the constant current;
A constant current circuit comprising: The second NMOS transistor has a lower threshold voltage than the first NMOS transistor;
The resistor generates a voltage based on a differential voltage of an overdrive voltage and a differential voltage of a threshold voltage between the first NMOS transistor and the second NMOS transistor;
The constant current circuit according to claim 1. The second NMOS transistor has a higher drive capability than the first NMOS transistor,
The resistor generates a voltage based on a differential voltage of an overdrive voltage between the first NMOS transistor and the second NMOS transistor.
The constant current circuit according to claim 1.