JP5202151B2 - パッド下側esd及びパッド下側アクティブボンディング用ボンドパッドスタック - Google Patents

パッド下側esd及びパッド下側アクティブボンディング用ボンドパッドスタック Download PDF

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JP5202151B2
JP5202151B2 JP2008186372A JP2008186372A JP5202151B2 JP 5202151 B2 JP5202151 B2 JP 5202151B2 JP 2008186372 A JP2008186372 A JP 2008186372A JP 2008186372 A JP2008186372 A JP 2008186372A JP 5202151 B2 JP5202151 B2 JP 5202151B2
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layer
conductive layer
bond pad
width
passivation
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JP2009027167A (ja
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ポッダー アニンディヤ
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National Semiconductor Corp
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Description

本発明は集積回路構成体に関するものであって、更に詳細には、単に1つ又は2つのパッド金属層を具備する回路における金及び銅ワイヤの両方に対する堅牢なボンドパッドスタックに関するものである。
集積回路構成体は、典型的に、外部装置への集積回路の電気的接続を簡単化させる多数の入力/出力(I/O)パッドを包含している。1つの広く使用されている電気的接続技術はワイヤボンディングであり、それは薄い金(Au)又は銅(Cu)ワイヤをI/Oパッド(しばしば、「ボンドパッド」として呼称される)へ熱音波的にボンディングさせることが関与する。
図1は標準的なボンドパッドスタック100の断面を示している。ボンドパッドスタック100は、多数のアルミニウム(Al)又はCuメタリゼーション層、この場合には層M1−M4を包含しており、それらは内部誘電体(ILD)物質102、典型的には付着形成した二酸化シリコン(SiO2)によって互いに分離されている。種々のメタリゼーション層M1−M4を接続させるために、所望の回路特性を与えるためにボンドパッドの下側に導電性ビア104がしばしば形成される。典型的には窒化シリコンであるパッシベーション物質106からなる層がこの場合には層M4である上部メタリゼーション層の上に形成され、且つパターニングされてM4層の上側表面区域108を露出させてボンドパッドとして作用させる。
従来のワイヤボンディング技術は、標準のボンドパッドデザインに対してかなりの量のストレスを付与し、しばしばボンドパッドの下側に存在する内部層(ILD)内に亀裂を発生させる。これらの亀裂は回路構成体を貫通して伝搬する傾向があり且つ電流漏洩及び/又は性能劣化を発生させる場合がある。
ワイヤボンディングによって発生させる場合のある問題のために、ボンドパッド直下の集積回路ダイの領域内にアクティブ回路要素を配置させることを回避することが一般的である。このことは亀裂の危険性を減少させることに貢献するものであるが、ボンドパッドはダイの全表面積のかなりのパーセントを占めるものであるから、ボンドパッドの下側にアクティブな回路の配置を禁止することはダイ寸法が不所望に増加することとなる。又、過去においては、ボンドパッド区域内におけるアクティブ回路要素の上側には典型的に3つ又は4つの金属層が存在していたが、増加する数の回路適用例において、ボンドパッドの直下にアクティブな回路を配置させることの柔軟性を有することが望ましい。
図2は上述した問題に対処することを意図した既知のボンドパッドスタックデザイン200を示している。このボンドパッドスタックデザイン200は、アクティブな回路204の上に形成した例えば窒化シリコンである内部層誘電体(ILD)202からなる層を包含している。上部金属層206はILD202の上に形成されている。標準的な図1のボンドパッドスタックの場合におけるように上部金属層のボンドパッドに対して直接的にワイヤボンディングを与える代わりに、このボンドパッドスタックデザイン200は、上部金属層206の上にエキストラなパッシベーション窒化物層208を提供している。次いで、例えばアルミニウム(Al)又は銅(Cu)である金属の層を形成し且つパターニングしてエキストラなパッシベーション層の上にボンドパッド210を設ける。
図2のボンドパッドスタック200は図1の標準的なボンドパッドスタック100よりもより堅牢なデザインを提供し、それによりボンドパッド下側のアクティブな回路の可能性を向上させるものであるが、その実現には付加的なマスク層を必要とし且つコスト及びサイクル時間を増加させる。
本発明は、レイアウトの改善と内部層誘電体(ILD)物質の改善との結合を使用して単に1個又は2個のパッド金属層を具備する回路における金(Au)及び銅(Cu)ワイヤの両方に対して堅牢なボンドパッドスタックを提供している。そのレイアウトの改善は、パッシベーション開口(そこにはプローブチップ及びボンドワイヤが配置される)下側の区域における上部金属下側の金属層と上部金属層との間の全てのビアを除去することを包含している。このことは、ビアの不連続性がないより均質な物質とすることを可能とし、それによりILDにおける応力集中点を減少させている。ILDの改善は、シリコン酸化物層に加えて窒化シリコン層を付加することを包含している。従来、ILDはスピンオンさせたか又は高密度プラズマ(HDP)酸化物のいずれかから構成されている。最も上側のILD層の上の酸化物の上に窒化シリコンの薄い層を成長させることは著しく堅牢性を増加させた組成物を与え且つ下側に存在するアクティブな回路内へ亀裂又はその他の損傷が伝搬し且つ経路を形成することを防止する。この構成の実現には1つのエキストラな物質層を付着形成させるか又は成長させることを必要とし且つ標準のプロセスの流れと同一の上部金属層用のビアマスクを使用する。従って、付加的なマスクのコストは存在せず且つ新たな処理ステップが必要とされるものではない。
本発明の種々の側面の特徴及び利点は、本発明の概念を使用している例示的な実施例を記載している本発明の以下の詳細な説明及び添付図面を考慮することによりより完全に理解され且つ認識されるものである。
図3は本発明に基づくボンドパッドスタック300の1実施例を示している。図3の構造300は、複数個の下側導電層M1及びM2(例えば、Al又はCu)を包含しており、その各々は最小幅w以下の幅を有している。下側導電層M1,M2の各々は、典型的には、付着形成したシリコン酸化物である誘電体物質302をそれらの間に形成している。当業者により理解されるように、良く知られた態様で導電層M1と導電層M2との間に導電性ビアを形成することが可能である。ボンドパッドスタック300は、更に、上部導電層M3(例えば、Al又はCu)を包含しており、それは下側導電層M1,M2の上側に形成されており且つ誘電体物質302によってこれらの層M1及びM2から離隔されている。再度、当業者によって理解されるように、良く知られた態様で上部導電層M3及び/又は層M1及びM2との間に導電性ビアを形成することが可能である。図3に示されるように、上部導電層M3は、下側導電層M1及びM2の最小幅wより大きな第二幅を有しており、従って該上部導電層は、下側導電層M1及びM2の上側に形成されている第一部分と、下側導電層M1及びM2の幅を超えて延在している第二部分304とを有している。
典型的には窒化シリコンである第一パッシベーション層306を上部導電層M3の上側に付着形成し且つパターニングして第一パッシベーション層306を貫通する開口を設け、上部導電層M3の第二部分304の上側表面区域308を露出させる。
本発明の概念によれば、導電性ボンドパッド層310(例えば、Al又はCu)を第一パッシベーション層306の上側に形成し且つパターニングし、従ってボンドパッド層310は、上部導電層M3の第一部分の上側を延在するが第一パッシベーション層306によって上部導電層M3から理解されている第一部分と、上部導電層M3の第二部分304の上側に延在しており且つ第一パッシベーション層306における開口を介して延在し、図3に示したように、上部導電層M3の露出された上側表面区域308に対して電気的接触を与える第二部分とを有している。
例えば窒化シリコン又はベンゾシクロブテン(BCB)を基礎としたポリマー誘電体等の第二パッシベーション層312を導電性パッド層310の上に形成し且つパターニングして第二パッシベーション層312内に開口を設け、導電性パッド層310の第一部分にわたり、即ち下側導電層M1及びM2にわたり上側ボンドパッド表面区域314を露出させる。
当業者が理解するように、次いで、当業界において良く知られた技術によってボンドパッド314の上にワイヤボンド構成体を形成することが可能である。
図4は本発明に基づくボンドパッドスタック300の1実施例を示している。図4の構成体400は、構成体400が導電性ボンドパッド層410と上部導電層M3との間に電気的接続を与えるためのビアを使用しているという点において図3の構成体300と異なっている。
より詳細に説明すると、図4の構成体400は、複数個の下側導電層M1及びM2(例えば、Al又はCu)を包含しており、その各々は最大幅w以下の幅を有している。下側導電層M1,M2の各々はそれらの間に形成されている典型的には付着形成したシリコン酸化物である誘電体物質402を有している。当業者が理解するように、導電層M1及び導電層M2の間に良く知られた態様で導電性ビアを形成することが可能である。ボンドパッドスタック400は、更に、上部導電層M3(例えば、Al又はCu)を包含しており、それは下側導電層M1,M2にわたり且つ誘電体物質402によって層M1及びM2から離隔された状態で形成されている。再度、当業者が理解するように、良く知られた態様で上部導電層M3及び/又は層M1及びM2の間に導電性ビアを形成することが可能である。図4に示されるように、上部導電層M3は、下側導電層M1及びM2の最大幅wより大きな第二幅を有しており、従って該上部導電層は、下側導電層M1及びM2の上側に形成されている第一部分と、下側導電層M1及びM2の幅を超えて延在している第二部分404とを有している。
第一パッシベーション層406は、典型的に窒化シリコンであり、上部導電層M3の上側に付着形成され且つパターニングされて第一パッシベーション層406を貫通してビア開口を設けて、上部導電層M3の第二部分404の上側表面区域を露出させる。次いで、導電性ビア408(例えば、Tu)を該ビア開口を貫通し且つ上部導電層M3と電気的に接触して形成される。
本発明の概念によれば、導電性ボンドパッド層410(例えば、Al又はCu)を第一パッシベーション層406の上側に形成し且つパターニングし、従ってボンド層410は、上部導電層M3の第一部分にわたり延在しているが第一パッシベーション層406によってそれから離隔されている第一部分と、上部導電層M3の第二部分304にわたり延在しビア408と電気的に接触しボンドパッド層410と上部導電層M3の露出された表面区域との間に、図4に示したように、電気的接触を与える第二部分とを有している。
第二パッシベーション層412は、例えば、窒化シリコン又はベンゾシクロブテン(BCB)を基礎としたポリマー誘電体であり、導電性パッド層410の上側に形成し且つパターニングして第二パッシベーション層412内に開口を与え、導電性パッド層410の第一部分にわたり、即ち下側導電層M1及びM2にわたり上側ボンドパッド表面区域414を露出させる。
図3及び図4の実施例により例示されるように、本発明に基づくボンドパッドスタックの実現は、単に1つのエキストラな物質層を付着形成/成長させることを必要とするに過ぎず、且つ標準プロセスの流れにおけるものと同一の上部金属ビア用のビアマスクを使用する。したがって、何等付加的なマスクコスト又はプロセスステップが必要とされるものではない。
以上、本発明の具体的実施の態様について詳細に説明したが、本発明は、これら具体例にのみ制限されるべきものではなく、本発明の技術的範囲を逸脱することなしに種々の変形が可能であることは勿論である。
標準のボンドパッドスタックを例示した概略断面図。 ボンドパッドに対するワイヤボンディングにより発生される亀裂損傷に対処することが意図された既知のボンドパッドスタックデザインを例示した概略断面図。 本発明の概念に基づくボンドパッドスタックデザインを例示した概略断面図。 本発明の概念に基づくボンドパッドスタックデザインの別の実施例を例示した概略断面図。
符号の説明
300 ボンドパッドスタック構成体
302 誘電体物質
304 第二部分
306 第一パッシベーション層
308 上側表面区域
310 導電性ボンドパッド層
312 第二パッシベーション層
314 上側ボンドパッド表面区域

Claims (8)

  1. 集積回路用のボンドパッドスタック構造であって、
    それらの間に形成された誘電体物質を有する1個又はそれ以上の下側導電層であって、各下側導電層が第1の幅以下の幅を有する、下側導電層と
    前記1個又はそれ以上の下側導電層の上に形成され上部導電層であって、該上部導電層と前記1個又はそれ以上の下側導電層との間に形成された誘電物質を有し該上部導電層が前記1個又はそれ以上の下側導電層の上に形成され1の部分と前記1個又はそれ以上の下側導電層の第1の幅を超えて延在する第2の部分とを含むように1の幅より大き2の幅を有上部導電層
    前記上部導電層の上に形成されており、前記上部導電層の第2の部分の上側表面区域を露出させるためにそれを貫通して形成された開口を有する第1のパッシベーション層
    前記1のパッシベーション層上に形成され導電性ボンドパッド層であって、該ボンドパッド層が前記上部導電層の第1の部分の上に形成され1の部分と前記1のパッシベーション層内の前記開口を介して延在して前記上部導電層と電気的に接触る第2の部分とを含む、導電性ボンドパッド層
    前記導電性ボンドパッド層上に形成されており、前記導電層ボンドパッド層の第1の部分のボンドパッド表面区域を露出させるためにそれを貫通して形成された開口を有する第2のパッシベーション層
    含み、
    前記誘電体物質が堆積されたシリコン酸化物を含み、
    前記下側導電層の幅が前記第2のパッシベーション層内の開口の幅よりも大きい、
  2. 請求項1に記載の構造であって、前記1のパッシベーション層が窒化シリコンを含む、
  3. 請求項1又は2記載の構造であって、前記ボンドパッド層がアルミニウムを含む、
  4. 請求項1乃至3の何れか記載の構造であって、前記2のパッシベーション層が窒化シリコンを含む、
  5. 請求項1乃至3の何れか記載の構造であって、前記2のパッシベーション層がベンゾシクロブテン(BCB)を基礎としたリマー誘電体を含む、
  6. ボンドパッドスタック構の製造方法であって、
    それらの間に形成された誘電体物質を有する1個又はそれ以上の下側導電層を形成し、このような各下側導電層1の幅以下の幅を有し、
    上部導電層と前記下側導電層とがそれらの間に形成された誘電体物質を有するように、前記1個又はそれ以上の下側導電層の上に上部導電層を形成し、前記上部導電層が前記1個又はそれ以上の下側導電層の上に形成され1の部分と前記1個又はそれ以上の下側導電層の第1の幅を超えて延在る第2の部分とを含むように、前記上部導電層が上記第1の幅よりも大きい2の幅を有し、
    前記上部導電層の第2の部分の上側表面区域を露出させるために第1のパッシベーション層がそれを貫通して形成された開口を有するように、前記上部導電層の上に第1のパッシベーション膜を形成し
    導電性ボンドパッド層が前記上部導電層の第1の部分の上に形成され1の部分と前記1のパッシベーション層内の前記開口を介して延在して前記上部導電層と電気的接触る第2の部分とを含むように、前記第1のパッシベーション層の上に導電性ボンドパッド層を形成し
    前記導電性ボンドパッド層の上に第2のパッシベーション層を形成し、前記導電性ボンドパッド層の第1の部分の上側ボンドパッド表面区域を露出させるために前記第2のパッシベーション層がそれを貫通して形成された開口を有し
    前記下側導電層の幅が前記第2のパッシベーション層内の開口の幅よりも大きい、
    方法。
  7. 請求項6に記載の方法であって、前記誘電体物質がシリコン酸化物を含む、方法。
  8. 請求項6又は7に記載の方法であって、前記第1のパッシベーション層が窒化シリコンを含む、方法。
JP2008186372A 2007-07-23 2008-07-17 パッド下側esd及びパッド下側アクティブボンディング用ボンドパッドスタック Active JP5202151B2 (ja)

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US11/895,779 US7652379B2 (en) 2007-07-23 2007-08-27 Bond pad stacks for ESD under pad and active under pad bonding
US11/895,779 2007-08-27

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CN101355068B (zh) 2010-09-01
US20090026621A1 (en) 2009-01-29
DE102008027466A1 (de) 2009-02-05
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US7652379B2 (en) 2010-01-26
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