JP5198847B2 - 二重経路プロセッサの処理制御のための装置および方法 - Google Patents

二重経路プロセッサの処理制御のための装置および方法 Download PDF

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JP5198847B2
JP5198847B2 JP2007505612A JP2007505612A JP5198847B2 JP 5198847 B2 JP5198847 B2 JP 5198847B2 JP 2007505612 A JP2007505612 A JP 2007505612A JP 2007505612 A JP2007505612 A JP 2007505612A JP 5198847 B2 JP5198847 B2 JP 5198847B2
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instruction
instructions
control
computer processor
decoding unit
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JP2007531133A5 (enExample
JP2007531133A (ja
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サイモン・ノウルズ
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イセラ・インコーポレーテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Hardware Redundancy (AREA)
JP2007505612A 2004-03-31 2005-03-22 二重経路プロセッサの処理制御のための装置および方法 Expired - Lifetime JP5198847B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/813,628 US7949856B2 (en) 2004-03-31 2004-03-31 Method and apparatus for separate control processing and data path processing in a dual path processor with a shared load/store unit
US10/813,628 2004-03-31
PCT/GB2005/001059 WO2005096140A2 (en) 2004-03-31 2005-03-22 Apparatus and method for control processing in dual path processor

Publications (3)

Publication Number Publication Date
JP2007531133A JP2007531133A (ja) 2007-11-01
JP2007531133A5 JP2007531133A5 (enExample) 2010-11-11
JP5198847B2 true JP5198847B2 (ja) 2013-05-15

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US (2) US7949856B2 (enExample)
EP (2) EP1735700B1 (enExample)
JP (1) JP5198847B2 (enExample)
KR (1) KR20070026434A (enExample)
CN (1) CN100472433C (enExample)
CA (1) CA2560465A1 (enExample)
TW (2) TWI413935B (enExample)
WO (1) WO2005096140A2 (enExample)

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Also Published As

Publication number Publication date
EP1735700A2 (en) 2006-12-27
TWI413935B (zh) 2013-11-01
CA2560465A1 (en) 2005-10-13
US20110078416A1 (en) 2011-03-31
CN100472433C (zh) 2009-03-25
EP2290526A1 (en) 2011-03-02
TWI450192B (zh) 2014-08-21
US7949856B2 (en) 2011-05-24
TW201106265A (en) 2011-02-16
CN1950795A (zh) 2007-04-18
WO2005096140A3 (en) 2006-07-06
TW200540707A (en) 2005-12-16
EP1735700B1 (en) 2018-09-12
KR20070026434A (ko) 2007-03-08
JP2007531133A (ja) 2007-11-01
WO2005096140A2 (en) 2005-10-13
US8484442B2 (en) 2013-07-09
US20050223193A1 (en) 2005-10-06
EP2290526B1 (en) 2018-05-30

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