JP5180827B2 - 溝に横方向第１ゲート及び縦方向第２ゲートを含むスプリットゲート記憶装置 - Google Patents

溝に横方向第１ゲート及び縦方向第２ゲートを含むスプリットゲート記憶装置 Download PDF

Info

Publication number
JP5180827B2
JP5180827B2 JP2008523995A JP2008523995A JP5180827B2 JP 5180827 B2 JP5180827 B2 JP 5180827B2 JP 2008523995 A JP2008523995 A JP 2008523995A JP 2008523995 A JP2008523995 A JP 2008523995A JP 5180827 B2 JP5180827 B2 JP 5180827B2
Authority
JP
Japan
Prior art keywords
gate
groove
dielectric
split
diffusion region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008523995A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009503856A (ja
JP2009503856A5 (enExample
Inventor
プリンツ、アーウィン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
NXP USA Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2009503856A publication Critical patent/JP2009503856A/ja
Publication of JP2009503856A5 publication Critical patent/JP2009503856A5/ja
Application granted granted Critical
Publication of JP5180827B2 publication Critical patent/JP5180827B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6893—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode wherein the floating gate has multiple non-connected parts, e.g. multi-particle floating gate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6894—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having one gate at least partly in a trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/693—Vertical IGFETs having charge trapping gate insulators
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/697—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having trapping at multiple separated sites, e.g. multi-particles trapping sites
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/699—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having the gate at least partly formed in a trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/037—Manufacture or treatment of data-storage electrodes comprising charge-trapping insulators

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2008523995A 2005-07-25 2006-07-21 溝に横方向第１ゲート及び縦方向第２ゲートを含むスプリットゲート記憶装置 Expired - Fee Related JP5180827B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/188,603 2005-07-25
US11/188,603 US7211858B2 (en) 2005-07-25 2005-07-25 Split gate storage device including a horizontal first gate and a vertical second gate in a trench
PCT/US2006/028372 WO2007014038A2 (en) 2005-07-25 2006-07-21 Split gate storage device including a horizontal first gate and a vertical second gate in a trench

Publications (3)

Publication Number Publication Date
JP2009503856A JP2009503856A (ja) 2009-01-29
JP2009503856A5 JP2009503856A5 (enExample) 2009-09-10
JP5180827B2 true JP5180827B2 (ja) 2013-04-10

Family

ID=37678262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008523995A Expired - Fee Related JP5180827B2 (ja) 2005-07-25 2006-07-21 溝に横方向第１ゲート及び縦方向第２ゲートを含むスプリットゲート記憶装置

Country Status (4)

Country Link
US (1) US7211858B2 (enExample)
JP (1) JP5180827B2 (enExample)
TW (1) TWI409854B (enExample)
WO (1) WO2007014038A2 (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7394686B2 (en) * 2005-07-25 2008-07-01 Freescale Semiconductor, Inc. Programmable structure including discontinuous storage elements and spacer control gates in a trench
US7314798B2 (en) * 2005-07-25 2008-01-01 Freescale Semiconductor, Inc. Method of fabricating a nonvolatile storage array with continuous control gate employing hot carrier injection programming
US7262997B2 (en) * 2005-07-25 2007-08-28 Freescale Semiconductor, Inc. Process for operating an electronic device including a memory array and conductive lines
US20070057318A1 (en) * 2005-09-15 2007-03-15 Lars Bach Semiconductor memory device and method of production
KR100654560B1 (ko) * 2005-12-27 2006-12-05 동부일렉트로닉스 주식회사 플래시 메모리 소자 및 그 제조 방법
US9159568B2 (en) * 2006-02-04 2015-10-13 Cypress Semiconductor Corporation Method for fabricating memory cells having split charge storage nodes
US7811935B2 (en) * 2006-03-07 2010-10-12 Micron Technology, Inc. Isolation regions and their formation
US7592224B2 (en) 2006-03-30 2009-09-22 Freescale Semiconductor, Inc Method of fabricating a storage device including decontinuous storage elements within and between trenches
US7767567B2 (en) * 2006-09-29 2010-08-03 Qimonda Ag Method of forming a semiconductor memory device and semiconductor memory device
US7651916B2 (en) 2007-01-24 2010-01-26 Freescale Semiconductor, Inc Electronic device including trenches and discontinuous storage elements and processes of forming and using the same
JP5030656B2 (ja) * 2007-04-25 2012-09-19 シャープ株式会社 半導体記憶装置の製造方法
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
WO2009122582A1 (ja) * 2008-04-03 2009-10-08 株式会社 東芝 不揮発性記憶装置及びその製造方法
US8409952B2 (en) * 2008-04-14 2013-04-02 Spansion Llc Method of forming an electronic device including forming a charge storage element in a trench of a workpiece
US7692972B1 (en) 2008-07-22 2010-04-06 Actel Corporation Split gate memory cell for programmable circuit device
US20100304556A1 (en) * 2009-05-26 2010-12-02 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system with vertical control gate and method of manufacture thereof
CN102087964B (zh) * 2009-12-04 2012-08-22 中芯国际集成电路制造(上海)有限公司 Sonos结构及其形成方法
US7985649B1 (en) * 2010-01-07 2011-07-26 Freescale Semiconductor, Inc. Method of making a semiconductor structure useful in making a split gate non-volatile memory cell
KR20120089513A (ko) 2010-12-13 2012-08-13 삼성전자주식회사 비휘발성 기억 소자 및 그 제조 방법
US8951864B2 (en) * 2012-02-13 2015-02-10 Taiwan Semiconductor Manufacturing Company, Ltd. Split-gate device and method of fabricating the same
US8951892B2 (en) 2012-06-29 2015-02-10 Freescale Semiconductor, Inc. Applications for nanopillar structures
US8945997B2 (en) * 2013-06-27 2015-02-03 Globalfoundries Singapore Pte. Ltd. Integrated circuits having improved split-gate nonvolatile memory devices and methods for fabrication of same
JP2016040820A (ja) * 2013-09-20 2016-03-24 サンケン電気株式会社 半導体装置
US9343468B1 (en) * 2015-03-26 2016-05-17 Texas Instruments Incorporated Feed-forward bidirectional implanted split-gate flash memory cell
US10608094B2 (en) * 2018-01-23 2020-03-31 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method of forming the same
US11081566B2 (en) * 2019-03-15 2021-08-03 International Business Machines Corporation Self-aligned contacts for vertical field effect transistors
US10991806B2 (en) * 2019-05-09 2021-04-27 United Microelectronics Corp. Two-transistor memory device and method for fabricating memory device

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5705415A (en) 1994-10-04 1998-01-06 Motorola, Inc. Process for forming an electrically programmable read-only memory cell
TW326553B (en) 1996-01-22 1998-02-11 Handotai Energy Kenkyusho Kk Semiconductor device and method of fabricating same
JPH10112511A (ja) * 1996-10-07 1998-04-28 Ricoh Co Ltd 半導体不揮発性メモリ及びその製造方法
US5969383A (en) 1997-06-16 1999-10-19 Motorola, Inc. Split-gate memory device and method for accessing the same
US6087222A (en) 1998-03-05 2000-07-11 Taiwan Semiconductor Manufacturing Company Method of manufacture of vertical split gate flash memory device
US6255166B1 (en) 1999-08-05 2001-07-03 Aalo Lsi Design & Device Technology, Inc. Nonvolatile memory cell, method of programming the same and nonvolatile memory array
US6172905B1 (en) 2000-02-01 2001-01-09 Motorola, Inc. Method of operating a semiconductor device
US6307782B1 (en) 2000-04-03 2001-10-23 Motorola, Inc. Process for operating a semiconductor device
JP4834897B2 (ja) * 2000-05-02 2011-12-14 ソニー株式会社 不揮発性半導体記憶装置およびその動作方法
KR100821456B1 (ko) * 2000-08-14 2008-04-11 샌디스크 쓰리디 엘엘씨 밀집한 어레이 및 전하 저장 장치와, 그 제조 방법
TW546778B (en) * 2001-04-20 2003-08-11 Koninkl Philips Electronics Nv Two-transistor flash cell
US6936887B2 (en) 2001-05-18 2005-08-30 Sandisk Corporation Non-volatile memory cells utilizing substrate trenches
JP4665368B2 (ja) * 2001-09-20 2011-04-06 ソニー株式会社 不揮発性半導体メモリ装置、その動作方法および半導体装置の製造方法
KR100400079B1 (ko) 2001-10-10 2003-09-29 한국전자통신연구원 트랜치 게이트 구조를 갖는 전력용 반도체 소자의 제조 방법
US6818512B1 (en) 2002-01-04 2004-11-16 Taiwan Semiconductor Manufacturing Company Split-gate flash with source/drain multi-sharing
TW569435B (en) 2002-12-17 2004-01-01 Nanya Technology Corp A stacked gate flash memory and the method of fabricating the same
US6894339B2 (en) * 2003-01-02 2005-05-17 Actrans System Inc. Flash memory with trench select gate and fabrication process
US6706599B1 (en) 2003-03-20 2004-03-16 Motorola, Inc. Multi-bit non-volatile memory device and method therefor
US6958513B2 (en) 2003-06-06 2005-10-25 Chih-Hsin Wang Floating-gate memory cell having trench structure with ballistic-charge injector, and the array of memory cells
US6861315B1 (en) 2003-08-14 2005-03-01 Silicon Storage Technology, Inc. Method of manufacturing an array of bi-directional nonvolatile memory cells
US7202523B2 (en) 2003-11-17 2007-04-10 Micron Technology, Inc. NROM flash memory devices on ultrathin silicon
US7050330B2 (en) 2003-12-16 2006-05-23 Micron Technology, Inc. Multi-state NROM device
TWI227547B (en) * 2004-02-18 2005-02-01 Powerchip Semiconductor Corp Method of fabricating a flash memory cell
US7015537B2 (en) * 2004-04-12 2006-03-21 Silicon Storage Technology, Inc. Isolation-less, contact-less array of nonvolatile memory cells each having a floating gate for storage of charges, and methods of manufacturing, and operating therefor
US7196935B2 (en) 2004-05-18 2007-03-27 Micron Technolnology, Inc. Ballistic injection NROM flash memory
US7112490B1 (en) 2005-07-25 2006-09-26 Freescale Semiconductor, Inc. Hot carrier injection programmable structure including discontinuous storage elements and spacer control gates in a trench

Also Published As

Publication number Publication date
JP2009503856A (ja) 2009-01-29
TW200707547A (en) 2007-02-16
WO2007014038A2 (en) 2007-02-01
WO2007014038A3 (en) 2007-05-10
US7211858B2 (en) 2007-05-01
TWI409854B (zh) 2013-09-21
US20070018207A1 (en) 2007-01-25

Similar Documents

Publication Publication Date Title
JP5180827B2 (ja) 溝に横方向第１ゲート及び縦方向第２ゲートを含むスプリットゲート記憶装置
US10490570B2 (en) Method of fabricating vertical memory devices having a plurality of vertical channels on a channel layer
US6958273B2 (en) Self-aligned method of forming a semiconductor memory array of floating gate memory cells with buried floating gate, pointed floating gate and pointed channel region, and a memory array made thereby
US9768186B2 (en) Three dimensional memory device having well contact pillar and method of making thereof
US6756633B2 (en) Semiconductor memory array of floating gate memory cells with horizontally oriented floating gate edges
CN105122455B (zh) 具有自对准的浮栅和擦除栅的非易失性存储器单元及其制造方法
US8148768B2 (en) Non-volatile memory cell with self aligned floating and erase gates, and method of making same
US7851846B2 (en) Non-volatile memory cell with buried select gate, and method of making same
CN101174652B (zh) 自对准方法及用该方法制造的存储器阵列
US6873006B2 (en) Semiconductor memory array of floating gate memory cells with burried floating gate and pointed channel region
CN101140950A (zh) 晶体管、存储单元阵列以及制造晶体管的方法
US20150179749A1 (en) Non-volatile Memory Cell With Self Aligned Floating And Erase Gates, And Method Of Making Same
US7250340B2 (en) Method of fabricating programmable structure including discontinuous storage elements and spacer control gates in a trench
JP2011029576A (ja) 不揮発性半導体記憶装置及びその製造方法
JP4093965B2 (ja) メモリセルを製作する方法
US20060043459A1 (en) Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same
US7394686B2 (en) Programmable structure including discontinuous storage elements and spacer control gates in a trench
KR101731199B1 (ko) 트렌치 내에 트래핑 전하 층을 갖는 비휘발성 메모리 셀 및 어레이와, 그들의 제조 방법
US20240008283A1 (en) Nor-type memory device, method of manufacturing nor-type memory device, and electronic apparatus including memory device

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090721

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090721

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120622

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120703

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20121002

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20121010

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121029

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121218

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130111

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees