JP5171489B2 - 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板 - Google Patents

異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板 Download PDF

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Publication number
JP5171489B2
JP5171489B2 JP2008226542A JP2008226542A JP5171489B2 JP 5171489 B2 JP5171489 B2 JP 5171489B2 JP 2008226542 A JP2008226542 A JP 2008226542A JP 2008226542 A JP2008226542 A JP 2008226542A JP 5171489 B2 JP5171489 B2 JP 5171489B2
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Japan
Prior art keywords
etching mask
silicon substrate
correction
etching
long side
Prior art date
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Expired - Fee Related
Application number
JP2008226542A
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English (en)
Japanese (ja)
Other versions
JP2010062336A5 (enExample
JP2010062336A (ja
Inventor
俊之 小川
貴久 加藤
和敏 虎島
貴弘 秋山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2008226542A priority Critical patent/JP5171489B2/ja
Priority to US12/553,015 priority patent/US8343368B2/en
Publication of JP2010062336A publication Critical patent/JP2010062336A/ja
Publication of JP2010062336A5 publication Critical patent/JP2010062336A5/ja
Application granted granted Critical
Publication of JP5171489B2 publication Critical patent/JP5171489B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00388—Etch mask forming
    • B81C1/00396—Mask characterised by its composition, e.g. multilayer masks
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00388—Etch mask forming
    • B81C1/0042—Compensation masks in orientation dependent etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00555—Achieving a desired geometry, i.e. controlling etch rates, anisotropy or selectivity
    • B81C1/00626—Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/04—Optical MEMS
    • B81B2201/047—Optical MEMS not provided for in B81B2201/042 - B81B2201/045
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00—Basic microelectromechanical structures
    • B81B2203/01—Suspended structures, i.e. structures allowing a movement
    • B81B2203/0118—Cantilevers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Mechanical Light Control Or Optical Switches (AREA)
  • Micromachines (AREA)
  • Mechanical Optical Scanning Systems (AREA)
  • Weting (AREA)
JP2008226542A 2008-09-04 2008-09-04 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板 Expired - Fee Related JP5171489B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008226542A JP5171489B2 (ja) 2008-09-04 2008-09-04 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板
US12/553,015 US8343368B2 (en) 2008-09-04 2009-09-02 Method of fabricating a structure by anisotropic etching, and silicon substrate with an etching mask

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008226542A JP5171489B2 (ja) 2008-09-04 2008-09-04 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板

Publications (3)

Publication Number Publication Date
JP2010062336A JP2010062336A (ja) 2010-03-18
JP2010062336A5 JP2010062336A5 (enExample) 2011-10-20
JP5171489B2 true JP5171489B2 (ja) 2013-03-27

Family

ID=41725049

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008226542A Expired - Fee Related JP5171489B2 (ja) 2008-09-04 2008-09-04 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板

Country Status (2)

Country Link
US (1) US8343368B2 (enExample)
JP (1) JP5171489B2 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4908614B2 (ja) * 2009-06-12 2012-04-04 日本電波工業株式会社 水晶振動子の製造方法
CN105540527A (zh) * 2015-12-10 2016-05-04 西安交通大学 微压电加速度传感器芯片及其制作方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3765969A (en) * 1970-07-13 1973-10-16 Bell Telephone Labor Inc Precision etching of semiconductors
JPH06163511A (ja) 1992-11-19 1994-06-10 Toyota Motor Corp エッチングマスクパターンとこのエッチングマスクパターンを用いた微細装置の製造方法
JP2661513B2 (ja) 1993-08-13 1997-10-08 日本電気株式会社 半導体加速度センサの製造方法及びフォトマスク
JPH0778800A (ja) * 1993-09-07 1995-03-20 Fujitsu Ltd 微細加工方法および加速度計とその製造方法
JPH0845897A (ja) * 1994-07-29 1996-02-16 Japan Aviation Electron Ind Ltd 異方性エッチングにおけるアンダーエッチング補正方法
JP3489309B2 (ja) * 1995-12-27 2004-01-19 株式会社デンソー 半導体力学量センサの製造方法および異方性エッチングマスク
US6831765B2 (en) * 2001-02-22 2004-12-14 Canon Kabushiki Kaisha Tiltable-body apparatus, and method of fabricating the same
JP2002321196A (ja) * 2001-02-22 2002-11-05 Canon Inc マイクロ構造体、マイクロ力学量センサ、マイクロアクチュエータ、マイクロ光偏向器、光走査型ディスプレイ、及びそれらの製造方法
US6986609B2 (en) * 2001-05-08 2006-01-17 Samsung Electronics Co., Ltd. Optical module and method for manufacturing the same
KR100612838B1 (ko) * 2004-02-07 2006-08-18 삼성전자주식회사 광학벤치, 이를 사용한 박형광픽업 및 그 제조방법
JP5147366B2 (ja) * 2007-11-16 2013-02-20 キヤノン株式会社 異方性エッチングによる構造体の作製方法、及びエッチングマスク付きシリコン基板

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Publication number Publication date
US8343368B2 (en) 2013-01-01
JP2010062336A (ja) 2010-03-18
US20100053716A1 (en) 2010-03-04

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