JP5147353B2 - 正孔移動度を向上させる方法 - Google Patents
正孔移動度を向上させる方法 Download PDFInfo
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- JP5147353B2 JP5147353B2 JP2007270238A JP2007270238A JP5147353B2 JP 5147353 B2 JP5147353 B2 JP 5147353B2 JP 2007270238 A JP2007270238 A JP 2007270238A JP 2007270238 A JP2007270238 A JP 2007270238A JP 5147353 B2 JP5147353 B2 JP 5147353B2
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- 238000000034 method Methods 0.000 title claims description 27
- 229910052710 silicon Inorganic materials 0.000 claims description 192
- 239000010703 silicon Substances 0.000 claims description 192
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 191
- 229910052732 germanium Inorganic materials 0.000 claims description 76
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 76
- 125000006850 spacer group Chemical group 0.000 claims description 40
- 239000013078 crystal Substances 0.000 claims description 25
- 230000005669 field effect Effects 0.000 claims description 25
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 16
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 16
- 238000002955 isolation Methods 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000000758 substrate Substances 0.000 description 16
- 238000010586 diagram Methods 0.000 description 10
- 230000008901 benefit Effects 0.000 description 8
- 150000004767 nitrides Chemical class 0.000 description 6
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Description
210:第1のシリコン層
212:第1のシリコン層の露出エリア
220:酸化物層
222:酸化物層の側壁
230:第2のシリコン層
232:第2のシリコン層の側壁
240:スペーサ
250:傾斜ゲルマニウム層
260:第3のシリコン層
270:nFET
280:pFET
610:パッド酸化物層
620:パッド窒化物層
630:ギャップ
R:レジスト
Claims (12)
- 第1のシリコン層の上の酸化物層と、
前記酸化物層の上の第2のシリコン層であって、前記酸化物層は前記第1のシリコン層と前記第2のシリコン層との間に存在する、第2のシリコン層と、
前記第1のシリコン層の上のスペーサであって、前記スペーサは前記酸化物層、前記第1のシリコン層、及び前記第2のシリコン層に接する、スペーサと、
前記第1のシリコン層の上の傾斜シリコン・ゲルマニウム層であって、前記傾斜シリコン・ゲルマニウム層は前記スペーサ及び前記第1のシリコン層に接し、前記傾斜シリコン・ゲルマニウム層の下部は前記傾斜シリコン・ゲルマニウム層の上部より高濃度のゲルマニウムを含む、傾斜シリコン・ゲルマニウム層と、
前記傾斜シリコン・ゲルマニウム層の上の第3のシリコン層と、
前記第2のシリコン層の上のn型電界効果トランジスタと、
前記第3のシリコン層の上のp型電界効果トランジスタと、
を含み、
前記酸化物層は、前記n型電界効果トランジスタの下のみに存在し、前記p型電界効果トランジスタの下には存在せず、
前記第3のシリコン層は歪み疑似格子整合シリコンである、
半導体デバイス。 - 前記傾斜シリコン・ゲルマニウム層の上面にはゲルマニウムが存在しない、請求項1に記載の半導体デバイス。
- 前記第1のシリコン層及び前記第2のシリコン層は同一の結晶配向を含む、請求項1に記載の半導体デバイス。
- 前記スペーサは、スペーサ、浅いトレンチ分離領域、及びフィールド酸化物領域のうちの1つを含む、請求項1に記載の半導体デバイス。
- 前記n型電界効果トランジスタ及び前記p型電界効果トランジスタは同一平面上に存在する、請求項1に記載の半導体デバイス。
- 前記第3のシリコン層は、転位の形成によって層内の応力が解放される上限である特定の臨界厚さより薄い、請求項1〜5のいずれか一項に記載の半導体デバイス。
- 第1のシリコン層の上に酸化物層を形成するステップと、
前記酸化物層が前記第1のシリコン層と第2のシリコン層との間に存在するように、前記酸化物層の上に前記第2のシリコン層を形成するステップと、
前記第2のシリコン層の一部と前記酸化物層の一部とを、前記第1のシリコン層の露出エリアを残すように除去するステップと、
前記第1のシリコン層の前記露出エリアの上に、前記酸化物層、前記第1のシリコン層、及び前記第2のシリコン層に接するようにスペーサを形成するステップと、
前記第1のシリコン層の前記露出エリアの上に傾斜シリコン・ゲルマニウム層を形成するステップであって、前記スペーサ及び前記第1のシリコン層に接し、前記傾斜シリコン・ゲルマニウム層の下部が前記傾斜シリコン・ゲルマニウム層の上部より高濃度のゲルマニウムを含むように、前記傾斜シリコン・ゲルマニウム層を形成するステップと、
前記傾斜シリコン・ゲルマニウム層の上に歪み疑似格子整合シリコンを含む第3のシリコン層を形成するステップと、
前記第2のシリコン層の上にn型電界効果トランジスタを形成するステップと、
前記第3のシリコン層の上にp型電界効果トランジスタを形成するステップと、
を含み、
前記酸化物層は、前記n型電界効果トランジスタの下のみに存在し、前記p型電界効果トランジスタの下には存在しない、
方法。 - 前記傾斜シリコン・ゲルマニウム層を形成する前記ステップは、前記傾斜シリコン・ゲルマニウム層の上面にゲルマニウムが存在しないように前記傾斜シリコン・ゲルマニウム層を形成するステップを含む、請求項7に記載の方法。
- 前記第2のシリコン層を形成する前記ステップは、前記第2のシリコン層と前記第1のシリコン層とが同一の結晶配向を含むように前記第2のシリコン層を形成するステップを含む、請求項7に記載の方法。
- 前記スペーサを形成する前記ステップは、スペーサ、浅いトレンチ分離領域、及びフィールド酸化物領域のうちの1つを含むように前記スペーサを形成するステップを含む、請求項7に記載の方法。
- 前記n型電界効果トランジスタ及び前記p型電界効果トランジスタを形成する前記ステップは、前記n型電界効果トランジスタと前記p型電界効果トランジスタとが同一平面上に存在するように前記n型電界効果トランジスタと前記p型電界効果トランジスタとを形成するステップを含む、請求項7に記載の方法。
- 前記第3のシリコン層は、転位の形成によって層内の応力が解放される上限である特定の臨界厚さより薄い、請求項7〜11のいずれか一項に記載の方法。
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US11/561496 | 2006-11-20 | ||
US11/561,496 US7863653B2 (en) | 2006-11-20 | 2006-11-20 | Method of enhancing hole mobility |
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JP2008131033A JP2008131033A (ja) | 2008-06-05 |
JP5147353B2 true JP5147353B2 (ja) | 2013-02-20 |
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JP2007270238A Expired - Fee Related JP5147353B2 (ja) | 2006-11-20 | 2007-10-17 | 正孔移動度を向上させる方法 |
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US (1) | US7863653B2 (ja) |
JP (1) | JP5147353B2 (ja) |
CN (1) | CN101188241A (ja) |
Families Citing this family (1)
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CN102664166B (zh) * | 2012-05-31 | 2013-11-27 | 中国科学院上海微系统与信息技术研究所 | 一种cmos器件及其制作方法 |
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JPS61112364A (ja) * | 1984-11-07 | 1986-05-30 | Hitachi Ltd | 半導体装置 |
KR100429869B1 (ko) | 2000-01-07 | 2004-05-03 | 삼성전자주식회사 | 매몰 실리콘 저머늄층을 갖는 cmos 집적회로 소자 및기판과 그의 제조방법 |
US6633066B1 (en) * | 2000-01-07 | 2003-10-14 | Samsung Electronics Co., Ltd. | CMOS integrated circuit devices and substrates having unstrained silicon active layers |
JP3714230B2 (ja) * | 2001-10-29 | 2005-11-09 | 株式会社Sumco | 半導体基板及び電界効果型トランジスタ並びにこれらの製造方法 |
US7662689B2 (en) * | 2003-12-23 | 2010-02-16 | Intel Corporation | Strained transistor integration for CMOS |
US6995456B2 (en) | 2004-03-12 | 2006-02-07 | International Business Machines Corporation | High-performance CMOS SOI devices on hybrid crystal-oriented substrates |
US6998684B2 (en) * | 2004-03-31 | 2006-02-14 | International Business Machines Corporation | High mobility plane CMOS SOI |
US20050275018A1 (en) * | 2004-06-10 | 2005-12-15 | Suresh Venkatesan | Semiconductor device with multiple semiconductor layers |
JP4604637B2 (ja) * | 2004-10-07 | 2011-01-05 | ソニー株式会社 | 半導体装置および半導体装置の製造方法 |
US7176481B2 (en) * | 2005-01-12 | 2007-02-13 | International Business Machines Corporation | In situ doped embedded sige extension and source/drain for enhanced PFET performance |
US20060175659A1 (en) * | 2005-02-07 | 2006-08-10 | International Business Machines Corporation | A cmos structure for body ties in ultra-thin soi (utsoi) substrates |
US7268377B2 (en) * | 2005-02-25 | 2007-09-11 | International Business Machines Corporation | Structure and method of fabricating a hybrid substrate for high-performance hybrid-orientation silicon-on-insulator CMOS devices |
-
2006
- 2006-11-20 US US11/561,496 patent/US7863653B2/en not_active Expired - Fee Related
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2007
- 2007-10-17 JP JP2007270238A patent/JP5147353B2/ja not_active Expired - Fee Related
- 2007-10-25 CN CNA200710167468XA patent/CN101188241A/zh active Pending
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US7863653B2 (en) | 2011-01-04 |
US20080116484A1 (en) | 2008-05-22 |
CN101188241A (zh) | 2008-05-28 |
JP2008131033A (ja) | 2008-06-05 |
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