JP5116977B2 - Semiconductor element - Google Patents

Description

  The present invention relates to a semiconductor device having a multilayer structure in which a plurality of layers formed of a nitride compound semiconductor are stacked on a substrate.

  A semiconductor element formed using a nitride-based compound semiconductor is a promising electronic element as a high-voltage element and a high-speed element because of the inherent characteristics of compound semiconductor materials such as direct transition. In particular, a field effect transistor (FET) formed using a GaN-based compound semiconductor has been attracting attention as a solid-state device having high withstand voltage characteristics and operating even in a high temperature environment close to 400 ° C. In an FET (GaN-based FET) formed using such a GaN-based compound semiconductor, a semiconductor operation layer that is a layer responsible for semiconductor operation is appropriately laminated with a layer made of a GaN-based compound semiconductor such as GaN, AlGaN, or AlInGaN. Formed. In addition, since it is difficult for a GaN-based compound semiconductor to produce a large-diameter single crystal substrate such as Si or GaAs, a GaN-based FET is generally fabricated using a substrate such as sapphire or Si.

  That is, when producing a GaN-based FET, a buffer layer made of GaN is formed on a substrate such as sapphire or Si, and a semiconductor operation layer made of a GaN-based compound semiconductor is formed on the buffer layer. A source electrode, a gate electrode, and a drain electrode are formed on the surface. In this case, the semiconductor operation layer is a layer responsible for the semiconductor operation of the GaN-based FET, and is formed, for example, by sequentially laminating an electron transit layer made of undoped GaN, an electron supply layer made of undoped AlGaN, and a contact layer. The

  In addition, since the buffer layer made of GaN has a large difference in lattice constant between sapphire or Si and GaN, it is difficult to epitaxially grow on a sapphire or Si substrate at a high temperature. Accordingly, a first GaN layer or an AlN layer is first formed on a substrate such as sapphire or Si at a relatively low substrate temperature of about 500 to 600 ° C., and then a high temperature is formed on the first GaN layer. Then, the second GaN layer is formed. In this manner, a buffer layer made of the first and second GaN layers, that is, a buffer layer made of GaN, can be epitaxially grown on a substrate such as sapphire or Si.

  As a kind of GaN-based FET manufactured in this way, a two-dimensional electron gas layer is formed at the stacked interface between the electron transit layer and the electron supply layer of the semiconductor operation layer by the piezoelectric effect, and the high electrons of the two-dimensional electron gas layer are formed. A high electron mobility transistor (HEMT) using mobility has been developed (see Patent Document 1).

  On the other hand, in such a GaN-based FET, first and second layers having different compositions are alternately stacked between a substrate made of sapphire or Si and a semiconductor operation layer made of a GaN-based compound semiconductor. Some have reduced the stress generated by the difference in lattice constant between the substrate and the semiconductor operation layer by interposing a buffer layer having a multilayer structure formed in this way (see Patent Document 2).

  The multi-layered buffer layer is formed by alternately laminating, for example, first layers made of GaN and second layers made of AlN, and at the laminated interface between the first layer and the second layer, A surface having a distortion due to the difference between the lattice constants of the two is formed. In such a multi-layered buffer layer, the surface with this distortion is formed in multiple layers, so the propagation direction of threading dislocations generated from the substrate side can be bent, and the propagation of threading dislocations in the epitaxial growth direction is suppressed. can do. As a result, this multilayer buffer layer can suppress the propagation of threading dislocations from the electron transit layer formed in the upper layer to the two-dimensional electron gas layer. When threading dislocations propagate to the two-dimensional electron gas layer formed in the electron transit layer, a situation occurs in which the concentration and mobility of the two-dimensional electron gas in the two-dimensional electron gas layer are lowered.

JP-A-2005-85852 JP 2003-59948 A

  However, in the above-described conventional semiconductor element, it occurs at the crystal interface of the nitride-based compound semiconductor layer forming the multilayer structure (for example, the first layer and the second layer forming the buffer layer having the multilayer structure described above). Due to distortion, the crystallinity of the nitride-based compound semiconductor layer is often deteriorated, and there is a problem that it is difficult to form a multi-layered nitride-based compound semiconductor layer having good crystallinity. For example, the buffer layer having the multilayer structure described above has a strain at the crystal interface between the first layer made of GaN and the second layer made of AlN, that is, a difference in lattice constant at the crystal interface between GaN and AlN (2.5 %), It is difficult to alternately form multiple layers of the first layer or the second layer with good crystallinity.

  The present invention has been made in view of the above circumstances, and a plurality of nitride-based compound semiconductor layers having a difference in lattice constant of a predetermined value or more can be formed in a multi-layer with good crystallinity, and the epitaxial growth direction An object of the present invention is to provide a semiconductor device capable of suppressing the propagation of threading dislocations.

In order to solve the above-described problems and achieve the object, a semiconductor element according to the present invention has a first layer formed of a nitride-based compound semiconductor and a lattice constant difference with respect to the first layer of 0.7. % Of the second layer formed of the nitride-based compound semiconductor, and the lattice constant at the junction interface of the first layer, which is interposed in the stacked interface of the first layer and the second layer. An intermediate layer in which both the difference and the lattice constant difference at the bonding interface of the second layer and the lattice constant difference at a minute portion in the region sandwiched between the bonding interfaces at both ends are 0.7% or less; It is provided with.

Further, in the semiconductor element according to the present invention , in the above invention, the intermediate layer changes in composition with respect to the layer thickness direction while maintaining a lattice constant difference of 0.7% or less in a minute portion in the region. It is characterized by making it.

Further, the semiconductor element according to the present invention is interposed between the compound semiconductor layer formed of the nitride-based compound semiconductor and a plurality of compound semiconductor layers formed in multiple layers, and each of the compound semiconductor layers at both ends. The lattice constant difference at the bonding interface is 0.7% or less, and the lattice constant difference at a minute portion in the region sandwiched between the bonding interfaces at both ends is maintained at 0.7% or less. An intermediate layer having a minute portion in which a composition is changed in the thickness direction and a lattice constant difference with respect to the nitride compound semiconductor is 0.7% or more in the region is provided.

Further, in the semiconductor element according to the present invention , in the above invention, the composition of the intermediate layer continuously changes in the layer thickness direction, and corresponds to the gradient of the composition change in a minute portion in the region. The amount of change in the lattice constant difference is −0.7% / nm or more and 0.7% / nm or less.

In the semiconductor device according to the present invention , the first layer and the second layer are plural and alternately formed, and the intermediate layer is alternately formed in the first invention. It is characterized by interposing at each laminated interface between the first layer and the second layer.

In the semiconductor device according to the present invention , the thickness from the lower end of the first layer to the lower end of the next first layer among the plurality of first layers is 6 nm or more and 3000 nm. It is characterized by the following.

In the semiconductor device according to the present invention as set forth in the invention described above, the composite layer including the first layer, the second layer, and the intermediate layer forms a buffer layer.

The semiconductor element according to the present invention is characterized in that, in the above invention, the compound semiconductor layer and the intermediate layer are plural and formed alternately.

In the semiconductor device according to the present invention , in the above invention, the layer thickness from the lower end of the compound semiconductor layer to the lower end of the next compound semiconductor layer among the plurality of compound semiconductor layers is 6 nm or more and 3000 nm or less. It is characterized by that.

In the semiconductor device according to the present invention as set forth in the invention described above, the composite layer including the compound semiconductor layer and the intermediate layer forms a buffer layer.

In the semiconductor device according to the present invention as set forth in the invention described above, the nitride compound semiconductor is mainly composed of Al _x Ga _(1-x) N (0 ≦ x ≦ 1).

  According to the present invention, a plurality of nitride compound semiconductor layers having a lattice constant difference of 0.7% or more can be formed in a multilayer state with good crystallinity, and the propagation of threading dislocations in the epitaxial growth direction can be suppressed. There is an effect that a semiconductor element can be realized.

  Preferred embodiments of a semiconductor device according to the present invention will be described below in detail with reference to the accompanying drawings. The present invention is not limited to the embodiments. In the description of the drawings, the same parts are denoted by the same reference numerals.

(Embodiment 1)
FIG. 1 is a schematic cross-sectional view showing a configuration example of a semiconductor element according to Embodiment 1 of the present invention. As shown in FIG. 1, the semiconductor element 100 includes an AlN intervening layer 2 made of AlN, an intermediate layer 3, and a buffer layer 4 formed of a nitride compound semiconductor on a substrate 1 such as silicon (Si). And a semiconductor operation layer 5 responsible for semiconductor operation are sequentially stacked. The semiconductor element 100 has a plurality of electrodes such as a source electrode 6, a gate electrode 7, and a drain electrode 8 on the semiconductor operation layer 5.

  The AlN intervening layer 2 is formed of AlN having a lattice constant between Si and GaN, and is interposed between the substrate 1 and the buffer layer 4. Such an AlN intervening layer 2 relaxes the lattice constant difference between the substrate 1 and a nitride compound semiconductor layer such as GaN, and allows the buffer layer 4 and the semiconductor operation layer 5 to be stacked on the substrate 1.

  The intermediate layer 3 is interposed at the stacking interface between the AlN intervening layer 2 and the lower end of the buffer layer 4 where the lattice constant difference is 0.7% or more, and the lower end of the buffer layer 4 (for example, GaN) on the AlN intervening layer 2. A nitride-based compound semiconductor layer) can be stacked with good crystallinity, and the lattice constant difference between the AlN intervening layer 2 and the lower end of the buffer layer 4 is reduced. Specifically, the intermediate layer 3 is a kind of nitride-based compound semiconductor layer, and a nitride-based compound semiconductor (AlN) that forms the AlN intervening layer 2 and a nitride-based compound that forms the lower end of the buffer layer 4. It is formed of a nitride compound semiconductor (for example, AlGaN) having a composition with a semiconductor (for example, GaN). In such an intermediate layer 3, both the lattice constant difference at the bonding interface of the AlN intervening layer 2 and the lattice constant difference at the bonding interface of the buffer layer 4 are 0.7% or less. Further, the intermediate layer 3 has an epitaxial growth direction (that is, a layer thickness) while maintaining a lattice constant difference at an arbitrary minute portion (for example, a crystal interface) within a layer region sandwiched between the junction interfaces at both ends while maintaining a lattice constant difference of 0.7% or less. The composition is continuously changed with respect to (direction). That is, the lattice constant difference at the crystal interface formed in the layer region of the intermediate layer 3 with such a composition change is 0.7% or less. Such a composition of the intermediate layer 3 is, for example, close to AlN in the vicinity of the bonding interface of the AlN intervening layer 2, close to GaN in the vicinity of the bonding interface of the buffer layer 4, and from AlN to GaN in the layer region. It gradually changes in the layer thickness direction so as to approach.

The buffer layer 4 relaxes the lattice constant difference between the substrate 1 and the semiconductor operation layer 5 made of a nitride compound semiconductor, and suppresses the propagation of threading dislocations to the semiconductor operation layer 5. Specifically, the buffer layer 4 is realized by using a nitride-based compound semiconductor whose main component is Al _x Ga _(1-x) N (0 ≦ x ≦ 1), and has a lattice constant difference of 0.7%. It has a multilayer structure in which a plurality of layers as described above are alternately formed. More specifically, the buffer layer 4 has a multilayer structure in which the intermediate layer 12 is interposed at the interface between the compound semiconductor layer 11 and the compound semiconductor layer 13 where the difference in lattice constant is 0.7% or more. Furthermore, the buffer layer 4 has an intermediate layer 14 on the upper part of the compound semiconductor layer 13 (that is, the interface between the compound semiconductor layer 13 and the semiconductor operation layer 5).

  The compound semiconductor layer 11 is a layer made of, for example, undoped GaN, and is formed on the AlN intervening layer 2 via the intermediate layer 3 described above. In this case, since the intermediate layer 3 is interposed at the stacked interface between the AlN intervening layer 2 and the compound semiconductor layer 11, the compound semiconductor layer 11 is placed on the AlN intervening layer 2 in a state of good crystallinity (for example, a substantially flat state). It is formed. On the other hand, the compound semiconductor layer 13 is a nitride compound semiconductor having a lattice constant difference of 0.7% or more with respect to the compound semiconductor layer 11, for example, a layer made of undoped AlN, and the compound semiconductor is interposed through the intermediate layer 12. Formed on layer 11. In this case, since the intermediate layer 12 is present at the interface between the compound semiconductor layers 11 and 13, the compound semiconductor layer 13 is formed on the compound semiconductor layer 11 with good crystallinity (for example, a substantially flat state).

  The intermediate layer 12 is interposed at the stack interface between the compound semiconductor layers 11 and 13 having a lattice constant difference of 0.7% or more, and allows the compound semiconductor layer 13 to be stacked on the compound semiconductor layer 11 in a state with good crystallinity. At the same time, the lattice constant difference between the compound semiconductor layers 11 and 13 is relaxed. Specifically, the intermediate layer 12 is a kind of nitride compound semiconductor layer, and a nitride compound semiconductor (for example, GaN) that forms the compound semiconductor layer 11 and a nitride compound semiconductor that forms the compound semiconductor layer 13. It is formed of a nitride compound semiconductor (for example, AlGaN) having a composition between (for example, AlN). Such an intermediate layer 12 has a lattice constant difference of 0.7% or less at each junction interface between the compound semiconductor layers 11 and 13 at both ends. In addition, the intermediate layer 12 maintains a lattice constant difference at an arbitrary minute portion (for example, a crystal interface) in the layer region sandwiched between the bonding interfaces at both ends with respect to the layer thickness direction while maintaining 0.7% or less. The composition is continuously changed. That is, the lattice constant difference at the crystal interface formed in the layer region of the intermediate layer 12 with such a composition change is 0.7% or less. Such a composition of the intermediate layer 12 is, for example, close to GaN in the vicinity of the bonding interface of the compound semiconductor layer 11, close to AlN in the vicinity of the bonding interface of the compound semiconductor layer 13, and from GaN in the layer region. It gradually changes in the layer thickness direction so as to approach AlN.

  The intermediate layer 14 is interposed at the stacking interface between the compound semiconductor layer 13 having a lattice constant difference of 0.7% or more and the lower end portion of the semiconductor operation layer 5, and the lower end portion of the semiconductor operation layer 5 on the compound semiconductor layer 13 ( For example, an electron transit layer made of undoped GaN) can be stacked with good crystallinity, and the difference in lattice constant between the compound semiconductor layer 13 and the lower end of the semiconductor operation layer 5 is reduced. Specifically, the intermediate layer 14 is a kind of nitride-based compound semiconductor layer, and a nitride-based compound semiconductor (for example, AlN) that forms the compound semiconductor layer 13 and a nitride that forms the lower end portion of the semiconductor operation layer 5. It is formed of a nitride compound semiconductor (for example, AlGaN) having a composition with the compound compound semiconductor (for example, GaN). In such an intermediate layer 14, the lattice constant difference at the bonding interface of the compound semiconductor layer 13 and the lattice constant difference at the bonding interface of the semiconductor operation layer 5 are both 0.7% or less. Further, the intermediate layer 14 maintains a lattice constant difference at an arbitrary minute portion (for example, a crystal interface) in a layer region sandwiched between the junction interfaces at both ends with respect to the layer thickness direction while maintaining 0.7% or less. The composition is continuously changed. That is, the lattice constant difference at the crystal interface formed in the layer region of the intermediate layer 14 with such a composition change is 0.7% or less. Such a composition of the intermediate layer 14 is, for example, close to AlN in the vicinity of the junction interface of the compound semiconductor layer 13, close to GaN in the vicinity of the junction interface of the semiconductor operation layer 5, and from AlN in the layer region. It gradually changes in the layer thickness direction so as to approach GaN.

  The semiconductor operation layer 5 is a layer responsible for the semiconductor operation of the semiconductor element 100, is realized using a nitride compound semiconductor, and is stacked on the buffer layer 4. Specifically, the semiconductor operation layer 5 has an electron transit layer 15 made of, for example, undoped GaN at the lower end (that is, the upper portion of the buffer layer 4), and an electron supply layer 16 made of AlGaN on the electron transit layer 5. And a contact layer 17 made of highly doped GaN on the electron supply layer 16. A plurality of electrodes such as a source electrode 6, a gate electrode 7, and a drain electrode are formed on the semiconductor operation layer 5.

  The electron transit layer 15 is realized using, for example, undoped GaN, and causes the electrons supplied from the electron supply layer 16 to travel at a high speed. Specifically, the electron transit layer 15 is formed on the intermediate layer 14 of the buffer layer 4 described above, and has a two-dimensional electron gas layer 15 a immediately below the upper end portion, that is, the heterojunction interface with the electron supply layer 16. . The two-dimensional electron gas layer 15a is formed according to the piezoelectric field generated by the piezoelectric effect based on crystal distortion at the heterojunction interface, and causes the electrons supplied by the electron supply layer 16 to travel at high speed. Here, since the intermediate layer 14 is present at the interface between the compound semiconductor layer 13 and the electron transit layer 15, the electron transit layer 15 is formed on the buffer layer 4 in a state with good crystallinity (for example, a substantially flat state). Is done.

  The electron supply layer 16 is realized by using a compound semiconductor having a larger band gap energy than the electron transit layer 15, such as AlGaN, and is stacked on the electron transit layer 15. In this case, the electron supply layer 16 has a thinner layer thickness than the electron transit layer 15 and is heterojunction with the electron transit layer 15. Such an electron supply layer 16 supplies electrons to the electron transit layer 15. The electrons supplied by the electron supply layer 16 travel at a high speed in the two-dimensional electron gas layer 15 a of the electron transit layer 15 and move, for example, from the source electrode 6 to the drain electrode 8.

  The contact layer 17 is realized by using a nitride-based compound semiconductor doped with a high concentration of n-type impurities, for example, a highly doped GaN, and is formed on the electron supply layer 16. The contact layer 17 has a source electrode 6 and a drain electrode formed thereon, and reduces the contact resistance between the source electrode 6 or the drain electrode 8 and the electron supply layer 16.

  The source electrode 6 and the drain electrode 8 function as ohmic electrodes formed on the semiconductor operation layer 5, and the gate electrode 7 functions as a Schottky electrode formed on the semiconductor operation layer 5. Specifically, the source electrode 6 and the drain electrode 8 are realized by, for example, an Al / Ti / Au metal layer, and are formed on the contact layer 17, respectively. In this case, the source electrode 6 and the drain electrode 8 are in ohmic contact with the contact layer 17. On the other hand, the gate electrode 7 is realized by a Pt / Au metal layer, for example, and is formed on the electron supply layer 16. In this case, the gate electrode 7 is Schottky bonded to the electron supply layer 16.

  In such a semiconductor element 100, when the source electrode 6 and the drain electrode 8 are operated, the two-dimensional electron gas formed at the heterojunction interface of the electron transit layer 15 is used as a carrier and supplied to the electron transit layer 15. The generated electrons travel at high speed in the two-dimensional electron gas layer 15 a and move to the drain electrode 8. At this time, by controlling the voltage applied to the gate electrode 7 and changing the thickness of the depletion layer immediately below the gate electrode 7, the electrons moving from the source electrode 6 to the drain electrode 8, that is, the drain current can be controlled. it can.

  Next, a change in the composition of the buffer layer 4 having a multilayer structure including the compound semiconductor layers 11 and 13 and the intermediate layers 12 and 14 described above will be described. FIG. 2 is a schematic diagram showing an example of the composition profile of the buffer layer 4 whose composition changes in the layer thickness direction. As described above, the buffer layer 4 is formed by epitaxially growing the compound semiconductor layer 11, the intermediate layer 12, the compound semiconductor layer 13, and the intermediate layer 14 in this order. For example, as shown in FIG. 2, the buffer layer 4 changes its composition in the epitaxial growth direction (that is, the layer thickness direction A).

That is, the compound semiconductor layer 11 has a uniform composition of GaN in the layer thickness direction A. The intermediate layer 12 has a composition Al _x Ga _(1-x) N between the compound semiconductor layers 11 and 13, and changes the composition continuously and linearly from GaN to AlN in the layer thickness direction A. . In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the intermediate layer 12 continuously changes from 0 to 1 with respect to the layer thickness direction A. The compound semiconductor layer 13 has a uniform composition of AlN in the layer thickness direction A. The intermediate layer 14 has a composition Al _x Ga _(1-x) N between the compound semiconductor layer 11 and the electron transit layer 15, and continuously and linearly from AlN to GaN with respect to the layer thickness direction A. Change the composition. In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the intermediate layer 14 continuously changes from 1 to 0 in the layer thickness direction A.

  Here, the composition of the intermediate layer 12 is continuous with the respective compositions of the compound semiconductor layers 11 and 13 at the joint interfaces at both ends, and is within the layer region sandwiched between the joint interfaces at both ends (that is, within the layer region of the intermediate layer 12). The lattice constant difference Δd1 at an arbitrary minute portion in () is 0.7% or less. When the composition of the intermediate layer 12 continuously changes in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the gradient of the composition change in the minute portion of the intermediate layer 12 is −0.7%. / Nm or more and 0% / nm or less are desirable. Thus, the composition of the intermediate layer 12 can be changed from the compound semiconductor layer 11 toward the compound semiconductor layer 13 while reliably maintaining the lattice constant difference Δd1 at an arbitrary minute portion at 0.7% or less. On the other hand, the composition of the intermediate layer 14 is continuous with the respective compositions of the compound semiconductor layer 11 and the electron transit layer 15 at the junction interfaces at both ends, and within the layer region sandwiched between the junction interfaces at both ends (that is, the layers of the intermediate layer 14). The lattice constant difference Δd2 at an arbitrary minute portion in the region) is 0.7% or less. Further, when the composition of the intermediate layer 14 continuously changes in the layer thickness direction A, the amount of change in the lattice constant difference corresponding to the gradient of the composition change in the minute portion of the intermediate layer 14 is 0% / nm or more. , 0.7% / nm or less is desirable. Thus, the composition of the intermediate layer 14 can be changed from the compound semiconductor layer 13 toward the electron transit layer 15 while reliably maintaining the lattice constant difference Δd2 at an arbitrary minute portion at 0.7% or less.

  The layer thickness from the lower end of the compound semiconductor layer 11 to the lower end of the electron transit layer 15, that is, the layer thickness of the composite layer composed of the intermediate layers 12 and 14 and the compound semiconductor layers 11 and 13 is 6 nm or more and 3000 nm. The following is desirable. Furthermore, the layer thickness of the compound semiconductor layers 11 and 13 is desirably 5 nm or more and 3000 nm or less, and the layer thickness of the intermediate layers 12 and 14 is desirably 0.1 nm or more and 20 nm or less. As a result, the amount of change in the lattice constant difference corresponding to the slope of the composition change of the intermediate layers 12 and 14 can be easily set to -0.7% / nm or more and 0.7% / nm or less.

Note that the difference in lattice constant here is calculated based on the following formula (1) using the lattice constants a1 and a2 of the nitride-based compound semiconductors bonded on both sides of the crystal interface.
Lattice constant difference (%) = | 1−a2 / a1 | × 100 (1)
For example, the lattice constant difference D1 between the compound semiconductor layer 11 made of GaN and the compound semiconductor layer 13 made of AlN is expressed by the lattice constant a1 (= 3.189Å) of GaN and the lattice constant a2 (= 3.112Å) of AlN. It is calculated by substituting into the formula (1) and becomes about 2.5%. Further, the difference in lattice constant between the electron transit layer 15 made of undoped GaN and the compound semiconductor layer 13 made of AlN is equal to the lattice constant difference D1.

  By interposing such an intermediate layer 12 at the interface between the compound semiconductor layers 11 and 13, for example, a minute portion (in a layer region sandwiched between the compound semiconductor layers 11 and 13 having a lattice constant difference of 2.5%) ( For example, all the lattice constant differences at the crystal interface or the like are 0.7% or less. Therefore, the compound semiconductor layer 13 can be epitaxially grown on the compound semiconductor layer 11 through the intermediate layer 12 in a state with good crystallinity. In this case, the compound semiconductor layer 13 is stacked on the intermediate layer 12 in a substantially flat state. Similarly, by interposing the intermediate layer 14 at the stacking interface between the compound semiconductor layer 13 and the electron transit layer 15, the intermediate layer 14 is sandwiched between the compound semiconductor layer 13 and the electron transit layer 15 having a lattice constant difference of 2.5%, for example. All the lattice constant differences in the minute portions (for example, crystal interfaces, etc.) in the layer region are 0.7% or less. For this reason, the electron transit layer 15 can be epitaxially grown on the compound semiconductor layer 13 through the intermediate layer 14 with good crystallinity. In this case, the electron transit layer 15 is laminated on the intermediate layer 14 in a substantially flat state.

This is based on the relationship between the crystallinity of the nitride compound semiconductor layer and the lattice constant difference described below. The inventors of the present application have developed a nitride compound semiconductor layer (experimental layer) made of Al _x Ga _(1-x) N (0 ≦ x ≦ 1) on top of a nitride compound semiconductor layer (experimental layer E1) made of GaN. E2) was epitaxially grown, and the relationship between the crystallinity of the experimental layer E2 and the difference in lattice constant between the experimental layers E1 and E2 was found experimentally. In this experiment, the Al composition ratio x of the experimental layer E2 is changed as a parameter, an experimental layer E2 having a layer thickness of 25 nm is epitaxially grown on the experimental layer E1 having a layer thickness of 500 nm, and an atomic force microscope (AFM) is manufactured by Digital Instruments. using the NanoscopeIII measuring the surface roughness R _MS of this experiment layer E2, then we derive the lattice constant difference between the experimental layer E2 and experiment layer E1. Figure 3 is a schematic view illustrating the relationship between the Al composition ratio x and the surface roughness R _MS experiments layer E2.

As shown in FIG. 3, the surface roughness R _MS experiments layer E2 is, Al composition ratio x is 0 or more, if it is about 0.3 or less of the value is substantially constant value (about 0.75 nm). On the other hand, the surface roughness R _MS experiments layer E2 is simple with the Al composition ratio x is rapidly increased boundary case is about 0.3, the Al composition ratio x approaches about 0.3 to 1.0 Increased. For example, the surface roughness R _MS experiments layer E2 is about 2.1nm when the Al composition ratio x is 0.41, about 4.5nm met when the Al composition ratio x is 0.59 It was. That is, when the Al composition ratio x of the experimental layer E2 is about 0.3, the surface of the experimental layer E2 is in a state where the unevenness is severely disturbed. This is presumably because the experimental layer E2 exceeded the critical film thickness and the crystal collapsed when the Al composition ratio x was about 0.3.

  Here, the lattice constant difference (strain amount) between the experimental layer E2 and the experimental layer E1 in which the Al composition ratio x is set to about 0.3 is 0.73%, and the Al composition ratio x is set to about 0.59. The difference in lattice constant (strain amount) between the experimental layer E2 and the experimental layer E1 was 1.47%. The difference in lattice constant (strain amount) between the experimental layer E2 (ie, the AlN layer) in which the Al composition ratio x is set to 1.0 and the experimental layer E1 is about 2.5%. Therefore, the experimental layer E2 can obtain good crystallinity when the lattice constant difference with respect to the experimental layer E1 is 0.7% or less. On the other hand, in the experimental layer E2, when the lattice constant difference with respect to the experimental layer E1 is 0.73% or more, the crystal surface becomes uneven and its crystallinity deteriorates. This is remarkable when an AlGaN layer having a lattice constant difference of 0.73% or more with respect to the GaN layer is epitaxially grown on the experimental layer E1 (ie, GaN layer) to a layer thickness of 1.0 nm or more.

As can be seen from the above experimental results, the nitride-based compound semiconductor layer mainly composed of Al _x Ga _(1-x) N (0 ≦ x ≦ 1) has a lattice at a minute portion (for example, crystal interface) in the epitaxial growth direction. By setting the constant difference to be 0.7% or less, multilayer formation can be performed with good crystallinity. That is, the compound semiconductor layers 11 and 13 and the electron transit layer 15 having a lattice constant difference of 0.7% or more have the crystals not broken by interposing the intermediate layers 12 and 14 at each junction interface as described above. Epitaxial growth can be performed with good crystallinity.

  The buffer layer 4 having a multilayer structure including the compound semiconductor layers 11 and 13 and the intermediate layers 12 and 14 has a lattice constant difference of 0.7% or less at an arbitrary minute portion in the epitaxial growth direction. 13 or more (specifically, about 2.5%) of lattice constant difference, that is, distortion generated by 13. Such a buffer layer 4 can alleviate the lattice constant difference between the substrate 1 and the semiconductor operation layer 5 and suppress the propagation of threading dislocations to the semiconductor operation layer 5. Specifically, for example, the AlN intervening layer 2 generates threading dislocations due to a large lattice constant difference with respect to the substrate 1. This threading dislocation often propagates in the epitaxial growth direction. If it propagates to the two-dimensional electron gas layer 15a of the electron transit layer 15, the concentration and mobility of the two-dimensional electron gas in the two-dimensional electron gas layer 15a. Reduce. However, as described above, since the buffer layer 4 has a strain of 0.7% or more in the layer, the propagation direction of the threading dislocation can be bent, and the propagation of the threading dislocation in the epitaxial growth direction can be suppressed. The propagation of threading dislocations to the semiconductor operation layer 5 can be suppressed. At the same time, since the buffer layer 4 has a lattice constant difference of 0.7% or less in an arbitrary minute portion in the epitaxial growth direction, it is possible to prevent the occurrence of new threading dislocations in the multilayer structure and Generation of cracks at each crystal interface can be prevented.

  Next, a method for manufacturing the semiconductor element 100 according to the first embodiment of the present invention will be described. When manufacturing the semiconductor element 100, an AlN intervening layer 2, an intermediate layer 3, a buffer layer 4, and a semiconductor operation layer 5 are sequentially formed on a substrate 1 such as sapphire or silicon by MOCVD (Metal Organic Chemical Vapor Deposition) method. On the semiconductor operation layer 5, a plurality of electrodes, for example, a source electrode 6, a gate electrode 7, and a drain electrode 8 are formed.

Specifically, first, the Si substrate 1 chemically etched with hydrofluoric acid or the like was introduced into the MOCVD apparatus, and the degree of vacuum in the MOCVD apparatus was reduced to 100 [hPa] or less using a turbo pump. Thereafter, the temperature of the substrate 1 in the MOCVD apparatus is raised to 800 [° C.], and when the temperature in the MOCVD apparatus is stabilized, the substrate 1 is rotated at 900 [rpm] to become a material for the nitride-based compound semiconductor. Trimethylaluminum (TMA) and ammonia (NH ₃ ) were introduced into the surface of the substrate 1 at flow rates of 58 [μmol / min] and 12 [l / min], respectively, and the growth time was set to 4 [min] and the layer thickness was 50 An AlN intervening layer 2 made of AlN of [nm] was laminated on the substrate 1.

  The substrate 1 may be a sapphire substrate instead of the Si substrate. In this case, if the sapphire substrate 1 chemically etched with hydrofluoric acid or the like is introduced into the MOCVD apparatus and the AlN intervening layer 2 is formed on the sapphire substrate 1 as in the case of Si described above. Good.

Next, the temperature of the substrate 1 is raised to 1030 [° C.], then, trimethylgallium (TMGa) is set to a flow rate of 29 [μmol / min], TMA is set to a flow rate of 29 [μmol / min], and NH ₃ is The flow rate was set to 12 [l / min], biscyclopentadienyl magnesium (CP ₂ Mg) was set to a flow rate of 0.01 [μmol / min], and these were introduced into the upper part of the AlN intervening layer 2 to increase the growth time. The intermediate layer 3 made of Al _x Ga _(1-x) N (0 ≦ x ≦ 1) having a layer thickness of 20 [nm] was stacked on the AlN intervening layer 2 at 40 [sec]. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ].

Subsequently, the buffer layer 4 is formed on the intermediate layer 3. Specifically, TMGa and NH ₃ are introduced into the upper portion of the intermediate layer 3 at flow rates of 58 [μmol / min] and 12 [l / min], respectively, and the growth time is set to 600 [sec] and the layer thickness of 300 [ nm] of the compound semiconductor layer 11 made of GaN was stacked on the intermediate layer 3. Next, the flow rate of TMGa is 29 [μmol / min], the flow rate of TMA is 29 [μmol / min], the flow rate of NH ₃ is 12 [l / min], and the growth time is 40 [sec]. An intermediate layer 12 made of Al _x Ga _(1-x) N (0 ≦ x ≦ 1) having a thickness of 20 [nm] was stacked on the compound semiconductor layer 11. Subsequently, TMA and NH ₃ are introduced into the upper portion of the intermediate layer 12 at flow rates of 58 [μmol / min] and 12 [l / min], respectively, the growth time is 40 [sec], and the layer thickness is 20 [nm]. A compound semiconductor layer 13 made of AlN was laminated on the intermediate layer 12. Thereafter, the flow rate of TMGa is 29 [μmol / min], the flow rate of TMA is 29 [μmol / min], the flow rate of NH ₃ is 12 [l / min], and the flow rate of CP ₂ Mg is 0.01 [μmol / min]. These are introduced into the upper part of the compound semiconductor layer 12, and the growth time is 40 [sec], and the layer thickness is 20 [nm] Al _x Ga _(1-x) N (0 ≦ x ≦ 1). The intermediate layer 14 made of is laminated on the compound semiconductor layer 12. In this way, the buffer layer 4 having a multilayer structure composed of the compound semiconductor layers 11 and 13 and the intermediate layers 12 and 14 was formed.

Next, the semiconductor operation layer 5 is formed on the buffer layer 4. Specifically, TMGa and NH ₃ are introduced into the upper portion of the intermediate layer 14 at a flow rate of 58 [μmol / min] and 12 [l / min], respectively, and the growth time is set to 1000 [sec] to obtain a layer thickness of 500 [ nm] an electron transit layer 15 made of undoped GaN was laminated on the intermediate layer 14. Subsequently, TMGa is set to a flow rate of 41 [μmol / min], TMA is set to a flow rate of 17 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], and these are placed above the electron transit layer 15. Then, an electron supply layer 16 made of AlGaN with a layer thickness of 20 nm was stacked on the electron transit layer 15 with a growth time of 40 [sec]. Further, TMGa is set to a flow rate of 58 [μmol / min], SiH ₄ is set to a flow rate of 0.01 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], and these are supplied to the electron supply layer 16. The contact layer 17 made of highly doped GaN having a layer thickness of 20 [nm] was formed on the electron supply layer 16 by introducing it into the upper portion and setting the growth time to 40 [sec].

Thereafter, a mask made of a SiO ₂ film is formed on the semiconductor operation layer 5 by patterning using photolithography, and each electrode shape is formed on the contact layer 17 where the source electrode 6 and the drain electrode 8 are to be formed. Opened portions are formed. Then, Au, Ti, and Al are sequentially deposited in this opening with film thicknesses of 100 [nm], 50 [nm], and 50 [nm], respectively, and the source electrode 6 made of an Al / Ti / Au metal layer is formed. The drain electrode 8 is formed on the contact layer 17.

  Subsequently, the mask on the semiconductor operation layer 5 is removed, and a photoresist mask is newly formed on each of the semiconductor operation layer 5, the source electrode 6, and the drain electrode 8 formed so far. Then, an opening corresponding to the electrode shape is formed in the mask above the electron supply layer 16 where the gate electrode 7 is to be formed. Next, Au and Pt were sequentially deposited in thicknesses of 200 [nm] and 100 [nm] in the openings of the mask, respectively, and the gate electrode 7 made of a metal layer of Pt / Au was formed on the electron supply layer 16. . Thereafter, the mask was removed, and the semiconductor device 100 illustrated in FIG. 1 was manufactured.

  In the first embodiment of the present invention, one set of composite layers formed by the compound semiconductor layers 11 and 13 and the intermediate layers 12 and 14 made of a nitride compound semiconductor is provided. Instead, a plurality of such composite layers may be provided. The buffer layer may be formed using one or more such composite layers, or the semiconductor operation layer may be formed.

  In the first embodiment of the present invention, the composition of the buffer layer 4 is changed continuously and linearly in the layer thickness direction A. However, the present invention is not limited to this, and the buffer layer 4 is in the layer thickness direction A. The composition may change continuously and in a curved manner. Specifically, as illustrated in FIG. 4, the intermediate layers 12 and 14 may continuously change in composition in the layer thickness direction A while changing the gradient of composition change. In this case, the lattice constant differences Δd1 and Δd2 at any minute portion in the layer thickness direction A may be 0.7% or less. In addition, the change amount of the lattice constant difference corresponding to the gradient of the composition change may be −0.7% / nm or more and 0.7% / nm or less.

  Furthermore, the composition of the intermediate layers 12 and 14 at the bonding interface with each adjacent layer may not be continuous with the composition of each adjacent layer as long as the lattice constant difference at the bonding interface is 0.7% or less. . Further, the composition change of the intermediate layers 12 and 14 may be a continuous change in which the linear and curvilinear ones as described above are combined.

  In the first embodiment of the present invention, the composition of the buffer layer 4 is continuously changed in the layer thickness direction A. However, the present invention is not limited to this, and the buffer layer 4 is stepped in the layer thickness direction A. The composition may be changed. Specifically, as illustrated in FIG. 5, if the lattice constant differences Δd1 and Δd2 in any minute portion in the layer thickness direction A are 0.7% or less, the intermediate layers 12 and 14 are layered. The composition may change stepwise with respect to the thickness direction A. In this case, the composition change of the intermediate layers 12 and 14 may be a simple change (see FIG. 5) with respect to the layer thickness direction A within a range satisfying the conditions of the lattice constant differences Δd1 and Δd2. Further, it may be a complicated change (for example, a change in which the Al composition in AlGaN increases or decreases). Furthermore, the stepwise composition change and the above-described continuous composition change may be combined.

  Furthermore, in the first embodiment of the present invention, the composition of the intermediate layers 12 and 14 is changed in the layer thickness direction A. However, the present invention is not limited to this, and the lattice constant with each adjacent layer of the intermediate layers 12 and 14 is changed. When the difference is 0.7% or less, the composition of the intermediate layers 12 and 14 in the layer thickness direction A may be substantially uniform. Specifically, as illustrated in FIG. 6, the intermediate layer 12 has a substantially uniform composition in which each of the lattice constant differences Δd3 and Δd4 with respect to the compound semiconductor layers 11 and 13 at both ends is 0.7% or less. May be. Similarly, the intermediate layer 14 may have a substantially uniform composition in which both the lattice constant difference Δd5 with respect to the compound semiconductor layer 13 and the lattice constant difference Δd6 with respect to the electron transit layer 15 are 0.7% or less. . In this case, the lattice constant difference D1 between the compound semiconductor layers 11 and 13 is 0.7% or more and 1.4% or less, and the lattice constant difference D2 between the compound semiconductor layer 13 and the electron transit layer 15 is 0.7% or more. 1.4% or less.

  As described above, in the first embodiment of the present invention, an intermediate layer is interposed at the stack interface of a plurality of nitride-based compound semiconductor layers having a lattice constant difference of 0.7% or more, and the plurality of nitrides The lattice constant difference at each junction interface between the compound-based compound semiconductor layer and the intermediate layer is 0.7% or less, and the lattice constant difference at any minute portion in the epitaxial growth direction in the intermediate layer is 0.7% or less. Configured to do. Therefore, a nitride compound semiconductor layer having a lattice constant difference of 0.7% or more with respect to the nitride compound semiconductor layer is placed in a good state on the nitride compound semiconductor layer via the intermediate layer. Can be epitaxially grown. As a result, it is possible to form a plurality of nitride compound semiconductor layers having a lattice constant difference of 0.7% or more in a multi-layered state with good crystallinity and to suppress the propagation of threading dislocations in the epitaxial growth direction. Can be realized.

  By forming a plurality of nitride-based compound semiconductor layers having a lattice constant difference of 0.7% or more in this way, an arbitrary minute portion in the layer thickness direction has a strain of 0.7% or more in the layer. A buffer layer having a multilayer structure with a lattice constant difference of 0.7% or less can be formed with good crystallinity. Since the buffer layer having such a multilayer structure has a strain of 0.7% or more in the layer, the propagation direction of threading dislocations can be bent, and propagation of the threading dislocations in the epitaxial growth direction can be suppressed. For example, propagation of threading dislocations to the semiconductor operation layer can be suppressed. At the same time, the buffer layer has a lattice constant difference of 0.7% or less in an arbitrary minute part in the epitaxial growth direction, so that it is possible to prevent the occurrence of new threading dislocations in the multilayer structure. Generation of cracks at each crystal interface can be prevented.

(Embodiment 2)
Next, a second embodiment of the present invention will be described. In the first embodiment described above, an intermediate in which the lattice constant difference in an arbitrary minute portion in the layer thickness direction is 0.7% or less between the nitride-based compound semiconductor layers having a lattice constant difference of 0.7% or more. In the second embodiment, the nitride compound semiconductor layers at both ends of the nitride compound semiconductor layers are disposed between the plurality of nitride compound semiconductor layers mainly composed of the same nitride compound semiconductor. An intermediate layer having a lattice constant difference of 0.7% or more and a lattice constant difference in an arbitrary minute portion in the layer thickness direction and a lattice constant difference at the joint interface at both ends of 0.7% or less is interposed. I am letting.

  FIG. 7 is a schematic cross-sectional view showing a configuration example of the semiconductor element 200 according to the second embodiment of the present invention. As shown in FIG. 7, the semiconductor element 200 includes a buffer layer 21 instead of the buffer layer 4 of the semiconductor element 100 according to the first embodiment described above. Other configurations are the same as those of the first embodiment, and the same reference numerals are given to the same components.

The buffer layer 21 relaxes the lattice constant difference between the substrate 1 and the semiconductor operation layer 5 described above and suppresses the propagation of threading dislocations to the semiconductor operation layer 5. Specifically, the buffer layer 21 has a multilayer structure formed using a nitride-based compound semiconductor containing Al _x Ga _(1-x) N (0 ≦ x ≦ 1) as a main component. The structure has a lattice constant difference (strain) of 0.7% or more. In this case, the buffer layer 21 has a multilayer structure in which an intermediate layer 23 is interposed at each stack interface of a plurality of compound semiconductor layers 22 formed in multiple layers. That is, the multilayer structure of the buffer layer 21 is realized by repeatedly forming a composite layer including the compound semiconductor layer 22 and the intermediate layer 23 as one set.

The compound semiconductor layer 22 is a layer made of a nitride-based compound semiconductor containing Al _x Ga _(1-x) N (0 ≦ x ≦ 1) as a main component, for example, undoped GaN. In this case, the compound semiconductor layer 22 has a lattice constant difference of 0.7% or less at each junction interface between the intermediate layer 3 and the intermediate layer 23 in the multilayer structure. Such a compound semiconductor layer 22 can be epitaxially grown with good crystallinity on the intermediate layer 3 described above, and can be epitaxially grown with good crystallinity on the upper part of the intermediate layer 23 in the multilayer structure. Can do.

The intermediate layer 23 is a layer made of a nitride-based compound semiconductor containing Al _x Ga _(1-x) N (0 ≦ x ≦ 1) as a main component (that is, a kind of nitride-based compound semiconductor layer). As described above, each compound semiconductor layer 22 is interposed at each stack interface. In this case, the intermediate layer 23 has a lattice constant difference at each junction interface of the compound semiconductor layers 22 at both ends and a lattice constant difference at an arbitrary minute portion in the epitaxial growth direction (that is, the layer thickness direction) is 0.7%. The lattice constant difference (strain) is 0.7% or more with respect to the compound semiconductor layers 22 at both ends in the layer region other than the bonding interface. Such an intermediate layer 23 is formed by, for example, composition change layers 23a and 23b.

  The composition change layer 23 a is a layer whose composition is changed in the layer thickness direction, and is formed on the compound semiconductor layer 22. In this case, in the composition change layer 23a, one end in the layer thickness direction is joined to the compound semiconductor layer 22, and the composition change layer 23b is joined to the other end. In such a composition change layer 23a, the lattice constant difference at the bonding interface with respect to the compound semiconductor layer 22 bonded to one end and the lattice constant difference at an arbitrary minute portion in the layer thickness direction are both 0.7% or less. In addition, at the other end, that is, in the vicinity of the bonding interface with the composition change layer 23b, the compound semiconductor layer 22 has a lattice constant difference (strain) of 0.7% or more.

  The composition change layer 23b is a layer that changes the composition in the layer thickness direction, and is formed on the composition change layer 23a. In this case, in the composition change layer 23b, one end in the layer thickness direction is joined to the composition change layer 23a, and the compound semiconductor layer 22 is joined to the other end. Such a composition change layer 23b includes a difference in lattice constant at a bonding interface with respect to the composition change layer 23a bonded to one end, a difference in lattice constant in an arbitrary minute portion in the layer thickness direction, and a compound bonded to the other end. The difference in lattice constant at the bonding interface of the semiconductor layer 22 is 0.7% or less. Furthermore, the composition change layer 23b has a lattice constant difference (strain) of 0.7% or more with respect to the compound semiconductor layer 22 at the other end, that is, in the vicinity of the bonding interface with the composition change layer 23b.

  For example, the semiconductor operation layer 5 (specifically, the electron transit layer 15) is formed on the composition change layer 23b formed on the uppermost portion of the buffer layer 21. In this case, the uppermost composition change layer 23b has a lattice constant difference of 0.7% or less at the junction interface with the electron transit layer 15, and the electron transit is in the vicinity of the junction interface with the composition change layer 22a. It has a lattice constant difference (strain) of 0.7% or more with respect to the layer 15.

  Next, changes in the composition of the buffer layer 21 having the multilayer structure described above will be described. FIG. 8 is a schematic diagram showing an example of a composition profile of the buffer layer 21 having a multilayer structure whose composition changes in the layer thickness direction. As described above, the buffer layer 21 has a multilayer structure in which a composite layer including the compound semiconductor layer 22 and the intermediate layer 23 is repeatedly formed. The buffer layer 21 having such a multilayer structure changes its composition with respect to the epitaxial growth direction (that is, the layer thickness direction A), for example, as shown in FIG. FIG. 8 illustrates the composition profile of two composite layers among a plurality of composite layers forming the multilayer structure of the buffer layer 21. That is, the buffer layer 21 has a composition profile obtained by repeating the composition profile of the set of composite layers a plurality of times.

As shown in FIG. 8, the compound semiconductor layer 22 has a uniform composition of GaN, for example, in the layer thickness direction A. The intermediate layer 23 has a composition Al _x Ga _(1-x) N that continuously changes in the layer thickness direction A, for example. Specifically, the composition change layer 23a is continuous with the composition GaN of the compound semiconductor layer 22 at the junction interface with the compound semiconductor layer 22 at one end in the layer thickness direction A, and continuous with respect to the layer thickness direction A in the layer region. In addition, the composition Al _x Ga _(1-x) N is linearly changed, and the lattice constant difference D3 with respect to the compound semiconductor layer 22 is set to 0.7% or more in the vicinity of the junction interface with the composition change layer 23b at the other end. (For example, Al-rich Al _x Ga _(1-x) N). In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the composition change layer 23a is substantially 0 at the junction interface of the compound semiconductor layer 22 and approaches 0 to 1 with respect to the layer thickness direction A. So that it changes continuously.

  Here, the lattice constant difference Δd7 in an arbitrary minute portion in the layer region sandwiched between the bonding interfaces at both ends of the composition change layer 23a (that is, in the layer region of the composition change layer 23a) is 0.7% or less. . Further, when the composition of the composition change layer 23a continuously changes in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the inclination of the composition change in the minute portion of the composition change layer 23a is −0. It is desirable that it is 7% / nm or more and 0% / nm or less. As a result, the composition change layer 23a has a composition in which the lattice constant difference Δd7 in an arbitrary minute portion is reliably maintained at 0.7% or less from the compound semiconductor layer 22 at one end toward the composition change layer 23b at the other end. Can change. The composition change layer 23a having such a lattice constant difference Δd7 can be epitaxially grown on the upper portion of the compound semiconductor layer 22 with good crystallinity. In this case, the composition change layer 23 a is stacked on the compound semiconductor layer 22 in a substantially flat state.

On the other hand, the composition change layer 23b is continuous with the composition of the composition change layer 23a (for example, Al-rich Al _x Ga _(1-x) N) at the joint interface with the composition change layer 23a at one end in the layer thickness direction A, and the layer region The composition Al _x Ga _(1-x) N is continuously and linearly changed with respect to the layer thickness direction A, and continues to the composition GaN of the compound semiconductor layer 22 at the junction interface with the compound semiconductor layer 22 at the other end. . In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the composition change layer 23b is substantially the same value as that of the composition change layer 23a at the bonding interface of the composition change layer 23a. It changes continuously so that it may approach 0 from this value.

  Here, the lattice constant difference Δd8 in an arbitrary minute portion in the layer region sandwiched between the bonding interfaces at both ends of the composition change layer 23b (that is, in the layer region of the composition change layer 23b) is 0.7% or less. . When the composition of the composition change layer 23b continuously changes in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the gradient of the composition change in the minute portion of the composition change layer 23b is 0% / It is desirable that it is not less than nm and not more than 0.7% / nm. Thus, the composition change layer 23b has a composition in which the lattice constant difference Δd8 at an arbitrary minute portion is reliably maintained at 0.7% or less from the composition change layer 23a at one end toward the compound semiconductor layer 22 at the other end. Can change. The composition change layer 23b having such a lattice constant difference Δd8 can be epitaxially grown on the top of the composition change layer 23a with good crystallinity. In this case, the composition change layer 23b is laminated on the composition change layer 23a in a substantially flat state.

  In the multilayer structure of the buffer layer 21, the layer thickness from the lower end of the compound semiconductor layer 22 to the lower end of the next compound semiconductor layer 22, that is, the layer thickness of the composite layer including the compound semiconductor layer 22 and the intermediate layer 23 as one set is It is desirable that it is 6 nm or more and 3000 nm or less. Furthermore, the layer thickness of the compound semiconductor layer 22 is desirably 5 nm or more and 3000 nm or less, and the layer thicknesses of the composition change layers 23a and 23b are desirably 0.1 nm or more and 20 nm or less. Accordingly, the change amount of the lattice constant difference corresponding to the gradient of the composition change of the intermediate layer 23 described above can be easily set to −0.7% / nm or more and 0.7% / nm or less.

  In the intermediate layer 23 formed by the composition change layers 23a and 23b as described above, the compound semiconductor layer 22 is bonded to both ends in a state where the lattice constant difference at the bonding interface is 0.7% or less, and the both ends In the layer region sandwiched between the compound semiconductor layers 22, the lattice constant difference at an arbitrary minute portion (for example, crystal interface) in the layer thickness direction A is maintained at 0.7% or less, and the compound semiconductor layer 22 is Thus, a lattice constant difference (strain) of 0.7% or more is formed. By interposing such an intermediate layer 23 at each stack interface of the plurality of compound semiconductor layers 22, a buffer having a multilayer structure in which a composite layer composed of the compound semiconductor layer 22 and the intermediate layer 23 is repeatedly formed a plurality of times. The layer 21 (see FIG. 7) can be realized with good crystallinity.

  The buffer layer 21 having such a multilayer structure has a lattice constant difference of 0.7% or less at an arbitrary minute portion in the epitaxial growth direction, and a lattice of 0.7% or more generated by the compound semiconductor layer 22 and the intermediate layer 23. There is a constant difference, ie distortion. Such a buffer layer 21 relaxes the lattice constant difference between the substrate 1 and the semiconductor operation layer 5 as well as the buffer layer 4 of the semiconductor element 100 according to the first embodiment described above, and the Propagation of threading dislocations can be suppressed, generation of new threading dislocations in the multilayer structure can be prevented, and generation of cracks at each crystal interface in the multilayer structure can be prevented. Furthermore, since the buffer layer 21 forms a multilayer structure between the AlN intervening layer 2 and the semiconductor operation layer 5, the electron transit layer 15 and the substrate 1 are caused by a difference in thermal expansion coefficient between the substrate 1 and the nitride-based compound semiconductor. It is possible to prevent a decrease in the piezoelectric polarization electric field at the heterojunction with the electron supply layer 16, and the piezopolarized electrons caused by the difference in lattice constant between the AlN intervening layer 2 and the lowermost compound semiconductor layer 22 are converted into the electron transit layer 15. Can be adversely affected.

  Next, a method for manufacturing the semiconductor element 200 according to the second embodiment of the present invention will be described. When the semiconductor element 200 is manufactured, first, the AlN intervening layer 2 and the intermediate layer 3 are sequentially stacked on the substrate 1 such as sapphire or silicon as in the method for manufacturing the semiconductor element 100 according to the first embodiment. .

After forming the intermediate layer 3, the buffer layer 21 is formed on the intermediate layer 3. Specifically, TMGa is set to a flow rate of 58 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], CP ₂ Mg is set to a flow rate of 0.01 [μmol / min], and these are intermediate. The compound semiconductor layer 22 made of GaN having a layer thickness of 9 [nm] was stacked on the intermediate layer 3 by introducing it into the upper part of the layer 3 with a growth time of 18 [sec]. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ].

Next, TMGa is set to a flow rate of 29 [μmol / min], TMA is set to a flow rate of 29 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], and CP ₂ Mg is set to 0.01 [μmol / min]. These are introduced into the upper part of the compound semiconductor layer 22 at a flow rate of min], the growth time is 15 [sec], and the layer thickness is 7.5 [nm] Al _x Ga _(1-x) N (0 ≦ x A composition change layer 23 a composed of ≦ 1) was laminated on the compound semiconductor layer 22. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ]. Subsequently, the flow rate of TMGa is 29 [μmol / min], the flow rate of TMA is 29 [μmol / min], the flow rate of NH ₃ is 12 [l / min], and the growth time is 7 [sec]. A composition change layer 23b made of Al _x Ga _(1-x) N (0 ≦ x ≦ 1) having a thickness of 3.5 [nm] was stacked on the composition change layer 23a. In this manner, the intermediate layer 23 was formed on the compound semiconductor layer 22.

  Thereafter, the epitaxial growth in which the compound semiconductor layer 22 and the intermediate layer 23 are alternately stacked is repeated a desired number of times (for example, 9 times), and a desired number of composite layers (for example, the compound semiconductor layer 22 and the intermediate layer 23 are formed) 10 sets). In this way, the buffer layer 21 having a multilayer structure having, for example, 10 composite layers each including the compound semiconductor layer 22 and the intermediate layer 23 was formed on the intermediate layer 3.

  After the multilayer buffer layer 21 is formed, the electron transit layer 15, the electron supply layer 16, and the contact layer 17 are formed on the buffer layer 21 in the same manner as in the method for manufacturing the semiconductor element 100 according to the first embodiment. Are sequentially laminated to form a semiconductor operation layer 5, and a source electrode 6, a gate electrode 7, and a drain electrode 8 are formed on the semiconductor operation layer 5. The semiconductor element 200 illustrated in FIG. 7 was manufactured by the above manufacturing method.

  Here, a sample of the semiconductor element 200 was prepared by the above-described manufacturing method, and the composition change with respect to the epitaxial growth direction of the compound semiconductor layer 22 and the intermediate layer 23 in the multilayer structure was analyzed using a scanning transmission electron microscope (STEM). FIG. 9 is a diagram showing an analysis result of a composition change with respect to the epitaxial growth direction of the compound semiconductor layer 22 and the intermediate layer 23 that form the multilayer structure of the semiconductor element 200. FIG. 9 shows, as an example of the analysis result, a dark field STEM image obtained by imaging a part of the multilayer structure of the semiconductor element 200, and a luminance profile obtained by analyzing a composition change in a part of the region B1 in the multilayer structure. Is shown.

  As can be seen from the analysis result shown in FIG. 9, the compound semiconductor layer 22 and the intermediate layer 23 described above are alternately stacked a plurality of times in a state of good crystallinity to form a multilayer structure of the buffer layer 21. Further, as illustrated in the region B1, the compound semiconductor layer 22 has a Ga-rich uniform composition, and the intermediate layer 23 is continuously composed of a Ga-rich composition or an Al-rich composition with respect to the epitaxial growth direction. It was changing. In this case, it was confirmed that the lattice constant difference in an arbitrary minute portion of the intermediate layer 23 whose composition changes in the epitaxial growth direction is maintained at 0.7% or less.

  In the second embodiment of the present invention, a semiconductor element having a multilayer structure in which 10 composite layers each including the compound semiconductor layer 22 and the intermediate layer 23 are formed is exemplified. It may be a semiconductor element having a multilayer structure having one or more pairs. In this case, the buffer layer may be formed by using one or more composite layers, or the semiconductor operation layer may be formed. In addition, the intermediate layer 23 is formed by the two layers of the composition change layers 23a and 23b. However, the present invention is not limited to this, and the intermediate layer 23 may be formed by three or more composition change layers.

  In the second embodiment of the present invention, the composition is continuous at the bonding interfaces at both ends of the composition change layers 23a and 23b. However, the present invention is not limited to this, and the lattice constant difference at the bonding interfaces is 0.7% or less. If so, the composition may be continuous or discontinuous at each junction interface between the compound semiconductor layer 22 and the composition change layers 23a and 23b or at the junction interface between the composition change layers 23a and 23b.

  Further, in the second embodiment of the present invention, the composition of the intermediate layer 23 is changed continuously and linearly with respect to the layer thickness direction A. However, the present invention is not limited to this. If the lattice constant difference at an arbitrary minute portion is 0.7% or less, the composition may change continuously and in a curve with respect to the layer thickness direction A as illustrated in FIG. As illustrated, the composition may change stepwise in the layer thickness direction A, or a combination thereof. When the composition changes continuously in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the gradient of the composition change is −0.7% / nm or more and 0.7% / nm or less. I just need it. Further, the composition change of the intermediate layer 23 may be a simple change in the layer thickness direction A within a range satisfying the condition of the lattice constant difference at such a minute portion, or a complicated change (for example, in AlGaN). Change in which the Al composition of the metal increases or decreases).

  As described above, in the second embodiment of the present invention, an intermediate layer is interposed at the stack interface of a plurality of compound semiconductor layers containing the same nitride-based compound semiconductor as a main component, and the plurality of compound semiconductor layers and the intermediate layers are interposed. The lattice constant difference at each junction interface with the layer and the lattice constant difference at any minute portion in the epitaxial growth direction in the intermediate layer are both 0.7% or less, and in the intermediate layer excluding the junction interface The lattice constant difference between the partial region and the compound semiconductor layer was set to 0.7% or more. For this reason, such a compound semiconductor layer and an intermediate layer can be alternately epitaxially grown with good crystallinity. As a result, it is possible to form a multilayer structure having a lattice constant difference (strain) of 0.7% or more with good crystallinity and to realize a semiconductor element that can enjoy the same effects as those of the first embodiment described above. can do.

  Furthermore, since a multilayer structure having a lattice constant difference (strain) of 0.7% or more can be formed with good crystallinity, electrons are caused by a difference in thermal expansion coefficient between the substrate and the nitride compound semiconductor. The piezo-polarized electric field at the heterojunction between the traveling layer and the electron supply layer can be prevented from decreasing, and the piezo-polarized electrons due to the difference in lattice constant between the AlN intervening layer and the compound semiconductor layer have an adverse effect on the electron traveling layer. Can be prevented.

(Modification of Embodiment 2)
Next, a modification of the second embodiment of the present invention will be described. In the second embodiment described above, the intermediate layer 23 and the compound semiconductor layer 22 having a lattice constant difference of 0.7% or more with respect to the compound semiconductor layer 22 are alternately stacked to form a multilayer structure. In the modification of the second embodiment, the lattice constant difference in an arbitrary minute portion in the layer thickness direction is 0.7% between the plurality of nitride-based compound semiconductor layers having a lattice constant difference of 0.7% or more. A multilayer structure is formed by a composite layer in which the following intermediate layer is interposed and a nitride compound semiconductor layer and an intermediate layer at both ends are combined.

  FIG. 10 is a schematic cross-sectional view showing a configuration example of the semiconductor element 300 according to the modification of the second embodiment of the present invention. As shown in FIG. 10, the semiconductor element 300 includes a buffer layer 31 instead of the buffer layer 21 of the semiconductor element 200 according to the second embodiment described above. Other configurations are the same as those of the second embodiment, and the same components are denoted by the same reference numerals.

The buffer layer 31 reduces the lattice constant difference between the substrate 1 and the semiconductor operation layer 5 described above, and suppresses the propagation of threading dislocations to the semiconductor operation layer 5. Specifically, the buffer layer 31 has a multilayer structure formed using a nitride-based compound semiconductor containing Al _x Ga _(1-x) N (0 ≦ x ≦ 1) as a main component. The structure has a lattice constant difference (strain) of 0.7% or more. In this case, the buffer layer 31 has the intermediate layer 33 or the intermediate layer 35 interposed between the stacked interfaces of the compound semiconductor layers 32 and 34 having a lattice constant difference of 0.7% or more, and the compound semiconductor layers 32 and 34 and the intermediate layer And a multi-layered structure including one or more composite layers formed by 33 and 35. That is, the multilayer structure of the buffer layer 31 is realized by repeatedly forming a desired number of composite layers that are realized by sequentially stacking the compound semiconductor layer 32, the intermediate layer 33, the compound semiconductor layer 34, and the intermediate layer 35 in this order. The

The compound semiconductor layers 32 and 34 are layers made of a nitride-based compound semiconductor mainly composed of Al _x Ga _(1-x) N (0 ≦ x ≦ 1), and have a lattice constant difference of 0.7% or more. Have Specifically, the compound semiconductor layer 32 is a layer made of, for example, undoped GaN, and the compound semiconductor layer 34 is a layer made of, for example, undoped AlN. In this case, the compound semiconductor layers 32 and 34 have a lattice constant difference of about 2.5% as in the case of the compound semiconductor layers 11 and 13 of the semiconductor element 100 according to the first embodiment.

  The compound semiconductor layer 32 has a lattice constant difference of 0.7% or less at each junction interface between the intermediate layer 3 and the intermediate layers 33 and 35 in the multilayer structure. Such a compound semiconductor layer 32 can be epitaxially grown in a good crystalline state on the intermediate layer 3 described above, and can be epitaxially grown in a good crystalline state on the intermediate layer 35 in the multilayer structure. Can do. Similarly, the compound semiconductor layer 34 has a lattice constant difference of 0.7% or less at each junction interface of the intermediate layers 33 and 35 in the multilayer structure. Such a compound semiconductor layer 34 can be epitaxially grown with good crystallinity on the intermediate layer 33 in the multilayer structure.

  The intermediate layer 33 is interposed at the interface between the compound semiconductor layers 32 and 34 having a lattice constant difference of 0.7% or more, and allows the compound semiconductor layer 34 to be stacked on the compound semiconductor layer 32 with good crystallinity. At the same time, the difference in lattice constant between the compound semiconductor layers 32 and 34 is relaxed. Specifically, the intermediate layer 33 is a kind of nitride-based compound semiconductor layer, and a nitride-based compound semiconductor (for example, GaN) that forms the compound semiconductor layer 32 and a nitride-based compound semiconductor that forms the compound semiconductor layer 34. It is formed of a nitride compound semiconductor (for example, AlGaN) having a composition between (for example, AlN). Such an intermediate layer 33 has a lattice constant difference of 0.7% or less at each junction interface between the compound semiconductor layers 32 and 34 at both ends. Further, the intermediate layer 33 has a lattice constant difference at an arbitrary minute portion (for example, a crystal interface) in the layer thickness direction in the layer region in substantially the same manner as the intermediate layer 12 of the semiconductor element 100 according to the first embodiment described above. While maintaining at 0.7% or less, the composition is continuously changed in the layer thickness direction.

  The intermediate layer 35 is interposed at the stacking interface between the compound semiconductor layers 32 and 34 having a lattice constant difference of 0.7% or more, and allows the compound semiconductor layer 32 to be stacked on the compound semiconductor layer 34 with good crystallinity. At the same time, the difference in lattice constant between the compound semiconductor layers 32 and 34 is relaxed. Specifically, the intermediate layer 35 is a kind of a nitride compound semiconductor layer, and a nitride compound semiconductor (for example, GaN) that forms the compound semiconductor layer 32 and a nitride compound semiconductor that forms the compound semiconductor layer 34. It is formed of a nitride compound semiconductor (for example, AlGaN) having a composition between (for example, AlN). Such an intermediate layer 35 has a lattice constant difference of 0.7% or less at each junction interface between the compound semiconductor layers 32 and 34 at both ends. In addition, the intermediate layer 35 has a lattice constant difference at an arbitrary minute portion (for example, a crystal interface) in the layer thickness direction in the layer region in substantially the same manner as the intermediate layer 14 of the semiconductor element 100 according to the first embodiment described above. While maintaining at 0.7% or less, the composition is continuously changed in the layer thickness direction.

  For example, the semiconductor operation layer 5 (specifically, the electron transit layer 15) is formed on the intermediate layer 35 formed on the uppermost portion of the buffer layer 31. In this case, the uppermost intermediate layer 35 has both a lattice constant difference at the bonding interface with respect to the electron transit layer 15 and a lattice constant difference at the bonding surface with respect to the compound semiconductor layer 34 of 0.7% or less. The composition is changed in the same manner as the other intermediate layer 35 inside.

  Next, changes in the composition of the buffer layer 31 having the multilayer structure described above will be described. FIG. 11 is a schematic diagram showing an example of a composition profile of the buffer layer 31 having a multilayer structure whose composition changes in the layer thickness direction. As described above, the buffer layer 31 has a multilayer structure in which a composite layer including the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 is repeatedly formed. The buffer layer 31 having such a multilayer structure changes its composition with respect to the epitaxial growth direction (that is, the layer thickness direction A), for example, as shown in FIG. FIG. 11 illustrates the composition profile of two composite layers of a plurality of composite layers forming the multilayer structure of the buffer layer 31. That is, the buffer layer 31 has a composition profile obtained by repeating the composition profile of the set of composite layers a plurality of times.

As shown in FIG. 11, the compound semiconductor layer 32 has a uniform composition of GaN, for example, in the layer thickness direction A. The intermediate layer 33 has a composition Al _x Ga _(1-x) N between the compound semiconductor layers 32 and 34, and changes the composition continuously and linearly from GaN to AlN in the layer thickness direction A. . In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the intermediate layer 33 continuously changes from 0 to 1 with respect to the layer thickness direction A. The compound semiconductor layer 34 has a uniform composition of AlN in the layer thickness direction A. In this case, the lattice constant difference D4 between the compound semiconductor layers 32 and 34 is about 2.5% (that is, 0.7% or more). The intermediate layer 35 has a composition Al _x Ga _(1-x) N between the compound semiconductor layers 32 and 34, and changes the composition continuously and linearly from AlN to GaN in the layer thickness direction A. . In this case, the Al composition ratio x of the composition Al _x Ga _(1-x) N of the intermediate layer 35 continuously changes from 1 to 0 with respect to the layer thickness direction A.

  Here, the composition of the intermediate layer 33 is continuous with the respective compositions of the compound semiconductor layers 32 and 34 at the bonding interfaces at both ends, and is within the layer region sandwiched between the bonding interfaces at both ends (that is, within the layer region of the intermediate layer 33). The lattice constant difference Δd9 at an arbitrary minute portion in () is 0.7% or less. Further, when the composition of the intermediate layer 33 continuously changes in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the inclination of the composition change in the minute portion of the intermediate layer 33 is −0.7%. / Nm or more and 0% / nm or less are desirable. Thus, the composition of the intermediate layer 33 can be changed from the compound semiconductor layer 32 toward the compound semiconductor layer 34 while reliably maintaining the lattice constant difference Δd9 at an arbitrary minute portion at 0.7% or less. On the other hand, the composition of the intermediate layer 35 is continuous with the respective compositions of the compound semiconductor layers 32 and 34 (or the electron transit layer 15) at the bonding interfaces at both ends, and is within the layer region sandwiched between the bonding interfaces at both ends (that is, the intermediate layer 35). The lattice constant difference Δd10 at an arbitrary minute portion in the layer region of the layer 35 is 0.7% or less. When the composition of the intermediate layer 35 continuously changes in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the gradient of the composition change in the minute portion of the intermediate layer 35 is 0% / nm or more. , 0.7% / nm or less is desirable. Thus, the intermediate layer 35 reliably maintains the lattice constant difference Δd10 at an arbitrary minute portion from 0.7% or less toward the compound semiconductor layer 32 (or the electron transit layer 15) from the compound semiconductor layer 34. The composition can be changed.

  In the multilayer structure of the buffer layer 31, the layer thickness from the lower end of the compound semiconductor layer 32 to the lower end of the next compound semiconductor layer 32, that is, a composite layer including the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 as one set. The layer thickness is preferably 6 nm or more and 3000 nm or less. Furthermore, the layer thickness of the compound semiconductor layers 32 and 34 is desirably 5 nm or more and 3000 nm or less, and the layer thickness of the intermediate layers 33 and 35 is desirably 0.1 nm or more and 20 nm or less. Thus, the change amount of the lattice constant difference corresponding to the gradient of the composition change of the intermediate layers 33 and 35 described above can be easily set to −0.7% / nm or more and 0.7% / nm or less.

  By interposing the intermediate layer 33 or the intermediate layer 35 at the stacked interface between the compound semiconductor layers 32 and 34, a composite layer including the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 as one set is formed a plurality of times. The buffer layer 31 (see FIG. 10) having a multilayer structure that is repeatedly formed can be realized with good crystallinity. The buffer layer 31 having such a multilayer structure has a lattice constant difference of 0.7% or less at an arbitrary minute portion in the epitaxial growth direction, and a lattice constant difference of 0.7% or more generated by the compound semiconductor layers 32 and 34. That is, it has distortion. Therefore, the semiconductor element 300 having such a multilayer buffer layer 31 enjoys the same effects as the semiconductor element 200 according to the second embodiment described above.

  Next, a method for manufacturing the semiconductor element 300 according to the modification of the second embodiment of the present invention will be described. When the semiconductor element 300 is manufactured, first, the AlN intervening layer 2 and the intermediate layer 3 are sequentially stacked on the substrate 1 such as sapphire or silicon as in the method for manufacturing the semiconductor element 200 according to the second embodiment. .

After forming the intermediate layer 3, a buffer layer 31 is formed on the intermediate layer 3. Specifically, TMGa is set to a flow rate of 58 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], CP ₂ Mg is set to a flow rate of 0.01 [μmol / min], and these are intermediate. The compound semiconductor layer 32 made of GaN having a layer thickness of 6 [nm] was stacked on the intermediate layer 3 by introducing into the upper part of the layer 3 and setting the growth time to 12 [sec]. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ]. Next, TMGa is set to a flow rate of 29 [μmol / min], TMA is set to a flow rate of 29 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], and CP ₂ Mg is set to 0.01 [μmol / min]. These are introduced into the upper portion of the compound semiconductor layer 32, the growth time is 7 [sec], and the layer thickness is 3.5 [nm] Al _x Ga _(1-x) N (0 ≦ x An intermediate layer 33 composed of ≦ 1) was laminated on the compound semiconductor layer 32. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ]. Thereafter, TMA is set to a flow rate of 58 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], the growth time is set to 14 [sec], and the compound semiconductor layer 34 made of AlN having a layer thickness of 7 [nm]. Was laminated on the intermediate layer 33. Next, TMGa is set to a flow rate of 29 [μmol / min], TMA is set to a flow rate of 29 [μmol / min], NH ₃ is set to a flow rate of 12 [l / min], and CP ₂ Mg is set to 0.01 [μmol / min]. These are introduced into the upper portion of the compound semiconductor layer 34 at a flow rate of min], and the growth time is 7 [sec], and Al _x Ga _(1-x) N (0 ≦ x ₎ having a layer thickness of 3.5 [nm]. An intermediate layer 35 composed of ≦ 1) was laminated on the compound semiconductor layer 34. In this case, the amount of Mg added is 1 × 10 ¹⁸ [cm ⁻³ ].

  Thereafter, the epitaxial growth in which the compound semiconductor layer 32, the intermediate layer 33, the compound semiconductor layer 34, and the intermediate layer 35 are sequentially stacked in this order is repeated a desired number of times (for example, nine times), and the compound semiconductor layers 32, 34 and the intermediate layer 33, A desired number of composite layers (for example, 10 sets) are formed. In this way, the buffer layer 31 having a multilayer structure having, for example, 10 composite layers each including the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 is formed on the intermediate layer 3.

  After the multilayer buffer layer 31 is formed, the electron transit layer 15, the electron supply layer 16, and the contact layer 17 are formed on the buffer layer 31 in the same manner as in the method of manufacturing the semiconductor element 200 according to the second embodiment. Are sequentially laminated to form a semiconductor operation layer 5, and a source electrode 6, a gate electrode 7, and a drain electrode 8 are formed on the semiconductor operation layer 5. The semiconductor element 300 illustrated in FIG. 10 was manufactured by the above manufacturing method.

  Here, a sample of the semiconductor element 300 was manufactured by the above-described manufacturing method, and the composition change with respect to the epitaxial growth direction of the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 in the multilayer structure was analyzed using STEM. FIG. 12 is a diagram showing an analysis result of a composition change with respect to the epitaxial growth direction of the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 forming the multilayer structure of the semiconductor element 300. FIG. 12 shows, as an example of the analysis result, a dark field STEM image obtained by imaging a part of the multilayer structure of the semiconductor element 300, and a luminance profile obtained by analyzing the composition change in a part of the region B2 in the multilayer structure. Is shown.

  As can be seen from the analysis result shown in FIG. 12, the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 described above are alternately stacked a plurality of times with good crystallinity to form a multilayer structure of the buffer layer 31. It was. Further, as illustrated in the region B2, the compound semiconductor layer 32 has a Ga-rich substantially uniform composition, and the compound semiconductor layer 34 has an Al-rich substantially uniform composition. On the other hand, the intermediate layer 33 continuously changes in composition from a Ga-rich composition to an Al-rich composition in the epitaxial growth direction, and the intermediate layer 35 continuously changes from an Al-rich composition to a Ga-rich composition in the epitaxial growth direction. Compositionally changed. In this case, it was confirmed that the difference in lattice constant between arbitrary minute portions of the intermediate layers 33 and 35 whose composition changes with respect to the epitaxial growth direction is maintained at 0.7% or less.

  In the modification of the second embodiment of the present invention, a semiconductor element having a multilayer structure in which 10 composite layers each including the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35 are formed is illustrated. However, the semiconductor element may be a multi-layered semiconductor element having at least one set of such composite layers. In this case, the buffer layer may be formed by using one or more composite layers, or the semiconductor operation layer may be formed.

  Further, in the modification of the second embodiment of the present invention, the composition is continuous at the bonding interfaces at both ends of the intermediate layers 33 and 35. However, the present invention is not limited to this, and the lattice constant difference at the bonding interfaces is 0.7. % Or less, the composition may be continuous or discontinuous at each junction interface between the compound semiconductor layers 32 and 34 and the intermediate layers 33 and 35.

  Furthermore, in the modification of the second embodiment of the present invention, the composition of the intermediate layers 33 and 35 changes continuously and linearly with respect to the layer thickness direction A. However, the present invention is not limited thereto, and the intermediate layers 33 and 35 are not limited thereto. If the lattice constant difference at an arbitrary minute portion in the layer thickness direction A is 0.7% or less, the composition changes continuously and in a curve with respect to the layer thickness direction A as illustrated in FIG. Alternatively, as illustrated in FIG. 5, the composition may be changed stepwise in the layer thickness direction A, or a combination thereof may be used. When the composition changes continuously in the layer thickness direction A, the change amount of the lattice constant difference corresponding to the gradient of the composition change is −0.7% / nm or more and 0.7% / nm or less. I just need it. Further, the composition change of the intermediate layers 33 and 35 may be a simple change in the layer thickness direction A within a range satisfying the condition of the difference in lattice constant at such a minute portion, or a complicated change (for example, It may be a change in which the Al composition in AlGaN increases or decreases.

  In the modification of the second embodiment of the present invention, the intermediate layers 33 and 35 have a composition change continuously and linearly with respect to the layer thickness direction A. However, the present invention is not limited to this. When the lattice constant difference of 34 is 0.7% or more and 1.4% or less, the intermediate layers 33 and 35 are 0.7% of the compound semiconductor layers 32 and 34 as illustrated in FIG. You may have the uniform composition used as the following lattice constant difference.

  As described above, in the modification of the second embodiment of the present invention, an intermediate layer is interposed at the stack interface of a plurality of nitride-based compound semiconductor layers having a lattice constant difference of 0.7% or more, and the plurality The lattice constant difference at each junction interface between the nitride compound semiconductor layer and the intermediate layer is 0.7% or less, and the lattice constant difference at an arbitrary minute portion in the epitaxial growth direction in the intermediate layer is 0.7%. % Or less. In addition, a multilayer structure is formed by using one or more composite layers each including a plurality of nitride-based compound semiconductor layers and intermediate layers. For this reason, similarly to Embodiment 2 described above, a multilayer structure having a lattice constant difference (strain) of 0.7% or more can be formed with good crystallinity. As a result, a semiconductor element that can enjoy the operational effects of the second embodiment described above can be realized.

  In the above-described first and second embodiments and the modifications thereof, the FET such as HEMT is exemplified as the semiconductor element according to the present invention. However, the present invention is not necessarily limited to the HEMT. The present invention can be applied to various FETs such as MISFET (Metal Insulator Semiconductor FET), MOSFET (Metal Oxide Semiconductor FET), MESFET (Metal Semiconductor FET) and the like.

  The present invention is applicable to various diodes such as Schottky diodes in addition to FETs. For example, a diode having a cathode electrode and an anode electrode in place of the source electrode 6, the drain electrode 8, and the gate electrode 7 of the semiconductor elements 100, 200, and 300 can be realized.

Furthermore, Embodiments 1 and 2 of the present invention and modifications thereof exemplify the case where the crystal material of the compound semiconductor layer is GaN or AlN and the crystal material of the intermediate layer is AlGaN. However, the present invention is not limited to this. The crystal material for forming the compound semiconductor layer or the intermediate layer may be a nitride compound semiconductor containing Al _x Ga _(1-x) N (0 ≦ x ≦ 1) as a main component. The nitride-based compound semiconductor containing Al _x Ga _(1-x) N as a main component may contain components other than Al _x Ga _(1-x) N. For example, Al _x In _y Ga _(1-xy) As _u P _v N _(1-uv) (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1, 0 ≦ u ≦ 1, 0 ≦ v ≦ 1, u + v <1) .

It is a cross-sectional schematic diagram which shows one structural example of the semiconductor element concerning Embodiment 1 of this invention. FIG. 3 is a schematic diagram illustrating an example of a composition profile of a buffer layer included in the semiconductor element according to the first embodiment. It is a schematic diagram which illustrates the relationship between Al composition ratio of the AlGaN layer formed on the GaN layer, and surface roughness. It is a schematic diagram which illustrates another aspect of the composition profile of the buffer layer which a composition changes continuously with respect to the layer thickness direction. It is a schematic diagram which shows an example of the composition profile of the buffer layer which changes a composition in steps with respect to the layer thickness direction. It is a schematic diagram which shows an example of the composition profile of the buffer layer which made the composition of each layer substantially uniform with respect to the layer thickness direction. It is a cross-sectional schematic diagram which shows one structural example of the semiconductor element concerning Embodiment 2 of this invention. FIG. 6 is a schematic diagram illustrating an example of a composition profile of a buffer layer included in a semiconductor element according to a second embodiment. FIG. 6 is a diagram illustrating an analysis result of a multilayer structure of a semiconductor element according to a second embodiment. It is a cross-sectional schematic diagram which shows one structural example of the semiconductor element concerning the modification of Embodiment 2 of this invention. FIG. 10 is a schematic diagram illustrating an example of a composition profile of a buffer layer included in a semiconductor element according to a modification of the second embodiment. It is a figure which shows the analysis result of the multilayered structure of the semiconductor element concerning the modification of Embodiment 2. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 AlN intervening layer 3 Intermediate layer 4, 21, 31 Buffer layer 5 Semiconductor operation layer 6 Source electrode 7 Gate electrode 8 Drain electrode 11, 13, 22, 32, 34 Compound semiconductor layer 12, 14, 23, 33, 35 Intermediate layer 15 Electron traveling layer 15a Two-dimensional electron gas layer 16 Electron supply layer 17 Contact layer 15, 16 Mask 23a, 23b Composition change layer 100, 200, 300 Semiconductor element

Claims (10)

A first layer formed of a nitride compound semiconductor;
A second layer formed of a nitride compound semiconductor having a lattice constant difference of 0.7% or more with respect to the first layer;
Interposed in the stacking interface between the first layer and the second layer, the lattice constant difference at the bonding interface of the first layer, the lattice constant difference at the bonding interface of the second layer, and the both ends both the lattice constant difference at a minute portion in the interposed bonding interface region also Ri der 0.7% or less, while maintaining the lattice constant difference at a small fraction of the area below 0.7% An intermediate layer whose composition is changed continuously or stepwise with respect to the layer thickness direction,
The semiconductor element, wherein a change amount of a lattice constant difference corresponding to a gradient of the composition change in a minute portion in the region is −0.7% / nm or more and 0.7% / nm or less . A compound semiconductor layer formed of a nitride compound semiconductor;
A plurality of compound semiconductor layers formed in multiple layers are interposed at the stacking interface, and the lattice constant difference at each bonding interface of the compound semiconductor layers at both ends is 0.7% or less, and the bonding at both ends The composition is changed in the layer thickness direction while maintaining a lattice constant difference at a small portion in the region sandwiched between the interfaces at 0.7% or less, and the lattice constant for the nitride-based compound semiconductor in the region is changed. An intermediate layer having a minute portion with a difference of 0.7% or more;
A semiconductor device comprising: The composition of the intermediate layer continuously changes in the layer thickness direction,
3. The change amount of the lattice constant difference corresponding to the gradient of the composition change at a minute portion in the region is −0.7% / nm or more and 0.7% / nm or less. The semiconductor element as described in. The first layer and the second layer are plural and formed alternately,
The semiconductor element according to claim 1 , wherein the intermediate layer is interposed at each stacked interface between the first layer and the second layer that are alternately formed. 5. The semiconductor according to claim 4 , wherein a layer thickness from a lower end of the first layer to a lower end of the next first layer among the plurality of first layers is 6 nm or more and 3000 nm or less. element. The first layer and the second layer and the composite layer comprising said intermediate layer, according to claim 1, the semiconductor device according to any one of 4, 5, which comprises forming a buffer layer. 3. The semiconductor device according to claim 2 , wherein the compound semiconductor layer and the intermediate layer are plural and are alternately formed. The semiconductor element according to claim 7 , wherein a layer thickness from a lower end of the compound semiconductor layer to a lower end of the next compound semiconductor layer among the plurality of compound semiconductor layers is 6 nm or more and 3000 nm or less. The compound semiconductor layer and the composite layer comprising said intermediate layer is a semiconductor device according to any one of claims 2,7,8, characterized by forming the buffer layer. The nitride-based compound _{semiconductor, Al x Ga (1-x} ) N semiconductor device according to any one of claims 1-9 which (0 ≦ x ≦ 1), characterized in that the main component.