JP5543866B2 - Group III nitride epitaxial substrate - Google Patents

Description

  The present invention relates to a group III nitride epitaxial substrate, and more particularly to a group III nitride epitaxial substrate for HEMT.

  In recent years, with the increase in speed of IC devices and the like, high electron mobility transistors (HEMTs) have been widely used as high-speed field effect transistors (FETs). In such a field effect transistor, for example, as schematically shown in FIG. 1, a channel layer 22 and an electron supply layer 23 are stacked on an insulating substrate 21, and a source electrode is formed on the surface of the electron supply layer 23. 24, the drain electrode 25 and the gate electrode 26 are generally provided. During the operation of the device, electrons move in the order of the source electrode 24, the electron supply layer 23, the channel layer 22, the electron supply layer 23, and the drain electrode 25, and the lateral direction becomes the main current conduction direction. The voltage applied to the gate electrode 26 is controlled. In the HEMT, electrons generated at the junction interface between the electron supply layer 23 and the channel layer 22 having different band gaps can move at a higher speed than in a normal semiconductor.

  As an active material of such an electronic device such as HEMT, a group III nitride semiconductor made of a compound of a group III element and nitrogen has attracted attention. As the insulating substrate, a Si substrate is preferable because it is inexpensive and has excellent heat dissipation.

  However, since the group III nitride semiconductor and the Si substrate have greatly different lattice constants and thermal expansion coefficients, when the group III nitride semiconductor is grown directly on the Si substrate, the grown group III nitride semiconductor has Cracks and warping to alleviate strain occurred, and the warping was a cause of poor adsorption and poor exposure at the device process stage.

  Therefore, conventionally, a buffer layer is usually disposed between the Si substrate and the group III nitride semiconductor to reduce the above-described cracks and warpage. As an example of such a buffer layer, a superlattice multilayer film in which a plurality of AlN layers and GaN layers are alternately stacked has been proposed.

  Further, in Patent Document 1, as a result of examining optimum conditions for achieving both the flatness of the surface of the nitride semiconductor formed through the multilayer film and the prevention of cracks, the substrate and the nitride semiconductor layer are By interposing an AlN-based superlattice buffer layer formed by alternately laminating a plurality of layers, for example, a first buffer layer made of AlN and a second buffer layer made of AlGaN, Also disclosed is a technique that suppresses the occurrence of cracks.

  However, even with the above technique, it has not been possible to sufficiently meet the recent demand for further reduction of warpage and cracks, and further improvement of the technique has been demanded.

JP 2007-67077 A

  The present invention has been developed in view of the above-described situation, and an object of the present invention is to provide a group III nitride epitaxial substrate in which warpage is reduced as well as elimination of occurrence of cracks.

  The inventors of the present invention have made extensive studies in order to obtain a group III nitride epitaxial substrate in which the warp is reduced compared to the conventional one. An attempt was made to interpose another buffer layer in addition to the buffer layer. The other buffer layer may be disposed between the first buffer layer and the second buffer layer or on the second buffer layer. This point was further examined. As a result, when a third buffer layer having a predetermined composition is disposed on the second buffer layer and these first, second and third buffer layers are repeatedly stacked, warping can be effectively reduced. I got the knowledge.

  Here, the “warp value” referred to in the present invention is defined by “SORI” shown in FIG. SORI has the absolute value of the place (maximum value A) at the top of the best-fit reference plane on the main surface of the non-adsorbed plate and the lowest step at the bottom of the best-fit reference plane. The absolute value and sum (| A | + | B |) of the place value (minimum value B). Further, in the present application, a case where the wafer center position is at a position lower than the best fit surface is defined as a lower concave.

The present invention is based on the above findings, and the gist of the present invention is as follows.
(1) comprising a Si substrate, a superlattice laminate formed on the Si substrate, and a group III nitride laminate epitaxially grown on the superlattice laminate, wherein the superlattice laminate comprises the Si substrate First layer including AlN material, second layer including Al _x Ga _1-x N (0 <x <1) material, and Al _y Ga _1-y N (0 ≦ y <1) material from the substrate side A plurality of stacked bodies sequentially having a third layer (where the Al composition x of the second layer and the Al composition y of the third layer have a relationship of y <x) are provided , and the thickness of the first layer is 0.25 to in the range of 10 nm, the thickness of the second layer is in the range of 10 to 50 nm, III-nitride epitaxial substrate thickness of the third layer and wherein the range der Rukoto of 0.25～20Nm.

  (2) The group III nitride epitaxial substrate according to (1), wherein the thickness of the third layer is thinner than the thickness of the second layer.

( 3 ) The group III nitride epitaxial substrate according to (1) or ( 2 ), wherein an impurity concentration of the superlattice laminate is 1 × 10 ¹⁸ / cm ³ or more.

( 4 ) The group III nitride epitaxial substrate according to any one of the above (1) to ( 3 ), wherein the number of sets of the laminates is in the range of 50 to 300.

According to the present invention, a first layer containing an AlN material and a second layer containing an Al _x Ga _1-x N (0 <x <1) material from the Si substrate side between the Si substrate and the group III nitride laminate. And a third layer containing Al _y Ga _1-y N (0 ≦ y <1) material (where the Al composition x of the second layer and the Al composition y of the third layer have a relationship of y <x) By disposing a superlattice laminate including a plurality of laminates having the above in order, it is possible to provide a group III nitride epitaxial substrate in which warpage is reduced as compared with the prior art.

It is a typical sectional view showing a general field effect transistor. It is a schematic diagram for demonstrating "SORI". 3 is a schematic cross-sectional view of a group III nitride epitaxial substrate according to the present invention. FIG.

  Hereinafter, an embodiment of a group III nitride epitaxial substrate of the present invention will be described with reference to the drawings. FIG. 3 schematically shows a cross-sectional structure of a group III nitride epitaxial substrate according to the present invention.

As shown in FIG. 3, a group III nitride epitaxial substrate 1 according to the present invention includes a Si substrate 2, a superlattice laminate 3 formed on the Si substrate 2, and an III epitaxially grown on the superlattice laminate 3. The superlattice laminate 3 includes a first layer 3a containing an AlN material from the Si substrate 2 side, and a second layer containing an Al _x Ga _1-x N (0 <x <1) material. A layer 3b and a third layer 3c containing an Al _y Ga _1-y N (0 ≦ y <1) material (where the Al composition x of the second layer and the Al composition y of the third layer have a relationship of y <x A plurality of laminates 3S having the above. By adopting such a configuration, the present invention has a remarkable effect that the value of warpage can be greatly reduced as compared with the conventional art. Note that the Al composition difference between the second layer Al composition x indicated by the inequality sign and the first and third layers is 0.01 or more.
Further, AlN, AlGaN, and GaN may contain B and In at a predetermined ratio to such an extent that the effects of the present invention are not hindered.

  Here, the thickness of the first layer 3a is preferably 0.25 to 10 nm in order to suppress the occurrence of cracks, and the thickness of the second layer 3b is preferably 10 to 50 nm for the same reason. . The first layer 3a is most preferably an AlN layer having an Al composition of 1. In the present invention, a layer having an Al composition of 0.9 or more is regarded as substantially an AlN layer. In addition, the Al composition of the second layer 3b preferably includes more than 0.05 in order to improve the breakdown voltage in the horizontal and vertical directions. 0.5 or less is preferable. Furthermore, in order to bring out the effect of reducing dislocations, it is desirable that the composition difference with the AlN layer is large, and 0.2 or less is more preferable.

  Now, the third layer 3c is a particularly important layer in the present invention. By arranging the third layer 3c, reduction of warpage is achieved. Here, the Al composition of the third layer 3c is preferably 0.05 or less, for example, GaN. This is because the Al composition relationship with the first layer and the second layer brings about an effect of reducing warpage, promotes lateral growth, and suppresses the generation of pits. The thickness of the third layer 3c is preferably 0.25 to 20 nm. Since the effect can be confirmed if there are one or more atomic layers, if the thickness is less than 0.25 nm, which substantially corresponds to the thickness of one layer, the effect of reducing warpage is poor. On the other hand, the upper limit is not particularly limited as long as it is less than the critical film thickness that can be grown without lattice relaxation, but if it exceeds 20 nm, two-dimensional electron gas is generated, which may cause a current leak. It is.

In this way, by providing the third layer 3c, compressive stress can be applied in the superlattice layer, so that tensile stress can be suppressed and the value of warpage can be reduced as compared with the conventional case. is there.
In addition, in the present invention, although not shown in the drawing, an Al _z Ga _1-z N (y <z <1) material having an Al composition close to that of the second layer is included as the fourth layer on the third layer. A superlattice laminate including a plurality of laminates further having layers can also be used.

  Moreover, it is preferable that the number of sets of the laminated bodies 3S be in the range of 50 to 300. As the number of groups is increased, the leakage current in the vertical direction can be suppressed and the breakdown voltage can be improved. However, if the number of sets becomes too large, there is a problem that cracks occur, and therefore the number of sets is preferably 300 or less. As long as the effect of the present invention is not hindered, layers other than the first layer 3a, the second layer 3b, and the third layer 3c may be inserted, or the composition of the interface may be inclined.

Furthermore, the impurity concentration of the superlattice laminate 3 is preferably 1 × 10 ¹⁸ / cm ³ or more. This is because, if the concentration is less than 1 × 10 ¹⁸ / cm ³ , carriers due to band discontinuity are generated, and the withstand voltage of the buffer may be deteriorated.
As the impurity element, C, Fe, or the like is preferably used. The upper limit of the concentration is not particularly specified, but is preferably 1 × 10 ²⁰ / cm ³ or less from the viewpoint of suppressing the generation of pits in the group III nitride laminate 4.

Note that the thickness and size of the Si substrate 2 can be appropriately selected depending on the application. Further, the surface of the Si substrate 2 is not particularly specified, and each surface such as the (111), (100), and (110) surfaces can be applied, but it is preferable to use the (111) surface. This is because when the (111) plane is used, the (0001) plane of the group III nitride can be easily grown and the surface flatness can be improved.
It is also possible to attach a substrate of another material to the back surface of the Si substrate 2 or attach a protective film such as an oxide film or a nitride film.

  Furthermore, it is preferable to provide an initial growth layer 5 made of an AlN material between the Si substrate 2 and the superlattice laminate 3 in order to prevent a reaction between Ga and the Si substrate caused by the raw material.

  Further, the group III nitride stacked body 4 can include, for example, a channel layer 4a containing a GaN material and an electron supply layer 4b containing an AlGaN-based material, but can be appropriately changed depending on the application.

  FIG. 3 shows examples of typical embodiments, and the present invention is not limited to these embodiments.

Example 1
After heating a Si substrate (diameter: 150 mm (6 inches), thickness: 625 μm, crystal plane (111)) to 1050 ° C. in a hydrogen and nitrogen mixed atmosphere, trimethylgallium (TMG), An initial growth layer (AlN material, thickness: 100 nm) was formed by adjusting the supply amounts of trimethylaluminum (TMA) and NH ₃ . Thereafter, by adjusting the supply amount of trimethylgallium (TMG), trimethylaluminum (TMA), and NH ₃ , the first layer (AlN material, thickness: 4 nm) is formed on the initial growth layer as a superlattice laminate. Then, the second layer (Al _0.1 Ga _0.9 N material, thickness: 22 nm) and the third layer (GaN material, thickness: 10 nm) were grown in order, and 55 sets of this laminate were formed. As a result of measurement by SIMS, the average impurity (C) concentration of this superlattice laminate was 1 × 10 ¹⁹ / cm ³ . Furthermore, a channel layer (GaN material, thickness: 1.2 μm) and an electron supply layer (Al _0.25 Ga _0.75 N material, thickness: 30 nm) functioning as a lateral current conductive layer are laminated, and a group III nitride is formed. A product epitaxial substrate was obtained.

(Comparative Example 1)
As a superlattice laminate, first layer (AlN material, thickness: 4 nm) and second layer (Al _0.1 Ga _0.9 N material, thickness: 22 nm) were grown in order, and 55 sets of this laminate were formed. A group III nitride epitaxial substrate was obtained in the same manner as in Example 1 except for the above.

(Comparative Example 2)
Except that the superlattice stack was grown in order of the first layer (AlN material, thickness: 4 nm) and the second layer (GaN material, thickness: 22 nm), and 55 sets of this stack were formed. In the same manner as in Example 1, a group III nitride epitaxial substrate was obtained.

(Comparative Example 3)
As a superlattice laminate, a first layer (AlN material, thickness: 4 nm), a second layer (GaN material, thickness: 10 nm), and a third layer (Al _0.1 Ga _0.9 N material, thickness: 22 nm) A group III nitride epitaxial substrate was obtained in the same manner as in Example 1 except that the layers were grown in this order and 55 sets of this laminate were formed.

(Evaluation)
For each group III nitride epitaxial substrate of Example 1 and Comparative Examples 1 to 3, the value of warpage was measured using a shape measuring device (FT-900: manufactured by NIDEC). The results are shown in Table 1. The measurement was performed with the side on which the group III nitride layer was laminated facing upward. The thickness of each superlattice laminate was confirmed using TEM.

As shown in Table 1, the group III nitride epitaxial substrate of Example 1 according to the present invention was able to significantly reduce the warpage compared to the group III nitride epitaxial substrates of Comparative Examples 1 to 3. .
In particular, the warp values of Comparative Examples 1 and 2 in which the third layer is not provided are 40 μm and 80 μm, respectively, and the warp value of Comparative Example 3 in which the third layer is provided between the first layer and the second layer. The warp value of Example 1 in which the third layer is appropriately arranged is 15 μm, while warpage is 40 μm, and the warpage can be greatly reduced to less than half of Comparative Example 1 and 3 (20 μm or less). I understand.
Further, when observed with a metal microscope (magnification 100 times), cracks were observed in Comparative Example 2, but no cracks were observed in Example 1, Comparative Examples 1 and 3. The first embodiment can obtain both the effects of suppressing cracks and reducing warpage.

According to the present invention, the first layer including the AlN material from the Si substrate side and the first layer including the Al _x Ga _1-x N (0 <x <1) material between the Si substrate and the group III nitride stacked body. A second layer and a third layer containing an Al _y Ga _1-y N (0 ≦ y <1) material (where the Al composition x of the second layer and the Al composition y of the third layer have a relationship of y <x By disposing a superlattice laminate including a plurality of laminates having (in this order), a group III nitride epitaxial substrate with a lower warpage value than in the prior art can be provided.

DESCRIPTION OF SYMBOLS 1 Group III nitride epitaxial substrate 2 Si substrate 3 Superlattice laminated body 3a 1st layer 3b 2nd layer 3c 3rd layer 3S laminated body 4 Group III nitride laminated body 4a Channel layer 4b Electron supply layer 5 Initial growth layer

Claims (4)

A Si substrate, a superlattice laminate formed on the Si substrate, and a group III nitride laminate epitaxially grown on the superlattice laminate, wherein the superlattice laminate is formed from the Si substrate side.
A first layer comprising AlN material;
A second layer comprising Al _x Ga _1-x N (0 <x <1) material, and
Third layer containing Al _y Ga _1-y N (0 ≦ y <1) material (where the Al composition x of the second layer and the Al composition y of the third layer have a relationship of y <x)
Successively a plurality of sets comprising a laminate having,
The thickness of the first layer is in a range of 0.25～10Nm, the thickness of the second layer is in the range of 10 to 50 nm, the thickness of the third layer and wherein the range der Rukoto of 0.25~20nm Group III nitride epitaxial substrate.   2. The group III nitride epitaxial substrate according to claim 1, wherein a thickness of the third layer is thinner than a thickness of the second layer. The impurity concentration of the superlattice laminate is, 1 × 10 ¹⁸ / cm ³ or more in Group III nitride epitaxial substrate according to claim 1 or 2. The group III nitride epitaxial substrate according to any one of claims 1 to 3 , wherein the number of the laminated bodies is in a range of 50 to 300.

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