JP5106564B2 - Method for manufacturing semiconductor display device - Google Patents

Description

The present invention relates to an active matrix semiconductor display device. In particular, the present invention relates to an active matrix liquid crystal display device using liquid crystal as a display medium. However, in the semiconductor display device of the present invention, any other display medium (for example, an electroluminescence element) whose optical characteristics can be modulated in response to an applied voltage is used for the display medium.
Can also be used.

  Recently, a technique for manufacturing a semiconductor device in which a semiconductor thin film is formed on an inexpensive glass substrate, for example, a thin film transistor (TFT) has been rapidly developed. This is because the demand for active matrix liquid crystal display devices (liquid crystal panels) has increased.

  In an active matrix type liquid crystal panel, pixel TFTs are arranged in dozens to millions of pixel regions arranged in a matrix (this circuit is called an active matrix circuit), and charges entering and exiting each pixel electrode are transferred to the TFT. It is controlled by a switching function.

  The active matrix circuit includes a thin film transistor using amorphous silicon formed on a glass substrate.

  Recently, an active matrix liquid crystal display device in which a thin film transistor is formed with a polycrystalline silicon film using a quartz substrate has been realized. In this case, the peripheral drive circuit for driving the pixel TFT can also be formed on the same substrate as the active matrix circuit.

  In addition, a technique for manufacturing a thin film transistor using a crystalline silicon film on a glass substrate by utilizing a technique such as laser annealing is also known. By utilizing this technique, the active matrix circuit and the peripheral drive circuit can be integrated on the glass substrate.

  In recent years, active matrix liquid crystal display devices have been widely used in notebook personal computers. In personal computers, there are demands for a multi-tone liquid crystal display device that simultaneously activates a plurality of software and captures and processes video from a digital camera.

  Furthermore, recently, with the spread of portable information terminals, mobile computers, car navigation, and the like, there is a demand for a small active matrix liquid crystal display device with high definition, high resolution, and high image quality.

  In order to provide a small, high-definition, high-resolution, high-quality active matrix liquid crystal display device, it is important to reduce the pixel pitch and to what extent gradation display can be made. In order to reduce the pixel pitch, the size of the pixel TFT must be reduced, which is difficult. In addition, in order to perform fine gradation display, a drive circuit with good performance must be used, and in the prior art, this could only be realized by an external IC circuit.

  In view of the above circumstances, an object of the present invention is to provide a high-definition and high-resolution semiconductor display device that can perform favorable gradation display and that can be downsized, particularly an active matrix liquid crystal display device. .

  As a configuration example of the semiconductor display device of the present invention, a semiconductor display device as shown below is given.

  According to an embodiment of the present invention, an active matrix circuit having a plurality of pixel TFTs arranged in a matrix, a data line driving circuit and a scanning line driving circuit having a plurality of TFTs for driving the active matrix circuit, The plurality of pixel TFTs and the active layers of the plurality of TFTs are promoted to be crystallized by a catalytic element, and the catalytic element is selectively gettered by an element for gettering. A semiconductor display device characterized by being ringed is provided. This achieves the above object.

  The catalyst element may be one or more selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.

  As the catalyst element, one or more elements selected from Ge, Pb, and In may be used.

  P may be used as the gettering element.

  As the gettering element, one or more elements selected from P, N, As, Sb, and Bi may be used.

  The shift register of the data line driving circuit may have a maximum operating frequency shown in FIG. 9 or FIG.

  7. The gettering element may be activated by laser light irradiation or strong light irradiation.

  According to the present invention, a high-definition, high-resolution, high-quality semiconductor display device is provided in spite of its small size. In addition, the power consumption can be considerably reduced as compared with the conventional case.

1 is a block diagram of an active matrix liquid crystal display device which is an embodiment of a semiconductor device of the present invention. 1 is a circuit diagram of a data line driving bottleneck of an active matrix liquid crystal display device which is an embodiment of a semiconductor device of the present invention. FIG. It is process drawing of one manufacturing method of the active matrix type liquid crystal display device which is embodiment with the semiconductor device of this invention. It is process drawing of one manufacturing method of the active matrix type liquid crystal display device which is embodiment with the semiconductor device of this invention. It is process drawing of one manufacturing method of the active matrix type liquid crystal display device which is embodiment with the semiconductor device of this invention. It is process drawing of one manufacturing method of the active matrix type liquid crystal display device which is embodiment with the semiconductor device of this invention. It is sectional drawing of TFT which comprises the active matrix type liquid crystal display device which is embodiment with the semiconductor device of this invention. It is a graph which shows the characteristic of TFT which comprises the active matrix type liquid crystal display device which is an embodiment with the semiconductor device of this invention. It is a graph which shows the operating characteristic of the shift register of the active-matrix liquid crystal display device which is one embodiment of the semiconductor device of this invention. It is a graph which shows the operating characteristic of the shift register of the active-matrix liquid crystal display device which is one embodiment of the semiconductor device of this invention. 1 is a pattern diagram of a data line driving circuit of an active matrix liquid crystal display device which is an embodiment of a semiconductor device of the present invention. 1 is a display example of an active matrix liquid crystal display device which is an embodiment of a semiconductor device of the present invention. It is a figure which shows the example of the semiconductor device using the semiconductor display apparatus of this invention. It is a graph which shows the applied voltage-transmittance characteristic of a certain thresholdless antiferroelectric mixed liquid crystal.

  The semiconductor display device of the present invention will be described with the following examples. The semiconductor display device of the present invention is not limited to the following examples.

  FIG. 1 is a block diagram of an active matrix liquid crystal display device which is a semiconductor display device of the present invention according to this embodiment.

  In FIG. 1, reference numeral 100 denotes an active matrix circuit, in which pixels composed of a pixel TFT 100-1, a liquid crystal 100-2, an auxiliary capacitor 100-3, and the like are arranged in a matrix. Here, the active matrix type liquid crystal display device of this embodiment has 1920 × 480 pixels (640 × 640 × RGB) and corresponds to the VGA standard. Note that R represents a pixel corresponding to a red image, green represents a pixel corresponding to a green image, and B represents a pixel corresponding to a blue image. Note that the number of pixels is not limited to this.

  Reference numeral 101 denotes a data line driving circuit. The data line driver circuit 101 includes a shift register 101-1, a level shifter 101-2, and a buffer 101-3. As shown in FIG. 1, the signals input to the data line driving circuit 101 are CLK (clock), CLKb (inverted clock), SP (start pulse), Vdd (+ 2V power supply), VddH (+ 8V power supply). ), Vss (−8V power supply).

Reference numeral 102 denotes a scanning line driving circuit (left), and reference numeral 103 denotes a scanning line driving circuit (right). 102 and 103 have the same structure, and the input signals are also the same. This is because the scanning line is driven simultaneously from both the left and right sides to eliminate the rounding of the scanning signal and to cope with the case where the scanning line driving circuit on one side stops operating. The scanning line driver circuit 102 includes a shift register 102-1, a level shifter 102-2, and a buffer 102-3. The scanning line driver circuit 103 includes a shift register 103-1, a level shifter 103-2, and a buffer 103-3. have. Signals input to the scanning line driving circuit (left) 102 and the scanning line driving circuit (right) 103 are CLK (clock), SP (start pulse), Vdd (+2 V power supply), VddH (+8 V power supply).
, Vss (−8V power supply).

  Based on a timing signal from the data line driving circuit, a video signal from the video input signal line is applied to the pixel. In this embodiment, the video input signal line is composed of four RGB lines. This is because in this embodiment, serial video data is divided into four by an external dividing circuit and converted into four parallel image data. In this embodiment, the video data is divided into four, but the number of divisions of the video data is not limited to this. For example, when serial video data is divided into n (n is a natural number of 2 or more), there are n video input signal lines for each of RGB (3n in total).

  In this embodiment, video data is divided by an external dividing circuit. However, the active matrix circuit 100, the data line driving circuit 101, the scanning line driving circuit (left) 102, and the scanning line driving circuit (right). ) 103 or the like may be formed on the same substrate.

  Reference is now made to FIG. FIG. 2 shows a circuit diagram of the data line driving circuit 101 of this embodiment. As shown in FIG. 2, the shift register 101-1 has SR1, SR2,..., SR160 as its constituent elements, and each constituent element includes an inverter 101-1-2, a clocked inverter. 101-1-3. 101-1-1 is an inverter that buffers the start pulse.

  Timing signals supplied from the components SR1, SR2,..., SR160 of the shift register 101-1 pass through the NAND circuit (NAND1, NAND2,..., NAND160) and are supplied to the level shifter 101-2. . The timing signal input / output to / from the shift register 101-1 and the NAND circuit is 10V, but is raised to 16V by the level shifter 101-2.

  The timing signal whose voltage level is raised to 16V by the level shifter 101-2 is buffered by the buffer 101-3, and the analog switch 101-5 is operated. The analog switch 101-5 operates according to the timing signal from the buffer 101-5, and supplies the video signal from the video input signal line 104 (not shown) to the pixel TFT of each pixel. In this embodiment, video signals are simultaneously supplied (driven) to the four data lines of RGB in accordance with the timing signal supplied from the NAND circuit. This is because serial video data is divided into four parallel video data by an external dividing circuit. In FIG. 2, R1 to R4, G1 to G4, and B1 to B4 indicate data line numbers corresponding to RGB colors. In the present embodiment, it can be understood from the above description that there are 640 data lines for each of RGB.

  When the video data is divided into n as described above, the video signals are simultaneously supplied to the n RGB data lines by the timing signal supplied from the NAND circuit.

  The circuit configuration of the scan line driver circuit is not particularly described, but there is no difference in circuit configuration from the data line driver circuit except that it does not have an analog switch and the drive frequency is low.

  Next, an embodiment of a method for producing an active matrix type liquid crystal display device of this embodiment will be described. Note that the manufacturing method described below is only one means for realizing the active matrix liquid crystal display device of the present invention, and the active matrix liquid crystal display device of the present invention can be realized by other manufacturing methods.

  Please refer to FIG. First, a 12.5 cm square glass substrate 301 (for example, Corning 1737 glass substrate) is prepared. Then, a silicon oxide film 302 is formed to a thickness of 200 nm on the glass substrate 301 by plasma CVD using TEOS as a raw material. Of course, this thickness may be a required thickness. The silicon oxide film 302 functions as a base film that prevents impurities from diffusing into the semiconductor film from the glass substrate side.

  Next, an amorphous silicon film 303 (amorphous silicon film) is formed by plasma CVD (FIG. 3A). Here, a plasma CVD method is used, but a low pressure thermal CVD method may be used. Note that the thickness of the amorphous silicon film 303 is 550 mm. Of course, this thickness may be a required thickness. Next, a thin oxide film is formed by irradiating the surface of the amorphous silicon film 303 with UV light (not shown).

  Next, liquid phase Ni acetate 304 is applied to the surface of amorphous silicon film 303 by spin coating. The oxide film is attached so that Ni (nickel) acetate 304 is uniformly applied to the film surface. The Ni element functions as a catalyst element that promotes crystallization when the amorphous silicon film is crystallized (FIG. 3B).

  Next, in the nitrogen atmosphere, the hydrogen in the amorphous silicon film is released by holding at 450 ° C. to 500 ° C. (500 ° C. in this embodiment) for 1 hour. This is because the threshold energy for subsequent crystallization is lowered by intentionally forming a dangling bond in the amorphous silicon film. Then, the amorphous silicon film is crystallized by performing a heat treatment at 550 ° C. to 600 ° C. (550 ° C. in this embodiment) and 4 to 8 hours (4 hours in this embodiment) in a nitrogen atmosphere. The reason why the temperature at the time of crystallization can be set to 550 ° C. is due to the action of nickel element. During the heat treatment, Ni element promotes crystallization of the silicon film while moving in the silicon film. Thus, a polycrystalline silicon film 405 can be obtained over the glass substrate at a temperature of 600 ° C. or lower (FIG. 3C). Further, the polycrystalline silicon film is annealed with a laser in order to improve crystallinity.

  Further, RTA may be used for increasing the crystallization and / or crystallinity. RTA is an abbreviation for RAPID THERMAL ANNEALING. In RTA, strong light mainly emitting infrared light typified by a halogen lamp is used as a light source, and only the film attached to the substrate surface can be heated in a short time. Details of RTA will be described in Example 3.

  In the above method, nickel is applied to the entire surface of the amorphous silicon film. However, using a mask or the like, nickel may be selectively added to the amorphous silicon film to grow crystals. In this case, the crystal grows mainly in the lateral direction.

  Moreover, the catalyst element may be one or more selected from Ni, Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.

  Moreover, the catalyst element may be one or more selected from Ge, Pb, In, and Sn.

  Next, a step of removing nickel in the film is performed. First, masks 306 to 307 made of oxide films are formed to a thickness of 100 nm to 130 nm (in this embodiment, 130 nm). This mask is arranged to selectively dope phosphorus (P). In this state, phosphorus is doped. Then, only portions 309 to 312 that are not covered with the masks 306 to 308 of the polycrystalline silicon film 305 are doped with phosphorus (these regions are defined as phosphorus-added regions) (FIG. 3D). At this time, the acceleration voltage of doping and the thickness of the mask made of an oxide film are optimized so that phosphorus does not substantially penetrate the masks 306 to 308. The masks 306 to 308 are not necessarily oxide films, but the oxide films are convenient because they do not cause contamination even if they directly touch the active layer.

The dose amount of phosphorus is preferably about 1 × 10 ¹⁴ to 1 × 10 ¹⁵ ions / cm ² .
In this example, an ion doping apparatus with a dose of 5 × 10 ¹⁴ ions / cm ² was used.

  The acceleration voltage during ion doping was 10 kV. With an acceleration voltage of 10 KV, phosphorus can hardly pass through the 100 nm oxide mask.

  After that, thermal annealing was performed in a nitrogen atmosphere at 600 ° C. for 1 to 12 hours (12 hours in this example), and gettering of nickel element was performed (FIG. 4A). By doing so, nickel is attracted to phosphorus, and nickel is substantially eliminated from the added region 309-312 of phosphorus. In other words, phosphorus acts as an element for gettering. Under a temperature of 600 ° C., phosphorus atoms hardly move in the film, but nickel atoms can move a distance of about several hundred μm or more. From this, it can be understood that phosphorus is one of the most suitable elements for gettering nickel.

  Next, the polycrystalline silicon film 305 is patterned. At this time, phosphorus addition regions 309 to 312, that is, a region where nickel is gettered does not remain. In this way, polycrystalline silicon films 313 to 315 containing almost no nickel element were obtained (FIG. 4B). The obtained polycrystalline silicon films 313 to 315 later become the active layers of the TFT.

  As the gettering element, one or more elements selected from P, N, As, Sb, and Bi may be used.

Next, a gate insulating film 316 is formed. In this example, a silicon oxide film (SiO ₂ ) was formed to 150 nm as the gate insulating film 316 by plasma CVD (FIG. 4C).

  Next, a metal film whose main component is aluminum (not shown) is formed. In this embodiment, an aluminum film containing 2 wt% scandium is used (FIG. 4D).

  Next, an anodized film 318 is formed on the exposed surface of the metal film by anodizing. Reference numeral 317 denotes a portion of the metal film that has not been anodized (FIG. 4D).

  Next, resists 319 to 323 are formed on the anodic oxide film. Then, the anodic oxide film 318 and the metal film 317 are patterned to produce an original gate electrode. Next, porous anodic oxide films 324 to 332 are formed by a known anodic oxidation technique (FIG. 5A).

  Further, non-porous anodic oxide films 334 to 338 and gate electrodes 339 to 343 are formed by a known anodic oxidation technique (FIG. 5B).

  Next, the gate insulating film 316 is etched using the gate electrodes 339 to 343 and the porous anodic oxide films 324 to 332 as masks. Then, the porous anodic oxide films 324 to 332 are removed to obtain the state of FIG. In FIG. 5C, reference numerals 344 to 348 denote processed gate insulating films.

  Next, an impurity element adding step for imparting one conductivity is performed. As the impurity element, P (phosphorus) or As (arsenic) may be used for the N channel type, and B (boron) or Ga (gallium) may be used for the P type.

  In this embodiment, the impurity addition for forming the N-channel and P-channel TFTs is performed in two steps.

First, an impurity is added to form an N-channel TFT. First, the first impurity addition (P (phosphorus) is used in this embodiment) is performed at a high acceleration voltage of about 90 keV to form an n ⁻ region. The n ⁻ region is adjusted so that the P ion concentration is 1 × 10 ¹⁸ atoms / cm ³ to 1 × 10 ¹⁹ atoms / cm ³ .

Further, a second impurity addition is performed at a low acceleration voltage of about 10 keV to form an n ⁺ region. At this time, since the acceleration voltage is low, the gate insulating film functions as a mask. The n ⁺ region is adjusted so that the sheet resistance is 500Ω or less (preferably 300Ω or less).

  Next, a resist mask (not shown) is provided so as to cover the N-channel TFT, and impurity ions imparting P-type (boron is used in this embodiment) are added.

  This step is also performed in two steps, similar to the impurity addition step described above. However, since it is necessary to invert the N channel type to the P channel type, the concentration of B ( Boron) ions are added.

  In this way, active layers of N-channel TFTs and P-channel TFTs are formed (FIG. 5D). Note that 349 to 353 each serve as a channel formation region.

  When the active layer is completed as described above, impurity ions are activated by a combination of furnace annealing, laser annealing, lamp annealing and the like. At the same time, the damage of the active layer received in the addition process is also repaired.

  Next, after forming a laminated film of a silicon nitride film (250 と) and a silicon oxide film (9000Å) as an interlayer insulating film 354 and forming contact holes, the source electrodes 355 to 357 and the drain electrodes 358 and 359 are formed. A state shown in FIG. 6A is obtained by forming a metal film having a three-layer structure of Ti / Al / Ti. Note that an organic resin film can also be used as the interlayer insulating film 354.

Next, a first interlayer insulating film 360 made of an organic resin film is formed to a thickness of 0.5 to 3 μm. In this embodiment, polyimide is used for the first interlayer insulating film. As the organic resin film, polyimide, acrylic, polyimide amide, or the like is used.
Advantages of the organic resin film include that the film formation method is simple, the film thickness can be easily increased, the parasitic capacitance can be reduced because the relative dielectric constant is low, and the flatness is excellent. . An organic resin film other than those described above can also be used.

  Next, a black mask 361 made of a light-shielding film is formed on the first interlayer insulating film 360 to a thickness of 200 nm. In this embodiment, a titanium film is used as the black mask 361, but a resin film containing a black pigment can also be used.

  Note that. In the case where a titanium film is used for the black mask 361, part of the wiring of the driver circuit and other peripheral circuit portions can be formed using titanium. The titanium wiring can be formed at the same time as the black mask 361 is formed.

  After the black mask 361 is formed, a polyimide film is formed as the second interlayer insulating film 362. Note that a silicon oxide film, a silicon nitride film, or a laminated film thereof is formed to a thickness of 0.1 μm to 0.3 μm instead of polyimide or another organic resin film. Then, contact holes are formed in the first interlayer insulating film 360 and the second interlayer insulating film 362, and the pixel electrode 363 is formed to a thickness of 120 nm. Note that since this embodiment is an example of a transmissive active matrix liquid crystal display device, a transparent conductive film such as ITO was used as a conductive film forming the pixel electrode 363 (FIG. 6B).

  Next, the entire substrate is heated in a hydrogen atmosphere at 350 ° C. for 1 to 2 hours, and the entire device is hydrogenated to compensate for dangling bonds (unpaired bonds) in the film (particularly in the active layer). Through the above steps, a CMOS circuit and a pixel TFT including an N-channel TFT and a P-channel TFT can be manufactured on the same substrate. Thus, the active matrix substrate of the active matrix type liquid crystal display device of this embodiment is manufactured. As illustrated, in this embodiment, the pixel TFT has a triple gate electrode structure. By doing so, the OFF current of the pixel TFT can be reduced.

  Next, a process of manufacturing an active matrix liquid crystal display device based on the active matrix substrate manufactured by the above process will be described.

  An alignment film 364 is formed over the active matrix substrate in the state of FIG. In this embodiment, polyimide is used for the alignment film 364. Next, a counter substrate is prepared. The counter substrate includes a glass substrate 365, a transparent conductive film 366, and an alignment film 364.

  In this embodiment, a polyimide film in which liquid crystal molecules are aligned in parallel to the substrate is used for the alignment film. Note that after the alignment film is formed, a rubbing process is performed so that the liquid crystal molecules are aligned in parallel with a certain pretilt angle.

  Next, the active matrix substrate and the counter substrate that have undergone the above-described steps are bonded to each other through a sealing material, a spacer (both not shown), and the like by a known cell assembling step. Thereafter, liquid crystal 366 is injected between both the substrates and completely sealed with a sealant (not shown). Thus, a transmissive active matrix liquid crystal display device as shown in FIG. 6C is completed.

  In this embodiment, the liquid crystal panel performs display in the TN (twisted nematic) mode. Therefore, a pair of polarizing plates (not shown) are arranged so as to sandwich the active matrix liquid crystal display device in a crossed Nicol state (a pair of polarizing plates in which the polarization axes are orthogonal to each other). .

  FIG. 7 shows an SEM photograph of a TFT manufactured by this manufacturing method.

  Next, characteristics of the TFT manufactured by the manufacturing method of this example are shown. Please refer to FIG. FIG. 8 shows an Id-Vg curve (drain current-gate voltage curve) of a TFT manufactured by the manufacturing method of this example. Reference numeral 801 denotes a curve indicating the characteristics of the N-channel TFT, and reference numeral 802 denotes a curve indicating the characteristics of the P-channel TFT.

  Both the N-channel TFT and the P-channel TFT exhibit characteristics with a small threshold value. Table 1 below shows the characteristics of the N-channel TFT and the P-channel TFT.

In Table 1, Ion is ON current, Ioff is OFF current, Vth is threshold voltage, S is S value, μ is mobility, L / W is channel length / channel width, and LDD is low concentration impurity region ( n ⁻ or p ⁻ region), GI represents the thickness of the gate insulating film.

  Reference is now made to FIGS. 9 and 10 show the operating frequency characteristics of the shift register 101-1 when the active matrix liquid crystal display device of this embodiment is manufactured by the manufacturing method of this embodiment. FIG. 9 shows the case where the channel length of the P-channel TFT and N-channel TFT constituting the shift register 101-1 is 4 μm, and FIG. 10 shows the case where the channel length is 1.5 μm.

  In FIG. 9, when the applied voltage is 3 V, the maximum is about 0.5 MHz, when the voltage is 4 V, the maximum is about 2 MHz, when the voltage is 5 V, the maximum is about 5 MHz, when the voltage is 6 V, the maximum is about 9 MHz, when the voltage is 7 V, the maximum is about 11 MHz. It is shown that it operates at a maximum of about 16 MHz at 13 MHz and 9 V.

  In FIG. 10, when the applied voltage is 4V, the maximum is about 20 MHz, when it is 5V, the maximum is about 40 MHz, when it is 6V, the maximum is about 60 MHz, when it is 7V, the maximum is about 70 MHz, and when it is 8V, the maximum is about 80. It is shown that it operates at a maximum of about 100 MHz at a frequency of several MHz and 8.5V. Therefore, it can be seen that the active matrix liquid crystal display device of this example realizes high-speed driving according to the manufacturing method of this example.

  Next, FIG. 11 shows a pattern photograph of the data line driving circuit 101 of the active matrix type liquid crystal display device of this embodiment. It is understood that the shift register 101-1, NAND circuit, level shifter 101-2, and buffer 101-3 are formed.

  FIG. 12 shows a display example of the active matrix liquid crystal display device of this embodiment. Despite being a small active matrix liquid crystal display device of 4.5 inches, a high resolution of VGA has been achieved.

  The power consumption of the active matrix type liquid crystal display device according to the manufacturing method of this embodiment is 39.9 mW, which is about half of the conventional active matrix type liquid crystal display device (about 6% of the active matrix type liquid crystal display device made of amorphous silicon). 1) power consumption is achieved.

  Therefore, the active matrix type liquid crystal display device of this embodiment can achieve high definition, high resolution, and high image quality while being small in size, and can significantly reduce power consumption as compared with the prior art.

  In this example, in the manufacturing method of Example 1, in the step of FIG. 3D, the mask was removed, and laser irradiation was performed to activate phosphorus in the active layer film.

  An excimer laser with high output was used for laser irradiation. An excimer laser with a linearly processed beam was used to increase the processing speed. Specifically, a laser beam having a width of 0.5 mm and a length of 12 cm is formed by a KrF excimer laser and a predetermined lens group, and the beam is scanned relative to the substrate in the width direction of the linear beam. Laser irradiation was performed on the entire surface.

  The effect was similar when other types of excimer lasers, for example, XeCl excimer lasers were used. The effect was the same even when a laser beam not processed into a linear shape was used. The sheet resistance of phosphorus activated in this way was about 2 KΩ / □.

  Subsequent steps are the same as those in the first embodiment.

  According to the manufacturing method of this example, since phosphorus is activated, the gettering ability of a catalytic element such as nickel is improved and enhanced by the electrical force. On the other hand, nickel receives energy at the time of activating phosphorus and diffuses as nickel silicide in the film, so that nickel is more easily gettered.

  In this embodiment, the laser irradiation process for improving the gettering ability shown in Embodiment 2 is replaced with RTA.

  RTA is an abbreviation for RAPID THERMAL ANNEALING. In RTA, strong light mainly emitting infrared light typified by a halogen lamp is used as a light source, and only the film attached to the substrate surface can be heated in a short time.

  However, the heating time can not be shortened as much as that of a laser, and the substrate is also slightly heated due to the reason that the wavelength region is mainly in the infrared region (excimer laser light is ultraviolet light).

Therefore, it is difficult to give high energy to the film as compared with the laser, but since the energy is more stable than the laser, more uniform annealing can be performed.
Further, RTA has the ability to give the active layer sufficient energy required in this embodiment.

  The RTA used in this example has a halogen lamp. The RTA used in this embodiment has a beam-shaped light beam processed into a linear shape, and increases the processing efficiency. The processing method is almost the same as the method using a linear laser. However, unlike a laser, the processing time is somewhat longer, so the substrate may not withstand a rapid temperature change and may crack. Therefore, it is necessary to raise the substrate temperature before processing.

  In this example, the temperature of the substrate was previously heated to 350 ° C., and then the substrate was irradiated with a halogen lamp while scanning the substrate in the same manner as the laser.

  The effect was the same even when the halogen lamp was replaced with an arc lamp. Further, the RTA beam does not necessarily have to be processed into a linear shape. In the production method shown in Example 1, only the laser irradiation step was replaced with the RTA step, and the sheet resistance of the obtained film was 5 kΩ / □. Thereafter, the steps may be performed in the same procedure as in the first embodiment. The material produced by the method shown in this example had almost the same characteristics as those obtained in Example 1.

  According to the manufacturing methods of Examples 1 to 3, the active matrix type liquid crystal display device of the present invention is manufactured by the top gate type TFT. However, the active matrix type liquid crystal display device of the present invention is formed by the inverted stagger type TFT. You may be blamed for this.

  In Examples 1 to 4, the TN mode using nematic liquid crystal is used as the display mode of the active matrix liquid crystal display device of the present invention. A so-called polymer dispersion mode can also be used.

  In addition to the TN liquid crystal, various liquid crystals can be used for the active matrix liquid crystal display device manufactured according to the above embodiment. For example, 1998, SID, "Characteristics and Driving Scheme of Polymer-Stabilized Monostable FLCD Exhibiting Fast Response Time and High Contrast Ratio with Gray-Scale Capability" by H. Furue et al., 1997, SID DIGEST, 841, "A Full -Color Thresholdless Antiferroelectric LCD Exhibiting Wide Viewing Angle with Fast Response Time "by T. Yoshida et al., 1996, J. Mater. Chem. 6 (4), 671-673," Thresholdless antiferroelectricity in liquid crystals and its application to The liquid crystal disclosed in "displays" by S. Inui et al. or US Pat. No. 5,945,569 can be used.

  Further, the active matrix type liquid crystal display device of the present invention may be configured using thresholdless antiferroelectric liquid crystal having a high response speed.

  A liquid crystal exhibiting an antiferroelectric phase in a certain temperature range is called an antiferroelectric liquid crystal. Among mixed liquid crystals having antiferroelectric liquid crystals, there is a so-called thresholdless antiferroelectric mixed liquid crystal that exhibits electro-optic response characteristics in which transmittance continuously changes with respect to an electric field. This thresholdless antiferroelectric mixed liquid crystal has a V-shaped electro-optic response characteristic, and a drive voltage of about ± 2.5 V (cell thickness of about 1 μm to 2 μm) is also found. ing.

  Here, FIG. 14 shows an example of the light transmittance characteristics of the thresholdless antiferroelectric mixed liquid crystal exhibiting a V-shaped electro-optic response with respect to the applied voltage. The vertical axis of the graph shown in FIG. 14 is the transmittance (arbitrary unit), and the horizontal axis is the applied voltage. The transmission axis of the polarizing plate on the incident side of the liquid crystal display device is set to be substantially parallel to the normal direction of the smectic layer of the thresholdless antiferroelectric mixed liquid crystal that substantially coincides with the rubbing direction of the liquid crystal display device. . Further, the transmission axis of the output-side polarizing plate is set to be substantially perpendicular (crossed Nicols) to the transmission axis of the incident-side polarizing plate.

  As shown in FIG. 14, it can be seen that when such a thresholdless antiferroelectric mixed liquid crystal is used, low voltage driving and gradation display are possible.

  When such a low-voltage thresholdless antiferroelectric mixed liquid crystal is used in a liquid crystal display device having an analog driver, the power supply voltage of the image signal sampling circuit is suppressed to about 5V to 8V, for example. Is possible. Therefore, the operating power supply voltage of the driver can be lowered, and low power consumption and high reliability of the liquid crystal display device can be realized.

  Further, even when such a low-voltage thresholdless antiferroelectric mixed liquid crystal is used in a liquid crystal display device having a digital driver, the output voltage of the D / A conversion circuit can be lowered. The operating power supply voltage of the A conversion circuit can be lowered, and the operating power supply voltage of the driver can be lowered. Therefore, low power consumption and high reliability of the liquid crystal display device can be realized.

  Therefore, using such a thresholdless antiferroelectric mixed liquid crystal driven at a low voltage makes it possible to use a TFT (for example, 0 nm to 500 nm or 0 nm to 200 nm) having a relatively small LDD region (low concentration impurity region). It is also effective when used.

  In general, the thresholdless antiferroelectric mixed liquid crystal has a large spontaneous polarization, and the dielectric constant of the liquid crystal itself is high. For this reason, when a thresholdless antiferroelectric mixed liquid crystal is used in a liquid crystal display device, a relatively large storage capacitor is required for the pixel. Therefore, it is preferable to use a thresholdless antiferroelectric mixed liquid crystal having a small spontaneous polarization. Further, the driving method of the liquid crystal display device may be line-sequential driving, so that the period of writing the gradation voltage to the pixel (pixel feed period) may be lengthened to compensate for the small storage capacity. .

  In addition, since low voltage driving is realized by using such a thresholdless antiferroelectric mixed liquid crystal, low power consumption of the liquid crystal display device is realized.

  Note that any liquid crystal having electro-optical characteristics as shown in FIG. 14 can be used as the display medium of the active matrix liquid crystal display device of the present invention.

  In addition, any other display medium whose optical characteristics can be modulated in response to an applied voltage may be used for the semiconductor display device of the present invention. For example, an electroluminescent element may be used.

  The semiconductor display devices of Examples 1 to 5 have various uses. In this embodiment, a semiconductor device incorporating the semiconductor display device of the present invention will be described.

  Examples of such a semiconductor device include a video camera, a still camera, a projector, a head mounted display, a car navigation system, a personal computer, a portable information terminal (such as a mobile computer and a mobile phone). An example of them is shown in FIG.

  FIG. 13A illustrates a mobile phone, which includes a main body 1301, an audio output portion 1302, an audio input portion 1303, a semiconductor display device 1304, operation switches 1305, and an antenna 1306.

  FIG. 13B illustrates a video camera which includes a main body 1307, a semiconductor display device 1308, an audio input portion 1309, operation switches 1310, a battery 1311, and an image receiving portion 1312.

  FIG. 13C illustrates a mobile computer which includes a main body 1313, a camera unit 1314, an image receiving unit 1315, an operation switch 1316, and a semiconductor display device 1317.

  FIG. 13D illustrates a head mounted display which includes a main body 1318, a semiconductor display device 1319, and a band portion 1320.

100 active matrix circuit 100-1 pixel TFT
100-2 Liquid crystal 100-3 Auxiliary capacitor 101 Data line driving circuit 101-1 Shift register 101-2 Level shifter 101-3 Buffer 102 Scan line driving circuit (right)
102-1 Shift register 102-2 Level shifter 102-3 Buffer 103 Scan line drive circuit (left)
103-1 Shift register 103-2 Level shifter 103-3 Buffer 104 Video input signal line 105 Analog switch

Claims (7)

An active matrix circuit having a plurality of pixel TFTs arranged in a matrix on a substrate;
A data line driving circuit and a scanning line driving circuit having a plurality of TFTs for driving the active matrix circuit;
A method for manufacturing a semiconductor display device,
Forming an amorphous silicon film on the substrate;
Adding a catalyst element for promoting crystallization of the amorphous silicon film to the amorphous silicon film;
By heat treatment, the amorphous silicon film is crystallized to form a polycrystalline silicon film,
Forming a first region covered by a mask and a second region not covered by the mask on the polycrystalline silicon film;
Doping the second region with phosphorus using the mask;
Removing the mask, irradiating the polycrystalline silicon film with a laser, activating the phosphorus;
The catalyst element is gettered from the first region to the second region by a heat treatment at a temperature at which the catalyst element can travel a distance of 100 μm or more,
Patterning the polycrystalline silicon film so that the second region does not remain to form a plurality of polycrystalline silicon films;
Forming a gate insulating film on the plurality of patterned polycrystalline silicon films;
Forming a gate electrode on the gate insulating film;
An impurity element imparting one conductivity is added to the plurality of patterned polycrystalline silicon films, and an impurity region is formed to form a pixel TFT of the active matrix circuit, a TFT of the data line driving circuit, and a scanning line driving circuit And a method for manufacturing a semiconductor display device. An active matrix circuit having a plurality of pixel TFTs arranged in a matrix on a substrate;
A data line driving circuit and a scanning line driving circuit having a plurality of TFTs for driving the active matrix circuit;
A method for manufacturing a semiconductor display device,
Forming an amorphous silicon film on the substrate;
Adding a catalyst element for promoting crystallization of the amorphous silicon film to the amorphous silicon film;
By heat treatment, the amorphous silicon film is crystallized to form a polycrystalline silicon film,
Forming a first region covered by a mask and a second region not covered by the mask on the polycrystalline silicon film;
Doping the second region with phosphorus using the mask;
Removing the mask, heat-treating the polycrystalline silicon film with RTA to activate the phosphorus;
The catalyst element is gettered from the first region to the second region by a heat treatment at a temperature at which the catalyst element can travel a distance of 100 μm or more,
Patterning the polycrystalline silicon film so that the second region does not remain to form a plurality of polycrystalline silicon films;
Forming a gate insulating film on the plurality of patterned polycrystalline silicon films;
Forming a gate electrode on the gate insulating film;
An impurity element imparting one conductivity is added to the plurality of patterned polycrystalline silicon films, and an impurity region is formed to form a pixel TFT of the active matrix circuit, a TFT of the data line driving circuit, and a scanning line driving circuit And a method for manufacturing a semiconductor display device. An active matrix circuit having a plurality of pixel TFTs arranged in a matrix on a substrate;
A data line driving circuit and a scanning line driving circuit having a plurality of TFTs for driving the active matrix circuit;
A method for manufacturing a semiconductor display device,
Forming an amorphous silicon film on the substrate;
Adding a catalyst element for promoting crystallization of the amorphous silicon film to the amorphous silicon film;
By heat treatment, the amorphous silicon film is crystallized to form a polycrystalline silicon film,
Laser annealing the polycrystalline silicon film;
Forming a first region covered by a mask and a second region not covered by the mask on the polycrystalline silicon film;
Doping the second region with phosphorus using the mask;
Removing the mask, irradiating the polycrystalline silicon film with a laser, activating the phosphorus;
The catalyst element is gettered from the first region to the second region by a heat treatment at a temperature at which the catalyst element can travel a distance of 100 μm or more,
Patterning the polycrystalline silicon film so that the second region does not remain to form a plurality of polycrystalline silicon films;
Forming a gate insulating film on the plurality of patterned polycrystalline silicon films;
Forming a gate electrode on the gate insulating film;
An impurity element imparting one conductivity is added to the plurality of patterned polycrystalline silicon films, and an impurity region is formed to form a pixel TFT of the active matrix circuit, a TFT of the data line driving circuit, and a scanning line driving circuit And a method for manufacturing a semiconductor display device. An active matrix circuit having a plurality of pixel TFTs arranged in a matrix on a substrate;
A data line driving circuit and a scanning line driving circuit having a plurality of TFTs for driving the active matrix circuit;
A method for manufacturing a semiconductor display device,
Forming an amorphous silicon film on the substrate;
Adding a catalyst element for promoting crystallization of the amorphous silicon film to the amorphous silicon film;
By heat treatment, the amorphous silicon film is crystallized to form a polycrystalline silicon film,
Laser annealing the polycrystalline silicon film;
Forming a first region covered by a mask and a second region not covered by the mask on the polycrystalline silicon film;
Doping the second region with phosphorus using the mask;
Removing the mask, heat-treating the polycrystalline silicon film with RTA to activate the phosphorus;
The catalyst element is gettered from the first region to the second region by a heat treatment at a temperature at which the catalyst element can travel a distance of 100 μm or more,
Patterning the polycrystalline silicon film so that the second region does not remain to form a plurality of polycrystalline silicon films;
Forming a gate insulating film on the plurality of patterned polycrystalline silicon films;
Forming a gate electrode on the gate insulating film;
An impurity element imparting one conductivity is added to the plurality of patterned polycrystalline silicon films, and an impurity region is formed to form a pixel TFT of the active matrix circuit, a TFT of the data line driving circuit, and a scanning line driving circuit And a method for manufacturing a semiconductor display device. In any one of Claims 1 thru | or 4,
A method for manufacturing a semiconductor display device, wherein Ni is used as the catalyst element. In any one of Claims 1 thru | or 4,
The catalyst element may be one or more selected from Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Au, Ge, Pb, In, and Sn. A method for manufacturing a semiconductor display device. In any one of Claims 1 thru | or 6,
A method for manufacturing a semiconductor display device, wherein the mask uses an oxide film.

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