JP5064653B2 - ワックス印刷とリフトオフを使用するパターン生成方法及び印刷システム - Google Patents
ワックス印刷とリフトオフを使用するパターン生成方法及び印刷システム Download PDFInfo
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- JP5064653B2 JP5064653B2 JP2004367496A JP2004367496A JP5064653B2 JP 5064653 B2 JP5064653 B2 JP 5064653B2 JP 2004367496 A JP2004367496 A JP 2004367496A JP 2004367496 A JP2004367496 A JP 2004367496A JP 5064653 B2 JP5064653 B2 JP 5064653B2
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- 238000000034 method Methods 0.000 title claims description 101
- 239000000758 substrate Substances 0.000 claims description 40
- 238000005530 etching Methods 0.000 claims description 22
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- 229960001716 benzalkonium Drugs 0.000 claims 3
- CYDRXTMLKJDRQH-UHFFFAOYSA-N benzododecinium Chemical compound CCCCCCCCCCCC[N+](C)(C)CC1=CC=CC=C1 CYDRXTMLKJDRQH-UHFFFAOYSA-N 0.000 claims 3
- 239000010410 layer Substances 0.000 description 205
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- 238000013461 design Methods 0.000 description 26
- 229910052751 metal Inorganic materials 0.000 description 26
- 239000002184 metal Substances 0.000 description 26
- 229920002120 photoresistant polymer Polymers 0.000 description 25
- 238000004519 manufacturing process Methods 0.000 description 12
- 230000003628 erosive effect Effects 0.000 description 10
- 238000001459 lithography Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 239000002904 solvent Substances 0.000 description 6
- 238000004381 surface treatment Methods 0.000 description 6
- 238000005259 measurement Methods 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 239000000725 suspension Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000013519 translation Methods 0.000 description 3
- 238000009736 wetting Methods 0.000 description 3
- 239000012776 electronic material Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012782 phase change material Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 238000000527 sonication Methods 0.000 description 2
- 238000012795 verification Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 239000003989 dielectric material Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- FFUAGWLWBBFQJT-UHFFFAOYSA-N hexamethyldisilazane Chemical compound C[Si](C)(C)N[Si](C)(C)C FFUAGWLWBBFQJT-UHFFFAOYSA-N 0.000 description 1
- 230000005660 hydrophilic surface Effects 0.000 description 1
- 230000005661 hydrophobic surface Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
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- 238000007650 screen-printing Methods 0.000 description 1
- 239000002094 self assembled monolayer Substances 0.000 description 1
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- 239000007779 soft material Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0335—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Weting (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
Claims (8)
- リフトオフ操作を実施する方法であって、
第1のパターンと、前記第1のパターンの上に設けられる第2のパターンとを有するリフトオフパターンをベース層上に印刷するステップと、
前記ベース層上にブランケット層を形成し、ブランケット層の第1の部分がリフトオフパターンを被覆するステップと、および
前記リフトオフパターンとブランケット層の前記第1の部分を前記ベース層から除去して、パターン生成されたブランケット層を生成するステップと、
を含み、
前記リフトオフパターンは、
前記第2のパターンを溶着する前に前記第1のパターンを部分的に凝固させることで形成される波形の輪郭を含む側壁を有することを特徴とするリフトオフ操作を実施する方法。 - 集積回路(IC)を生成する方法であって、
第1のパターンと、前記第1のパターンの上に設けられる第2のパターンとを有するリフトオフパターンをベース層上に印刷し、前記ベース層が半導体デバイスの接点を被覆するステップと、
前記ベース層上にブランケット層を形成し、ブランケット層の第1の部分がリフトオフパターンを被覆するステップと、
前記リフトオフパターンとブランケット層の前記第1の部分を除去して、パターン生成されたブランケット層を生成するステップと、および
前記ベース層を前記パターン付けされたブランケット層を通してエッチングし、パターン生成されたベース層を形成し、前記パターン生成されたベース層が半導体デバイスの前記接点への通過点を備えるステップと、
を含み、
前記リフトオフパターンは、
前記第2のパターンを溶着する前に前記第1のパターンを部分的に凝固させることで形成される波形の輪郭を含む側壁を有することを特徴とする集積回路を生成する方法。 - ベースパターンをベース層中にエッチングする方法であって、
第1のパターンと、前記第1のパターンの上に設けられる第2のパターンとを有するリフトオフパターンをベース層上に印刷するステップと、
前記ベース層上にブランケット層を形成し、ブランケット層の第1の部分がリフトオフパターン上に形成されるステップと、
前記リフトオフパターンとブランケット層の前記第1の部分を除去して、パターン生成されたブランケット層を生成するステップと、および
前記パターン生成されたブランケット層をエッチングマスクとして使用して前記ベース層をエッチングして、前記ベースパターンを生成するステップと、
を含み、
前記リフトオフパターンは、
前記第2のパターンを溶着する前に前記第1のパターンを部分的に凝固させることで形成される波形の輪郭を含む側壁を有することを特徴とするベースパターンをベース層中にエッチングする方法。 - 被印刷体のベース層上に、第1のパターンと、前記第1のパターンの上に設けられる第2のパターンとを有するリフトオフパターンを印刷する印刷システムであって、
被印刷体を支承する載台と、
印刷流体を前記ベース層上に噴射して、前記リフトオフパターンを形成するプリントヘッドと、
前記載台に関して前記プリントヘッドを平行移動する位置決め機構と、および
前記位置決め機構と前記プリントヘッドを制御して、印刷流体の多層を前記ベース層上の選択された位置へ噴射するコントローラと、
を備え、
前記リフトオフパターンは、
前記第2のパターンを溶着する前に前記第1のパターンを部分的に凝固させることで形成される波形の輪郭を含む側壁を有することを特徴とする印刷システム。 - 請求項1に記載のリフトオフ操作を実施する方法において、
前記第1のパターンは、第1の液体を含み、
前記第2のパターンは、第2の液体を含み、
前記リフトオフパターンは、
前記第1の液体の上に前記第2の液体を印刷することによって積層形成されることを特徴とするリフトオフ操作を実施する方法。 - 請求項2に記載の集積回路を生成する方法において、
前記第1のパターンは、第1の液体を含み、
前記第2のパターンは、第2の液体を含み、
前記リフトオフパターンは、
前記第1の液体の上に前記第2の液体を印刷することによって積層形成されることを特徴とする集積回路を生成する方法。 - 請求項3に記載のベースパターンをベース層中にエッチングする方法において、
前記第1のパターンは、第1の液体を含み、
前記第2のパターンは、第2の液体を含み、
前記リフトオフパターンは、
前記第1の液体の上に前記第2の液体を印刷することによって積層形成されることを特徴とするベースパターンをベース層中にエッチングする方法。 - 請求項4に記載の印刷システムにおいて、
前記第1のパターンは、第1の液体を含み、
前記第2のパターンは、第2の液体を含み、
前記リフトオフパターンは、
前記第1の液体の上に前記第2の液体を印刷することによって積層形成されることを特徴とする印刷システム。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/741,252 US7309563B2 (en) | 2003-12-19 | 2003-12-19 | Patterning using wax printing and lift off |
US10/741,252 | 2003-12-19 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005183994A JP2005183994A (ja) | 2005-07-07 |
JP5064653B2 true JP5064653B2 (ja) | 2012-10-31 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2004367496A Expired - Fee Related JP5064653B2 (ja) | 2003-12-19 | 2004-12-20 | ワックス印刷とリフトオフを使用するパターン生成方法及び印刷システム |
Country Status (2)
Country | Link |
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US (1) | US7309563B2 (ja) |
JP (1) | JP5064653B2 (ja) |
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KR20050032114A (ko) * | 2002-08-06 | 2005-04-06 | 아베시아 리미티드 | 유기 전기 소자 |
US6890050B2 (en) * | 2002-08-20 | 2005-05-10 | Palo Alto Research Center Incorporated | Method for the printing of homogeneous electronic material with a multi-ejector print head |
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2003
- 2003-12-19 US US10/741,252 patent/US7309563B2/en not_active Expired - Fee Related
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US20050136358A1 (en) | 2005-06-23 |
JP2005183994A (ja) | 2005-07-07 |
US7309563B2 (en) | 2007-12-18 |
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