JP5039890B2 - セル特性の解析のための電流源ドライバ・モデルの合成 - Google Patents
セル特性の解析のための電流源ドライバ・モデルの合成 Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
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Description
説明図を単純かつ明瞭にするために、図面に示される要素は必ずしも一定の尺度で描かれてはいないことを理解されたい。例えば、幾つかの要素の寸法は明瞭にするために、他の要素に比べて拡大されている可能性がある。
本発明は、請求項1において請求される方法、並びに、これに対応するシステム及びコンピュータ・プログラムを提供する。
101:DC電流源モデル
102:第1キャパシタンス(ミラー・キャパシタンス)
103:第2キャパシタンス
104:出力負荷
105:出力点
106:接地点
111:入力電圧刺激
112:出力電圧応答
601:ノイズのない入力立ち上り及び出力立ち下り遷移に対するGm(Vi,V0)の軌跡
602:レシーバ・ステージの相互コンダクタンス利得
1300:システム
1301:記憶装置
1302:データ処理装置
1310:セル・ライブラリ
1311:出力過渡電流に関するルックアップ・テーブルを生成するためのアルゴリズム
1312:解析的な電流源モデルを生成するためのアルゴリズム
1313:干渉ステージ間のアライメントを解析するためのアルゴリズム
1320:ネットリスト
Claims (7)
- 少なくとも1つのドライバを有する論理ステージの解析に用いるための電流源モデルをコンピュータにより作成する方法であって、
(a)出力過渡電流値に関するルックアップ・テーブルを生成するステップであって、
(a1)セル・ライブラリから利用可能な入力電圧に、第1の時間関数を曲線あてはめして入力電圧波形を生成するステップと、
(a2)セル・ライブラリから利用可能な出力電圧に、第2の時間関数を曲線あてはめして出力電圧波形を生成するステップと、
(a3)前記出力電圧波形を微分して出力過渡電流波形を生成するステップと、
(a4)前記入力電圧波形、前記出力電圧波形及び前記出力過渡電流波形から、所定の時間間隔で入力電圧値、出力電圧値及び出力過渡電流値をサンプリングするステップと、
(a5)サンプリングされた入力電圧値および出力電圧値に依存するようにサンプリングされた前記出力過渡電流値をソートするステップと、
(a6)予め規定した間隔の前記入力電圧値および前記出力電圧値において、前記出力過渡電流値を再サンプリングして、ルックアップ・テーブルを作成するステップと、を含む前記ルックアップ・テーブルを生成するステップと、
(b)前記ルックアップ・テーブルを用いて、DC成分と複数の寄生キャパシタンスとを含む電流源モデルを作成するステップであって、
(b1)電流源モデルのDC成分を入力電圧を変数とする双曲線正接関数を用いて表すステップと、
(b2)前記双曲線正接関数を、前記ルックアップ・テーブルから利用可能な前記出力過渡電流の値の第1のサブセットに曲線あてはめして、前記双曲線正接関数のパラメータを決定するステップと、
(b3)過渡電流源モデルを入出力電圧を変数とする所定の解析式を用いて表すステップと、
(b4)前記所定の解析式を、前記ルックアップ・テーブルから利用可能な前記出力過渡電流の値の第2のサブセットに曲線あてはめして、複数の寄生キャパシタンス値を決定するステップと、を含む前記電流源モデルを作成するステップと、
を備える方法。 - 前記ルックアップ・テーブルを生成するステップ(a)は、前記ステップ(a2)から(a4)までに代わって、
(a20)セル・ライブラリから利用可能な出力過渡電流に、第3の時間関数を曲線あてはめして第2の出力過渡電流波形を生成するステップと、
(a30)前記第2の出力電流波形を積分して第2の出力電圧波形を生成するステップと、
(a40)前記入力電圧波形、前記第2の出力電圧波形及び前記第2の出力過渡電流波形から、所定の時間間隔で入力電圧値、出力電圧値及び出力過渡電流値をサンプリングするステップと、を含む、請求項1に記載の方法。 - 前記セル・ライブラリは、Effective Current Source(ECS)モデルに適合するデータを含む、請求項1または2に記載の方法。
- 前記セル・ライブラリは、Composite Current Source(CCS)モデルに適合するデータを含む、請求項2に記載の方法。
- 前記ステップ(a1)は、前記セル・ライブラリから利用可能な入力電圧に、飽和傾斜近似(Saturated Ramp Approximation)および入力スルーの値を用いて、前記入力電圧波形を生成することを含む、請求項1〜4のいずれか1項に記載の方法。
- 前記第2の時間関数は、ワイブル累積分布関数を含む、請求項1に記載の方法。
- 前記第3の時間関数は2次関数を含む、請求項2に記載の方法。
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US11/311,038 US7761275B2 (en) | 2005-12-19 | 2005-12-19 | Synthesizing current source driver model for analysis of cell characteristics |
US11/311,038 | 2005-12-19 | ||
PCT/EP2006/069655 WO2007071601A1 (en) | 2005-12-19 | 2006-12-13 | Synthesizing current source driver model for analysis of cell characteristics |
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JP5039890B2 true JP5039890B2 (ja) | 2012-10-03 |
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EP (1) | EP1969503A1 (ja) |
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CN (1) | CN101341488B (ja) |
TW (1) | TW200805101A (ja) |
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DE60140869D1 (de) * | 2000-05-12 | 2010-02-04 | Simplex Solutions Inc | Hochgenaues taktierungsmodell für die prüfung von integrierten schaltungen |
US7444605B2 (en) * | 2005-10-06 | 2008-10-28 | Synopsys, Inc. | Generating a base curve database to reduce storage cost |
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US20070143719A1 (en) | 2007-06-21 |
CN101341488A (zh) | 2009-01-07 |
EP1969503A1 (en) | 2008-09-17 |
WO2007071601A1 (en) | 2007-06-28 |
TW200805101A (en) | 2008-01-16 |
CN101341488B (zh) | 2012-06-27 |
WO2007071601A9 (en) | 2008-02-21 |
US7761275B2 (en) | 2010-07-20 |
JP2009520254A (ja) | 2009-05-21 |
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