JP5026095B2 - Game machine - Google Patents

Description

  The present invention is provided with a predetermined first frame and a predetermined second frame rotatably attached to the predetermined first frame, and performs a predetermined game using a game ball. And a variable display device that variably displays a plurality of types of identification information that can be distinguished from each other and displays and displays a display result, and when a specific display result is derived and displayed on the variable display device, The present invention relates to a gaming machine that shifts to an advantageous specific gaming state.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, there is provided a variable display device capable of changing the display state, and configured to give a predetermined game value to the player when the display result of the variable display device is in a predetermined specific display mode. is there.

  The game value is the right that the state of the variable winning ball apparatus provided in the gaming area of the gaming machine becomes advantageous for a player who is easy to win, and the right for becoming advantageous for a player. In other words, or a condition for winning a prize ball is easily established.

  In a pachinko gaming machine, the combination of a specific display mode with a predetermined display result of a variable display on a variable display device is usually referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win.

  Further, in the pachinko gaming machine, various doors are provided that can be opened and closed in order to perform game board replacement work or maintenance work. For example, a gaming frame is attached to a gaming machine so as to be openable and closable with respect to an outer frame of the gaming machine, or a glass frame is attached so as to be openable and closable with respect to the gaming frame. In such a gaming machine, there is one that can detect that a door such as a gaming frame or a glass frame is opened in order to prevent an illegal act from being performed by opening the gaming frame or the glass frame. . For example, in Patent Document 1, a detection signal from each opening switch that detects that the front door frame or the main body frame provided in the gaming machine is opened can be output to the hall computer via the frame external terminal plate. The gaming machine which was made is described. Further, Patent Document 1 describes that a backup power source that can supply power is provided to each open switch and frame external terminal plate even when power supply to the gaming machine is stopped. .

Japanese Patent Laying-Open No. 2006-26032 (paragraphs 0155-0161)

  If the gaming machine described in Patent Document 1 is used, an illegal act performed by opening a door such as a game frame or a glass frame can be prevented. However, it is not possible to effectively prevent fraudulent acts such as illegally opening a big prize opening by using a piano wire or the like without opening a door such as a game frame or a glass frame and generating an illegal prize.

  Therefore, the present invention provides a gaming machine that can prevent an illegal act that is performed by opening a door provided in the gaming machine and that can generate an illegal prize without opening the door. For the purpose.

A gaming machine according to the present invention includes a predetermined first frame (for example, a game frame 11) and a predetermined second frame (for example, a glass door frame) that is rotatably attached to the predetermined first frame. 2 and a mechanism board 11A), and a predetermined game can be played using a game ball, and a plurality of types of identification information (for example, effect symbols) can be variably displayed and display results are displayed. A variable display device (for example, an effect display device 9), and when a specific display result (for example, jackpot symbol) is derived and displayed on the variable display device, a specific gaming state (for example, advantageous for the player) When the gaming machine is switched to the big hit gaming state, the opening detection means (for example, the door opening switch 155a) for detecting that the predetermined second frame is opened, and the power supply to the gaming machine is stopped. Even open detection means When the power supply to the gaming machine is stopped based on a backup power source that can supply power (for example, backup power source 505) and that the opening detection means detects that the predetermined second frame has been opened. Even if it is, a frame opening detection signal (for example, a door opening signal) indicating that the opening of the predetermined second frame has been detected can be output to an external device (for example, a hall computer) provided outside the gaming machine. An information output board (for example, information terminal board 34), a variable winning ball apparatus (for example, special variable winning ball apparatus 20) that can be changed to an open state in a specific gaming state, and a gaming ball that has won a prize in the variable winning ball apparatus. A winning detection means (for example, the count switch 23) that detects and outputs a winning detection signal (for example, a detection signal of the count switch 23), and a complex for controlling the progress of the game. Process processing execution means for updating the process flag value necessary for executing the types of processing in a predetermined order when a condition to be updated is satisfied, and executing processing corresponding to the value of the process flag, and winning detection means Winning determination means for determining whether or not a winning detection signal is input (for example, a part for executing the processing of steps S331 to S338, S1351 to S1356 and S1361 in the game control microcomputer 560. In particular, a count switch input. The portion where the processing of steps S1355 and S1361 is executed using the bit determination value) and whether or not the process flag is a numerical value greater than or equal to a predetermined value. When it is determined that the value indicates a value other than the predetermined range, the winning determination means outputs a winning detection signal. An abnormal winning is determined by the abnormal winning determination means (for example, the part that executes steps S255A to S258 in the game control microcomputer 560) and the abnormal winning determination means that determines that an abnormal winning has occurred. Abnormality notification means for executing an abnormal notification indicating that an abnormal winning has occurred based on the determination that it has occurred (for example, a portion that executes steps S1943 to S1948 and S1977 to S1982 in the production control microcomputer 100). The predetermined range includes a value corresponding to a process for controlling the variable winning ball apparatus to an open state.

  The information output board is provided with photorelays (for example, semiconductor relays (PhotoMOS relays) PC1 to PC9), and the photorelay is supplied from a backup power source even when power supply to the gaming machine is stopped. (For example, the semiconductor relay PC9 of the information terminal board 34 is driven by the power supplied from the backup power source 505 of the main board 31).

  When the power supply to the gaming machine is stopped, the gaming machine uses a backup power source to circuit and circuit elements other than the photo relay provided on the information output board among the circuits and circuit elements provided in the gaming machine. Even if it is configured to include a backflow prevention circuit (for example, backflow prevention diode 917 shown in FIG. 11 and backflow prevention diode 506a shown in FIG. 15) that prevents the current of Good.

  A gaming machine can play a predetermined game by a player using a game medium (for example, a game ball), and a game based on the fact that a payout condition is satisfied (for example, a game ball wins a winning opening). A game machine for paying out a medium to a player, and a game control board (for example, a main board) on which game control means (for example, a game control microcomputer 560) for executing a game control process for controlling the progress of the game is mounted 31), a payout means (for example, a ball payout device 97) for paying out game media, and a payout control means (for example, a payout control microcomputer 370) for executing a payout control process for controlling the payout means. A payout control board (for example, the payout control board 37) and a payout detecting means (for example, a payout number count switch 301) for detecting that the game medium has been paid out by the payout means. As an information output board, it is connected only to a game control board (for example, the main board 31), and one board (for example, a hall computer) that outputs input information to an external device (for example, a hall computer) outside the gaming machine An information terminal board 34) is provided, and the game control means controls information generated during execution of the game control process (for example, start port 1 signal, start port 2 signal, symbol determination number signal, jackpot 1 signal, jackpot 2 signal) Game control information output means (for example, a part for executing steps S4001 to S4071, S4110, 4111 in the game control microcomputer 560) for outputting a short time signal and a probability variation signal, Control information indicating that a game medium has been paid out based on the fact that the payout detection means has detected that a predetermined number of game media have been paid out. For example, a prize ball signal (a signal output to the information terminal board 34 in steps S4085 to S4111) is output to the information output board (for example, in an information output process (steps S4001 to S4111) by the game control microcomputer 560). The output signal may be input and output to the hall computer).

  The gaming machine has a glass frame (for example, a glass door frame 2) that is rotatably attached to the game frame, and a mechanism plate (for example, a game frame 11 that is rotated to the back side). A mechanism plate 11A) that is movably mounted, and the opening detection means outputs a frame opening detection signal when detecting that the glass frame is opened or the mechanism plate is opened (for example, The door opening switch 155a outputs a door opening signal when the glass door frame 2 or the mechanism plate 11A is opened), and the information output board receives a frame opening detection signal from the opening detection means via the game control board. (For example, the information terminal board 34 may be configured such that a door opening signal from the door opening switch 155a is connected via the backup power supply circuit 506 of the main board 31).

According to the first aspect of the present invention, the opening detection means for detecting that the predetermined second frame has been opened and the power supply to the opening detection means even when the power supply to the gaming machine is stopped. Even if the power supply to the gaming machine is stopped based on the possible backup power source and the fact that the opening detection means detects that the predetermined second frame is opened, the predetermined second Since it is configured to include an information output board capable of outputting a frame opening detection signal indicating that the opening of the frame has been detected to an external device provided outside the gaming machine, a predetermined second frame is provided. It is possible to effectively prevent fraudulent acts that are opened. Further, when the process flag is equal to or a value of a predetermined value or more, the process flag by determining not the numerical value of a predetermined value or more is determined to indicate a value other than the value of the predetermined range, Based on the fact that the winning determination means inputs a winning detection signal, an abnormal winning determination means that determines that an abnormal winning has occurred, and an abnormal winning that is determined by the abnormal winning determining means that the abnormal winning has been determined. An abnormality notification means for performing an abnormality notification indicating that the occurrence of the occurrence, and the predetermined range is configured to include a value corresponding to a process for controlling the variable winning ball apparatus to an open state. It is also possible to effectively prevent an illegal act that generates an illegal prize without opening the predetermined second frame. Therefore, it is possible to prevent an illegal act performed by opening a predetermined second frame provided in the gaming machine and preventing an illegal act causing an illegal prize without opening the predetermined second frame. it can.

  According to the second aspect of the present invention, the information output board is provided with a photorelay, and the photorelay is powered by the power supplied from the backup power supply even when the power supply to the gaming machine is stopped. Since it is configured to be driven, it is possible to prevent an illegal signal from being input to the game control board.

  According to the invention of claim 3, when power supply to the gaming machine is stopped, among circuits and circuit elements provided in the gaming machine, circuits and circuits other than the photorelay provided in the information output board Since the device is configured to include a backflow prevention circuit that prevents the current from the backup power supply from being supplied in reverse, the current can be prevented from being supplied in reverse, and the gaming machine It is possible to prevent a situation in which it is impossible to detect whether or not the predetermined second frame provided in is opened.

  According to the invention of claim 4, a game control board on which a game control means for executing a game control process for controlling the progress of the game is mounted, a payout means for paying out game media, and a payout for controlling the payout means A payout control board on which a payout control means for executing control processing is mounted, a payout detection means for detecting that a game medium has been paid out by the payout means, and only the game control board are connected. And an information output board for outputting to an external device outside the game control means, wherein the game control means includes game control information output means for outputting control information generated during execution of the game control process, and the game control information output means comprises: The payout detecting means is configured to output control information indicating that the game medium has been paid out to the information output board based on detecting that the predetermined number of game media have been paid out. Since, it is possible to realize the simplification of the wiring operation for the information output board.

  According to the invention described in claim 5, when the opening detection means detects that the glass frame is opened or the mechanism plate is opened, the frame opening detection signal is output, and the information output board detects the opening. Since the frame opening detection signal from the means is input via the game control board, the wiring work for the information output board can be facilitated.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. FIG. 2 is a front view showing the front of the game frame 11. FIG. 3 is a front view showing the front of the game board. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine. FIG. 2 also shows an enlarged view of the hitting ball supply tray (upper tray) 3 in the front surface of the game frame 11.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame 11 attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame 11 so as to be opened and closed. The game frame 11 is a structure that includes a front frame 11B that is openable and closable with respect to the outer frame, and various components (excluding game boards described later) attached to the front frame 11B. Further, a mechanism plate 11A to which mechanism parts and the like are attached is attached to the front frame 11B of the game frame 11 so that it can be opened and closed on the back side.

  As shown in FIGS. 1 to 3, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2 is a hitting ball supply tray (upper plate) 3. Under the hitting ball supply tray 3, an extra ball receiving tray (lower plate) 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. . As shown in FIG. 3, there is a front frame 11 </ b> B constituting a part of the game frame 11 on the back surface of the glass door frame 2. A mechanism plate 11A is attached to the front frame 11B so as to be openable and closable, and components such as a power circuit (not shown) and a speaker 27 are attached to the mechanism plate 11A. In addition, a relay board 607 that relays the wiring between the game frame 11 and the game board 6 is provided on the front frame 11 </ b> B of the game frame 11. Moreover, as shown in FIG. 3, the game board 6 is attached to the front frame 11B of the game frame 11 so that attachment or detachment is possible. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  An effect display device 9 (variable display device) composed of a liquid crystal display device (LCD) is provided near the center of the game area 7. The display screen of the effect display device 9 includes an effect symbol display area 91 for performing variable display of the effect symbols synchronized with the variable display of the first special symbol or the second special symbol. The effect display device 9 is controlled by an effect control microcomputer mounted on the effect control board. When the first special symbol display 8a is executing variable display of the first special symbol, the effect control microcomputer causes the effect display device 9 to execute the effect display along with the variable display, and the second special symbol display 8a executes the second special display. When the variable display of the second special symbol is executed on the symbol display 8b, the effect display is executed by the effect display device in accordance with the variable display, so that it is possible to easily grasp the progress of the game.

  On the left side of the lower part of the game board 6, there is provided a first special symbol display (first variable display means) 8a that variably displays a first special symbol as identification information. In this embodiment, the first special symbol display 8a is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9. In other words, the first special symbol display 8a is configured to variably display numbers (or symbols) from 0 to 9. On the lower right side of the game board 6, a second special symbol display (second variable display means) 8b for variably displaying the second special symbol as identification information is provided. The second special symbol display 8b is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying numbers 0 to 9. That is, the second special symbol display 8b is configured to variably display numbers (or symbols) from 0 to 9.

  The small display is formed in a square shape. In this embodiment, the type of the first special symbol and the type of the second special symbol are the same (for example, both 0 to 9), but the types may be different. Further, the first special symbol display 8a and the second special symbol display 8b may be configured to variably display numbers (or two-digit symbols) of, for example, 00 to 99, for example.

  The first special symbol and the second special symbol may be collectively referred to as a special symbol, and the first special symbol indicator 8a and the second special symbol indicator 8b may be collectively referred to as a special symbol indicator.

  For the variable display of the first special symbol or the second special symbol, the first start condition or the second start condition, which is the variable display execution condition, is satisfied (for example, the hit ball is the first start winning opening 13 or the second starting winning opening 14). And then start based on the fact that the variable display start condition (for example, the state where the special symbol variable display is not executed and the big hit game is not executed) is established. When the variable display time elapses, the display result (stop symbol) is derived and displayed. Note that winning means that a game ball has entered a predetermined area such as a winning opening. Deriving and displaying a display result is to stop and display a symbol (an example of identification information) (excluding stop before so-called re-variation).

  In the vicinity of the first special symbol display 8a, during the variable display time of the first special symbol by the first special symbol display 8a, the variable display of the first decorative symbol as a decorative (design) symbol is performed. A first decorative symbol display (first variable display) 9a is provided. In this embodiment, the first decorative symbol display 9a is composed of two LEDs. The first decorative symbol display 9a is controlled by an effect control microcomputer mounted on the effect control board. Further, in the vicinity of the second special symbol display 8b, during the variable display time of the second special symbol by the second special symbol display 8b, the variable display of the second decorative symbol as a symbol for decoration (production) is performed. A second decorative symbol display (second variable display section) 9b is provided. The second decorative symbol display 9b is composed of two LEDs. The second decorative symbol display 9b is controlled by an effect control microcomputer mounted on the effect control board.

  The first decorative symbol and the second decorative symbol may be collectively referred to as a decorative symbol, and the first decorative symbol display 9a and the second decorative symbol display 9b may be collectively referred to as a decorative symbol display. .

  The variation of the decorative pattern (variable display) is realized by continuing the state where the two LEDs are alternately lit. The variable display of the first special symbol on the first special symbol display 8a and the variable display of the first decorative symbol on the first decorative symbol display 9a are synchronized. The variable display of the second special symbol on the second special symbol display 8b is synchronized with the variable display of the second decorative symbol on the second decorative symbol display 9b. Synchronous means that the variable display start time and end time are the same, and the variable display period is the same. In addition, when the big hit symbol is stopped and displayed on the first special symbol display 8a, the LED on the side that recalls the big hit on the first decorative symbol display 9a remains lit. When the big-hit symbol is stopped and displayed on the second special symbol display 8b, the LED on the side that recalls the big-hit on the second decorative symbol display 9b remains lit.

  A first start winning opening 13 is provided below the effect display device 9. The game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a. In addition, on the left side of the effect display device 9, a variable winning device 15 that forms a second start winning port 14 is provided. The winning ball that has entered the second start winning opening 14 is guided to the back of the game board 6 and detected by the start opening switch 14a. The variable winning ball device 15 is opened by a solenoid 16.

  The first start winning port 13 and the second start winning port 14 may be collectively referred to as a start winning port or a starting port.

  Below the first special symbol display 8a and the first decorative symbol display 9a, the number of effective winning balls that have entered the first start winning opening 13, that is, the first reserved memory number (the reserved memory, the start memory or the start prize memory) Also provided is a first special symbol storage memory display 18a comprising four displays for displaying. The first special symbol storage memory indicator 18a increases the number of indicators to be lit by 1 each time there is an effective start winning. Then, each time the variable display on the first special symbol display 8a is started, the number of indicators to be turned on is reduced by one.

  Below the second special symbol display 8b and the second decorative symbol display 9b, a second display comprising four displays for displaying the number of effective winning balls that have entered the second start winning opening 14, that is, the second reserved memory number. A special symbol storage memory display 18b is provided. The second special symbol storage memory display 18b increases the number of indicators to be lit by 1 every time there is an effective start winning. Then, each time the variable display on the second special symbol display 8b is started, the number of indicators to be turned on is reduced by one.

  In addition, the display screen of the effect display device 9 displays an area (hereinafter referred to as a summed pending storage display unit 18c) that displays a total number (total number of pending pending memories) that is the sum of the first reserved memory number and the second reserved memory number. .) Is provided. Since the summation pending storage display unit 18c for displaying the total number is provided, it is possible to easily grasp the total number of execution conditions that have not met the variable display start condition. In addition, since the total reserved memory display unit 18c is provided, the first special symbol reserved memory display 18a and the second special symbol reserved memory display 18b may not be provided.

  The effect display device 9 is for decoration (for effects) during the variable display time of the first special symbol by the first special symbol display 8a and during the variable display time of the second special symbol by the second special symbol display 8b. A variable display of the effect symbol as the symbol is performed. The variable display of the first special symbol on the first special symbol display 8a and the variable display of the effect symbol on the effect display device 9 are synchronized. Further, the variable display of the second special symbol on the second special symbol display 8b and the variable display of the effect symbol on the effect display device 9 are synchronized. Here, the synchronization means that the start time and end time of variable display are the same and the period of variable display is the same. Further, when the jackpot symbol is stopped and displayed on the first special symbol display 8a and when the jackpot symbol is stopped and displayed on the second special symbol display 8b, the effect display device 9 reminds the jackpot The combination of is stopped and displayed.

  In this embodiment, as shown in FIG. 1, the variable winning ball apparatus 15 that opens and closes only the second start winning opening 14 is provided. Any of the start winning ports 14 may be provided with a variable winning ball device that performs an opening / closing operation.

  FIG. 4 is an explanatory diagram showing a state in which the game frame 11 is opened. FIG. 5 is an exploded perspective view showing the mechanism plate 11A attached to the back surface of the front frame 11B in an exploded manner. As shown in FIG. 4, four substrates (frame side IC substrates) 602 to 605 for mounting ICs and the like are attached to the back surface on the game frame 11 side. A frame-side IC board 602 attached to the upper part of the game frame 11 is mounted with serial-parallel conversion ICs 611 and 612 for converting serial data into parallel data. Control signals are supplied from the serial-parallel conversion ICs 611 and 612 to the LEDs 281a to 281l (hereinafter referred to as the ceiling lamps 281a to 281l or the frame lamps 281a to 281l) constituting the ceiling lamp. Here, “lamp” and “LED” are used synonymously, but a light emitter other than LED may be used as each lamp.

  In addition, a frame-side IC substrate 603 attached to the right side (left side when viewed from the back side) of the game frame 11 is mounted with a serial-parallel conversion IC 613. From the serial-parallel conversion IC 613, the LEDs 283a to 283e constituting the right frame lamp (hereinafter referred to as the right frame lamps 283a to 283e or the frame lamps 283a to 283e) and the right prize ball flashing when the prize ball is paid out. A control signal is supplied to an LED (hereinafter referred to as a right award ball lamp) 51b. A serial-parallel conversion IC 614 is mounted on the frame-side IC board 604 attached to the left side (right side as viewed from the back side) of the game frame 11. From the serial-parallel conversion IC 614, the LEDs 282a to 282e (hereinafter referred to as the left frame lamps 282a to 282e or the frame lamps 282a to 282e) constituting the left frame lamp and the left prize ball flashing when the prize ball is paid out. A control signal is supplied to an LED (hereinafter referred to as a left prize ball lamp) 51a. Hereinafter, the left prize ball lamp 51a and the right prize ball lamp 51b may be collectively referred to as a prize ball lamp.

  The frame side IC board 605 attached to the lower part of the game frame 11 is mounted with a serial-parallel conversion IC 615 and an input IC 620 for converting parallel data into serial data. From the serial-parallel conversion IC 615, an LED 83 (hereinafter referred to as a lamp 83) that constitutes an operation button lamp provided on the operation buttons 81a to 81e and an LED 82a to 82d (a lamp 83 provided on the hitting ball supply tray 3). Hereinafter, control signals are supplied to the lamps 82a to 82d. In addition, detection signals from the operation buttons 81a to 81e are input to the input IC 620 in parallel. In addition, the figure which looked at the frame side IC board | substrate 605 from the side is also shown by FIG.

  As shown in FIG. 4, in this embodiment, the frame side IC substrate 602 attached to the upper part of the game frame among the frame side IC substrates 602 to 605 is equipped with two serial-parallel conversion ICs. It is configured as a collective substrate. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  Further, as shown in FIG. 4, a relay board 607 is attached to the game frame 11 side. The wiring from the relay substrate 607 is connected to the frame side IC substrate 604, connected from the frame side IC substrate 604 to the frame side IC substrate 602, and further connected from the frame side IC substrate 602 to the frame side IC substrate 603. Further, the wiring from the relay substrate 607 is connected to the frame side substrate 605. Further, the wiring between the frame side IC substrates 602 to 604 and the wiring between the frame side IC substrates 604 and 605 and the relay substrate 607 are performed using connectors 156a to 156h on each substrate as shown in FIG. Connected. FIG. 4 shows a configuration in which wiring connection is made using a type of connector that connects to the board in the vertical direction. For example, a type of connector that connects to the board in the horizontal direction is used. Wire connection may be performed.

  As shown in FIG. 4, the wiring from the connector 156 a of the relay board 607 is connected to the connector 156 b of the frame side IC board 604. The wiring pattern of the frame side IC substrate 604 is further branched from the connector 156b, one is connected to the serial-parallel conversion IC 614, and the other is connected to the connector 156c. Further, in the frame side IC substrate 604, the connector 156c is arranged at an end portion on the frame side IC substrate 602 side. The wiring from the connector 156c of the frame side IC substrate 604 is connected to the connector 156d of the frame side IC substrate 602. The wiring pattern of the frame side IC substrate 602 is further branched into three from the connector 156d and connected to the serial-parallel conversion IC 611, the serial-parallel conversion IC 612, and the connector 156e. Further, in the frame side IC substrate 602, the connector 156e is disposed at an end portion on the frame side IC substrate 603 side. The wiring from the connector 156e of the frame side IC substrate 602 is connected to the connector 156f of the frame side IC substrate 603. The wiring pattern of the frame side IC substrate 603 is connected to the serial-parallel conversion IC 613.

  Further, the wiring from the connector 156g of the relay substrate 607 is connected to the connector 156h of the frame side IC substrate 605. The wiring pattern of the frame side IC substrate 605 is further branched from the connector 156h, one is connected to the serial-parallel conversion IC 615, and the other is connected to the input IC 620.

  Further, as shown in FIG. 4, a door opening switch 155a for detecting that the glass door frame 2 or the mechanism plate 11A is opened with respect to the front frame 11B is attached above the game frame 11. . In this embodiment, the glass door frame 2 is rotatably attached to the front side with respect to the front frame 11B. Further, a mechanism plate 11A is rotatably attached to the rear surface side with respect to the front frame 11B. In this embodiment, when at least one of the glass door frame 2 or the mechanism plate 11A is opened with respect to the front frame 11B, the door open switch 155a detects the door open state and outputs a door open signal. Specifically, the door opening switch 155a is attached in such a manner that a bar-like member with a spring penetrates the front frame 11B. When a rod-like member is detected by the detection switch 155A provided on the mechanism plate 11A, a signal indicating that the door is not opened is output. In this case, if the glass door frame 2 and the mechanism plate 11A are both closed, the rod-shaped member is pressed from the front by the glass door frame 2 and protrudes rearward from the front frame 11B, and the detection switch 155A is in the door. Is not detected. When the glass door frame 2 is opened, the rod-like member pops out to the front side of the front frame 11B by the elasticity of the spring, and the detection switch 155A is not pressed by the rod-like member. Alternatively, one or both of the mechanism plates 11A) is in a state where a signal is detected that is detected to be open. Further, when the mechanism plate 11A is opened, the rod-shaped member is projected to the back side of the front frame 11B by the elasticity of the spring, but the detection switch 155A is not pressed by the rod-shaped member. A signal that detects that the door (either or both of the glass door frame 2 and the mechanism plate 11A) is open is output.

  Further, as shown in FIG. 5, a game frame release switch 155b for detecting that the game frame 11 itself is opened with respect to the outer frame is attached to the right side of the mechanism plate 11A. In this embodiment, the game frame 11 is rotatably attached to the outer frame. When the game frame 11 is released from the outer frame, the game frame release switch 155b detects the release state of the game frame 11 and outputs a game frame release signal. Specifically, the game frame release switch 155b is provided on the mechanism plate 11A, and when the game frame 11 is opened with respect to the outer frame, a signal indicating that the release of the game frame 11 is detected. Is output. When the game frame 11 is not opened with respect to the outer frame, a signal indicating that the game frame 11 is not opened is output.

  FIG. 6 is an explanatory view showing the back surface of the game board 6. As shown in FIG. 6, a base (board-side IC substrate) 601 for mounting an IC or the like is attached to the back surface of the game board 6. On the board-side IC board 601, four serial-parallel conversion ICs 616 to 619 for converting serial data into parallel data are mounted. A control signal is supplied from the serial-parallel conversion IC 616 to the motors 151a, 152a, and 153a for driving the movable members 151 to 153. Further, a control signal is supplied from the serial-parallel conversion IC 617 to each of the LEDs 125a to 125f (hereinafter referred to as center decoration lamps 125a to 125f or lamps 125a to 125f) constituting the center decoration lamp. Further, a control signal is supplied from the serial-parallel conversion IC 618 to the LEDs 126a to 126f (hereinafter referred to as stage lamps 126a to 126f or lamps 126a to 126f) constituting the stage lamp. Further, a control signal is supplied from the serial-parallel conversion IC 619 to each of the lamps 127 a to 127 b provided in the skeleton 153 that is a movable member and the special variable winning ball apparatus 20.

  As shown in FIG. 6, in this embodiment, the board side IC substrate 601 is configured as a collective substrate on which four serial-parallel conversion ICs are mounted. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  The board side IC substrate 601 is equipped with an input IC 621 for converting parallel data into serial data. Detection signals from the position sensors 151b, 152b, and 153b for detecting the positions of the movable members 151 to 153 are input to the input IC 621 in parallel.

  As shown in FIG. 6, a relay board 606 is attached to the game board 6 side, and a relay board 607 is provided on the game frame 11 side. The wiring from the effect control means is first connected to the relay board 606 and further connected to the relay board 607. The wiring from the relay board 606 is connected to the board side IC board 601. Further, the wiring between the board side IC substrate 601 and the relay substrate 606, the wiring between the relay substrates 606 and 607, and the wiring between the relay substrate 606 and the effect control means are shown in FIG. Are connected using connectors 157a to 157e. The connection method of the connectors 157a to 157e is the same as the connection method of the connectors 156a to 156h shown in FIG.

  An opening is formed in the upper plate of the front frame 11B above the hole for paying out the game ball, and a relay substrate 607 is provided in the opening. The relay board 607 is a board that relays through the front and back connectors. The connector 157b is disposed on the front side of the front frame 11B, and the connectors 156a and 156g are disposed on the back side. Further, the relay board 607 is disposed at the end of the opening to which the game board 6 is attached. As shown in FIG. 4, the relay board 607 is formed in a shape that follows the shape of the end of the opening to which the game board 6 is attached. The relay board 607 is in a state of being shifted so that the positions of the connector 157b arranged on the front side and the connectors 156a and 156g arranged on the back side do not overlap.

  A relay board 606 is provided on the back side of the game board 6. As shown in FIG. 6, the relay board 606 is provided at the end of the game board 6 so as to be positioned in the vicinity of the relay board 607 of the front frame 11 </ b> B. The relay board 606 is a board that relays via a connector, and connectors 157b to 157d are arranged. The connector 157b is connected to an effect control microcomputer (an example of an electric component control microcomputer that controls electric components that are electrically driven) mounted on the game board 6.

  A prepaid card unit (hereinafter also simply referred to as “card unit”) that enables lending of a ball by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  FIG. 7 is a rear view of the game board 6 as viewed from the back side. As shown in FIG. 7, an information terminal board 34 is provided on the upper right side of the back surface of the game board 6. The information terminal board 34 may be installed at an arbitrary position. For example, the information terminal board 34 may be installed using an attachment member in front of the effect control board box 2000 when viewed from the back side of the game board 6. In addition, a main board box 1000 that houses the main board 31 is provided at the lower part of the back surface of the game board 6, and an effect control board box 2000 that houses the effect control board 80 is provided at the center of the back surface of the game board 6. Is provided. Further, the effect control board box 2000 on the back surface of the game board 6 is provided with a recess, and the recess is provided with a relay board 77 and covered with a cover.

  The information terminal board 34 has a connector CN for connecting a cable (signal line) connected to the main board 31 and a plurality of connectors CN1 for connecting a cable (signal line) connected to the hall computer. To CN9. Connector CN and connectors CN1 to CN9 are connected via a plurality of semiconductor relays (not shown in FIG. 7).

  In general, when a gaming store newly installs (introduces) gaming machines, it is often the case that only the gaming board 6 is replaced with a new one without changing the gaming frame 11. In this case, as shown in FIG. 7, since the information terminal board 34 is provided not on the game frame 11 side but on the game board 6 side, it is output from the gaming machine to an external device such as a hall computer via the information terminal board 34. As a signal to be played, it is possible to output a signal that matches a game program of a different gaming machine. For example, in models that do not have a small hit or suddenly probable big hit, there are three types of big hit signals (1 signal for big hit to 3 signals for big hit. In the case of models with no time-shortening function, the time-shortening signal is not output. It is possible to output a signal according to the model to an external device such as a hall computer via the information terminal board 34.

  FIG. 8 is a block diagram showing an example of a circuit configuration in the main board (game control board) 31. FIG. 8 also shows a payout control board 37 and an effect control board 80 on which payout control means for controlling the ball payout device 97 to perform payout of the game ball is mounted. A game control microcomputer (corresponding to a game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. And a serial output circuit for converting parallel data into serial data and outputting the serial data. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. The I / O port unit 57 may be externally attached.

  A random number circuit 503 for generating hardware random numbers is connected to the game control microcomputer 560. The game control microcomputer 560 reads the random number value from the random number circuit 503 when the condition for extracting the random number value is satisfied. The random number circuit 503 is a counter that counts clock signals having a predetermined frequency, and the count value of the counter becomes a random value. A clock signal having a predetermined frequency supplied to the random number circuit 503 is input to a clear terminal of a monitoring circuit (watchdog timer (WDT)) 504. The monitoring circuit is a counter that counts a clock signal having a frequency higher than the frequency of the clock signal input to the clear terminal, but the count value is reset when the clock signal input to the clear terminal becomes high level, for example. Therefore, when the clock signal input to the clear terminal stops for some reason, the monitoring circuit 504 counts up. The fact that the monitoring circuit 504 has counted up indicates that no clock signal is supplied to the random number circuit 503. When counting up, the monitoring circuit 504 outputs a random number error signal indicating that the random number circuit 503 is not operating normally to the gaming control microcomputer 560.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Also, an input driver circuit for supplying detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a and 39a to the game control microcomputer 560. 58 is also mounted on the main board 31. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31.

  Further, the game control microcomputer 560 includes a first special symbol display 8a that variably displays the first special symbol, a second special symbol display 8b that variably displays the second special symbol, and a normal symbol that variably displays the normal symbol. The display control of the display 10, the first special symbol hold memory display 18a, the second special symbol hold memory display 18b, and the normal symbol hold memory display 41 is performed.

  The serial output circuit 78 mounted on the game control microcomputer 560 is constituted by a shift register or the like. The serial control circuit 78 converts the presentation control command output from the CPU 56 into serial data, and sends it to the presentation control board 80 via the relay board 77. Send. Further, the serial output circuit 78 converts the control signal output from the CPU 56 into serial data, and via the relay board 77, the special symbol display devices 8a and 8b, the special symbol hold storage display devices 18a and 18b, and the normal symbol display device. 10. Output to normal symbol hold storage display 41. The special symbol displays 8a and 8b, the special symbol hold storage displays 18a and 18b, the normal symbol display 10 and the normal symbol hold storage display 41 have serial-parallel conversion ICs for converting serial data into parallel data. Provided respectively, the control signal from the relay board 77 is converted into parallel data, and the special symbol indicators 8a and 8b, the special symbol hold memory indicators 18a and 18b, the normal symbol indicator 10 and the normal symbol hold memory indicator 41 are provided. To be supplied.

  An information output circuit 64 that outputs an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer via an information terminal board (frame board / external terminal board) 34 is also mainly used. It is mounted on the substrate 31. The information terminal board 34 is installed on the back surface of the gaming machine.

  Further, a backup power supply circuit 506 including a backup power supply (for example, a battery or a capacitor) 505 is mounted on the main board 31, and even when the power supply to the gaming machine 1 is stopped, the door A voltage from the backup power source 505 is applied to the opening switch 155a and the game frame opening switch 155b. The backup power supply 505 may be shared with the backup power supply that supplies the RAM 55. By sharing in this way, the cost of the backup power supply can be reduced. The door opening signal from the door opening switch 155a and the gaming frame opening signal from the gaming frame opening switch 155b are branched into three via the backup power supply circuit 506, and the information terminal board 34, the gaming control microcomputer 560 are branched. And the effect control board 80. That is, in this embodiment, the door open signal from the door open switch 155a and the game frame open signal from the game frame open switch 155b are input to the information terminal board 34 and the effect control board 80 via the main board 31, respectively. Is done. Note that the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are not input to the game control microcomputer 560, but only to the information terminal board 34 and the effect control board 80, respectively. You may make it do. Further, the door open signal from the door open switch 155a and the game frame open signal from the game frame open switch 155b are not input to the effect control board 80, and the information terminal board 34 is provided via the game control board (main board 31). You may make it input only to. Further, the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b may be input only to the effect control board 80 via the game control board (main board 31).

  In this embodiment, the signal line of the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b is connected to the information terminal board 34 and the production via the backup power supply circuit 506 of the main board 31. Since they are physically connected to the control board 80, the door opening signal from the door opening switch 155a and the gaming frame opening from the gaming frame opening switch 155b even when the power supply to the gaming machine is stopped. The signal is supplied to the information terminal board 34 and the effect control board 80. In addition, since the power from the backup power source 505 mounted on the backup power supply circuit 506 is supplied to the information terminal board 34, the information terminal board 34 has the backup power source even when the power supply to the gaming machine is stopped. A door opening signal and a game frame opening signal can be output to an external device (for example, a hall computer) via the circuit 506.

  In this embodiment, the backup power source for the RAM 55 is provided separately from the backup power source 505 installed in the backup power source circuit 506. In this embodiment, by separately providing the backup power supply as described above, it is possible to prevent the information stored in the RAM 55 from being damaged due to the door open detection state.

  In addition, a storage tank for storing game balls is installed on the back surface of the gaming machine, and the game balls stored in the storage tank reach the ball payout device. Above the ball payout device, a ball break switch as a game medium break detection means is provided. When the ball break switch detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch is a switch for detecting the presence or absence of a game ball in the game ball passage, but a ball break detection switch for detecting the shortage of supply balls in the storage tank is also provided in a portion close to the storage tank. When the shortage of balls detection switch detects a shortage of game balls, the game balls are replenished from the replenishment mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning a prize and game balls based on a ball lending request are paid out and the hitting ball supply tray 3 is full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. When the game ball is further paid out, a sensing lever (not shown) presses a full tank switch (not shown) as a storage state detection means, and the full tank switch as a storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device is stopped, the operation of the ball payout device is stopped, and the driving of the ball hitting device is also stopped.

  Further, in this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 is used to provide effect control from the game control microcomputer 560 via the relay board 77. A command is received by a serial signal system (serial communication system: a system in which data is sent out by one signal line), and display control of the effect display device 9 for variably displaying effect symbols is performed.

  Further, the effect control means mounted on the effect control board 80 controls the display of the center decoration lamps 125a to 125f and the stage lamps 126a to 126f provided on the game board 6, and is provided on the frame side. The top frame lamps 281a to 281l, the left frame lamps 282a to 282e and the left award ball lamp 51a, the right frame lamps 283a to 283e and the right award ball lamp 51b are displayed, and the sound output from the speaker 27 is controlled. .

  In addition, the effect control microcomputer 100 on the effect control board 80 controls the display of the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282e, 283a to 283e, 51a, 51b output by the effect control means. A serial output circuit 353 for converting a parallel data control signal to serial data is mounted. In addition, the effect control microcomputer 100 of the effect control board 80 is equipped with a serial input circuit 354 that converts the input serial data into parallel data and outputs the parallel data to the effect control means. Therefore, the effect control means outputs the control signals in the serial signal system via the serial output circuit 353, thereby allowing the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282e, 283a to 283e, 51a, Display control 51b (specifically, light emission control, that is, lighting control (flashing control)) is performed.

  On the game board side, a board-side IC board 601 on which a serial-parallel conversion IC for converting serial data into parallel data is mounted. The board side IC substrate 601 is connected to the effect control substrate 80 via the relay substrate 606. On the game frame 11 side, frame-side IC substrates 602, 603, 604, and 605 on which serial-parallel conversion ICs for converting serial data into parallel data are provided. Each frame side IC substrate 602, 603, 604, 605 is connected to the effect control substrate 80 via the relay substrate 606, 607.

  The effect control board 80, the relay board 606, and the relay board 607 are connected by one bus type wiring route.

  FIG. 9 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 9, the payout control board 37 has a payout control microcomputer 370 including an payout control CPU 371 (an example of an electric component control microcomputer that controls electrically driven electric components). It is installed. In this embodiment, the payout control microcomputer 370 is a one-chip microcomputer and incorporates at least a RAM. The payout control CPU 371, the RAM (not shown), the ROM (not shown) storing the payout control program, the I / O port, and the like constitute the payout control means. That is, the payout control means is realized by a payout control CPU 371, a payout control microcomputer 370 having a RAM and a ROM, and an I / O port. The I / O port may be built in the payout control microcomputer 370.

  Detection signals from the ball break switch 187 and the full tank switch 48 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. The detection signal of the payout number count switch 301 is input to the I / O port 372e of the payout control board 37 via the relay board 72. A detection signal from the payout motor position sensor 295 is input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor 289 is provided in the ball payout device 97 and rotates to pay out payout game balls stored on the back surface of the game machine. The payout motor position sensor 295 is a sensor composed of a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289, and is used for detecting that the game ball is clogged, that is, so-called ball biting. It is done. In the payout control microcomputer 370 mounted on the payout control board 37, the detection signal from the ball break switch 187 indicates that the ball is out of ball, or the detection signal from the full tank switch 48 indicates that the ball is full. Then, the ball payout process is stopped. Furthermore, when the detection signal from the full tank switch 48 indicates a full tank state, the ball launching from the ball striking device is stopped. Note that even when the detection signal from the full tank switch 48 indicates a full state, the ball firing from the ball striking device may not be stopped. When the signal line from the game control microcomputer 560 is connected to the ball hitting device, the game control microcomputer 560 stops the ball shot from the ball hitting device. Also good.

  When there is a winning game ball at the winning opening, a prize ball number signal (payout number data) indicating the number of prize balls to be paid out and a prize ball number signal are fetched from the output circuit 67 of the main board 31 as a payout command signal. A prize ball REQ signal (capture request signal) requesting (reception) is output (transmitted). Specifically, it is turned on. The award ball number signal is composed of 4-bit data (binary 4-digit data) and is output through four signal lines. Note that the on state of the signal, that is, the output state is a state where the signal is significant, and turning on means that the signal receiving side is instructed to start some processing based on the signal. To do. For example, when the prize ball number signal indicating the number of prize balls and the prize ball REQ signal are turned on, the microcomputer 370 is commanded to recognize the number of prizes indicated by the prize ball number signal. Means that. Alternatively, the signal may be turned on by outputting a signal, and the signal may be turned off by stopping the signal output. However, a signal corresponding to the on state is output when the signal is turned on, and the signal is output according to the off condition when the signal is turned off. Alternatively, the on state and the off state may be switched by outputting a signal.

  The prize ball REQ signal and the prize ball number signal are input to the I / O port 372e via the input circuit 373A. When the payout control microcomputer 370 receives the prize ball number signal via the I / O port 372e, the payout control microcomputer 370 controls to drive the ball payout device 97 to pay out the number of game balls indicated by the prize ball number signal. The prize ball REQ signal and the prize ball number signal correspond to a payout command signal for designating the number of payouts.

  Also, the payout control microcomputer 370 outputs an error signal to the error display LED 374 using a 7-segment LED via the output port 372c. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control microcomputer 370 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. A driver circuit (motor drive circuit) is installed outside the output port 372a, but is not shown in FIG.

  A card unit control microcomputer is mounted on the card unit 50 installed adjacent to the gaming machine. In addition, the card unit 50 is provided with a usable display lamp, a connecting table direction indicator, a card insertion display lamp, and a card insertion slot. The interface board (relay board) 66 is connected to a power display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 (not shown in FIG. 1) provided in the vicinity of the hitting ball supply tray 3. .

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are provided to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal) and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  When the power of the pachinko gaming machine 1 is turned on, the payout control microcomputer 370 mounted on the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal when the power is turned on. The payout control microcomputer 370 determines the connected / unconnected state of the card unit 50 according to the input state of the VL signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit control microcomputer outputs a BRDY signal to the payout control board 37. When a predetermined delay time elapses from this point, the card unit control microcomputer outputs a BRQ signal to the payout control board 37.

  Then, the payout control microcomputer 370 raises the EXS signal to the card unit 50 and, when detecting the fall of the BRQ signal from the card unit 50, drives the payout motor 289 to give a predetermined number of rental balls to the player. Pay out. When the payout is completed, the payout control microcomputer 370 causes the EXS signal to the card unit 50 to fall. Thereafter, when a BRDY signal from the card unit 50 is not in an ON state, a prize ball payout control is executed when a payout command signal is received from the game control means.

  In this embodiment, the case where the card unit 50 is installed adjacent to the gaming machine as a separate body from the gaming machine is taken as an example, but the card unit 50 may be integrated with the gaming machine. . Further, the present invention can be applied even in the case where game balls corresponding to the amount of money are lent out in accordance with coin insertion.

  Further, the payout control microcomputer 370 outputs signals corresponding to detection signals of the full switch 48, the ball break switch 187, and the payout number count switch 301 to the main board 31 via the output port 372b and the output circuit 373B. However, the detection signals of the full tank switch 48, the ball break switch 187 and the payout count switch 301 that are input to the payout control microcomputer 370 are branched at the payout control board 37, and the branched detection signal is output to the output circuit 373B. Via the main board 31. In such a configuration, the payout control microcomputer 370 need not output from the output port 372b signals corresponding to the detection signals of the full tank switch 48, the ball break switch 187, and the payout number count switch 301. The payout number count switch 301 is a switch that detects a game ball paid out based on a winning and a game ball paid out based on a ball lending request from the card unit 50, and outputs a detection signal.

  FIG. 10 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80. In addition, although the example shown in FIG. 10 shows the case where only the effect control board 80 is provided regarding the effect control, a lamp driver board and an audio output board may be provided. In this case, the lamp driver board and the sound output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control microcomputer 100 including an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356 and an input capture signal output unit 357. It is installed. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates according to a program stored in a built-in or external ROM (not shown) and receives an effect control command via the serial input circuit 102 and the input port 103a. In this case, the serial input circuit 102 converts the effect control command received by the serial signal method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the effect display device 9 based on the effect control command.

  In this embodiment, a VDP 109 that performs display control of the effect display device 9 in cooperation with the effect control microcomputer 100 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100, and maps a VRAM therein. VRAM is a buffer memory for developing image data. Then, the VDP 109 outputs the image data in the VRAM to the effect display device 9 via the frame memory.

  The effect control CPU 101 outputs to the VDP 109 a command for reading out necessary data from a CGROM (not shown) in accordance with the received effect control command. The CGROM stores character image data and moving image data displayed on the effect display device 9, specifically, a person, characters, figures, symbols (including effect symbols), and background image data in advance. ROM. The VDP 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. The VDP 109 executes display control based on the read image data.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 9 illustrates a diode.

  Further, the production control CPU 101 outputs a signal for driving a lamp (in some cases, it may be an LED) via the serial output circuit 353. The serial output circuit converts the input signal for driving the lamp (parallel data) into serial data and outputs the serial data to the relay board 606. Further, the production control CPU 101 outputs the sound number data to the speech synthesis IC 173.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 611 to 615 and the input IC 620 mounted on the frame side IC substrates 602 to 605 via the relay substrates 606 and 607. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial-parallel conversion ICs 611 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC board 605 latches the detection signals of the operation buttons 81a to 81e when the input capture signal from the production control microcomputer 100 is input, and relays boards 606 and 607 as a serial signal system. To the production control microcomputer 100. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b when the input capture signal from the production control microcomputer 100 is input, and uses a serial signal method. This is output to the production control microcomputer 100 via the relay board 606.

  When the sound number IC 173 receives the sound number data, the sound synthesizing IC 173 generates a sound or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data showing the output form of the sound effect or sound in a time series in a predetermined period (for example, the changing period of the effect design).

  In this embodiment, the production control board 80 is mounted with a real time clock (RTC) 381 for outputting the current time. The production control microcomputer 100 inputs a date signal indicating the current date (year, month, day, day of the week) and a time signal indicating the current time (hour, minute, second) from the real-time clock 381, and the current date and time. Various processes are executed based on the above. The real-time clock 381 is normally operated by the power from the gaming machine when power is supplied to the gaming machine, and when the gaming machine is powered off, the real-time clock 381 is a backup power supply circuit 383 ( For example, it is operated by a power source supplied from a battery or a capacitor. Therefore, the real time clock 381 can measure the current date and time even when the gaming machine is turned off. Note that the real-time clock 381 may be operated by power supplied from the backup power supply circuit 383 even when power is supplied to the gaming machine.

  The power of the backup power supply circuit 383 is also supplied to the backup RAM 382 mounted on the effect control board 80. That is, the backup RAM 382 is normally supplied with power from the gaming machine when power is supplied to the gaming machine, and when the gaming machine is turned off, the backup power supply circuit 383 mounted on the effect control board 80. Is supplied with power. Note that the backup RAM 382 may be supplied with power from the backup power supply circuit 383 even when power is supplied to the gaming machine.

  In this embodiment, the power supply of the backup power supply circuit 383 is also supplied to the effect control microcomputer 100 mounted on the effect control board 80 when the power of the gaming machine is turned off. Therefore, in this embodiment, the production control microcomputer 100 can be operated by the power supply from the backup power supply circuit 383 even when the gaming machine is turned off after the game shop is closed. In this embodiment, for example, the production control microcomputer 100 receives the detection signal from the door opening switch 155a even when the power of the gaming machine is turned off. Etc. are lit to notify the fact that the door is open (the glass door frame 2 and the mechanism plate 11A are open).

  In this embodiment, the power source of the backup power supply circuit 383 is the minimum necessary circuits and elements (for example, the effect display device 9) such as the effect control microcomputer 100, the real time clock 383, the backup RAM 382, and the LED of each lamp. Etc.) except for liquid crystal display devices. By doing so, it is possible to continue supplying power to the production control microcomputer 100, the real-time clock 383, and the backup RAM 382 from the time when the game store is closed until the next morning (for example, 12 hours).

  In this embodiment, the signal line of the door opening signal from the door opening switch 155a is physically provided via the main board 31 (specifically, the backup power supply circuit 506 of the main board 31). The production control microcomputer 100 inputs a door opening signal via the input port 103b.

  Next, the configuration of the power supply substrate 910 will be described with reference to the block diagram of FIG. The power supply board 910 is provided with a power switch 914 for permitting or shutting off power supply to each electric component control board or mechanism component in the gaming machine. Note that the power switch 914 may be provided outside the power supply board 910 in the gaming machine. When the power switch 914 is in a closed state (on state), AC power (AC 24 V) is applied to the input side (primary side) of the transformer 911. The transformer 911 is for electrically insulating the AC power supply (AC24V) and the inside of the power supply substrate 910, and its output voltage is also AC24V. A varistor 918 as an overvoltage protection circuit is installed on the input side of the transformer 911.

  The power supply board 910 is installed independently of the electric component control board (the main board 31, the payout control board 37, the effect control board 80, etc.), and generates a voltage used by each board and the mechanical parts in the gaming machine. In this example, AC24V, VSL (DC + 30V), VLP (DC + 24V), VDD (DC + 12V) and VCC (DC + 5V) are generated. Further, a capacitor 916 serving as a storage holding means for holding the stored contents in the backup power supply (VBB), that is, the backup RAM, is charged from DC + 5V (VCC), that is, a power supply line for driving an IC or the like on each substrate. Further, a backflow prevention diode 917 is inserted between the +5 V line and the backup +5 V (VBB) line. In this embodiment, since the backflow prevention diode 917 is provided, it is possible to back up each circuit and each circuit element other than a semiconductor relay (PhotoMOS relay) provided on the information terminal board 34 described later. The current from the power source 505 is prevented from flowing backward. Also, VSL is generated by rectifying and boosting AC24V with a rectifying element in the rectifying and smoothing circuit 915. VSL becomes a solenoid driving power source. VLP is a lamp lighting voltage, and is generated by rectifying AC24V with a rectifier element in the rectifier circuit 912.

  A DC-DC converter 913 serving as a power supply voltage generation unit has one or a plurality of switching regulators (two regulator ICs 924A and 924B are shown in FIG. 11), and generates VDD and VCC based on VSL. Relatively large capacitors 923A and 923B are connected to the input sides of the regulator ICs (switching regulators) 924A and 924B. Accordingly, when the power supply to the gaming machine from the outside is stopped, the DC voltages such as VSL, VDD, VCC, etc., decrease relatively slowly.

  As shown in FIG. 11, AC24V output from the transformer 911 is supplied to the connector 922B as it is. The VLP is supplied to the connector 922C. VCC, VDD and VSL are supplied to connectors 922A, 922B and 922C.

  The cable connected to the connector 922A is connected to the main board 31. The cable connected to the connector 922B is connected to the payout control board 37. Therefore, VBB is also supplied to the connector 922A. For example, a cable connected to the connector 922 </ b> C is connected to the effect control board 80.

  In addition, a clear switch 921 having a push button structure is mounted on the power supply board 910. When the clear switch 921 is pressed, a low level (ON state) clear signal is output and output to the main board 31 via the connector 922A. If the clear switch 921 is not pressed, a high level (off state) signal is output. The clear switch 921 may have a configuration other than the push button structure. Further, the clear switch 921 may be provided other than the power supply board 910 in the gaming machine.

  Further, the power supply board 910 generates a reset signal for the microcomputer mounted on the electric component control board, amplifies the reset signal from the power supply monitor circuit 920 that outputs a power-off signal, and the power supply monitor circuit 920. And an output driver circuit 925 that amplifies the power-off signal and outputs the amplified signal to the connector 922B. The reset signal for the effect control microcomputer is transmitted to the effect control board 80. Further, when the reset circuit is mounted on each electric component control board, the voltage value that makes the reset signal high may be made different (for example, the case of the main board 31 is made highest). The timing at which the reset signal for the game control microcomputer 560 becomes high level is the latest).

  A power-off signal from the power monitoring circuit 920, that is, a detection signal from the power monitoring means is input to the game control microcomputer 560 via an input port mounted on the main board 31. That is, the gaming control microcomputer 560 can confirm the occurrence of the stop of the power supply to the gaming machine by monitoring the input signal of the input port.

  FIG. 12 is a block diagram illustrating a configuration example of the information terminal board 34. In the example shown in FIG. 12, a signal is input to the information terminal board 34 from the main board 31 via the cable 343 and the connector 341. A signal input via the cable 343 is output to, for example, a hall computer via the driver circuit 345, the connector 347, and the cable 349.

  Conventionally, a signal from an information terminal board (board external terminal board) for inputting a signal from the main board 31 and outputting it to an external apparatus such as a hall computer and a signal from the payout control board 37 are inputted and outputted to the external apparatus. Information terminal board (frame external terminal board) is provided separately, or a signal from the main board 31 and a signal from the payout control board 37 are input and output to an external device Two information terminal boards (frame board and external terminal board) were provided. On the other hand, in this embodiment, as shown in FIG. 12, only one information terminal board (board external terminal) is connected to only the main board 31 and outputs a signal input from the main board 31 to an external device. Substrate) 34 is provided. A signal from the payout control board 37 is input to the main board 31 and is output from the main board 31 to the information terminal board 34. According to such a configuration, since the main board 31 and the payout control board 37 are connected in advance, the operator only connects the information terminal board 34 and the main board 31 when wiring the information terminal board 34. In other words, the wiring process for the information terminal board 34 is facilitated.

  FIG. 13 is an explanatory diagram showing an example of output port assignment in the game control means. As shown in FIG. 11, the output port 0 is an output port for a payout command signal transmitted to the payout control board 37. Note that the logic (eg, 0 is on) opposite to the “logic” (eg, 1 is on) shown in FIG. 11 may be used.

  From the output port 1, a solenoid (large winning opening door solenoid) 21 for opening and closing a variable winning ball apparatus 20 for opening and closing a large winning opening and a solenoid (ordinary electric accessory solenoid) 16 for opening and closing the variable winning ball apparatus 15 are opened. The drive signal for is output. Output ports 0 and 1 are part of the I / O port unit 57 shown in FIG. Further, the time when the signal is in the ON state corresponds to the state where the “signal is being output”.

  FIG. 14 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 14, the bits 0 to 7 of the input port 0 include the count switch 23, the gate switch 32a, the winning port switches 33a, 39a, 29a, and 30a, the second starting port switch 14a, and the first starting port, respectively. A detection signal of the switch 13a is input.

  In addition, a prize ball count signal, a full tank signal, a ball runout signal, and a payout error signal from the payout control board 37 are input to bits 0 to 3 of the input port 1, respectively. In addition, a door open / close signal is input to bit 4 of the input port 1 via the backup power supply circuit 506. The high level “1” of the prize ball count signal corresponds to the ON state (the state where the payout number count switch 301 is ON). The high level “1” of the full signal corresponds to the on state (the full switch 48 is on). The high level “1” of the ball break signal corresponds to the on state (the state in which the ball break switch 187 is turned on). The high level “1” of the door opening / closing signal corresponds to a state where the door opening switch 155a does not detect the opening of the game frame 11 (a state where the door is closed).

  A random number error signal from the monitoring circuit 504 is input to bit 5 of the input port 1. The low level (“0”) of the random number error signal corresponds to the ON state (the state where the random number error has occurred). That is, the monitoring circuit 504 maintains the random number error signal at a high level when normal, but changes the random number error signal to a low level when abnormal. Note that a logic opposite to the “logic” shown in FIG. 14 may be used. For example, an input signal in which 1 is on may be an input signal in which 0 is on.

  Bits 0 and 1 of the input port 2 are supplied with a power-off signal from the power supply board and a clear switch detection signal (clear signal), respectively. The power-off signal is a signal that is output when a power supply monitoring circuit mounted on the power supply board detects a decrease in a predetermined voltage. The clear switch is a switch that can be operated by a game clerk or the like, and is a switch that is operated when the RAM 55 is to be initialized. The input ports 0 to 2 are a part of the I / O port unit 57 shown in FIG. Further, the time when the signal is in the ON state corresponds to the state where the “signal is input”.

  FIG. 15 is a circuit diagram showing the internal configuration of the information terminal board. In the information terminal board 34 shown in FIG. 15, the left connector CN corresponds to the connector 341 for connecting the cable 343 for transmitting a signal from the main board 31 shown in FIG. 12, and the right connectors CN1 to CN9 are This corresponds to a connector 347 for connecting a cable 349 for transmitting a signal to the hall computer shown in FIG. The semiconductor relays (PhotoMOS relays) PC1 to PC9 correspond to the driver circuit 345 shown in FIG.

  When the cable 343 from the main board 31 is connected to the connector CN, various signals are input to the information terminal board 34 from the main board 31 (game control microcomputer 560). Specifically, the start port 1 signal is input to the terminal “2” of the connector CN, the start port 2 signal is input to the terminal “3” of the connector CN, and the symbol determination frequency signal is input to the terminal “4” of the connector CN. 1 signal is input to terminal “5” of connector CN, 2 signals of jackpot are input to terminal “6” of connector CN, a time reduction signal is input to terminal “7” of connector CN, and connector CN The probability variation signal is input to the terminal “8”, and the prize ball signal is input to the terminal “9” of the connector CN.

  FIG. 15 shows a case in which a common symbol determination frequency signal is input in the case of the first special symbol and the case of the second special symbol, but in the case of the first special symbol and the case of the second special symbol. And separate symbol determination frequency signals may be input.

  As shown in FIG. 15, in the information terminal board 34, the signal line of the reference potential is connected to the terminal “1” of the connector CN, the signal line branches, and the input terminals “1” of the respective semiconductor relays PC1 to PC8. "It is connected to the. The signal lines connected to the terminals “2” to “9” of the connector CN are connected to the input terminals “2” of the semiconductor relays PC1 to PC8 via the 1 KΩ resistors R1 to R8, respectively. The signal lines connected to the output terminals “4” of the semiconductor relays PC1 to PC8 are connected to the terminals “1” of the connectors CN1 to CN8, respectively. The signal lines connected to the output terminals “3” of the semiconductor relays PC1 to PC8 are connected to the terminals “2” of the connectors CN1 to CN8, respectively.

  On the other hand, as shown in FIG. 15, for the door opening signal, the detection signal (door opening signal) from the door opening switch 155a and the detection signal (game frame opening signal) from the game frame opening switch 155b are The information is input to the information terminal board 34 via the backup power supply circuit 506. And it inputs into the semiconductor relay 9 mounted in the information terminal board 34. FIG. As shown in FIG. 15, the reference potential signal line is connected to the input terminal “1” of the semiconductor relay PC 9 via the backup power supply circuit 506 of the main board 31. A ground line is connected to the input terminal “2” of the semiconductor relay PC9 via the backup power supply circuit 506 of the main board 31. The signal line connected to the output terminal “4” of the semiconductor relay PC9 is connected to the terminal “1” of the connector CN9. The signal line connected to the output terminal “3” of the semiconductor relay PC9 is connected to the terminal “2” of the connector CN9. In this embodiment, the backflow prevention diode 506a is provided on the input side of the reference potential of the backup power supply circuit 506 of the main board 31, so that it is other than the semiconductor relay PC9 provided on the information terminal board 34. Thus, the current from the backup power source 505 is prevented from being supplied to each circuit and each circuit element. In this embodiment, expressions such as “the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are input” are used. As shown in the circuit diagram of FIG. 15, when one or both of the door opening switch 155a and the game frame opening switch 155b are turned on (energized state), either the door opening switch 155a or the game frame opening switch 155b or The detection signals from both are input to the information terminal board 34 via the backup power supply circuit 506 of the main board 31. In this embodiment, expressions such as “a door opening signal is input from the door opening switch 155a” are used. Specifically, the detection switch 155A included in the door opening switch 155a is a door (glass The door opening signal is output by detecting the opening of the door frame 2 and the mechanism plate 11A), and the door opening signal is input to the information terminal board 34 and the effect control board 80 via the backup power supply circuit 506 of the main board 31. The

  In the semiconductor relays PC1 to PC9, when a signal current flows through the input terminal, the light emitting element (LED) on the input side emits light. The emitted light is applied to the photoelectric element (solar cell) provided opposite to the LED through the transparent silicon. The photoelectric element that has received the light is exchanged for voltage according to the amount of light, and this voltage passes through the control circuit to charge the MOSFET gate of the output section. When the MOSFET gate voltage supplied from the photoelectric element reaches the set voltage value, the MOSFET becomes conductive and turns on the load. When the signal current at the input terminal is cut off, the light emitting element (LED) stops emitting light. When the light emission of the LED stops, the voltage of the photoelectric element decreases, and when the voltage supplied from the photoelectric element decreases, the gate load of the MOSFET is rapidly discharged by the control circuit. With this control circuit, the MOSFET is turned off and the load is turned off.

  By the operation of the semiconductor relays PC1 to PC8 as described above, signals input from the input side connector CN are transmitted to the output side connectors CN1 to CN8 and output to the hall computer. Specifically, the start port 1 signal is output from the connector CN1, the start port 2 signal is output from the connector CN2, the symbol determination number signal is output from the connector CN3, the jackpot 1 signal is output from the connector CN4, and the connector CN5. 2 signals are output from the jack, a time-short signal is output from the connector CN6, a probability variation signal is output from the connector CN7, and a prize ball signal is output from the connector CN8. Further, by the operation of the semiconductor relay PC9 as described above, the door opening signal and the game frame opening signal input via the backup power supply circuit 506 of the main board 31 are transmitted to the output side connector CN9 and are transmitted to the hall computer. Is output.

  As described above, by providing the semiconductor relays PC1 to PC9 on the information terminal board 34, signal input from the outside to the inside of the gaming machine can be prevented, and as a result, illegal acts can be reliably prevented. . In the above example, the semiconductor relays PC1 to PC9 are provided on the information terminal board 34, but other relay elements such as a mechanical relay may be used instead of the semiconductor relays PC1 to PC9.

  In this embodiment, the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are input to the information terminal board 34 via the backup power supply circuit 506 of the main board 31. Even when the power of the gaming machine is turned off, the power of the backup power supply 505 mounted on the backup power supply circuit 506 is supplied to the door opening switch 155a, the game frame opening switch 155b, and the semiconductor relay PC9 of the information terminal board 34. Then, the door opening signal and the game frame opening signal are transmitted to the output-side connector 9 and output to the hall computer.

  In this embodiment, the door opening switch 155a and the game frame opening switch 155b are in an off state (non-energized state) when the door (the glass door frame 2 and the mechanism plate 11A) and the game frame 11 are not opened. When it is open, it is energized and turned on. Therefore, compared to the case where the door opening switch 155a and the game frame opening switch 155b are configured to be in an on state when the door or the game frame 11 is not opened and to be in an off state when opened. Electric power can be reduced. The door opening switch 155a and the game frame opening switch 155b are in an on state (energized state) when the door (the glass door frame 2 and the mechanism plate 11A) and the game frame 11 are not opened, and non-open when opened. You may use what will be in an energized state and will be in an OFF state.

  FIG. 16 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605. The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 607 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the effect control microcomputer 100 to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, and each lamp 125a-125f, 126a-126f, 127a-127c provided in the game board 6, and each movable member The motors 151a to 151c are supplied.

  The relay board 607 is connected to the relay board 606 through a single bus-type wiring route. The serial data line 300 and the clock signal line 301 connected to each of the serial-parallel conversion ICs 616 to 619 are connected on the board side IC substrate 601 in a bus form.

  Each serial-parallel conversion IC 616 to 619 mounted on the board side IC substrate 601 has a unique ID. In this embodiment, as shown in FIG. 16, the ID of IC 616 is 06, the ID of IC 617 is 07, the ID of IC 618 is 08, and the ID of IC 619 is 09.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the production control microcomputer 100 mounted on the board-side IC board 601 include an input signal line 302, a clock signal line 301, and an input capture signal line 303 via a relay board 606. It is connected. The effect control microcomputer 100 outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input fetch signal (latch signal) and outputs it to the effect control microcomputer 100 via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it. In this embodiment, the unique ID of the input IC 621 is 11, as shown in FIG.

  As shown in FIG. 16, the serial data and the clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC boards 602 to 605, respectively. And each serial-parallel conversion IC611-615 converts the input serial data into parallel data, and each lamp 281a-281l, 282a-282e, 283a-283e, 51a, 51b, 82a provided in the game frame 11 is provided. To 82d and 83.

  The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 611 to 614 are connected in a bus form on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 16, first, the serial-parallel conversion IC 614 of the frame-side IC board 604 is input, and the serial-parallel conversion IC 614 and the serial-parallel conversion IC 611 and the serial-parallel of the frame-side IC board 602 are input. The signals are input in the order of the parallel conversion IC 612, and further input from the serial-parallel conversion IC 612 to the serial-parallel conversion IC 613 of the frame side IC substrate 603. The serial data line and the clock signal line connected to the serial-parallel conversion IC 615 are directly connected from the relay board 607.

  Each serial-parallel conversion IC 611 to 615 mounted on each frame side IC substrate 602 to 605 has a unique ID. In this embodiment, as shown in FIG. 16, the ID of IC 611 is 01, the ID of IC 612 is 02, the ID of IC 613 is 03, the ID of IC 614 is 04, and the ID of IC 615 is 05 It is.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, an input signal line, a clock signal line, and an input capture signal line are connected to the input IC 620 mounted on the frame side IC board 605 and the production control microcomputer 100 via the relay boards 606 and 607. Has been. The production control microcomputer 100 outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the production control microcomputer 100 outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the effect control microcomputer 100 via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data. In this embodiment, the unique ID of the input IC 620 is 10 as shown in FIG.

  The serial-parallel conversion ICs 616 to 619 mounted on the panel-side IC substrate 601 and the serial-parallel conversion ICs 611 to 615 mounted on the frame-side IC substrates 602 to 605 are connected via one line of wiring. . Specifically, the connection through one system wiring means that the relay boards 606 and 607 are connected in a bus type, and the serial-parallel conversion ICs 611 to 619 are connected in a bus type or a daisy chain type. It is that. That is, being connected through one system of wiring means that the signal output from the signal output side (in this example, the production control board 80) is transmitted from each board (for example, the relay boards 606 and 607) or each IC ( For example, it is connected to the serial-parallel conversion ICs 611 to 619) so as to be transmitted from the upstream side to the downstream side of the signal flow. Further, it means that the signal is not transmitted by any one of a plurality of independent systems to each board (for example, relay boards 606 and 607) and each IC (for example, serial-parallel conversion ICs 611 to 619). To do. In this embodiment, as shown in FIG. 16, the serial-parallel conversion ICs 611 to 619 are connected in a bus type. As described above, in this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601 and the serial-parallel ICs 611 to 615 mounted on the frame side IC substrates 602 to 605 are provided. The connectors 156a to 156h and 157a to 157e are connected via the relay boards 606 and 607 via one line of wiring. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  In addition, according to this embodiment, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621. The common clock signal is input from the production control microcomputer 100. Therefore, the wiring of the clock signal to the serial-parallel conversion ICs 611 to 619 and the wiring of the clock signal to the input ICs 620 and 621 can be shared, and communication between the effect control means and the board-side IC 601 board, Communication between the effect control means and the frame side IC substrates 602 to 605 can be realized using one channel, respectively, and the number of wirings can be reduced. Also, the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, and the input ICs 620 and 621 can be easily synchronized. The number of clock signal wirings can also be reduced.

  In this embodiment, addresses are assigned in advance to the serial-parallel conversion ICs 611 to 619. When the production control microcomputer 100 outputs the control signal converted into serial data, it adds an address to the serial data and outputs it. When each serial-parallel conversion IC 611-619 inputs serial data, it checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. Supply (ie, output) each lamp. If the addresses do not match, supply to each lamp is not performed.

  17 and 18 are explanatory diagrams showing examples of addresses given to the serial-parallel conversion ICs 611 to 619. FIG. In this embodiment, the production control microcomputer 100 stores the addresses of the serial-parallel conversion ICs 611 to 619 shown in FIGS. 17 and 18 in a predetermined address storage area previously provided in the RAM or ROM. Yes.

  In this embodiment, as shown in FIGS. 17 and 18, in the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC substrates 602 to 605, an address 01 is assigned to the IC 611, and an address is assigned to the IC 612. 02 is given, address 03 is given to IC613, address 04 is given to IC614, and address 05 is given to IC615. Further, in the serial-parallel conversion ICs 616 to 619 mounted on the board side IC substrate 601, the address 006 is assigned to the IC 616, the address 07 is given to the IC 617, the address 08 is given to the IC 618, and the IC 619 is given to the IC 619. Address 09 is given.

  The serial-parallel conversion ICs 611 to 619 may be given the same ID as the unique ID of the IC as an address, and an address (specifically, an address including numbers, characters, and symbols different from the unique ID of the IC). , Code data such as JIS codes representing characters and symbols may be used as addresses).

  As shown in FIGS. 17 and 18, the serial-parallel conversion IC 611 whose address is 01 converts serial data into parallel data, and converts the top frame lamp of the game frame 11 (in this example, top frame lamps 281a to 281l). 6 LEDs (281a to 281f). The serial-parallel conversion IC 612 whose address is 02 converts serial data into parallel data, and the top frame lamp of the game frame 11 (in this example, the other six LEDs (281 g to 281 l) of the top frame lamps 281a to 281l). ). Further, the serial-parallel conversion IC 613 whose address is 03 converts the serial data into parallel data, and converts it into a right frame lamp and a right award ball lamp of the game frame 11 (in this example, six LEDs (283a to 283e, 51b)). Supply. Further, the serial-parallel conversion IC 614 whose address is 04 converts the serial data into parallel data, and turns it into a left frame lamp and a left award ball lamp (in this example, six LEDs (282a to 282e, 51a)) of the game frame 11. Supply.

  Further, the serial-parallel conversion IC 615 whose address is 05 converts the serial data into parallel data, and turns it into a plate lamp (in this example, four LEDs (82a to 82d)) provided on the hitting ball supply tray 3 of the game frame 11. At the same time, it is supplied to an operation button lamp 83 (one lamp in this example) provided on the operation buttons 81a to 81e.

  In addition, the serial-parallel conversion IC 616 whose address is 06 converts serial data into parallel data, and each movable member provided in the game board 6 (in this example, a role imitating the shape of a beam, a truck, and a skeleton) ) (In this example, three motors (151a, 152a, 153a) are supplied in the reverse direction). The serial-parallel conversion IC 617 whose address is 07 converts the serial data into parallel data, and each lamp of the decorative structure (center decoration) provided in the center of the game board 6 (in this example, six LEDs (125a To 125 f)). Further, the serial-parallel conversion IC 618 whose address is 08 converts serial data into parallel data and supplies it to each stage lamp (in this example, six LEDs (126a to 126f)) provided around the effect display device 9. To do. The serial-parallel conversion IC 619 whose address is 09 converts serial data into parallel data, and a lamp (three LEDs (127a to 127c in this example)) provided around the movable member (the skeleton 153 in this example). To supply.

  FIG. 19 is a block diagram showing the configuration of each serial-parallel conversion IC 611-619. As illustrated in FIG. 19, the serial-parallel conversion ICs 611 to 619 include a data latch unit 651, a shift register 652, a header / address detection unit 653, a data buffer 655, and a sync driver 656.

  The data latch unit 651 includes, for example, a latch circuit. When serial data is input, the data latch unit 651 latches the input data bit by bit at the rising timing of the clock signal pulse and outputs the latched data to the shift register 652. The shift register 652 sequentially stores data input bit by bit from the data latch unit 651. The shift register 652 shifts stored data bit by bit at the rising timing of the pulse of the clock signal. By repeatedly shifting the stored data bit by bit in this way, the data finally input as serial data (that is, in the serial signal system) is stored in the shift register 652.

  FIG. 20 is an explanatory diagram showing an example of the format of serial data output from the production control microcomputer 100. FIG. FIG. 20A shows a data format of serial data output as lamp lighting data for individually lighting or extinguishing the LEDs constituting each lamp provided in the game board 6 or the game frame 11. FIG. 20B shows a serial data format that is output as a reset command for resetting all the LEDs constituting each lamp provided in the game board 6 and the game frame 11 to turn them off.

  As shown in FIG. 20A, the lamp lighting data is composed of 28 bits, and includes 9-bit header data, mark bits (M), 8-bit addresses, 8-bit data, and end bits (E). .

  The header data represents the beginning of the data, and is 1FF (H) in this example. (H) indicates a hexadecimal number. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the address and between the address and the data. The address is the address of the data-output destination serial-parallel conversion IC. An ID that is a unique serial number of each serial-parallel conversion IC 611 to 619 may be used as the address.

  The data (8 bits) is for controlling the lighting state of the LEDs constituting each lamp. For example, the data (8 bits) includes a logical value 1 as a bit corresponding to the LED constituting the lamp to be lit, A logical value 0 is included as a bit corresponding to the LED constituting the lamp. The end bit (E) indicates the end of data, and is a logical value 0 in this example.

  As shown in FIG. 20B, the reset command is composed of 19 bits, and includes 9-bit header data, mark bits (M), 8-bit reset data, and end bits (E).

  The header data represents the beginning of the data, and is 1FF (H) in this example. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the reset data. The reset data is for resetting the lighting states of the LEDs constituting each lamp so that all the LEDs are extinguished. The end bit (E) indicates the end of data, and is a logical value 0 in this example.

  In this embodiment, the lamp lighting data shown in FIG. 20A or the reset command shown in FIG. 20B is input, and the shift register 652 is repeatedly shifted bit by bit at the rising edge of the clock signal pulse. Will be stored.

  The header / address detector 653 detects the header and address from the data stored in the shift register 652. First, the header / address detection unit 653 constantly detects data from the shift register 652, and confirms whether or not the content of the detected data matches 1FF (H) corresponding to the header data. If it matches with the header data (1FF (H)), it is determined that the position matching the header data is the head of the data, and it is determined that one set of lamp lighting data or reset command is stored in the shift register 652. Next, the header / address detection unit 653 detects the 11th to 18th bits of data from the head corresponding to the address from the shift register 652, and whether or not it matches the address previously given to the serial-parallel conversion IC. To check. The board side IC substrate 601 and the frame side IC substrates 602 to 605 are provided with, for example, address storage registers 654 that store addresses of serial-parallel conversion ICs to be mounted. The header / address detector 653 may check whether the address detected from the shift register 652 matches the address stored in the address storage register 654 in advance. If the addresses match, the header / address detection 653 determines that data destined for the serial-parallel conversion IC has been input, and outputs an input capture signal (latch signal) to the data buffer 655. If the addresses do not match, the header / address detection 653 does not output the input capture signal to the data buffer 655. That is, in this case, since the data is not addressed to the serial-parallel conversion IC, the data stored in the shift register 652 is discarded without being output to the data buffer 655.

  FIG. 19 shows a case where the address storage register 654 is provided in advance on the board side IC board 601 and each of the frame side IC boards 602 to 605, but instead of the address storage register 654, serial- An address is provided from an external hardware circuit (for example, a circuit mounted on the effect control board 80) via an address terminal (8 terminals (corresponding to each bit of an 8-bit address)) provided in the parallel conversion IC. May be input. An address may be input to the serial-parallel conversion IC by controlling the input of each address terminal to “H” (high level) or “L” (low level) from the external hardware circuit side. . In this case, for example, the external hardware circuit sets the input to the terminal to “H” by applying a voltage to the terminal corresponding to any bit of the address, or the input to the terminal by switching to the ground. Control to be “L”.

  The data buffer 655 is constituted by, for example, a latch register. When an input capture signal is input from the header / address detector 653, the data of the 20th to 27th bits from the head corresponding to the data portion is captured from the shift register 652. Latch with. The data buffer 655 supplies (that is, outputs) the captured data as parallel data (Q0 to Q7) to the LEDs constituting each lamp.

  If the data stored in the shift register 652 is a reset command, the 11th to 18th bits from the beginning all store data having a logical value of 1. In this case, the data buffer 655 determines that a reset command has been input when all data having a logical value of 1 is fetched, and the LEDs constituting all the lamps are reset and turned off.

  The sync driver 656 inverts and outputs the logical value of the parallel data output from the data buffer 655 based on a predetermined logic inversion setting signal, or outputs it as it is. For example, when the predetermined logic inversion setting signal is “H”, it turns on when the bit value of the parallel data output from the data buffer 655 is 1 (that is, the corresponding bit value of the lamp lighting data is 1). And an ON signal is output to the LEDs constituting each lamp. In this embodiment, the set value of the logic inversion setting signal is set in advance in the registers provided on the board side IC substrate 601 and the frame side IC substrates 602-605. It is assumed that an ON signal is output to the LEDs constituting each lamp in accordance with a preset setting value, and the LEDs constituting each lamp are turned on.

  FIG. 21 is a timing diagram showing an example of input timing of serial data and clock signals to the serial-parallel conversion IC and output timing of parallel data. FIG. 21 illustrates a case where lamp lighting data is input by a serial signal method. As shown in FIG. 21, serial data is input to the shift register 652 of the serial-parallel conversion IC in units of 1 bit in the order of header data, mark bits, addresses, mark bits, data, and end bits. The series of data is set as one set. The header / address detection unit 653 does not detect header data until one set of serial data (in this example, lamp lighting data) has been input, so the output of the data buffer 655 does not change. Therefore, the lighting pattern based on the serial data received last time is output from the serial-parallel conversion IC as it is by the parallel signal method (method for sending data at a time through a plurality of signal lines).

  When all sets of serial data have been input, the data portion from the data stored in the shift register 652 is latched in the data buffer 655, and a lighting pattern based on the newly received serial data is output in a parallel signal system. In this embodiment, as shown in FIG. 21, among the parallel data output from the serial-parallel conversion IC, Q0 and Q4 are the rising timing of the pulse of the next clock signal after completion of the serial data input. Immediately, the data is switched to new lighting pattern data. Q1 and Q5 are switched to new lighting pattern data with a delay of one clock from Q0 and Q4. Q2 and Q6 are switched to new lighting pattern data with a delay of two clocks from Q0 and Q4. Further, Q3 and Q7 are switched to new lighting pattern data with a delay of three clocks from Q0 and Q4.

  Next, the operation of the gaming machine will be described. FIG. 22 is a flowchart showing main processing executed by the game control microcomputer 560 on the main board 31. When power is supplied to the gaming machine and power supply is started, the input level of the reset terminal to which the reset signal is input becomes high level, and the gaming control microcomputer 560 (specifically, the CPU 56) After executing a security check process, which is a process for confirming whether the contents of the program are valid, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In the interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is This mode indicates an interrupt address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (in this embodiment, mounted on the power supply board) input via the input port (step S6). When the on-state is detected in the confirmation, the CPU 56 executes normal initialization processing (steps S10 to S15).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process.

  When it is confirmed that the power supply stop process has been performed, the CPU 56 performs data check of the backup RAM area (step S8). In this embodiment, a parity check is performed as a data check. Therefore, in step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 recovers the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain as they are. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14A.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a first special symbol buffer, a second special symbol buffer, a total prize ball number storage buffer, a first special symbol process flag, a first symbol 2 An initial value is set for a flag for selectively performing processing according to the control state, such as a special symbol process flag, a winning ball flag, a ball-out flag, or a payout stop flag.

  Further, the CPU 56 is an initialization designation command for initializing a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed initialization processing). Is transmitted to the sub-board (step S13). For example, when the effect control microcomputer 100 receives the initialization designation command, the effect display device 9 performs screen display for notifying that the control of the gaming machine has been performed, that is, initialization notification.

  Further, the CPU 56 sets an abnormality notification prohibition flag (step S44) and sets a value corresponding to the prohibition period value in the stop period timer (step S45). The prohibition period value is a value indicating a period during which an abnormal winning notification described later is prohibited. The abnormality notification prohibition flag is a flag indicating that notification of abnormal winning is prohibited, and is maintained in the set state until the stop period timer times out. Therefore, the start of the abnormal winning notification is prohibited for a predetermined period after the initialization notification is started in the effect display device 9.

  Further, the CPU 56 inputs data (input data) of the input port 1 (see FIG. 14) (step S14A), and inputs an input port data designation command (see FIG. 28) in which the input data is set to the second byte. (Step S14B). It should be noted that immediately after the power supply to the gaming machine is started, when an abnormality occurs in which the clock signal is not supplied to the random number circuit 503, the data of bit 5 of the input port 1 is “0”. . Further, the CPU 56 stores the input data in the input port 1 buffer that is an area of the RAM 55 (step S14C).

  In step S15, the CPU 56 sets a register of the CTC built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When the display random number update process and the initial value random number update process are executed, the interrupt disabled state is set (step S16). Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number is an initial count value such as a counter for generating a random number for determining whether or not to win a normal symbol (ordinary random number generation counter for normal symbol determination). It is a random number for determining the value. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls game devices such as an effect display device, a variable winning ball device, a ball payout device, etc. provided in the game machine itself. In the process of transmitting a command signal to be controlled by another microcomputer, or a game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value of the possible values), an initial value is set in the counter.

  In this embodiment, the CPU 56 transmits the input data of the input port 1 as an input port data designation command to the effect control board at the start of power supply to the gaming machine (steps S14A to 14C), but steps S14A to 14C. In the first timer interrupt process, whether or not the bit of the random error signal in the input data of the input port 1 indicates an off state (a state where there is no random error, that is, a normal state) is not executed. If it is in the off state, the input port data designation command may be transmitted including a bit such as a full input port. In that case, the rendering control CPU 101 of the rendering control microcomputer 100 generates a random number error when the input port data designation command cannot be received within a predetermined time after the power supply is started and the control can be performed. It is determined that When such control is performed, the control burden is reduced as compared with the case where the CPU 56 checks whether or not a random number error has occurred within a predetermined time.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process of steps S20 to S35 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output when, for example, a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, These state determinations are performed (switch processing: step S21).

  Next, the CPU 56 has a first special symbol display 8a, a second special symbol display 8b, a normal symbol display 10, a first special symbol hold storage display 18a, a second special symbol hold storage display 18b, a normal symbol. A display control process for controlling the display of the on-hold storage display 41 is executed (step S22). For the first special symbol display 8a, the second special symbol display 8b, and the normal symbol display 10, a drive signal is output to each display according to the contents of the output buffer set in steps S33 and S34. Execute control.

  Further, the CPU 56 performs a process for notifying the abnormal winning when it detects that the game ball has won the big winning opening at a time other than the regular time (step S22A: abnormal winning notifying process).

  Further, the CPU 56 executes an input port data confirmation process for transmitting the input data of the input port 1 to the effect control microcomputer 100 when the input data of the input port 1 (see FIG. 14) changes (step). S23).

  Next, a process of updating the count value of each counter for generating each random number for determination such as a random number for determining jackpot symbols used for game control is performed (determination random number update process: step S24). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S25 and S26).

FIG. 24 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide a special symbol's off symbol (stop symbol) (for determining off symbol)
(2) Random 2: Determines the special symbol stop symbol when generating a big hit (for big hit symbol determination)
(3) Random 3: Determine the variation pattern (variation time) of special symbols (for variation pattern determination)
(4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for normal symbol hit determination)
(5) Random 5: Random 4 initial value is determined (for determining random 4 initial value)

  In this embodiment, a different symbol is determined depending on the type of jackpot as the jackpot symbol of the special symbol. For example, in the case of a probable big hit, “7” is determined as a probable big hit symbol based on random 2, and in the case of a normal big hit, “6” is determined as a normal big hit symbol based on random 2. . For example, in the case of sudden probability change big hit or small hit, “9” is determined as the sudden probability change big hit symbol or small hit symbol based on random 2. Further, in this embodiment, as a special symbol losing symbol, for example, based on random 1, symbols other than big hit symbols (including probability variable big hit symbols) and small hit symbols (for example, “6” and “7” above) ", Symbols other than" 9 ") are determined.

  In step S24 in the game control process shown in FIG. 23, the game control microcomputer 560 uses a counter for generating the jackpot symbol determination random number (2) and the random number for determination per regular symbol (4). Count up (add 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the jackpot determination random number (hereinafter also referred to as random R) is a random number generated by the random number circuit 503. The jackpot determination random number is generated by the game control microcomputer 560 based on a program. A generated software random number may be used.

  In this embodiment, the random numbers (particularly random 1, 2, 3) shown in FIG. 24 are used for both the first special symbol variation and the second special symbol variation. The random number related to the fluctuation may be different from the random number related to the fluctuation of the second special symbol.

  Further, the CPU 56 performs a first special symbol process (step S27A). In the first special symbol process, the corresponding process is executed according to the first special symbol process flag for controlling the first special symbol display 8a and the big prize opening in a predetermined order. The CPU 56 updates the value of the first special symbol process flag according to the gaming state. Further, the second special symbol process is performed (step S27B). In the second special symbol process, corresponding processing is executed in accordance with a second special symbol process flag for controlling the second special symbol display 8b and the big prize opening in a predetermined order.

  Next, normal symbol process processing is performed (step S28). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S29). In this embodiment, in step S29, the game control microcomputer 560 causes the MODE data or EXT data (MODE data to which the addresses of the destination serial-parallel conversion ICs 611 to 619 are added) to constitute the effect control command. Alternatively, transmission control is performed by adding header data, mark bits, and end bits to (EXT data). The effect control command is converted into serial data by the serial output circuit 78 and transmitted to the effect control board 80 via the relay board 77.

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall computer, for example (step S30).

  Further, the CPU 56 performs prize ball processing for setting the number of prize balls based on detection signals from the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a. Execute (Step S31). Specifically, payout control is performed in response to detection of a winning based on one of the first starting port switch 13a, the second starting port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a being turned on. A payout control signal (payout command signal) indicating the number of prize balls is output to a payout control microcomputer mounted on the substrate 37. The payout control microcomputer drives the ball payout device 97 according to the payout command signal.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S32: output process).

  The CPU 56 also displays special symbol display control data for effect display of the first special symbol and the second special symbol in accordance with the values of the first special symbol process flag and the second special symbol process flag. A special symbol display control process to be set in the setting output buffer is performed (step S33). For example, if the change speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in an output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S34). For example, when the start flag related to the variation of the normal symbol is set, the CPU 56 switches the display state (“◯” and “×”) for the variation rate of the normal symbol every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Thereafter, the interrupt permission state is set (step S35), and the process is terminated.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes of steps S21 to S34 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 25 is an explanatory diagram of a jackpot determination table. The jackpot determination table is a table in which a jackpot determination value to be compared with random R (random number for jackpot determination) is set. The jackpot determination table includes a normal jackpot determination table (see FIG. 25 (A)) used in a normal state (a gaming state that is not a probability change state) and a probability change jackpot determination table (see FIG. 25 (B)) used in a probability change state. ) The numerical values described in the left column of FIGS. 25A and 25B are jackpot determination values. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit 503 when the start winning occurs, and uses the extracted value as the jackpot determination random value. The jackpot determination random number matches the jackpot determination value shown in FIG. Then, it is decided to make a big hit (probability big hit or normal big hit) for the special symbol.

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. The normal big hit is a big hit that shifts the gaming state after the big hit game to a normal state that is not a probability change state. Note that the number of rounds in the case of a probable big hit and the normal big hit is larger than that in the case of a small hit and a sudden probable big hit, for example, 15 rounds.

  The small win is a hit in which the number of times of opening the big prize opening is allowed up to two times. When the small hit game ends, the game state does not change. That is, there is no transition from the probability variation state to the normal state or from the normal state to the certain variation state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In the big hit game of sudden probability change big hit, the number of rounds is smaller than in the case of normal big hit and probability variable big hit, and the allowance opening time for each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than the case of the normal big hit and the probability variation big hit, but only the number of rounds may be reduced, or only the allowance opening allowance time may be shortened.

  FIG. 26 is an explanatory diagram showing an example of a variation pattern used in this embodiment. As will be described later, in this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). In FIG. 26, “EXT” indicates EXT data of the second byte in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. “Reach A” is a variation pattern having a reach form different from “normal reach”. When the reach mode is different, the change mode (speed, rotation direction, etc.), character image, etc. appear in the effect display device 9 during the reach change time (the period during which the reach effect is performed), or the effect display device 9 The background design is different. For example, in “normal reach”, a reach mode is realized by only one type of change mode, whereas in “reach A”, a reach mode including a plurality of change modes having different speeds and directions of change is realized. Further, “reach A / shortening” is a variation pattern having a reach manner similar to “reach A”, but reach variation time is shorter than “reach A”. “Reach A / Extension” is a variation pattern having a reach manner similar to “Reach A”, but the reach variation time is longer than “Reach A”.

  “Reach B” is a fluctuation pattern having a reach mode different from “Normal reach” and “Reach A”. Further, “reach B / shortening” is a variation pattern having a reach manner similar to “reach B”, but the reach variation time is shorter than “reach B”. “Reach B / extension” is a variation pattern having a reach manner similar to “reach B”, but reach variation time is longer than “reach B”. “Reach C” is a variation pattern having a reach form different from “normal reach”, “reach A”, and “reach B”. “Reach C / shortening” is a variation pattern having a reach manner similar to “reach C”, but reach variation time is shorter than “reach C”.

  “Super reach A” is a variation pattern having a reach mode different from “normal reach”, “reach A”, “reach B”, and “reach C”. is there. “Super reach B” is a variation pattern having a reach form different from “normal reach”, “reach A”, “reach B”, “reach C” and “super reach A”. This is a variation pattern. “Reach A / Accuracy” is a variation pattern having a reach form different from “Normal reach”, “Reach A”, “Reach B”, “Reach C”, “Super reach A” and “Super reach B”. It should be noted that the reach form of “reach A / accuracy” is a reach form similar to “reach A”.

  In this embodiment, in the case of a big hit, the game control microcomputer 560 is “reach A / shortening”, “reach A”, “reach B / shortening”, “reach B”, “reach C / shortening”. ", Reach C", "Super Reach A" or "Super Reach B". Further, in the case of a probable big hit, the game control microcomputer 560 is “reach A / extension”, “reach B / extension”, “reach C / shortening”, “reach C”, “super reach A” or “ Select "Super Reach B". In case of sudden big odds, select “Reach A / Random”.

  Further, as shown in FIG. 26, the fluctuation pattern selected only in the case of the normal big hit, the fluctuation pattern selected only in the case of the probability big hit, and the normal big hit and the probability variable big hit can be selected. There are fluctuation patterns.

  In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In addition, when variable display of a special symbol is started when variable display is finished, when it is decided to change to a probable change state when the special symbol variable display is started, the game state is changed into a probable change state when the big hit game is ended. To be migrated. If the gaming state at that time is a probability variation state, the probability variation state is continued.

  After the transition to the probability changing state, the state of the probability changing state is short and the state is short until the execution of the variation (variable display) of 100 special symbols is completed. In addition, in the non-probability change state after the big hit game is over, the game state is changed to the normal state (the game state that is not the probability change state and not the short-time state) when the execution of 100 special symbol changes (variable display) is completed. Transition.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. In this embodiment, the effect control command is converted from parallel data to serial data by the serial output circuit 78 and transmitted from the main board 31 to the effect control board 80 via the relay board 77.

  In this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  FIG. 27 is an explanatory diagram showing an example of the format of the effect control command transmitted by the serial signal method. As shown in FIG. 27, when transmitting the effect control command, the game control microcomputer 560 (specifically, the CPU 56) first adds header data and mark bits to MODE data (MODE data to which an address is added), Transmission control is performed by adding an end bit. Then, the serial output circuit 78 converts the MODE data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77. Next, the game control microcomputer 560 performs transmission control by adding header data, mark bits, and end bits to EXT data (EXT data with an address added). Then, the serial output circuit 78 converts the EXT data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77.

  FIG. 28 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 28, commands 8001 (H) to 800E (H) are effect control commands (variation) for designating a variation pattern of the effect symbol variably displayed on the effect display device 9 in response to variable display of the special symbol. Pattern command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800E (H), the production display device 9 performs control so that variable display of production symbols is started. In this embodiment, since the variable display of the special symbol and the variable display of the effect symbol are synchronized (the variable display start time and the variable display end time are the same), the effect symbol variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the effect symbols in response to the reception of the commands 8C01 (H) to 8C05 (H), so the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands.

  Command 8D01 (H) is an effect control command (first symbol variation designation command) indicating that variable display (variation) of the first special symbol is started. Command 8D02 (H) is an effect control command (second symbol variation designation command) indicating that variable display (variation) of the second special symbol is started. The first symbol variation designation command and the second symbol variation designation command may be collectively referred to as a symbol variation designation command.

  The command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the effect symbol is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the effect symbol and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the gaming control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command. Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration.

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of a big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game and an effect control command (special jackpot end 1 designation command: ending) that specifies that the jackpot game is a non-probable big hit (usually a big hit) 1 designation command). In this embodiment, even if it is a small hit, a big hit end 1 designation command is transmitted. However, in this embodiment, in the case of a small hit, the effect control microcomputer 100 receives a big hit end 1 designation command in a different presentation mode from the normal big hit (for example, sudden probability change big hit) The ending effect is executed (in the same effect mode). In this case, for example, when receiving the display result command for designating the big hit, the production control microcomputer 100 has a production mode different from that for the normal big hit even when the big hit end 1 designation command is received. Control to execute the ending effect. Command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a probable big hit (big hit end 2 designation command: ending 2 designation command). is there.

  The command C000 (H) is an effect control command (first start winning designation command) that designates that the first start winning has been won. The command C100 (H) is an effect control command (second start winning designation command) for designating that the second starting win has been won. The first start prize designation command and the second start prize designation command may be collectively referred to as a start prize designation command.

  The command C2XX (H) is an effect control command (total pending storage number designation command) for designating a total number (total pending storage number) that is the sum of the first reserved memory number and the second reserved memory number. “XX” in the command C2XX (H) indicates the total pending storage number. The command C300 (H) is an effect control command (total pending storage count subtraction designation command) that designates that the total pending storage count is decremented by one. In this embodiment, the game control microcomputer 560 transmits a total pending storage number subtraction designation command when subtracting the total pending storage number, but does not use the total pending storage number subtraction designation command, and does not use the total pending storage number subtraction designation command. When the stored number is subtracted, the combined pending storage number after the subtraction may be specified by a combined pending storage number designation command.

  The command D000 (H) is an effect control command (abnormal winning notification designation command) for instructing an abnormal winning notification.

  Command FFYY (H) is an effect control command (input port data designation command) indicating input data of input port 1. YY indicates input data of the input port 1.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the effect display device 9 is changed according to the contents shown in FIG. 28, the display state of the lamp is changed, or the sound number data is output to the audio output board 70.

  29 to 31 are explanatory diagrams illustrating examples of the transmission timing of the effect control command. FIG. 29A shows an example when a customer waiting demo command is transmitted. The game control microcomputer 560 transmits a background designation command before transmitting a customer waiting demo command. Specifically, when a background designation command is transmitted in a game control process based on a timer interrupt (see FIG. 23), a customer waiting demo command is transmitted in a game control process based on the next timer interrupt.

  FIG. 29B shows an example when a start prize (first start prize or second start prize) occurs. The game control microcomputer 560 transmits the first start prize designation command (or the second start prize designation command), and then continuously transmits the total pending storage number designation command. Specifically, a first start winning designation command (or second start winning designation command) is transmitted in a game control process based on a timer interrupt, and then a combined pending storage number designation command is transmitted.

  FIG. 29 (C) shows an example at the start of fluctuation of the special symbol. The game control microcomputer 560 transmits a background designation command, a symbol variation designation command, a variation pattern command, a display result command, and a combined pending storage number subtraction designation command at the start of variation. Specifically, when a background designation command is transmitted in a game control process based on a timer interrupt, a symbol variation designation command and a variation pattern command are transmitted in a game control process based on the next timer interrupt. Further, a display result command is transmitted in the game control process based on the next timer interrupt. Furthermore, a total pending storage number subtraction designation command is transmitted in the game control process based on the next timer interrupt. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  FIG. 30 (A) shows an example at the time of starting the variation of the special symbol that is started when the total number of pending storage becomes 0 to 1. The game control microcomputer 560 transmits a first start prize designation command (or a second start prize designation command) in a game control process based on a timer interrupt, and then transmits a combined pending storage number designation command. Then, from the game control process based on the next timer interruption, each effect control command is transmitted as shown in FIG. In the game control process based on the timer interruption, the first start winning designation command (or the second starting prize designation command), the total pending storage number designation command and the background designation command are transmitted, and the next timer interruption (after 2 ms) The symbol variation designation command and the variation pattern command are transmitted in the game control processing based on the timer interruption), and the display result command is transmitted in the game control processing based on the next timer interruption (the timer interruption after 2 ms), Furthermore, the total pending storage number subtraction designation command may be transmitted in a game control process based on the next timer interrupt (further timer interrupt after 2 ms).

  FIG. 30B shows an example when power supply is started (when power is turned on). The game control microcomputer 560 transmits a power-on specification command and a background specification command, and then transmits a customer waiting demonstration specification command. Specifically, when a power-on designation command and a background designation command are transmitted in a game control process based on a timer interrupt, a customer waiting demo command is transmitted in a game control process based on the next timer interrupt.

  FIG. 30C shows an example when power supply is resumed (when power failure is restored). The game control microcomputer 560 continuously transmits a power-on designation command, a display result command, and a combined pending storage number designation command. The effect symbol type storage area formed in the RAM 55 is stored for a predetermined period even when the power supply to the gaming machine is stopped. Therefore, when the power supply is resumed, the game control microcomputer 560 displays the effect symbol type storage area. A display result command is transmitted based on the data stored in the type storage area. Further, the value of the total pending storage number counter formed in the RAM 55 is stored for a predetermined period even when the power supply to the gaming machine is stopped. Therefore, when the power supply is resumed, the game control microcomputer 560 is restored. Transmits a total pending storage number designation command based on the stored total pending storage number counter value.

  FIG. 31A shows an example in a 15R jackpot game. The game control microcomputer 560 transmits a jackpot start 1 designation command at the start of a big hit game, sends a big prize opening opening designation command at the start of each round, and designates after the big prize opening is opened at the end of each round. A command is transmitted, and a jackpot end designation command is transmitted at the end of the jackpot game.

  FIG. 32 is an explanatory diagram showing the configuration of EXT data (YY portion) of the command FFYY (H) (input port data designation command). The bit assignment of EXT data is the same as the bit assignment of input port 1 shown in FIG. That is, a random number error designation bit corresponding to the random number error signal is assigned to bit 5 (D5). Bit 4 (D4) is assigned a door opening error designation bit corresponding to the door opening / closing signal. A payout error designation bit corresponding to the payout error signal is assigned to bit 3 (D3). Bit 2 (D2) is assigned a ball-out error designation bit corresponding to the ball-out error signal. Bit 1 (D1) is assigned a full tank error designation bit corresponding to the full tank error signal. A prize ball count designation bit corresponding to the prize ball count signal is assigned to bit 0 (D0). In the example shown in FIG. 32, since the bits 6 and 7 of the EXT data of the input port data designation command are unused, the bits indicate information indicating an error determined by the game control microcomputer 560 (for example, In the case where it is configured to determine whether or not an abnormal winning at the big winning opening has occurred, the detection of the count switch 23 even though the occurrence of the abnormal winning, that is, the control for opening the big winning opening is not performed. This information can be used when transmitting information indicating that the signal is turned on) to the production control microcomputer 100.

  33 and 34 are flowcharts showing the effect control command control processing in step S29. In the effect control command control process, the game control microcomputer 560 (specifically, the CPU 56) checks whether or not the initialization command transmission request flag is set (step S351). If the initialization command transmission request flag is not set, the process proceeds to step S356. If the initialization command transmission request flag is set, the initialization command transmission request flag is reset (step S352), and a power-on designation command is transmitted to the effect control microcomputer 100 (step S353).

  Specifically, the first byte data of the power-on designation command is output to the output port for outputting the command data, 1 is output only for a predetermined period to the output port for outputting the effect control INT signal, The second byte data of the power-on designation command is output to the output port for outputting command data, and 1 is output to the output port for outputting the effect control INT signal for a predetermined period. An output port for outputting command data and an output port for outputting the effect control INT signal are connected to the effect control board 80. Note that the method of transmitting such an effect control command is the same for other effect control commands other than the power-on designation command.

  Next, the CPU 56 transmits a background designation command (step S354), and sets a customer waiting demonstration designation command transmission request flag (step S355).

  In step S356, the CPU 56 checks whether or not the power failure recovery designation command transmission request flag is set. When the power failure recovery designation command transmission request flag is not set, the process proceeds to step S361. If the power failure recovery designation command transmission request flag is set, the power failure recovery designation command transmission request flag is reset (step S357), and the power failure restoration designation command is transmitted to the production control microcomputer 100 (step S358). Next, the display result command is transmitted (step S359). Further, a total pending storage number designation command is transmitted (step S360). In step S359, the CPU 56 transmits a display result command corresponding to the data stored in the effect symbol type storage area. In step S360, the value of the total pending storage number counter for counting the total pending storage number is set in the command data of the second byte. The total pending storage number counter is formed in the RAM 55. “Formed in RAM” means an area in the RAM.

  In step S361, the CPU 56 checks whether or not the first start winning designation command transmission request flag set in the process of step S116 (see FIG. 37) is set. If the first start winning designation command transmission request flag is not set, the process proceeds to step S365. If the first start prize designation command transmission request flag is set, the first start prize designation command transmission request flag is reset (step S362), and the first start prize designation command is transmitted to the effect control microcomputer 100. (Step S363). Next, a total pending storage number designation command is transmitted (step S364). In step S364, the value of the total pending storage number counter is set to the command data of the second byte.

  In step S365, the CPU 56 checks whether or not the second start winning designation command transmission request flag is set. If the second start winning designation command transmission request flag is not set, the process proceeds to step S371. If the second start prize designation command transmission request flag is set, the second start prize designation command transmission request flag is reset (step S366), and the second start prize designation command is transmitted to the production control microcomputer 100. (Step S367). Next, a total pending storage number designation command is transmitted (step S368). In step S368, the value of the total pending storage number counter is set to the command data of the second byte.

  In step S371, the CPU 56 checks whether the background designation command transmission request flag is set. When the background designation command transmission request flag is not set, the process proceeds to step S374. If the background designation command transmission request flag is set, the background designation command transmission request flag is reset (step S372), and the background designation command is transmitted to the effect control microcomputer 100 (step S373).

  In step S374, the CPU 56 checks whether the variation pattern command transmission request flag is set. If the variation pattern command transmission request flag is not set, the process proceeds to step S384. If the variation pattern command transmission request flag is set, the variation pattern command transmission request flag is reset (step S375), and the symbol variation designation command is transmitted to the production control microcomputer 100 (step S376). Next, a variation pattern command is transmitted (step S377). In step S376, the CPU 56 transmits the first symbol variation designation command if the first variation flag is set, and if not, or if the second variation flag is set, the second symbol variation designation is performed. Send a command. In step S377, a variation pattern command corresponding to the data stored in the variation pattern storage area is transmitted.

  In step S384, the CPU 56 checks whether or not the total pending storage number subtraction designation command transmission request flag is set. If the total pending storage number subtraction designation command transmission request flag is not set, the process proceeds to step S387. If the total pending storage count subtraction designation command transmission request flag is set, the total pending storage count subtraction designation command transmission request flag is reset (step S385), and the total pending storage count subtraction designation command is sent to the effect control microcomputer. 100 (step S386).

  In step S387, the CPU 56 checks whether the customer waiting demo designation command transmission request flag is set. If the customer waiting demonstration designation command transmission request flag is not set, the process proceeds to step S391. If the customer waiting demonstration designation command transmission request flag is set, the customer waiting demonstration designation command transmission request flag is reset (step S388), and the customer waiting demonstration designation command is transmitted to the effect control microcomputer 100 (step S388). S389).

  In step S391, the CPU 56 checks whether or not a flag indicating a request to send another effect control command is set. If the flag is set, the CPU 56 resets the flag and outputs the effect control command requested by the flag. The data is transmitted to the control microcomputer 100 (step S391). As representative examples of other effect control commands, based on the setting of a symbol confirmation designation command or a jackpot start designation command transmission request flag transmitted based on the symbol confirmation designation command transmission request flag being set. There are jackpot start 1 designation commands and jackpot start 2 designation commands that are transmitted.

  FIG. 35 and FIG. 36 are flowcharts showing an example of a program of the first special symbol process (step S27A) executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. . As described above, in the first special symbol process, a process for controlling the first special symbol display 8a and the special winning opening is executed.

  The program for the second special symbol process (step S27B) is configured in the same manner as the first special symbol process. That is, in the following description, if “first” is read as “second” and “second” is read as “first”, the second special symbol process will be described.

  In the first special symbol process, the CPU 56 turns on the first start opening switch 13a for detecting that a game ball has won the first start winning opening 13 (Y in step S321), that is, the first. If a start winning has occurred, a first start port switch passing process is executed (step S322). If it is detected in step S321 that the first start port switch 13a is not turned on, the process proceeds to step S323 as it is.

  Next, the CPU 56 performs any one of steps S300 to S311 on the condition that the second special symbol is not changing and that the big hit game is not being played (step S323). The fact that the second special symbol is not changing is determined, for example, by whether or not the second changing flag is set. Whether or not a big hit game is being played is determined by, for example, whether or not a big hit flag is set. Further, it may be determined by the value of the second special symbol process flag (for example, not 1 to 11) that the second special symbol is not changing and that the big hit game is not being played.

  The processes in steps S300 to S311 are as follows.

  First special symbol normal process (step S300): executed when the value of the first special symbol process flag is zero. When the game control microcomputer 560 is in a state where variable display of the first special symbol can be started, the game control microcomputer 560 checks the first reserved memory number (first start winning memory number). The first reserved memory number can be confirmed by the count value of the first reserved memory number counter. If the first reserved storage number is not 0, it is determined whether or not to make a big hit. Then, the internal state (first special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  First variation pattern setting process (step S301): This process is executed when the value of the first special symbol process flag is 1. The stop symbol after the variable display of the first special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from the start of variable display until the display result is derived and displayed (stopped display)) Decide to be time. Also, a first variation time timer that measures the variation time of the first special symbol is started. Then, the internal state (first special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  First display result specifying command transmission process (step S302): This process is executed when the value of the first special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (first special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  First reserved memory number transmission process (step S303): This process is executed when the value of the first special symbol process flag is 3. Control is performed to transmit the total pending storage number subtraction designation command to the effect control microcomputer 100. Then, the internal state (first special symbol process flag) is updated to a value (4 in this example) according to step S304.

  First special symbol changing process (step S304): executed when the value of the first special symbol process flag is 4. When the variation time of the variation pattern selected in the first variation pattern setting process elapses (the first variation time timer set in step S301 times out, that is, the value of the first variation time timer becomes 0), the internal state (first 1 special symbol process flag) is updated to a value (5 in this example) corresponding to step S305.

  First special symbol stop process (step S305): executed when the value of the first special symbol process flag is 5. The variable display on the first special symbol display 8a is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. When the big hit flag is set and the small hit flag is not set, the internal state (first special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). If the small hit flag is set, the internal state (first special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). If the big hit flag is not set, the internal state (first special symbol process flag) is updated to a value (0 in this example) corresponding to step S300. The effect control microcomputer 100 controls the effect display device 9 to stop the effect symbol when receiving the symbol confirmation designation command transmitted by the game control microcomputer 560.

  First big winning opening opening pre-process (step S306): This is executed when the value of the first special symbol process flag is 6. In the first grand prize opening pre-processing, control for opening the special prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the first big prize opening opening process is set by the timer, and the internal state (first special symbol process flag) is updated to a value corresponding to step S307 (7 in this example). The first big winning opening opening pre-processing is executed for each round. However, when starting the first round, the first big winning opening opening pre-processing is also a process of starting a big hit game.

  First big winning opening opening process (step S307): executed when the value of the first special symbol process flag is 7. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the big prize opening is satisfied and there are still remaining rounds, the internal state (first special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). When all the rounds have been completed, the internal state (first special symbol process flag) is updated to a value (8 in this example) corresponding to step S308.

  First big hit end process (step S308): executed when the value of the first special symbol process flag is 8. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended. Further, a process for setting a flag (for example, a probability variation flag) indicating a gaming state is performed. Then, the internal state (first special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  First small hit pre-release process (step S309): executed when the value of the first special symbol process flag is 9. In the first small hit pre-opening process, control is performed to open the big winning opening. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the first small hit release process is set by the timer, and the internal state (first special symbol process flag) is updated to a value corresponding to step S310 (in this example, 10 (decimal number)). The first small hit pre-opening process is executed for each round, but when the first round is started, the first small hit pre-opening process is a process for starting the small hit game.

  First small hit opening process (step S310): This process is executed when the value of the first special symbol process flag is 10 (decimal number). A control for transmitting an effect control command for a round display during the small hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the big prize opening is satisfied and there are still remaining rounds, the internal state (first special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). When all the rounds are completed, the internal state (first special symbol process flag) is updated to a value corresponding to step S311 (in this example, 11 (decimal number)).

  First small hit end processing (step S311): executed when the value of the first special symbol process flag is 11 (decimal number). Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the small hit gaming state has ended. Then, the internal state (first special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 37 is a flowchart showing the first start port switch passing process in step S322. In the first start port switch passing process, the CPU 56 checks whether or not the first reserved memory number is 4 which is the upper limit value (step S1111). If the first pending storage number is 4, the process ends.

  If the first reserved memory number is not 4, the value of the first reserved memory number counter indicating the first reserved memory number is incremented by 1 (step S1112). Further, the value of the total pending storage number counter is incremented by 1 (step S1113). Further, in the reserved storage specifying information storage area (holding specified area), data indicating “first start winning” is set in an area corresponding to the value of the combined reserved storage number counter (step S1114).

  FIG. 38 is an explanatory diagram showing a configuration example of the reserved storage specifying information storage area (hold specified area). FIG. 38 illustrates a case where the value of the total pending storage number counter is 5. As shown in FIG. 38, an area corresponding to the maximum value (8 in this example) of the total reserved memory number counter is secured in the reserved specific area. The reserved specific area is formed in the RAM 55.

  Further, the CPU 56 extracts software random numbers (such as a counter value for generating a jackpot determination random number) and stores them in the reserved memory buffer corresponding to the value of the first reserved memory number counter as the extracted random number value. Processing for storing in the storage area is executed (step S1115). In the reserved storage buffer, the same number of storage areas as the upper limit value of the first reserved storage number are secured. Further, a counter for generating a jackpot determination random number and the like and a holding storage buffer are formed in the RAM 55. Further, a first start winning memory designation command transmission request flag is set (step S1116).

  39 and 40 are flowcharts showing the first special symbol normal process (step S300) in the first special symbol process. In the first special symbol normal process, the CPU 56 confirms the value of the first reserved storage number (step S51). Specifically, the count value of the first reserved memory number counter is confirmed.

  If the first reserved memory number is not 0, the CPU 56 checks whether or not the first data among the data set in the reserved specific area (see FIG. 38) is the “first start winning” (step). S52). If it is “first start prize”, the processing after step S53 is performed.

  In step S53, each random number value stored in the storage area corresponding to the number of reserved memories = 1 in the first reserved memory number buffer of the RAM 55 is read and stored in the random number buffer area of the RAM 55. Then, the content of the reserved specific area is shifted by one. In the example shown in FIG. 38, the shift is made to the left (step S54). By the processes in steps S52 and S54, the special symbol change is started for the start winning that has occurred in the past in the first start winning and the second starting winning. That is, the variation of the special symbol is started in the order of the start winning prize.

  Next, the value of the first reserved memory number is decreased by 1 (the count value of the first reserved memory number counter is decremented by 1), and the contents of each storage area are shifted (step S55). That is, each random number value stored in the storage area corresponding to the first reserved memory number = n (n = 2, 3, 4) in the first reserved memory number buffer of the RAM 55 is expressed as the first reserved memory number = n−. 1 is stored in the storage area corresponding to 1. Therefore, the order in which the random number values stored in the respective storage areas corresponding to the respective first reserved memory numbers are extracted always coincides with the order of the first reserved memory number = 1, 2, 3, 4. It is like that. Also, the value of the total pending storage number counter is decremented by -1 (step S56), and the first changing flag is set (step S57).

  Next, the CPU 56 reads a random R (a jackpot determination random number) from the random number buffer area (step S61), and executes a jackpot determination module (step S62). The big hit judgment module compares a big hit judgment value or small hit judgment value (see FIG. 25) determined in advance with a big hit judgment random number, and if they match, the big hit (normal big hit, probability variation big hit or sudden probability variation big hit) or It is a program that executes processing that is determined to be a small hit.

  Note that when the gaming state is in the probability variation state, the CPU 56 uses the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 25B is set, and the gaming state is in the normal state (non-probability variation state). Is, the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 25 (A) is set is used. If it is determined to be a big hit (step S63), the process proceeds to step S81. Note that deciding whether or not to make a big hit means deciding whether or not to shift to the big win gaming state, but deciding whether or not to make the stop symbol in the special symbol display 8 a big hit symbol. It is also a thing.

  If it is not a big hit, it is determined whether or not it is a small hit. If it is determined to be a small hit, a small hit flag is set (steps S71 and S72). Then, the process proceeds to step S80. If not, the CPU 56 reads out the design symbol random number from the random number buffer area (step S73), and determines a stop symbol based on the design symbol random number (step S74). In this case, a missing symbol (for example, a left-right irregular symbol) is determined. Then, the process proceeds to step S80.

  In the case of a big hit, the CPU 56 sets a big hit flag (step S81). Then, the big hit symbol determining random number is read from the random number buffer area (step S82), and the big hit symbol (for example, right and left aligned symbols) is determined based on the big hit symbol determining random number (step S83). In this embodiment, when the determined stop symbol is a probability variation symbol (for example, “77” or “33”), it is determined to be a probability variation big hit.

  When it is determined that the probability variation jackpot is determined, the CPU 56 sets a probability variation jackpot flag (steps S84 and S85).

  Further, the background designation command transmission request flag is set (step S79A), and the value of the first special symbol process flag is updated to a value corresponding to the first variation pattern setting process (step S301) (step S80).

  In this embodiment, it is determined whether or not to make a big hit based on a big hit determination random number, and when it is decided to make a big hit, a predetermined big hit symbol (predetermined in advance) When the probability variation jackpot symbol) is determined, control is made to the probability variation state. However, based on the jackpot determination random number, whether or not to make a jackpot and the type of jackpot may be determined.

  FIG. 41 is a flowchart showing the first variation pattern setting process (step S301) in the first special symbol process. In the first variation pattern setting process, the CPU 56 reads the variation pattern determination random number from the random number buffer area (step S100). Then, the variation pattern is determined based on the variation pattern determination random number (step S101).

  Here, when the gaming state is a non-time saving state and it is determined to be out of play, “normal variation” or “normal reach” is selected (see FIG. 26). If the gaming state is a non-time-saving state and it is determined to be a big hit, “reach A”, “reach A / extension”, “reach B”, “reach B / extension”, “reach C” ”,“ Super Reach A ”,“ Super Reach B ”or“ Reach A · Accuracy ”(see FIG. 26). When it is determined to be a promising big hit out of the big hits, “reach A / extension”, “reach B / extension”, “reach C”, “super reach A” or “super reach B” is selected. In addition, when it is determined that the sudden probability change is a big hit, “reach A / accuracy” is selected. If it is determined that the big hit is a normal big hit, “reach A”, “reach B”, “reach C” or “super reach A” is selected.

  When the game state is the short time state and it is determined to be out of play, “normal variation / shortening” is selected (see FIG. 26). If the gaming state is a short-time state and it has been decided to win the game, select “Reach A / Shorten”, “Reach B / Short”, “Reach C / Short” or “Reach A / Success” Select (see FIG. 26). When it is determined to be a promising big hit out of the big hits, “reach C / shortening” is selected. When it is decided to suddenly change the probability big hit, select “reach A / accuracy”. If it is determined to be a big hit or a big hit out of the big hits, the “reach A / shortening”, “reach B / shortening” or “reach C / shortening” is selected. select.

  In order to facilitate the selection as described above, a variation pattern table is used according to the game state (whether or not it is a short-time state) and the determination result of whether or not to make a big hit (rejected and big hit types, respectively) . The variation pattern table is stored in the ROM 54, but is prepared according to the gaming state and the determination result as to whether or not to win. In each variation pattern table, data indicating a variation pattern that can be selected and a numerical value corresponding to the data are set. Then, the CPU 56 selects a variation pattern table according to the gaming state and the determination result as to whether or not to win, and corresponds to a numerical value that matches the value of the variation pattern determination random number in the selected variation pattern table. Select a variation pattern. Therefore, the game control microcomputer 560 selects the variation pattern depending on whether or not the jackpot has already been determined and whether or not the probability variation jackpot is set. When the gaming state is also controlled to the short-time state, a variation pattern table including a variation pattern with a variation time shorter than the normal state is prepared in advance. Then, when the time reduction flag indicating that the gaming state is the time reduction state is set, the CPU 56 selects the time variation variation pattern table and selects a variation pattern having a variation time shorter than the normal state.

  Then, the CPU 56 stores data indicating the variation pattern selected in step S101 in the variation pattern storage area in the RAM 55 (step S103A) and sets a variation pattern command transmission request flag (step S103B).

  Moreover, the variation of the first special symbol is started (step S104). For example, a start flag referred to in the special symbol display control process in step S34 is set. Further, a value corresponding to the variation time (see FIG. 26) corresponding to the selected variation pattern is set in the first variation time timer formed in the RAM 55 (step S105). Then, the value of the first special symbol process flag is updated to a value corresponding to the first display result specifying command transmission process (step S302) (step S106).

  FIG. 42 is a flowchart showing the first display result specifying command transmission process (step S302). In the first display result specifying command transmission process, the CPU 56 determines any one of the effect control commands (display result 1 designation to display result 5 designation) depending on whether or not the big hit type or the small hit is determined (see FIG. 28). Specifically, the CPU 56 first checks whether a big hit flag or a small hit flag is set (step S110). If not set, control is performed to transmit a display result 1 designation command (step S111). When the big hit flag is set, when the probability variation big hit flag is set, control for transmitting the display result 4 designation command is performed (steps S112 and S113). When the sudden probability big hit flag is set, control for transmitting a display result 5 designation command is performed (steps S114 and S115). When the small hit flag is set, control for transmitting a display result 3 designation command is performed (steps S116 and S117). When none of the probability variation big hit flag, sudden probability variation big hit flag, and small hit flag is set, control is performed to transmit a display result 2 designation command (step S118). Then, the value of the first special symbol process flag is updated to a value corresponding to the first reserved memory number transmission process (step S303) (step S119).

  FIG. 43 is a flowchart showing the first reserved memory number transmission process (step S303) in the first special symbol process. In the first pending storage number transmission process, the CPU 56 sets a combined pending storage number subtraction designation command transmission request flag (step S2109). Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol changing process (step S304) (step S2110).

  FIG. 44 is a flowchart showing the first special symbol changing process (step S304) in the first special symbol process. In the first special symbol variation processing, the CPU 56 subtracts 1 from the first variation time timer (step S121), and when the first variation time timer times out (step S122), the CPU 1 sets the value of the first special symbol process flag to the first value. Update to a value corresponding to the special symbol stop process (step S305) (step S123).

  FIG. 45 is a flowchart showing a first special symbol stop process (step S305) in the first special symbol process. In the first special symbol stop process, the CPU 56 sets an end flag referred to in the special symbol display control process in step S34 to end the variation of the first special symbol, and displays the stop symbol on the first special symbol display 8a. Control to derive and display is performed (step S131). Further, control is performed to transmit the symbol confirmation designation command to the effect control microcomputer 100 (step S132), and the first changing flag is reset (step S132A). When the big hit flag is not set, the process proceeds to step S146 (step S133).

  When the jackpot flag is set, the CPU 56 performs control to transmit a jackpot start designation command (step S135). Specifically, when the probability variation big hit flag is set, a big hit start 3 designation command is transmitted, and when the probability variation big hit flag is suddenly set, a big hit start 4 designation command is transmitted. If it is set, a jackpot start 2 designation command is transmitted, otherwise a jackpot start 1 designation command is transmitted. Here, the CPU 56 resets the probability variation flag and the time reduction flag.

  Also, a value corresponding to the big hit display time (time for notifying the fact that the big hit has occurred, for example, in the effect display device 9) is set in the big hit display time timer (step S136). If the small hit flag is set, the value of the first special symbol process flag is updated to a value corresponding to the first small hit pre-release process (step S309) (steps S137 and S138). If the small hit flag is not set, the value of the first special symbol process flag is updated to a value corresponding to the first big winning opening release pre-processing (step S306) (step S139). The case where the small hit flag is not set is a case where the normal big hit, the probability variation big hit or the sudden probability variation big hit is determined.

  In step S146, the CPU 56 checks whether or not the time reduction end flag is set. If the time saving end flag is not set, the process proceeds to step S149. If the time reduction end flag is set, the time reduction end flag is reset (step S147), and the time reduction flag indicating that the gaming state is the time reduction state is reset (step S148). Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol normal process (step S300) (step S149).

  Note that the time reduction end flag is set in step S69 in the first special symbol normal process. In addition, the gaming state shifts to a non-time saving state by resetting the time saving flag. At this stage, if the gaming state is a probability variation state, the gaming state becomes a probability variation state of a non-short-time state. On the other hand, if it is in the non-probable change state, it shifts to a normal state (a state that is not in the probabilistic change state and is not in the time-short state).

  In the first big winning opening opening pre-processing, when the big hit display time timer is set, the CPU 56 performs control for opening the big winning opening when the big winning display time timer times out, and the big winning opening opening time. The timer is set to a value corresponding to the opening time (for example, 29 seconds for normal big hits and probable big hits, 0.5 seconds for sudden big odds), and the value of the first special symbol process flag is set to the first value. The value is updated to a value corresponding to the large winning opening opening process (step S307). The case where the big hit display time timer is set is the case before the start of the first round. When the interval timer (timer for determining the interval time between rounds) is set, when the interval timer times out, control is performed to open the big prize opening and the opening time ( For example, a value corresponding to 29 seconds is set for a normal jackpot and a probable big hit, and 0.5 seconds is set for a sudden probable big hit, and the value of the first special symbol process flag is being opened. The value is updated to a value corresponding to the process (step S307).

  In the process during opening of the big prize opening, the CPU 56 does not finish the final round when the big prize opening time timer times out or the number of winning balls to the big prize opening reaches a predetermined number (for example, 10). In this case, control for closing the special winning opening is performed, a value corresponding to the interval time is set in the interval timer, and the value of the first special symbol process flag is set in the first special winning opening opening pre-processing (step S306). Update to the corresponding value. When the final round ends, the value of the first special symbol process flag is updated to a value corresponding to the first big hit end process (step S308).

  FIG. 46 is a flowchart showing the first big hit end process (step S308) in the first special symbol process. In the first jackpot end process, the CPU 56 checks whether or not the jackpot end display timer is set (step S150). If the jackpot end display timer is set, the process proceeds to step S154. If the jackpot end display timer is not set, the jackpot flag is reset (step S151), and control for transmitting a jackpot end designation command is performed (step S152). Here, if the probability variation jackpot flag or the sudden probability variation bonus flag is set, a jackpot end 2 designation command is transmitted, and if the probability variation jackpot flag or the sudden probability variation bonus flag is not set, the jackpot end 1 designation is specified. Send a command. In this embodiment, as will be described later, the big hit end 1 designation command is transmitted even in the case of a small hit. Then, a value corresponding to the display time corresponding to the time during which the big hit end display is performed on the effect display device 9 (big hit end display time) is set in the big hit end display timer (step S153), and the processing is ended.

  In step S154, 1 is subtracted from the value of the big hit end display timer. Then, the CPU 56 checks whether or not the value of the jackpot end display timer is 0, that is, whether or not the jackpot end display time has elapsed (step S155). If not, the process ends. If it has elapsed, the time reduction flag is set to shift the gaming state to the time reduction state (step S156), and 100 is set in the time reduction counter (step S157).

  Then, it is confirmed whether or not the probability variation big hit flag or the sudden probability variation big flag is set (step S158). If the probability variation jackpot flag or sudden probability variation winning flag is set, the set flag (probability variation jackpot flag or sudden probability variation winning flag) is reset (step S159), the probability variation flag is set and the gaming state is set. The state is changed to a certain change state (step S161). If the gaming state at that time is a probability variation state, the probability variation flag has already been set. Then, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol normal process (step S300) (step S162).

  In the first small hitting pre-opening process in step S309, the same process as the first big prize opening pre-opening process (step S306) is performed. However, instead of updating the value of the first special symbol process flag to a value corresponding to the first big prize opening opening process, the value is updated to a value corresponding to the first small hit opening process. In the first small hit opening process in step S310, the same process as the first big prize opening opening process (step S307) is performed. However, if it is not the final round, the value of the first special symbol process flag is updated to a value corresponding to the first small hit release pre-processing (step S309), and if it is the final round (second round), the first The value of the special symbol process flag is updated to a value corresponding to the first small hit end process (step S311).

  FIG. 47 is a flowchart showing the first small hitting end process (step S311) in the first special symbol process. In the first small hitting end process, the CPU 56 checks whether or not the small hitting end display timer is set (step S170). If the small hitting end display timer is set, the process proceeds to step S174. When the big hit end display timer is not set, the big hit flag and the small hit flag are reset (steps S171A and S171B), and control for transmitting the big hit end 1 designation command is performed (step S172). The big hit end 1 designation command is a command that normally designates the end of the big hit, but in this embodiment, it is also transmitted in the case of a big hit. Then, the small hit end display timer sets a value corresponding to the display time corresponding to the time during which the small hit end display is performed in the effect display device 9 (small hit end display time) in the small hit end display timer ( Step S173), the process is terminated.

  In step S174, 1 is subtracted from the value of the small hit end display timer. Then, the CPU 56 checks whether or not the value of the small hit end display timer is 0, that is, whether or not the small hit end display time has elapsed (step S175). If not, the process ends. If it has elapsed, the value of the first special symbol process flag is updated to a value corresponding to the first special symbol normal process (step S300) (step S176).

  Next, control signals transmitted and received between the main board 31 and the payout control board 37 will be described. FIG. 48 is an explanatory diagram showing an example of the contents of a payout command signal and the like transmitted from the game control microcomputer 560 to the payout control microcomputer 370.

  The power supply confirmation signal is a signal that is at a high level (on state) when the main board 31 rises, and is at a low level (off state) when power supply is detected. The prize ball REQ signal is a signal (that is, a trigger signal for a prize ball payout request) that becomes a low level (on state) when a prize ball payout request (when a prize ball number command is transmitted). The prize ball REQ signal becomes high level (off state) when an ACK signal (response signal) is received from the payout control microcomputer 370. The 4-bit award ball number signal is a signal (award ball number command) output for designating the number (1 to 15) of game balls to be paid out.

  The prize ball BUSY signal is a signal that is set to a high level (on state) when the payout control microcomputer 370 confirms the on state of the prize ball REQ signal, and is turned off after a predetermined period. That is, it corresponds to an acceptance confirmation signal for the prize ball REQ signal. Therefore, the state in which the prize ball BUSY signal is OFF corresponds to a state of waiting for a prize ball number command reception. The payout error signal is a signal that becomes a high level (ON state) when a prize ball payout error occurs. The ball-out signal is a signal that becomes high level (ON state) when the ball-out switch 187 is turned on. The full tank signal is a signal that becomes high level (ON state) when the full switch 48 is turned on. The prize ball count signal is a payout control signal transmitted from the payout control microcomputer 370 to the game control microcomputer 560 and is a signal corresponding to a detection signal of the payout number count switch 301.

  The prize ball REQ signal becomes low level (on state) when a prize ball payout request is made (when a prize ball number command is transmitted), and when a prize ball payout completion is received (when the prize ball BUSY signal is off). The signal is set to a high level (off state), and the prize ball BUSY signal is set to a high level (on state) when a prize ball payout request is received (when the prize ball REQ signal is on), and low when the prize is completed. It may be a signal to be turned off. That is, the game control microcomputer 560 turns on the prize ball REQ signal when the prize ball payout is requested, and the payout control microcomputer 370 turns on the prize ball BUSY signal when the prize ball REQ signal is turned on. When the required number of prize balls is paid out, the prize ball BUSY signal is turned off, and the game control microcomputer 560 turns off the prize ball BUSY signal. The prize ball REQ signal may be turned off.

  Instead of using the prize ball BUSY signal, the payout control microcomputer 370 transmits an ACK signal (response signal) to the game control microcomputer 560 in response to the reception of the prize ball REQ signal, and receives the prize ball number signal. You may make it transmit the ACK signal which shows having received to the microcomputer 560 for game control.

  49 is a block diagram showing signal lines and the like used for transmission / reception of each control signal shown in FIG. FIG. 49 shows that signals indicating an abnormality relating to payout (payout error signal, ball-out signal, full tank signal) are transmitted from the payout control microcomputer 370 to the game control microcomputer 560. Yes. In FIG. 49, a signal (door opening signal) indicating that the glass door frame 2 and the mechanism plate 11 </ b> A are opened is sent to the game control microcomputer 560 via the backup power supply circuit 506 mounted on the main board 31. Is shown to be entered. Also, a prize ball count signal indicating a state of a detection signal of the number-of-payout count switch 301 at the time of prize ball payout is transmitted from the payout control microcomputer 370 to the game control microcomputer 560. As shown in FIG. 49, the prize ball REQ signal and the prize ball number signal are output by the game control microcomputer 560 via the output circuit 67 and input to the payout control microcomputer 370 via the input circuit 373A. . A signal from the payout control microcomputer 370 to the game control microcomputer 560 is output via the output circuit 373B and input via the input circuit 68.

  FIG. 50 is a timing chart showing an example of how to output the payout command signal. As shown in FIG. 50, the winning detection switch (the first starting port switch 13a, the second starting port switch 14a, the count switch 23, the winning port switches 29a, 30a, 33a, 39a) detects the winning of the game ball. Based on this, the game control microcomputer 560 turns on the prize ball REQ signal and turns the output state of the prize ball number signal into a state corresponding to the number of prize balls to be paid out in accordance with winning. Specifically, when the gaming control microcomputer 560 detects that a game ball has won a winning area provided in the gaming machine based on a detection signal from the winning detection switch, the gaming control microcomputer 560 calculates a predetermined number of winning balls. It is added to the contents of the total winning ball number storage buffer. When the content of the total winning ball number storage buffer becomes a non-zero value, the winning ball REQ signal is turned on, and the output state of the winning ball number signal is set in accordance with the number of winning balls to be paid out according to winning. Put it in a state.

  In this embodiment, four game balls are paid out when a game ball is detected by the first start port switch 13a or the second start port switch 14a, and 15 game balls are detected when the count switch 23 detects a game ball. Perform prize ball payout. When game balls are detected by the winning opening switches 29a, 30a, 33a, 39a, seven prize balls are paid out. Further, as described above, since the prize ball number signal is composed of 4 bits, among the prize ball number signals of 00 (H) to 0F (H) expressed in 8 bits, the lower 4 bits are The signal is transmitted from the main board 31 to the payout control board 37 by the award ball number signal. Hereinafter, it may be expressed as “00 (H) to 0F (H) prize ball number signal”, but in actuality, the prize ball number signal is represented by 8 bits. This corresponds to the lower 4 bits of 0F (H).

  In this embodiment, a prize ball number signal is transmitted from the main board 31 to the payout control board 37 by bidirectional communication. For example, the payout control microcomputer 370 transmits an ACK signal (response signal) to the game control microcomputer 560 in response to the reception of the prize ball REQ signal, or an ACK signal indicating that the prize ball number signal has been received. It transmits to the game control microcomputer 560. As for the payout command signal, the prize ball number signal may be transmitted by unidirectional communication in which the signal is transmitted only from the main board 31 toward the payout control board 37.

  FIG. 51 is an explanatory diagram showing the relationship between the state of the detection signal of the payout number count switch 187 and the output state of the prize ball count signal. As shown in FIG. 51, the state of the detection signal of the payout number count switch 187 and the output state of the prize ball count signal are almost similar. The delay time from the state of the detection signal of the payout count switch 187 in the output state of the prize ball count signal corresponds to the processing time in the payout control microcomputer 370. In this embodiment, even when a game ball is paid out based on a ball lending request from the card unit 50, the detection signal of the payout number count switch 187 is turned on, but the payout control microcomputer 370 is turned on. Transmits a prize ball count signal only when a prize ball is paid out based on winning.

  FIG. 52 is an explanatory diagram showing each 1-byte buffer formed in the RAM 55 used in the switching process. The last-time port buffer is a buffer in which the switch-on / off determination result of the last time (assuming 4 ms before) is stored. The previous port buffer is a buffer that stores the previous switch-on / off determination result (assumed to be 2 ms before). As described above, in the switch-on buffer, when a switch on is detected, 1 is set in the corresponding bit of the switch, and when a switch off is detected, 0 is set in the corresponding bit of the switch. It is a buffer. The previous data is a buffer area that is temporarily used when the switch process is executed. The previous-time port buffer, the previous port buffer, the switch-on buffer, and the previous data are formed in the RAM 55. Further, the bit arrangement of the port buffer, the previous port buffer, and the switch-on buffer two times in advance corresponds to the bit arrangement of the input port 0. That is, information corresponding to each of the switch detection signals assigned to bits 0 to 7 of input port 0 is set to bits 0 to 7 of the port buffer, the previous port buffer, and the switch-on buffer two times before.

  FIG. 53 is a flowchart showing a processing example of the switch processing in step S21 in the game control processing. In the switch process, the game control microcomputer 560 sets the content of the previous port buffer to the previous data (step S331). Further, the exclusive OR of the contents of the port buffer and the previous data is taken twice before (step S332). Then, the result of the exclusive OR operation is set as the previous data (step S333). At this stage, in the previous data, the bit having a different value among the 8 bits of the port buffer and the 8 bits of the previous port buffer is “1”. In addition, the contents of the previous port buffer are set in the port buffer two times before (step S334).

  Then, input port 0 data is input (step S335), and the input data is set in the previous port buffer (step S336). The processes in steps S334 and S336 correspond to a preparation process when the switch process is executed next time (after 2 ms).

  Next, the game control microcomputer 560 takes the logical product of the data input from the input port 0 and the previous data (step S337). At this stage, in the previous data, a bit having a different value among the 8 bits of the previous port buffer and the 8 bits of the previous port buffer is “1”. That is, among the detection signals of the seven switches, the bit corresponding to the detection signal changed from the state before 2 ms from the state before 4 ms (from “0” to “1” or from “1” to “0”). Is “1”. Therefore, when the logical product of the previous data and the data input from the input port 0 is taken in step S337, the bit that is “1” in the data input from the input port 0 and 2 ms before The bit whose state has changed from the state 4 ms before becomes “1”. That is, as a result of the logical product operation, the bit corresponding to the detection signal in which the current state is the on state and has been detected to have changed from the off state to the on state during the previous switch processing (2 ms before) is “ 1 ”. In other words, the bit corresponding to the detection signal that has changed from the off state to the on state and then detected the on state twice in succession is “1”. Note that “continuously twice” means “both the switch process executed at a certain time and the switch process executed 2 ms after the switch process”.

  The game control microcomputer 560 stores the result of the AND operation in the switch-on buffer (step S338). In the switch-on buffer, after changing from the off state to the on state, the bit corresponding to the detection signal in which the on state is detected twice consecutively is “1”. Therefore, the game control microcomputer 560 can confirm that the detection signal of the switch corresponding to the bit which is “1” in the switch-on buffer is surely turned on. Note that “definitely” means that the ON state has been detected twice in succession, that is, it can be considered that the ON state has continued for 4 ms, so it is determined that the ON state of the detection signal is not due to noise or the like. It can be done.

  FIG. 54 is a flowchart showing an example of the prize ball processing in step S31. In the prize ball process, the game control microcomputer 560 executes a prize ball number addition process (step S1201) and a prize ball control process (step S1202). Then, the contents of the port 0 buffer formed in the RAM 55 are output to port 0 (step S1203). The contents of the port 0 buffer are updated in the prize ball control process.

  In the prize ball number adding process, a prize ball number table shown in FIG. 55 is used. The prize ball number table is set in the ROM 54. The number of processes (in this example, “7”) is set at the start address of the winning ball number table, and the switch input bit determination for each switch of the winning opening from which the winning ball is to be paid out by winning from the next address. The value and the number of winning balls are sequentially set corresponding to each switch of the winning opening. The switch input bit determination value is a value corresponding to the bit to which the detection signal of each switch at the input port 0 is input (see FIG. 14).

  In the example shown in FIG. 55, the number of winning balls is 5 when winning at any of the first start winning opening 13 and the second starting winning opening 14, but the first starting winning opening 13 is won. The number of winning balls may be different depending on whether or not the second start winning opening 14 is won. For example, the number of winning balls for winning at the second start winning opening 14 is made larger than the number of winning balls for winning at the first starting winning opening 13. In such a case, the base in the time-short state can be further increased.

  FIG. 56 is a flowchart showing the prize ball number adding process in step S1201. In the winning ball number adding process, the game control microcomputer 560 sets the start address of the winning ball number table as a pointer (step S1351). Then, the data at the address pointed to by the pointer (in this case, the number of processes) is loaded (step S1352). Next, the switch-on buffer is loaded into the register (step S1353).

  Then, the pointer value is incremented by 1 (step S1354), and the logical product of the contents of the switch-on buffer and the prize ball number table data pointed to by the pointer (in this case, the switch input bit determination value) is calculated (step S1355). . Further, the value of the pointer is incremented by 1 (step S1356).

  If the calculation result in step S1355 is not 0 (N in step S1361), that is, if the detection signal of the switch to be inspected is on, the process proceeds to step S1362A. If the calculation result in step S1355 is 0 (Y in step S1361), that is, if the detection signal of the switch to be inspected is not on, the number of processes is reduced by 1 (step S1359), and if the number of processes is 0 The process ends, and if the number of processes is not 0, the process returns to step S1354 (step S1360).

  In step S1362A, game control microcomputer 560 checks whether or not the switch input bit determination value used in the process of step S1355 is a count switch input bit determination value. That is, it is confirmed whether or not the count switch 23 has been turned on in step S 1361 (whether or not the switch to be inspected is the count switch 23).

  If the switch input bit determination value is a count switch input bit determination value (Y in step S1362A), the game control microcomputer 560 has a value of 6 or more for the first special symbol process flag or the second special process flag. It is confirmed whether or not (step S1362B). That the value of the first special symbol process flag or the second special symbol process flag is 6 or more means that in the first special symbol process or the second special symbol process, after the pre-opening process for the big prize opening in step S306. It means that the process is being executed. That is, it means that a big hit game or a small hit game is being played. Here, during the big hit game, it is a period from the start of the big hit display to the end of the big hit end processing. Further, during the small hit game, it is a period from the start of the small hit display until the end of the small hit end process. That is, if the value of the first special symbol process flag or the second special symbol process flag is 6 or more, it is possible to perform a control for opening the big prize opening when the game control is normally executed. Indicates that there is a sex.

  When the value of the first special symbol process flag or the second special symbol process flag is 6 or more (Y in step S1362B), the game control microcomputer 560 uses the data of the prize ball number table pointed to by the pointer (in this case) The number of prize balls is set to the prize ball addition value (step S1364), and the prize ball addition value is added to the contents of the 16-bit total prize ball number storage buffer formed in the RAM 55 (step S1365). If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S1357 and S1358). Then, the process proceeds to step S1359.

  A state in which the value of the first special symbol process flag or the second special symbol process flag is less than 6 is a state in which the big hit game and the small hit game are not executed, and the control for opening the big prize opening is not executed. When it is detected that the count switch 23 is turned on in such a state, it means that an abnormal prize has occurred at the big prize opening or that the detection signal from the count switch 23 has a noise over a long period (over 4 ms). Means that you got on. Therefore, if it is detected that the count switch 23 is turned on in a state where the value of the first special symbol process flag or the second special symbol process flag is less than 6 (N in step S1362B), the total number of winning balls is stored. The control for adding the prize ball addition value to the buffer is not executed. That is, the prize ball payout based on the fact that the count switch 23 is turned on is not executed (steps S1364 and S1365 are skipped). Then, the process proceeds to step S1359.

  In this embodiment, when the first special symbol process flag or the second special symbol process flag is 6 or more, an abnormality is notified that an abnormal winning has occurred, and an abnormality is detected by performing the determination process in step S1362B. Although a case is shown in which control is performed so that no payout is made when a winning occurs, the payout may be made only by notifying an abnormality when an abnormal winning is detected.

  Next, the game control microcomputer 560 sets the prize ball number table data (in this case, the prize ball number) pointed to by the pointer to the prize ball addition value (step S1364), and forms the prize ball addition value in the RAM 55. It is added to the content of the 16-bit total award ball number storage buffer that has been set (step S1365). If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S1357 and S1358). Then, the process proceeds to step S1359. In this embodiment, as shown in steps S1358, S1364, and S1365, the total number of winning balls is stored. However, the number of winning prizes may be stored instead of the total number of winning balls.

  In the above process, the game control microcomputer 560 determines whether or not an abnormal winning in the big winning opening has occurred based on the value of the first special symbol process flag or the second special symbol process flag. However, if it is detected that the count switch 23 is turned on when the big winning opening is not actually opened, the prize ball payout based on the count switch 23 being turned on may not be executed. However, as in this embodiment, when it is configured to determine whether or not an abnormal winning has occurred based on the value of the first special symbol process flag or the second special symbol process flag, it is based on one data. Since it can be determined whether or not an abnormal winning has occurred, the determination process is simplified. Since the big winning opening is opened or closed over a plurality of rounds, it is determined whether or not the abnormal winning has occurred by judging whether or not the actual winning opening is controlled. To be complicated.

  In addition, since there is a certain distance between the entrance of the big prize opening and the position where the count switch 23 is installed, it is determined whether or not the control for actually opening the big prize opening is performed, and whether or not an abnormal prize has occurred. In determining whether or not, it is necessary to consider a game ball that may have won a prize winning slot immediately before closing after performing a control for closing the prize winning opening. That is, it is necessary to consider the time for the game ball to flow from the entrance of the big prize opening to the position where the count switch 23 is installed. In other words, it is necessary to start the determination as to whether or not an abnormal winning has occurred after a certain period of time has passed since the control for actually closing the special winning opening is performed. This also complicates the processing.

  However, as in this embodiment, when it is configured to determine whether or not an abnormal winning to the big winning opening has occurred after the big winning end processing or the small winning end processing is completed, It is not necessary to consider the time for the game ball to flow between the entrance of the mouth and the position where the count switch 23 is installed. This is because the game ball that has won the big winning opening immediately before closing has reached the installation position of the count switch 23 during the processing period of the big hit end processing or the small hit end processing after the big winning opening is closed. In this embodiment, during the processing period of the big hit end process or the small hit end process, that is, the period during which the big hit end display or the small hit end display is made on the variable display device 9, It is set longer than the time required to reach the installation position of the count switch 23.

  It should be noted that, in the determination of the abnormal winning at the special winning opening, the timing for determining the abnormal winning may be delayed from the timing at which the special winning opening (special variable winning ball apparatus 20) is closed. Specifically, when the value of the first special symbol process flag or the second special symbol process flag changes from 8 to 0 or from 11 to 0, a predetermined time is set in the count timer, and each timer interrupt (2 ms Every time) the count timer is counted down. When it is determined that the value of the first special symbol process flag or the second special symbol process flag is not 6 or more in the prize ball number adding process (N in step S1362B), it is determined whether the count timer is 0, When the count timer is 0, the process of steps S1364 and S1365 is skipped and the process proceeds to step S1359.

  FIG. 57 is a flowchart showing the prize ball control process in step S1202. In the prize ball control process, the game control microcomputer 560 executes any one of steps S1231 to S1234 according to the value of the prize ball process code.

  FIG. 58 is a flowchart showing the award ball waiting process 1 (step S1231) executed when the value of the award ball process code is 0. In the award ball waiting process 1, the game control microcomputer 560 checks whether or not the award ball BUSY signal is on (step S1241). At this stage, since the prize ball BUSY signal should not be in the on state, when the prize ball BUSY signal is in the on state, the prize ball abnormal state output value (20 (H)) is stored in the port 0 buffer. To end the processing (step S1242). When the prize ball abnormal state output value is set in the port 0 buffer, the contents of the port 0 buffer are outputted to port 0 in step S1203 (see FIG. 54), whereby the prize ball REQ signal, power supply confirmation signal, and All the prize ball number signals are turned off (see FIG. 13).

  If the prize ball BUSY signal is off, the prize ball waiting output value (30 (H)) is set in the port 0 buffer (step S1243). When the output value during waiting for a prize ball is set in the port 0 buffer, the contents of the port 0 buffer are output to port 0 in step S1203, whereby the prize ball REQ signal is turned off, and the power confirmation signal The on state is maintained (see FIG. 13). In addition, the award ball number signal enters an invalid command (00 (H)). Next, it is confirmed whether or not the prize ball timer is 0 (step S1244). If the prize ball timer is not 0, the value of the prize ball timer is decreased by 1 (step S1245), and the process is terminated. The prize ball timer is a timer for measuring the time required for prize ball processing. At this stage, if the value of the prize ball timer is not 0, the next prize ball after the previous payout process is completed. Waiting time until the REQ signal is turned on (time for providing a plurality of prize ball REQ signals during the on period when prize ball payout is continuously executed, 00 (H) prize ball This means that the period during which the number signal is output has not ended. The prize ball timer is set in step S1275 of the prize ball waiting process 3 described later. In addition, after the execution of the award ball waiting process 3 in step S1234 is completed and the previous payout process is completed, the processes of steps S1243 to S1245 turn off the award ball REQ signal and are invalid as the award ball number signal. This is a process for outputting a command (00 (H)).

  If the value of the prize ball timer is 0, the game control microcomputer 560 then checks the contents of the total prize ball number storage buffer (step S1247). If the value is 0, the process ends. If not, the prize ball process code value is set to 1 (step S1248), and the process ends.

  FIG. 59 is a flowchart showing a prize ball transmission process (step S1232) executed when the value of the prize ball process code is 1. In the prize ball transmission process, the game control microcomputer 560 checks whether or not the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value (“15” in this example) (step S1251). If the content of the total prize ball number storage buffer is equal to or greater than the prize ball command maximum value, the prize ball command maximum value is set in the prize ball number buffer (step S1252). If the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value, the content of the total prize ball number storage buffer is set in the prize ball number buffer (step S1253).

  Thereafter, the output value (10 (H)) in the prize ball REQ is set in the port 0 buffer (step S1254). When the output value in the prize ball REQ is set in the port 0 buffer, the contents of the port 0 buffer are outputted to the port 0 in step S1203, so that the prize ball REQ signal is turned on, and the power confirmation signal The on state is maintained (see FIG. 13). Further, the contents of the winning ball number buffer are set in the lower 4 bits of the port 0 buffer (step S1255). Thereafter, the value of the prize ball process code is set to 2 (step S1256), and the process is terminated.

  In this embodiment, the maximum value of the prize ball command is “15”. Therefore, a prize ball number signal designating the maximum number of payouts of “15” is transmitted to the payout control board 37.

  FIG. 60 is a flowchart showing the prize waiting process 2 (step S1233) executed when the value of the prize ball process code is 2. In the game control microcomputer 560, whether or not the prize ball BUSY signal output (turned on) by the payout control means in response to the prize ball REQ being turned on in the prize ball waiting process 2 is turned on. It is confirmed whether or not (step S1261). When the on-state is not turned on, a BUSY start determination time value (for example, 2) is set in the prize ball timer (step S1262). The BUSY start determination time value is for the game control microcomputer 560 to confirm that the prize ball BUSY signal has been output (turned on) if the prize ball BUSY signal remains on for the time indicated by the value. Is the value of

  Accordingly, the game control microcomputer 560 checks the value of the prize ball timer when the prize ball BUSY signal is turned on (step S1263), and if the value is not 0, the value of the prize ball timer is decreased by 1 ( Step S1264), the process is terminated. When the value of the prize ball timer becomes 0, it is determined that the prize ball BUSY signal is turned on, and the contents of the prize ball number buffer are changed from the contents of the total prize ball number storage buffer (the number of prize balls paid out to the payout control means). Is subtracted (step S1265). Then, the value of the prize ball process code is set to 3 (step S1266), and the process is terminated.

  In the prize ball transmission process shown in FIG. 59 and the prize ball waiting process 2 shown in FIG. 60, the game control microcomputer 560 sends the prize ball number signal within a predetermined period after sending the prize ball number signal. When no winning ball BUSY signal is received, control for stopping the progress of the game may be performed. Specifically, in the prize ball transmission process shown in FIG. 59, the game control microcomputer 560 turns on the prize ball REQ signal (step S1254), and then monitors the prize ball BUSY on monitor value (here The monitoring timer is a timer for detecting the occurrence of a communication abnormality, and the prize ball BUSY on monitoring value is a value until the prize ball BUSY signal is turned on when the payout control means and the communication line are normal. (It is a value corresponding to the time with a margin). In the award ball waiting process 2 shown in FIG. 60, the game control microcomputer 560 confirms whether or not the award ball BUSY signal is turned on (step S1261). 1 is subtracted from the value of. When the value of the monitoring timer becomes 0, the gaming control microcomputer 560 determines that an abnormality in communication with the payout control means has occurred, specifically, the prize ball BUSY signal is turned on. If not, control is performed to stop the progress of the game.

  The game control microcomputer 560 saves the current control state, for example, the output state of the output port, in the RAM 55 before stopping the progress of the game, and then clears the output state of the output port. Then, the progress of the game is stopped until the abnormality of communication with the payout control means is resolved. That is, even if a new event (game ball winning or the like) occurs, processing corresponding to the new event is not performed, for example, a newly generated event is stored. Note that the game control microcomputer 560 sends a communication error display command to the effect control means of the effect control board 80 in order to notify the occurrence of communication abnormality using the variable display device 9 or the like before stopping the progress of the game. It may be configured to transmit. When the communication abnormality is resolved, the game control microcomputer 560 can restore the output port based on the control state stored in the RAM 55.

  FIG. 61 is a flowchart showing the prize ball waiting process 3 (step S1234) executed when the value of the prize ball process code is 3. In the award ball waiting process 3, the game control microcomputer 560 checks whether or not the award ball BUSY signal is turned off (step S1271). When not in the off state, a BUSY end determination time value (for example, 3) is set in the prize ball timer (step S1272). The BUSY end determination time value is a value for creating a prize ball REQ signal OFF waiting period.

  Therefore, the game control microcomputer 560 checks the value of the prize ball timer when the prize ball BUSY signal is turned off (step S1273), and if the value is not 0, the value of the prize ball timer is decreased by 1 ( Step S1274), the process is terminated. When the value of the prize ball timer becomes 0, that is, when the prize ball REQ signal off waiting period ends, the prize ball REQ waiting time is set in the prize ball timer (step S1275). Then, the value of the prize ball process code is set to 0 (step S1276), and the process is terminated. As described above, the award ball REQ waiting time is the waiting time until the next award ball REQ signal is turned on (when award ball payout is continuously performed, the on periods of a plurality of award ball REQ signals are Is a time for providing an interval).

  Through the above processing, the game control microcomputer 560 stores the total number of game balls as prize balls to be paid out based on the establishment of the payout condition in the total prize ball number storage buffer so as to be specified. The total award ball number storage buffer corresponds to a prize game medium number storage means for storing stored contents for at least a predetermined period by a backup power source as a variable data storage means when power supply to the gaming machine is stopped. Further, the game control means transmits a payout command signal for designating a payout number of a predetermined number of prize balls to the payout control means based on the number of prize balls stored in the total prize ball number storage buffer. Here, the predetermined number is 15 if the number of prize balls stored in the total prize ball number storage buffer is 15 or more, and is stored in the total prize ball number storage buffer if it is less than 15. The number of prize balls. When a predetermined condition is satisfied, a subtraction process is performed for subtracting the number of payouts specified by the payout command signal from the number of prize balls stored in the total prize ball number storage buffer.

  In this embodiment, the predetermined condition for executing the subtraction process is when a command acceptance signal is received from the payout control microcomputer 370, specifically when the prize ball BUSY signal is turned on. When the prize ball BUSY signal is turned on, the payout control microcomputer 370 has not yet paid out the number of prize balls instructed by the payout command signal. If configured to perform subtraction processing of the total prize ball number storage buffer when the winning ball payout is completed, an illegal act of restoring the power supply after illegally stopping the power supply of the gaming machine during paying the winning ball As a result, a large number of prize balls are illegally paid out. For example, when 15 prize ball payouts are instructed by a payout command signal, when 10 prize ball payouts are made, if the power supply is restored after illegally stopping the power supply of the gaming machine, Since the contents of the total number of winning balls storage buffer are not subtracted at all, it is assumed that the ten winning balls are not paid out even though ten winning balls are actually paid out. Control will continue.

  However, in this embodiment, when the winning ball BUSY signal is turned on, that is, when the payout control microcomputer 370 receives the payout command signal and transmits the command acceptance signal, the subtraction processing of the total winning ball number storage buffer Since the above is executed, the above fraud can be prevented.

  FIG. 62 is a flowchart showing the input port data confirmation processing in step S23 (see FIG. 23). In the input port data confirmation processing, the CPU 56 reads data (input data) of the input port 1 (see FIG. 14) from the input port 1 (step S581), and the input data of the input port 1 and the input formed in the RAM. An exclusive OR is performed for each bit with the contents of the port 1 buffer (step S582). If there is a bit with different logic (meaning “1” or “0”) between the input data of the input port 1 and the contents of the input port 1 buffer formed in the RAM, an 8-bit exclusive The operation result of the logical sum does not become 00 (H).

  Then, the CPU 56 determines whether or not the exclusive OR operation result is 00 (H) (step S583). If the calculation result is 00 (H), the process ends. If the calculation result is not 00 (H), the input data of the input port 1 is set to the second byte of the command buffer (step S584). Also, FF (H) is set in the first byte of the command buffer (step S585). Then, an input port data designation command transmission request flag is set (step S586). When confirming that the effect control command transmission request flag is set in the effect control command control process in step S29, the CPU 56 transmits the contents of the command buffer as an effect control command. Instead of transmitting the effect control command in the effect control command control process, the effect control command may be transmitted immediately instead of setting the effect control command transmission request flag.

  After setting the effect control command transmission request flag, the CPU 56 stores the input data of the input port 1 input in step S581 in the input port 1 buffer (step S587).

  The input data of the input port 1 is transmitted to the effect control microcomputer 100 on condition that the input data of the input port 1 has been changed by the control as described above. At that time, the game control microcomputer 560 transmits the input data of the input port 1 as it is as an effect control command. Therefore, even if there is a lot of information indicated by the signal input to the input port 1, the control burden on the game control means is light. However, the CPU 56 may once fetch the data of the input port 1 and store the fetched data in the input port 1 buffer every time.

  Further, since the presentation control command related to the input data of the input port 1 is output from the main board 31 on condition that the input data of the input port 1 has changed, for example, it is always 1 in a predetermined control period (period of 2 ms interval). The transmission cycle of the effect control command is difficult to grasp compared to the case where the effect control command is configured to be transmitted. That is, it becomes difficult to grasp the cycle of the predetermined control period. In the predetermined control period, the counter value for generating a random number related to the jackpot is updated one by one. Therefore, when the period of the predetermined control period is easily grasped, the timing at which the counter value becomes the predetermined value is easily grasped. Become. Predetermined timing refers to the big hit determination random number when the big hit determination random number is created by software, or when it is configured to determine whether or not to make a probable big hit based on the big hit symbol determination random number For example, the timing coincides with the determination value, the timing when the value of the jackpot symbol determination random number matches the value corresponding to the probability variation symbol, and the like. The fact that the timing at which the value of the counter reaches the predetermined value is easily grasped means that it is easy to receive fraud. In this embodiment, it is possible to make it difficult to receive fraud.

  In this embodiment, as shown in FIG. 8, a random number circuit 503 and a monitoring circuit 504 are provided outside the game control microcomputer 560, and a random number error signal is input to the game control microcomputer 560 from the outside. However, the game control microcomputer 560 may determine whether or not a random number error has occurred. For example, when the clock signal supplied to the random number circuit 503 is also input to the game control microcomputer 560 and the CPU 56 of the game control microcomputer 560 determines that the clock signal is interrupted, a random error has occurred. The random number error specification bit of the input port data specification command (see FIG. 28) is set to a value corresponding to the error. Also, the signal line level (high level or low level) of the random error signal from the monitoring circuit 504 is checked a plurality of times. For example, the signal line level of the random error signal becomes a level corresponding to the random error even once. Then, it may be determined that a random error has occurred. In those cases, the CPU 56 does not transmit the input data of the input port 1 as it is as an effect control command, but instead of the random number error in the second byte (EXT data) of the effect control command for the input data of the input port 1. After setting the value of the bit corresponding to the designated bit to a value corresponding to the random number error (“0” in this embodiment), it is set as an effect control command. Further, in those cases, the CPU 56 may determine whether or not a random number error has occurred only at the start of power supply, but may always determine every timer interrupt after the start of power supply.

  Further, in this embodiment, the CPU 56 transmits the input data of the input port 1 as it is as the effect control command to the effect control microcomputer 100, but the CPU 56 receives a part of the input data of the input port 1 as it is. You may make it transmit, process a part, and transmit. For example, the processing may be performed after logical inversion. The logic inversion may be realized by a hardware inversion circuit. Further, as processing, for example, the bit position in one byte may be changed. The change (including shift) of the bit position may be realized by hardware wiring.

  In this embodiment, the CPU 56 executes the input port data confirmation process shown in FIG. 62 by the timer interrupt process, but executes it in the main process (between steps S16 and S19 shown in FIG. 22). It may be.

  63 to 68 are flowcharts showing the information output processing in step S30. 63 to 68, steps S4001 to S4030 are processes for outputting the start port 1 signal, and steps S4031 to S4052 are processes for outputting the start port 2 signal. Steps S4053 to S4058 are processes for outputting the symbol determination frequency signal, and steps S4059 to S4077 are processes for outputting one big hit, two big hits, a short time signal, and a probability variation signal, and steps S4085 to S4108. Is a process for outputting a prize ball signal (prize ball information signal).

  In the information output process, the game control microcomputer 560 sets an initial value (00 (H)) in the information buffer formed in the RAM 55 (step S4001). Then, the address of the start port 1 information setting table is set in the pointer (step S4002), and the number of processes indicated by the pointer is loaded (step S4003). The start port 1 information setting table includes the number of processes (= 2), the start port 1 switch input bit (first start port switch input bit determination value (40 (H)), and the start port 2 switch input bit (second start port). The switch input bit determination value (80 (H)) is set In step S4003, since the pointer points to the address of the number of processes in the start port 1 information setting table, the number of processes in the start port 1 information setting table (= 2) data will be loaded.

  Next, the game control microcomputer 560 loads the contents of the switch-on buffer into the register (step S4004), and sets the switch-on buffer as switch input data (step S4005). Then, the pointer is incremented by 1 (step S4006), the start port switch input bit pointed to by the pointer (in this case, the start port 1 switch input bit) is loaded into the register (step S4007), the start port 1 switch input bit and the switch input The logical product of the data is taken (step S4008). When the content of the switch-on buffer is 40 (H), that is, when the first start port switch 13a is on, the logical product operation result is 40 (H). When the first start port switch 13a is not turned on, the logical product operation result is 00 (H).

  If the logical operation result is 0 (Y in step S4009), the process proceeds to step S4015. If the logical product operation result is not 0 (N in step S4009), it is determined that the first start winning opening 13 has been won, and the start opening 1 information storage counter is loaded into the register (step S4010). The start port 1 information storage counter is a counter that counts the number of remaining outputs of the start port 1 signal. Next, the game control microcomputer 560 adds 1 to the start port 1 information storage counter (step S4011). Then, it is confirmed whether the calculation result (added result) is not 0 (step S4012). When the calculation result is 0 (N in step S4012), 1 is subtracted from the calculation result (step S4013). Then, the calculation result is stored in the start port 1 information storage counter (step S4014).

  Next, the game control microcomputer 560 subtracts 1 from the number of processes (step S4015), and determines whether the number of processes is not 0 (step S4015). If the number of processes is not 0 (Y in step S4015), the process proceeds to step S4004. Then, the contents of the switch-on buffer are loaded into the register (step S4004), and the switch-on buffer is set to switch input data (step S4005). Then, the pointer is incremented by 1 (step S4006), the start port switch input bit (in this case, the start port 2 switch input bit) pointed to by the pointer is loaded into the register (step S4007), the start port 2 switch input bit and the switch input The logical product of the data is taken (step S4008). When the content of the switch-on buffer is 80 (H), that is, when the second start port switch 14a is on, the logical product operation result is 80 (H). When the second start port switch 14a is not turned on, the logical product operation result is 00 (H). Thereafter, the processes of steps S4009 to S4016 described above are executed.

  If it is determined in step S4016 that the number of processes is 0 (N in step S4016), the game control microcomputer 560 loads the start port 1 information storage timer (step S4017), and sets the start port 1 information storage timer. The state is reflected in the flag register (step S4018), and it is determined whether the start port 1 signal is being output (step S4019). The start port 1 information storage timer is a timer for measuring an on time and an off time (an on time 200 ms and an off time 200 ms described later) of the start port 1 signal. If the value of the start port 1 information storage timer is not 0, it is determined that the start port 1 signal is being output. If the value of the start port 1 information storage timer is 0, it is determined that the start port 1 signal is not being output. The

  If the start port 1 signal is being output (Y in step S4019), the process proceeds to step S4026. If the start port 1 signal is not being output (N in step S4019), the game control microcomputer 560 loads the start port 1 information storage counter (step S4020), and sets the status of the start port 1 information storage counter to the flag register. (Step S4021), it is determined whether there is a remaining number of output times of the start port 1 signal (step S4022). When the first start port switch 13a or the second start port switch 14a is turned on (N in Step S4009), the start port 1 information storage counter is incremented by 1, so the remaining number of output times of the start port 1 signal It will be determined that there is.

  If there is no remaining number of outputs of the start port 1 signal (Y in step S4022), the process proceeds to step S4031. If there is a remaining number of times of output of the start port 1 signal (N in step S4023), the game control microcomputer 560 subtracts 1 from the start port 1 information storage counter (step S4023), and the calculation result (result of subtracting 1) ) Is stored in the start port 1 information storage counter (step S4024). Then, the winning information operating time (200) is set in the register (step S4025). The winning information operating time (200) is a time for which a 2 ms timer interruption is executed 200 times, that is, a time of 0.400 seconds (400 ms).

  Next, if the winning information operating time is not set in step S4025, the game control microcomputer 560 subtracts 1 from the start port 1 information storage timer, and if the winning information operating time is set in step S4025, the winning information is displayed. The operation time is decremented by 1 (step S4026). Then, the calculation result (the result obtained by subtracting 1) is stored in the start port 1 information storage timer (step S4027).

  The game control microcomputer 560 compares the calculation result with the winning information on time (100) (step S4029), and determines whether the calculation result is shorter than the winning information on time (step S4030). The winning information ON time (100) is a time for which a 2 ms timer interruption is executed 100 times, that is, a time of 0.200 seconds (200 ms).

  When the calculation result is not shorter than the winning information on time, that is, when the calculation result (remaining time of the start port 1 information storage timer) is longer than the winning information on time (200 ms) (N in step S4029). The game control microcomputer 560 sets the start port 1 output bit position (bit 1 of the output port 2) of the information buffer (step S4030). When the start bit 1 output bit position of the information buffer is set, the information buffer is set to the output value in the subsequent step S4110, and the output value is output to the output port 2 in step S4111, whereby the start port 1 signal is output. It will be output from port 2.

  When the winning of the first starting winning port 13 or the second starting winning port 14 (ON of the first starting port switch 13a or the second starting port switch 14a) is generated by the processing of steps S4001 to S4030 described above, the engine is started. Mouth 1 signal is output. That is, after the start port 1 signal is turned on for 200 ms, it is turned off for 200 ms. By inputting this start port 1 signal to the hall computer, it is possible to recognize the number of winnings to the first start winning port 13 and the second starting winning port 14.

  Since the start port 1 signal is turned on for 200 ms and then turned off for 200 ms, the next start is performed after the off state for 200 ms even if a start winning is continuously generated in a short time. Mouth 1 signal is output. That is, the start port 1 signal is output at an interval of at least 200 ms.

  In this way, the start port 1 signal is output for all start winnings, and the start port 1 signal is output with an interval of at least 200 ms, so that the hall computer reliably grasps the total number of start winnings. can do.

  Next, the game control microcomputer 560 loads the contents of the switch-on buffer into the register (step S4031), reflects the state of the start port 1 switch input bit in the flag register (step S4032), and sets the switch-on buffer. It is determined whether or not the input bit of the first start port switch 13a is set, that is, whether or not the first start port switch 13a is turned on (step S4033). If the first start port switch 13a is not turned on (N in step S4033), the process proceeds to step S4039. If the first start port switch 13a is on (Y in step S4033), the game control microcomputer 560 loads the start port 2 information storage counter into the register (step S4034). The start port 2 information storage counter is a counter that counts the number of remaining outputs of the start port 2 signal. Next, the game control microcomputer 560 increments the start port 2 information storage counter by 1 (step S4035). Then, it is confirmed whether the calculation result (added result) is not 0 (step S4036). When the calculation result is 0 (N in step S4036), 1 is subtracted from the calculation result (step S4037). Then, the calculation result is stored in the start port 2 information storage counter (step S4038).

  Then, the game control microcomputer 560 loads the start port 2 information storage timer (step S4039), reflects the state of the start port 2 information storage timer in the flag register (step S4040), and outputs the start port 2 signal. It is determined whether it is in the middle (step S4041). The start port 2 information storage timer is a timer for measuring the on time and the off time of the start port 2 signal. If the value of the start port 2 information storage timer is not 0, it is determined that the start port 2 signal is being output. If the value of the start port 2 information storage timer is 0, it is determined that the start port 2 signal is not being output. The

  If the start port 2 signal is being output (Y in step S4041), the process proceeds to step S4048. If the start port 2 signal is not being output (N in step S4041), the game control microcomputer 560 loads the start port 2 information storage counter (step S4042), and sets the status of the start port 2 information storage counter to the flag register. (Step S4043), it is determined whether there is a remaining number of output times of the start port 2 signal (step S4044). When the first start port switch 13a is turned on (Y in step S4033), the start port 2 information storage counter is incremented by 1, so it is determined that there is a remaining number of output times of the start port 2 signal. become.

  If there is no remaining number of output times of the start port 2 signal (Y in step S4044), the process proceeds to step S4053. If there is a remaining number of output times of the start port 2 signal (N in step S4044), the game control microcomputer 560 subtracts 1 from the start port 2 information storage counter (step S4045), and the calculation result (result of subtracting 1) ) Is stored in the start port 2 information storage counter (step S4046). Then, the winning information operating time (200) is set in the register (step S4047). The winning information operating time (200) is 0.400 seconds (400 ms) as described above.

  Next, if the winning information operating time is not set in step S4047, the game control microcomputer 560 subtracts 1 from the start port 2 information storage timer, and if the winning information operating time is set in step S4047, the winning information is displayed. The operation time is decremented by 1 (step S4048). Then, the calculation result (the result obtained by subtracting 1) is stored in the start port 2 information storage timer (step S4049).

  The game control microcomputer 560 compares the calculation result (remaining time of the start port 2 information storage timer) with the winning information on time (100) (step S4050), and the calculation result is shorter than the winning information on time. It is determined whether or not (step S4051). The winning information on time (100) is 0.200 seconds (200 ms) as described above.

  When the calculation result is not shorter than the winning information on time, that is, when the calculation result (remaining time of the start port 2 information storage timer) is longer than the winning information on time (200 ms) (N in step S4051). The game control microcomputer 560 sets the start port 2 output bit position (bit 2 of the output port 2) of the information buffer (step S4052). When the start port 2 output bit position of the information buffer is set, the information buffer is set to the output value in the subsequent step S4110, and the output value is output to the output port 2 in step S4111, whereby the start port 2 signal is output. It will be output from port 2.

  When a winning to the first start winning opening 13 is generated by the processing of steps S4031 to S4052 described above (when the first start opening switch 13a is turned on), the start opening 2 signal is output. That is, after the start port 2 signal is turned on for 200 ms, it is turned off for 200 ms. By inputting the start port 2 signal to the hall computer, the number of winnings to the first starting winning port 13 can be recognized. As described above, since the start port 1 signal indicates the number of winnings to the first start winning port 13 and the second start winning port 14, when the start port 1 signal and the start port 2 signal are input to the hall computer, The hall computer is the sum of the number of prizes received at the first start prize slot 13, the number of prizes received at the second start prize slot 14, the number of prizes received at the first start prize slot 13 and the number of prizes received at the second start prize slot 14. Can be recognized.

  Since the start port 2 signal is turned on for 200 ms and then turned off for 200 ms, even when the first start winning is generated in a short time, the signal is kept off for 200 ms. Later, the next start port 2 signal is output. That is, the start port 2 signal is output at an interval of at least 200 ms.

  Next, the game control microcomputer 560 loads the special symbol stop information timer into the register (step S4053), reflects the state of the special symbol stop information timer in the flag register (step S4054), and the special symbol stop information timer. It is determined whether or not has timed out (step S4055). In step S227 of the special symbol changing process (step S302), when the symbol fixed number output time is set in the special symbol stop information timer and the symbol fixed number output time has not elapsed, the special symbol stop information timer times out. When the symbol determination number output time has elapsed (when the value of the special symbol stop information timer is 0), it is determined that the special symbol stop information timer has timed out.

  If the special symbol stop information timer has not timed out (N in step S4055), the special symbol stop information timer is decremented by 1 (step S4056), and the calculation result is stored in the special symbol stop information timer (step S4057). Then, the design buffer count 1 output bit position (bit 0 of output port 2) of the information buffer is set (step S4058). When the symbol determination number 1 output bit position of the information buffer is set, the information buffer is set to the output value in the subsequent step S4110, and the output value is output to the output port 2 in step S4111. Output from the output port 2 (becomes ON state). If the special symbol stop information timer times out (Y in step S4055), the symbol determination number signal is turned off as a result of the processing in step S4058 not being executed.

  By the processing of steps S4053 to S4058 described above, every time the change of the special symbol is stopped (stopped symbol is fixed), the symbol determination frequency signal is turned on.

  Next, the game control microcomputer 560 loads the first special symbol process flag and the second special symbol process flag (step S4059), and the value of the first special symbol process flag and the second special symbol process flag and the big prize. The mouth opening pre-processing designated value (“6”) is compared (step S4060), and it is determined whether the value of the first special symbol process flag or the second special symbol process flag is less than six (step S4061). When the value of the first special symbol process flag or the second special symbol process flag is less than 6 (Y in step S4061), the process proceeds to step S4065. When the value of the first special symbol process flag or the second special symbol process flag is 6 or more (N in step S4061), the output bit position of the big hit of the information buffer is set (step S4062). And it is determined whether the value of a 1st special symbol process flag and a 2nd special symbol process flag is less than 9 (step S4063). When the values of the first special symbol process flag and the second special symbol process flag are 9 or more (N in step S4063), the process proceeds to step S4065. When the values of the first special symbol process flag and the second special symbol process flag are less than 9 (Y in step S4063), the game control microcomputer 560 sets the two output bit positions in the information buffer jackpot (step S4064). When the output bit position of jackpot 1 and the output bit position 2 of jackpot of the information buffer are set, the information buffer is set to the output value in the subsequent step S4110, and the output value is output to the output port 2 in step S4111. One signal and two jackpot signals are output from the output port 2 (become turned on).

  Further, the game control microcomputer 560 executes a special symbol high probability check process for confirming whether or not it is in a high probability state (step S4065), and determines whether or not it is in a high probability state (step S4066). . If the state is a high probability state (Y in step S4066), the probability variation output bit position of the information buffer is set (step S4067). When the probability variation output bit position of the information buffer is set, the information buffer is set to the output value in the subsequent step S4110, and the output value is output to the output port 2 in step S4111. Is output (becomes ON state).

  Further, the game control microcomputer 560 executes a time reduction check process for confirming whether or not the time reduction state is set (step S4068), and determines whether or not the time reduction state is set (step S4069). If the time-short state is set (Y in step S4069), the time-short output bit position of the information buffer is set (step S4071). When the time-short output bit position is set, the time buffer signal is output from the output port 2 by setting the information buffer to the output value in step S4110 and outputting the output value to the output port 2 in step S4111. (Turns on)

  By the processing of steps S4059 to S1071 described above, one jackpot signal, two jackpot signals, a probability variation signal, and a short time signal corresponding to the jackpot type and gaming state are output (turns on).

  Next, the game control microcomputer 560 sets the address of the winning ball payout number counter in the pointer (step S4085). The prize ball payout number counter is a counter that counts the pulses of the prize ball count signal from the payout control microcomputer 370. Next, the game control microcomputer 560 reads the bit data of the prize ball count signal of the input port 1 (step S4086). Then, a prize ball count signal timer is loaded (step S4087A). The prize ball count signal timer is a timer for determining the time during which the prize ball count signal is on.

  Then, the game control microcomputer 560 determines whether or not the bit data of the prize ball count signal is “1” (step S4087B). If it is “1”, the prize ball count signal timer is incremented by one. (Step S4087C) If it is not “1” (“0”), the prize ball count signal timer is cleared to 0 (Step S4087D). Next, the game control microcomputer 560 compares the prize ball count signal timer with the switch-on determination value (2) (step S4088), and whether the value of the prize ball count signal timer matches the switch-on determination value (2). It is determined whether or not (step S4089). If the value of the winning ball count signal timer does not match the switch-on determination value (2) (Y in step S4089), the process proceeds to step S4095. If they match (N in step S4089), it is determined that the prize ball count signal has been input (determined that the prize ball count signal has been input continuously for 4 ms), and the prize ball payout number counter is incremented by one. (Step S4090). Note that the processing of steps S4087 to S4088 is processing for confirming that the winning ball count signal has been input reliably, but the payout control microcomputer 370 also reliably performs processing similar to that of steps S4087 to S4088. You may make it confirm that the detection signal from the payout number count switch 301 was input.

  Then, it is determined whether or not the value of the prize ball payout number counter is 10 (step S4091). If the value of the winning ball payout number counter is not 10 (N in step S4091), the process proceeds to step S4095. If the value of the winning ball payout number counter is 10 (Y in step S1091), the clear data is stored in the winning ball payout number counter (step S4092). Thereby, the prize ball payout number counter is cleared. Next, the game control microcomputer 560 loads a prize ball signal output number counter (step S4093), and adds 1 to the prize ball signal output number counter (step S4094). The prize ball signal output frequency counter is a counter that counts the remaining number of prize ball signal outputs.

  Then, the game control microcomputer 560 loads the prize ball signal output timer (step S4095), reflects the state of the prize ball signal output timer in the flag register (step S4096), and the prize ball signal is being output. Whether or not (step S4097). The prize ball signal output timer is a timer for measuring an on time and an off time (on time 100 ms and off time 100 ms described later) of the prize ball signal. If the value of the prize ball signal output timer is not 0, it is determined that a prize ball signal is being output. If the value of the prize ball signal output timer is 0, it is determined that no prize ball signal is being output.

  If the winning ball signal is being output (Y in step S4097), the process proceeds to step S4106. If the prize ball signal is not being output (N in step S4097), the game control microcomputer 560 loads the prize ball signal output number counter (step S4098) and sets the status of the prize ball signal output number counter in the flag register. It is reflected (step S4099) and it is determined whether there is a remaining number of output times of the prize ball signal (step S4101).

  If there is no remaining number of prize ball signals output (Y in step S4101), the process proceeds to step S4110. If there is a remaining number of output of the winning ball signal (N in step S4101), the game control microcomputer 560 subtracts 1 from the winning ball signal output number counter (step S4102), and the calculation result (result of 1 subtraction) Is stored in the prize ball signal output number counter (step S4103). Then, the game information signal operation operation time (100) is set in the register (step S4104). The game information signal operating time (100) is a time for which a 2 ms timer interruption is executed 100 times, that is, a time of 0.200 seconds (200 ms).

  Next, if the game information signal operation time is not set in step S4104, the game control microcomputer 560 decrements the prize ball signal output timer by 1, and if the game information signal operation time is set in step S4104, the game The information signal operating time is decremented by 1 (step S4105). Then, the calculation result (the result obtained by subtracting 1) is stored in the prize ball signal output timer (step S4106).

  The game control microcomputer 560 compares the calculation result (the remaining time of the prize ball signal output timer) with the game information signal output time determination value (50) (step S4107), and the remaining time of the prize ball signal output timer is the game information. It is determined whether the time is shorter than the signal output time determination value (50) (step S4108). The game information signal output time determination value (50) is a time for which a 2 ms timer interrupt is executed 50 times, that is, a time of 0.100 seconds (100 ms).

  When the remaining time of the prize ball signal output timer is not shorter than the game information signal output time determination value, that is, the remaining time of the prize ball signal output timer is longer than the game information signal output time determination value (100 ms). In this case (N in Step S4108), the game control microcomputer 560 sets the prize ball output bit position of the information buffer (bit 2 of the output port 3 in the example shown in FIG. 12) (Step S4109). When the prize ball output bit position of the information buffer is set, the prize buffer signal is output from the output port 3 by setting the information buffer to the output value in step S4110 and outputting the output value to the output port 3 in step S4111. Is done.

  Through the processing of steps S4085 to S4111 described above, the prize ball signal is output to the hall computer every time the prize ball count signal is counted ten times. That is, a prize ball signal is output to the hall computer every time 10 prize balls are paid out (10 pulses per pulse). Therefore, the hall computer can recognize the number of game balls paid out by the gaming machine.

  In the information output process described above, an error signal (payout error signal, ball runout signal, full tank signal) output from the payout control microcomputer 370 is output to an external device such as a hall computer. However, these signals may also be output to an external device.

  FIG. 69 is a flowchart showing the abnormal winning notification process in step S22A. In the abnormal winning notification process, the game control microcomputer 560 checks whether an abnormal notification prohibition flag is set (step S251). The abnormality notification prohibition flag is set in the main process executed when power supply to the gaming machine is started (see step S44 in FIG. 23). When the abnormality notification prohibition flag is not set, the process proceeds to step S255A. If the abnormality notification prohibition flag is set, the value of the prohibition period timer set in step S45 is decremented by 1 (step S252). When the value of the prohibition period timer becomes 0, that is, when the prohibition period timer times out, the abnormality notification prohibition flag is reset (steps S253 and S254).

  Next, the game control microcomputer 560 checks whether or not the value of the first special symbol process flag is 6 or more (step S255A). When the value of the first special symbol process flag is 6 or more (Y in step S255A), the game is in the big hit game or the small hit game. In such a state, there is a possibility that a game ball will win the big prize opening, so the process is terminated without performing the confirmation process of the abnormal prize winning to the big prize opening.

  When the value of the first special symbol process flag is less than 6, the game control microcomputer 560 checks whether or not the value of the second special symbol process flag is 6 or more (step S255B). Even when the value of the second special symbol process flag is 6 or more (Y in step S255B), the game is in the big hit game or the small hit game. In such a state, there is a possibility that a game ball will win the big prize opening, so the process is terminated without performing the confirmation process of the abnormal prize winning to the big prize opening.

  The state where the value of the second special symbol process flag is also less than 6 is a state where neither a big hit game nor a small hit game is played. In this state, if there is a game ball winning at the big winning opening, it can be determined that the winning is an abnormal winning. Therefore, an abnormal winning confirmation process for the special winning opening shown below is performed.

  That is, if the value of the second special symbol process flag is also less than 6 (N in step S255B), the game control microcomputer 560 loads the contents of the switch-on buffer into the register (step S256). Then, the game control microcomputer 560 takes the logical product of the content of the loaded switch-on buffer and the count switch input bit determination value (01 (H)) (step S257). When the content of the switch-on buffer is 01 (H), that is, when the count switch 23 is on, the logical product operation result is 01 (H). When the count switch 23 is not turned on, the operation result of the logical product is 0 (00 (H)).

  In steps S256 to S257, the count switch 23 is turned on by directly checking the contents of the input port 0 instead of determining whether the count switch 23 is turned on based on the contents of the switch-on buffer. It may be confirmed whether or not.

  If the result of the logical product is not 0 (N in step S258), it is determined that an abnormal winning in the special winning opening has occurred, and control is performed to transmit an abnormal winning notification designating command to the effect control board 80 (step S258). S259, S260). That is, the game control microcomputer 560 sets the address of the abnormal winning notification designation command transmission table in the pointer (step S259), and executes the command setting process (step S260). On the other hand, when the result of the logical product is 0 (Y in step S258), it is determined that no abnormal winning in the special winning opening has occurred, and the processing is ended as it is.

  When the count switch 23 is turned on in a state where neither a big hit game nor a small hit game is performed by the above processing, an abnormal winning notification designation command is transmitted.

  In addition, the process of steps S251 to S253 prohibits the start of abnormality notification when the production control microcomputer 100 is performing initialization notification. The production control microcomputer 100 continues to execute the initialization notification until the period corresponding to the prohibition period has elapsed since the start of the initialization notification.

  In this embodiment, the abnormal winning notification in the power-on prohibition period is configured so that the abnormal winning notification designation command is not transmitted during the prohibition period after power-on (steps S259 and S260 are not executed). However, the present invention is not limited to this configuration, and the game control microcomputer 560 transmits an abnormal winning designation command even during the period after the power is turned on, and the effect control microcomputer 100 is turned on. Even if an abnormal winning designation command is received in a later period, the notification process based on the abnormal winning designation command may not be executed. Specifically, the production control microcomputer 100 starts measurement of a prohibition period for prohibiting notification of an abnormal prize when the power is turned on (when a power-on designation command or a power failure restoration designation command is received). When the abnormal winning designation command is received within the prohibited period, the notification process based on the abnormal winning designation command is not executed.

  In the processing of steps S255A and S255B, the game control microcomputer 560 determines whether or not an abnormal winning in the big winning opening has occurred based on the values of the first special symbol process flag and the second special symbol process flag. Thus, it can be determined whether or not an abnormal winning has occurred based on the two data, and the determination process can be simplified. Further, as described above, since the big hit end processing or the small hit end processing is executed for a predetermined time after the special variable winning ball device 20 is closed, the big winning immediately before the special variable winning ball device (opening / closing blade 20) is closed. The game ball won in the mouth is prevented from being detected by the count switch 23 after the value of the first special symbol process flag or the second special symbol process flag returns to 0, and it is a regular prize. Regardless, no error is reported.

  Next, the operation of the payout control means by the payout control microcomputer 370 will be described. FIG. 70 is an explanatory diagram showing an example of output port assignment in the payout control microcomputer 370. As shown in FIG. 70, the output port 0 is an output port for outputting a signal of each phase supplied to the payout motor 289 by the stepping motor. The output port 1 is an output port for outputting a payout error signal, a ball out signal, a full tank signal, and a prize ball count signal to the game control microcomputer 560. The output port 2 is an output port for outputting each segment of the error display LED 374 using a 7-segment LED.

  Although not shown in FIG. 70, the payout control board 37 is also provided with an output port 3 for outputting an EXS signal and a PRDY signal to the card unit 50. The output ports 0, 1, and 2 correspond to the output ports 372a, 372b, and 372c shown in FIG.

  FIG. 71 is an explanatory diagram showing an example of input port bit assignment in the payout control microcomputer 370. As shown in FIG. 71, a 4-bit prize ball number signal is inputted to bits 0 to 3 of the input port 0, and a prize ball REQ signal from the main board 31 is inputted to bits 4, 6, 7 respectively. The detection signal of the ball break switch 187 and the detection signal of the payout motor position sensor 295 are input. In addition, the detection signal of the payout number count switch 301, the operation signal from the error release switch 375, and the detection signal of the full switch 48 are input to bits 1 to 3 of the input port 1, respectively. The VL signal, the BRDY signal, and the BRQ signal from the card unit 50 are input to bits 4 to 6 of the input port 1, respectively. The input ports 0 and 1 correspond to the input ports 372e and 372f shown in FIG.

  Next, the operation of the payout control microcomputer 370 (specifically, the payout control CPU 371) will be described. FIG. 72 is a flowchart showing a payout control process executed by the payout control means. The payout control process is executed by a timer interrupt process based on a timer interrupt generated every 2 ms, for example. In the payout control process, the payout control CPU 371 first performs an input determination process (step S752). The input determination process is a process of detecting the states of the input port 0 and the input port 1 and reflecting the detection result in predetermined 2 bytes of RAM (referred to as an input state flag). In the payout control process, when control is performed based on the states of the input port 0 and the input port 1, the state of the input state flag is checked instead of directly checking the state of the input port. In the input determination process, the payout control CPU 371 also performs a process of transmitting the input data of the input ports 0 and 1 to the main board 31. Instead of checking the state of the input state flag, the states of the input port 0 and the input port 1 may be directly checked.

  Next, the payout control CPU 371 executes a payout motor control process (step S753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Also, the payout control CPU 371 executes a prepaid card unit control process for communicating with the card unit 50 (step S754). Next, the payout control CPU 371 executes main control communication processing for communicating with the game control means of the main board 31 (step S755). Further, a prize ball lending control process for performing a control to pay out a lending ball in response to a ball lending request from the card unit 50 and a control for paying out the number of award balls indicated by a prize ball number signal from the main board. Is executed (step S756).

  Then, the payout control CPU 371 executes error processing for detecting various errors (step S757). Further, display control processing for performing a predetermined display on the error display LED 374 according to the result of the error processing is executed (step S759).

  In this embodiment, a RAM area (output port 0 buffer, output port 1 buffer, output port 2 buffer) corresponding to the output state of the output port is provided. The contents of the port 0 buffer, output port 1 buffer, and output port 2 buffer are output to the output port (step S760: output processing). The output port 0 buffer, the output port 1 buffer, and the output port 2 buffer include a payout motor control process (step S753), a prepaid card unit control process (step S754), a main control communication process (step S755), and a display control process (step S759). ).

  FIG. 73 is a flowchart showing the winning ball lending control process in step S756. In the winning ball lending control process, the payout control CPU 371 confirms that the detection signal of the payout number count switch 301 is turned on (step S401). The value is decremented by 1 (steps S402 and S404), and if the ball is not being lent, the value of the unpaid prize ball counter is decremented by 1 (steps S402 and S403). Next, the payout ball detection bit of the payout control state flag formed in the RAM is set (step S405). The payout ball detection bit is a game regardless of whether the payout motor 289 is driven in one payout ball payout process (up to 15 balls) or one ball lending process (25 payouts) in the payout passing waiting process. This is used to detect that no sphere has passed through the payout number counting switch 301. Thereafter, any one of steps S410 to S412 is executed according to the value of the payout control code.

  In the winning ball lending control process, when checking the detection signal of the payout number count switch 301 or subtracting the unpaid number counter, the error bit check is not executed. Therefore, even if an error state relating to the payout of game balls is detected, every time a payout of game balls is detected by the payout number count switch 301, if the payout game balls are loaned balls, a ball rental unpaid number counter 1 is subtracted, and if it is a prize ball, a process of subtracting 1 from the prize ball unpaid number counter is executed. Therefore, even if an error related to payout occurs, the number of unpaid game balls can be managed accurately. That is, a game ball paid out from the ball payout device 97 before the payout control CPU 371 detects the occurrence of an error is detected by the payout number count switch 301 with a slight delay from the time of payout. The payout control CPU 371 generates an error when the occurrence of an error is detected after the game ball is paid out from the ball payout device 97 and before the game ball is detected by the payout number count switch 301. The game balls paid out from the ball payout device 97 before detection can be reflected in the award ball unpaid number counter or the ball lending unpaid number counter.

  FIG. 74 is a flowchart showing the payout start waiting process (step S410) executed when the payout control code is 0. In the payout start waiting process, the payout control CPU 371 does not execute the subsequent processes if an error bit (one or more of all error bits in the error flag (see FIG. 79)) is set (step S421). . The error flag is formed in the RAM.

  On the other hand, if the BRDY signal is not in the on state, the process for paying out a prize ball after step S431 is executed. If the BRDY signal is on and the BRQ signal, which is a ball lending request signal, is on, a ball lending operation flag is set (steps S423 and S424). Then, “25” is set in the unpaid ball lending number counter (step S425), and “25” is set in the payout motor rotation number buffer (step S426).

  The payout motor rotation frequency buffer is referred to in the payout motor control process (step S753). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer.

  Thereafter, the payout control CPU 371 sets a value (specifically “1”) corresponding to the payout motor activation preparation process (step S522) to the payout motor control code for selecting the process executed in the payout motor control process. It is set (step S427), the value of the payout control code is set to 1 (step S428), and the process ends.

  In step S431, the payout control CPU 371 checks whether or not the value of the winning ball unpaid-out counter is 0 (step S431). If 0, the process ends. The award ball unpaid-out counter is a value other than 0 when the communication related to the payout command signal is normally completed with the game control microcomputer 560 of the main board 31 in the main control communication end process. The number indicated by the prize ball number signal) is added. If the value of the award ball unpaid number counter is not 0, it is confirmed whether it is 15 or more (step S432). If it is less than 15, the value of the award ball unpaid number counter is set in the payout motor rotation count buffer (step S433), and if it is 15 or more, “15” is set in the payout motor rotation count buffer. Then, a winning ball operating flag is set (step S435), and the process proceeds to step S427.

  FIG. 75 is a flowchart showing a payout motor stop waiting process (step S411) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control CPU 371 checks whether or not the payout operation is completed (step S441).

  When the payout operation is completed, the payout control CPU 371 sets the payout passing monitoring time in the payout control monitoring timer (step S442). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (step S443), and the process ends.

  76 to 78 are flowcharts showing the payout passing waiting process (step S412) executed when the value of the payout control code is 2. In the payout passing waiting process, when a prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is zero. If the value of the award ball unpaid-out counter is not 0, if it is not in an error state, a re-payout operation of one game ball is tried up to 2 times. In the re-payout operation, when it is detected by the payout number count switch 301 that the game ball is actually paid out, it is determined that the payout has been completed normally. In this embodiment, the maximum number of game balls to be paid out in one prize ball payout operation is 15, and if the prize ball number signal is received during the prize ball payout, the value of the prize ball unpaid number counter is received. Therefore, even when the payout is completed normally, the value of the award ball non-payout number counter may not be 0.

  Further, when the ball lending is being paid out, it is determined that the payout has been completed normally if the value of the ball lending unpaid-out counter is 0. If the value of the ball lending unpaid number counter is not 0, and if it is not in an error state, a re-payout operation of one game ball or the remaining number of ball lending (corresponding to the value of the ball lending unpaid number counter) Try. In this embodiment, the number of game balls to be paid out in one ball lending and payout operation is 25 (fixed value), and the payout motor 289 is rotated so that 25 game balls are paid out. Therefore, when the value of the unpaid ball lending counter is not 0, the payout has not been completed normally.

  In the payout passing waiting process, the payout control CPU 371 first checks the value of the payout control timer, and if the value is 0, the process proceeds to step S453 (step S450). If the value of the payout control timer is not 0, the value of the payout control timer is decremented by 1 (step S451). If the value of the payout control timer is not 0 (step S452), that is, if the payout control timer has not timed out, the process is terminated. Note that the process in step S450 is a process that takes into account when a game ball payout retry operation to be described later is started. When the process of step S907 described later is executed, a retry operation is started through a route that moves from step S450 to S453.

  If the payout control timer has timed out (step S452), it is confirmed whether or not a ball lending payout process (ball lending operation) has been executed (step S453). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in-progress bit formed in the RAM is set (see steps S423 and S424). When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control CPU 371 checks the value of the award ball unpaid number counter (step S454). ). When the value of the winning ball unpaid-out counter is 0, it is determined that the winning ball payout process has been completed normally, and the payout ball detection bit in the payout control state flag, 1 bit during re-payout operation, and during re-payout operation 2 bits, the winning ball operating flag and the ball lending operating bit are reset (step S455), the payout control code is set to 0 (step S456), and the processing is terminated. This bit is set when the switch 301 is turned on, and indicates that the payout number counting switch 301 has detected at least one game ball during the payout operation. Further, 1 bit during the re-payout operation and 2 bits during the re-payout operation are control bits used when executing a re-payout process including two re-payout operations.

  The payout control CPU 371 determines that an error flag (specifically, a payout switch error error 1 bit, a payout switch error error 2 bit, and a payout case error bit when the value of the award ball unpaid number counter is not 0. (One or a plurality of bits) is not set (step S459), and if the payout ball detection bit is not set (step S461), the re-payout operation is executed. To do. If the error flag is set, the re-payout operation is not executed.

  As described above, in this embodiment, even when the payout is completed normally, the value of the unpaid prize ball number counter may not be 0. Therefore, if the payout ball detection bit is set, that is, if the payout number count switch 301 detects the payout of at least one game ball during the prize ball payout process, it is assumed that the prize ball payout process is normally completed. The process proceeds to step S455. For example, when 15 game balls should be paid out in one prize ball payout process, when only 14 game balls are actually paid out (the number of payout count switch 301 is 14 game balls). In this case, the payout ball detection bit is set, so it is considered that the award ball payout process has been completed normally. It should not have been done, and the shortage will be paid out in the next prize ball payout process, so there will be no disadvantage to the player.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not 2 bits during re-payout operation are set (step S462). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S463). If 1 bit is not set during the re-payout operation, 1 is set as the number of re-payout operations to execute the first re-payout operation (step S464), and 1 bit is set during the re-payout operation (step S465). ) The value of the re-payout operation number or the ball lending unpaid-out number counter is set in the payout motor rotation number buffer (step S466). The payout motor rotation frequency buffer is referred to in the payout motor control process (step S753). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer. In step S466, the value of the unpaid ball lending number counter is also handled because step S466 is used in the re-payout process in the lend-out process. That is, in step S466, the payout control CPU 371 sets the re-payout operation number in the re-payout process in the prize ball payout process, and sets the value of the ball lending unpaid number counter in the re-payout process in the ball lending payout process. . Thereafter, the payout control code is set to 1 (step S467), and the process is terminated.

  In step S463, when it is confirmed that 1 bit is set during the re-payout operation, the payout control CPU 371 sets 1 as the re-payout operation number in order to execute the second re-payout (step S468). Then, 1 bit is reset during the re-payout operation (step S469), and 2 bits are set during the re-payout operation (step S470). Then, control goes to a step S466.

  In step S462, when it is confirmed that 2 bits are set during the re-payout operation, the payout control CPU 371 did not pay out the game ball even after executing the re-payout process twice (payout number count switch). 301 has detected no game ball), the payout case error bit in the error flag is set (step S472). At that time, 2 bits during the re-payout operation are reset (step S471). Then, the process ends.

  As described above, if no game balls are paid out even if two re-payout operations are performed in the re-payout process (corrected payout process), it is determined that the game ball payout operation is defective and the payout number count switch is not A passing error bit (payout case error bit) is set.

  Accordingly, in this embodiment, the payout control CPU 371 determines in advance when it detects that the game ball has not been paid out based on the detection signal from the payout number count switch 301 as the payout detection means. Control is performed so that the payout means pays out one game ball up to a predetermined number of times (in this example, twice). Note that, not limited to a predetermined number of times, when it is detected that a game ball has not been paid out, the payout means may be made to pay out one game ball without any limitation. In addition, after trying to pay out one game ball twice, it may be possible to pay out the number of unpaid again. Instead of trying to pay out one game ball, paying out game balls for the number of payouts each time. You may make it retry. Further, in this embodiment, when the game ball is not paid out even if the retry operation for paying out the game ball is performed twice, the payout case error bit is set and an error is being generated. (Step S472), the payout case error bit may be set when it is detected for the first time that the game ball has not been paid out. Note that “retry operation (or“ retry ”,“ retry operation processing ”) means that the actual number of payouts is equal to the number of game balls paid out in spite of execution of a normal payout process. This is an operation to be executed when the amount is small, and means an operation for executing the payout process again in order to pay out unpaid game balls separately from the normal payout process.

  In the winning ball lending control process, the error bit is checked to determine whether or not to perform a payout operation (one winning ball payout or one ball lending). The payout start shown in FIG. Only in the waiting process. In the payout motor stop waiting process shown in FIG. 75 and the payout passing wait process shown in FIG. 76 and the like, the error bit is not checked. Note that the error bit is also checked in step S459 or the like in the payout passing waiting process, but this check is for determining whether or not a re-payout operation is performed, and is a payout operation (single prize ball payout or 1 This is not to determine whether or not to start ball lending. Therefore, after the process of step S426, S433, or step S434 is performed and the game ball payout process is started, the payout process is not interrupted even if an error occurs. In other words, when an error occurs, the game ball payout process is continued until a point at which the game ball can be cut well (at the time when one prize ball payout or one ball lending ends). The error bits in the error flag checked in step S421 include an error bit indicating that the connection confirmation signal from the main board 31 has been turned off. Therefore, even when the connection confirmation signal is turned off, the game ball payout process is stopped at a time when it is best to turn it off.

  Upon confirming that the ball lending / dispensing process (ball lending operation) has been executed in step S453, the payout control CPU 371 confirms whether or not the value of the unlapped ball lending number counter is 0 (step S457). . If it is 0, it is determined that the ball lending / dispensing process is normally completed, and the process proceeds to step S455.

  In step S457, if the value of the ball lending unpaid number counter is not 0, an error flag (specifically, any one of the payout switch error error 1 bit, the payout switch error error 2 bit, and the payout case error bit) Or one bit or a plurality of bits) is not set (step S475), and the re-payout process is executed. If the error flag is set, the re-payout process is not executed.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not 2 bits during re-payout operation are set (step S476). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S477). If 1 bit is not set during the re-payout operation, 1 is set as the number of re-payout operations to execute the first re-payout operation (step S478), and 1 bit is set during the re-payout operation (step S479). ) After further resetting the payout ball detection bit (step S480), the process proceeds to step S466.

  In step S477, when it is confirmed that 1 bit is set during the re-payout operation, the payout control CPU 371 performs a process for executing the re-payout operation again. Specifically, 1 bit is reset during the re-payout operation (step S481). If the payout ball detection bit is set, that is, if the game ball is paid out in the first re-payout operation, the process proceeds to step S483. If the payout ball detection bit is not set, the process proceeds to step S484 in order to execute the second payout operation.

  In step S483, the payout ball detection bit is reset, and then the process proceeds to step S466. Therefore, in this case, since 1 bit remains set during the re-payout operation, the first (first) re-payout operation is performed again. In step S484, 1 is set as the number of re-payout operations (step S484), 2 bits during re-payout operation are set (step S485), and the process proceeds to step S466.

  In step S476, when it is confirmed that the 2 bits during re-payout operation are set, the payout control CPU 371 resets 2 bits during the re-payout operation (step S486), and if the payout ball detection bit is set, That is, if the game ball has been paid out by the re-payout operation, the process proceeds to step S483 to try to eliminate the remaining unpaid portion. If the payout ball detection bit is not set, it is determined that the game ball has not been paid out even if the re-payout process is executed twice (the payout number count switch 301 has not detected a game ball). A payout case error bit is set (step S488). Then, the process ends.

  As described above, if one game ball is not paid out even if two re-payout operations are continuously performed in the re-payout process (corrected payout process) related to the ball lending process, a game ball payout operation is performed. As a failure, a payout count switch non-passing error bit (payout case error bit) is set. In this embodiment, the ball lending control process is executed with priority over the prize ball control process (the process after step S431) (see step S422), but the prize ball control process is performed over the ball lending control process. Priority may be given to execution.

  Next, error processing will be described. FIG. 79 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. In this embodiment, the numerical value displayed on the error display LED 374 is the same as the corresponding bit of the error flag. For example, the display of “0” corresponds to bit 0 of the error flag. As shown in FIG. 79, when disconnection of the payout number count switch 301 or a clogged ball in the payout number count switch 301 is detected, the error display LED 374 is set to “0” as a payout switch abnormality detection error 1. Control the display. The detection of the disconnection of the payout count switch 301 or the clogging of the balls in the payout count switch 301 is determined by the detection signal of the payout count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on even though the game ball is not paying out, a control is performed to display “1” on the error display LED 374 as a payout switch abnormality detection error 2. Do. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “2” is displayed on the error display LED 374 as a payout case error. Control. When the prize ball REQ signal is turned on at an improper timing, or when the prize ball REQ signal is turned off at an improper timing, “3” is displayed in the error display LED 374 as a prize ball REQ signal error. Control to display. It is detected in the main control communication process that the prize ball REQ signal is turned on or off at an incorrect timing.

  Further, when the lower pan is full, that is, when the full switch 48 is turned on, a control is performed to display “4” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, control is performed to display “5” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “6” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an incorrect timing, control is performed to display “7” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (step S754).

  Among the above errors, after a payout switch abnormality detection error 2, a payout case error or a prize ball REQ signal error occurs, the error release switch 375 is operated and an operation signal is output from the error release switch 375 (becomes turned on). The payout control means returns to the state before the error occurred.

  80 and 81 are flowcharts showing the error processing in step S757. In the error processing, the payout control CPU 371 checks the error flag, and the set bits are only the payout switch abnormality detection error 2, the payout case error, and the winning ball REQ signal error (any one of the three). It is confirmed whether it is only a bit, or only two bits out of three, or only those three bits (step S901). If these are the only bits that are set, it is checked whether or not the operation signal is turned on from the error release switch 375 (step S902). When the operation signal is turned on, the error recovery time is set in the pre-error recovery timer (step S903). The error recovery time is the time from when the error release switch 375 is operated until the actual return from the error state to the normal state.

  If the operation signal from the error release switch 375 is not on, the value of the timer before error recovery is confirmed (step S904). If the value of the timer before error recovery is 0, that is, if the timer before error recovery is not set, the process proceeds to step S908. If the timer before error recovery is set, the value of the timer before error recovery is decremented by -1 (step S905). If the value of the timer before error recovery becomes 0 (step S906), the payout switch of the error flags The bits of the abnormality detection error 2, the payout case error and the prize ball REQ signal error are reset (step S907), and the process proceeds to step S908.

  When the processing of step S907 is executed, there may be an error bit that is not set among the bits of the payout switch abnormality detection error 2, the payout case error, and the prize ball REQ signal error. There is no problem resetting error bits that are not in the state. As described above, in this embodiment, when an error (see FIG. 79) that causes the setting of the payout switch abnormality detection error 2, the payout case error, or the prize ball REQ signal error bit occurs, an error occurs. The error is released when the release switch 375 is pressed.

  When the process of step S907 is executed and the payout case error bit is reset, the payout control code is “2” (corresponding to the execution of the payout passing waiting process shown in FIGS. 76 to 78), and the prize ball When the value of the unpaid-out number counter or the value of the ball-lending unpaid-out number counter is not 0, a retry operation for game ball payout is started. That is, when the award ball lending control process of step S756 is executed next, when the payout passing waiting process of step S412 is executed, the repaid process is performed again. For example, if a prize ball payout process has been performed and the value of the prize ball unpaid number counter is not 0, the process proceeds from step S454 to step S459, and it is confirmed in step S459 that the error bit is in a reset state. Therefore, the process for starting the re-payout process after step S462 is executed again, and the re-payout process is executed. Regarding the payout case error bit reset by pressing the error release switch 375, when the bit is set (when step S472 is executed), the payout control timer has already expired. Therefore, when the processing in step S907 is executed and the payout case error bit is reset, the payout control timer = 0 is determined in the determination in step S450 when the payout passage waiting process is executed next. Further, when the payout case error bit is set, the payout ball detection bit is 0 (since step S472 is not executed unless the payout ball detection bit is 0 according to the determination in step S461). Therefore, whenever it is confirmed in step S459 that the error bit is in the reset state, step S462 is executed. That is, the re-payout process is always executed.

  As described above, the payout control means is used to pay out a game ball when the payout number count switch 301 detects no game ball even though the ball payout device 97 pays out a game ball. After performing the correct payout control for causing the ball payout device 97 to execute the retry operation for a predetermined number of times (for example, twice) as a limit, the payout number count switch 301 has detected no game balls. When it is detected (see step S461 and thereafter in FIG. 77), the control state related to the payout is shifted to the error state, and the correction payout control is performed again on condition that the error release signal is output from the error release switch 375 in the error state. A correction payout control restart process for executing

  Further, even during re-payout processing in an error state (specifically, during re-payout processing before setting a payout case error and during re-payout processing after the error release switch 375 is pressed), steps S401 to S401 shown in FIG. The process of S404 is being executed. That is, even when an error relating to payout occurs, if the game ball passes the payout number count switch 301, the value of the award ball unpaid number counter or the ball lending unpaid number counter is subtracted. Therefore, the value of the award ball unpaid number counter or the ball lending unpaid number counter when returning from the error state is a value reflecting the number of game balls actually paid out. That is, even if an error related to payout occurs, the number of game balls actually paid out can be accurately managed.

  Also, in the payout passing waiting process shown in FIGS. 76 to 78, even if it is confirmed that the game ball has been paid out as a result of the re-payout process, the payout case error bit is not reset. The bit of the payout case error is reset only when the error release switch 375 is operated (specifically, when the error return time after operation has elapsed) (steps S902, S903, and S907). That is, the payout case error (payout shortage error) state is not automatically canceled based on the fact that the game ball has passed the payout number count switch 301, etc., and the payout case must be processed without human operation. The error is not cleared. Therefore, the game store clerk and the like can surely recognize that a shortage of payout has occurred.

  In step S908, the payout control CPU 371 confirms the detection signal of the full tank switch 48. If the detection signal of the full tank switch 48 is output (if it is in the ON state), the full tank error bit in the error flag is set (step S909). If the detection signal of the full tank switch 48 is in the OFF state, the full tank error bit is reset (step S910).

  Further, the payout control CPU 371 checks the detection signal of the ball break switch 187 (step S911). If the detection signal of the ball break switch 187 is output (if it is on), the ball break error bit in the error flag is set (step S912). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset (step S913).

  The payout control CPU 371 confirms the value of the switch timer to which the state of the detection signal of the payout number count switch 301 is set, and if the value exceeds the maximum switch-on time (eg, “240”) (step S918). ), The bit of the payout switch abnormality detection error 1 in the error flag is set (step S919).

  The switch timer is a counter that is updated in the input determination process in step S752. If the value of the switch timer is less than or equal to the maximum switch-on time, the payout switch abnormality detection error 1 bit is reset (step S920). It should be noted that the value of the switch timer is incremented by 1 when the state of the input port for inputting the detection signal of the payout number count switch 301 is switched on in the input determination process at step S752, and is cleared by 0 when it is off. . Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the switch on maximum time means that the payout number count switch 301 is in the on state exceeding the switch on maximum time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  Further, the payout control CPU 371, when the value of the switch timer corresponding to the payout count switch 301 becomes a switch-on determination value (for example, “2”) (step S921), the ball lending operation flag and the winning ball operation If both the middle flags are in the reset state, the game ball passes through the payout number count switch 301 even when the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 is set in the error flag (steps S922 and S923). . If the ball lending operation flag or the winning ball operation flag is set, the bit of the payout switch abnormality detection error 2 is reset (step S924).

  Further, the payout control CPU 371 checks the input state of the VL signal from the card unit 50 (step S925). If the VL signal is not input (if it is in the OFF state), the prepaid card unit not yet in the error flag is displayed. A connection error bit is set (step S926). If the VL signal is input (if the VL signal is on), the prepaid card unit unconnected error bit is reset (step S927).

  In this embodiment, the error display LED 374 mounted on the payout control board 37 installed on the back of the gaming machine is notified that an error relating to payout has occurred. It is notified by the lamp installed on the front side.

  FIG. 82 is a flowchart showing a process of a part of the input determination process in step S752 that transmits the input data of the input ports 0 and 1 (see FIG. 71) to the main board 31. In the input determination process, the payout control CPU 371 reads input data of the input port 0 (step S931). Then, the detection signal of the ball break switch 187 in the input data is output to the bit of the ball break signal of the output port 1 (see FIG. 70) (step S932). Further, input data of the input port 1 is read (step S933). Then, the detection signal of the full tank switch 48 in the input data is output to the bit of the full port signal of the output port 1 (step S934).

  Further, when the prize ball operating flag is set (step S935), the detection signal of the payout number count switch 301 in the input data is output to the bit of the prize ball count signal of the output port 1 (step S936). . If any of bits 0, 1, 2, 3, 6, and 7 of the error flag (see FIG. 79) is set, the bit of the payout error signal of the output port 1 is set to “1” ( Steps S937 and S938). If none of the error flag bits 0, 1, 2, 3, 6, and 7 is set, the bit of the payout error signal of the output port 1 is set to “0” (steps S937 and S939). Since the output port generally maintains the output until different data is output from the CPU side, the output state of the bits of the payout error signal after the process of step S938 is executed until the process of step S939 is executed. The output state of the payout error signal bit is maintained at “0” until the process at step S938 is executed after the process at step S939 is executed.

  That is, a payout error signal is output (turned on) means that one of errors corresponding to bits 0, 1, 2, 3, 6, and 7 of the error flag shown in FIG. 79 has occurred. Means.

Next, the operation of the effect control means will be described.
FIG. 83 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 2 ms) (step S701). .

  In this embodiment, even when power supply to the gaming machine is stopped, power is supplied to the production control microcomputer 100 from the backup power supply circuit 383 mounted on the production control board 80 for a predetermined time. The Therefore, even if the power supply to the gaming machine is stopped, the effect control CPU 101 does not operate until a predetermined time (for example, 12 hours, that is, until the power is turned on the next day) elapses. The main process shown in FIG.

  Then, the effect control CPU 101 proceeds to a loop process for monitoring the timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 executes effect control process processing (step S705). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the effect display device 9 is executed.

  Next, a first decorative symbol display control process is performed (step S706). In the first decorative symbol display control process, display control of the first decorative symbol display 9a is executed. Further, a second decorative symbol display control process is performed (step S707). In the second decorative symbol display control process, display control of the second decorative symbol display 9b is executed. Further, a hold storage display control process for controlling the display state of the combined hold storage display unit 18c is executed (step S708).

  Further, a random number update process for updating a counter value of a counter for generating a predetermined random number (for example, a random number for determining a stop symbol) is executed (step S709). In addition, a notification control process for performing notification of a plurality of types of information relating to the state of the gaming machine is performed using an effect device such as the effect display device 9 (step S710). Furthermore, the serial input / output process which outputs the data set by the command analysis process, the effect control process process, and the notification control process process to the serial output circuit 353, and reads the data received from the input ICs 620 and 621 from the serial input circuit 354. Is executed (step S711). Thereafter, the process proceeds to step S702.

  FIG. 84 is an explanatory diagram showing a configuration example of a command reception buffer for storing the effect control command received from the game control microcomputer 560 of the main board 31. In this example, a command reception buffer of a ring buffer type capable of storing six 2-byte configuration effect control commands is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. The ring buffer format is not necessarily required.

  For example, when the serial input circuit 102 receives serial data corresponding to the number of stages (bits) of its own circuit, the serial input circuit 102 outputs a reception completion signal to the effect control CPU 101. The reception completion signal is input to the interrupt terminal of the CPU 101 for effect control, for example. The effect control CPU 101 inputs data from the serial input circuit 102 via the input port 103a in an interrupt process started based on the reception completion signal being input to the interrupt terminal. Then, the input data is stored in the reception command buffer indicated by the command reception number counter in the command reception buffer, and the value of the command reception number counter is incremented by one. In the command analysis process, it is analyzed which command (see FIG. 28) the effect control command stored in the command reception buffer is.

  85 to 91 are flowcharts showing specific examples of the command analysis process (step S704). The effect control command received from the main board 31 is stored in the reception command buffer, but in the command analysis process, the effect control CPU 101 confirms the content of the command stored in the command reception buffer.

  In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S601). Whether it is stored or not is determined by comparing the value of the command reception number counter with the read pointer. The case where both match is the case where the received command is not stored. If the reception command is not stored in the command reception buffer, the process proceeds to step S682A. When the reception command is stored in the command reception buffer, the effect control CPU 101 reads the reception command from the command reception buffer (step S602). When read, the value of the read pointer is incremented by +2 (step S603). The reason for +2 is that two bytes (one command) are read out.

  On the condition that the random error check flag has not been set (step S610), the effect control CPU 101 has the received effect control command as an input port data specification command, and the random error specification bit in the EXT data is Whether it is “0” is checked (step S611). If it is “0”, that is, if a random error is detected (see FIG. 14), a random error flag is set (step S612). Further, a random error checked flag is set (step S613). Thereafter, the process proceeds to step S613A. Whether or not the effect control command received by the processing of steps S610, S611, and S613 is an input port data specification command and the random number error specification bit in the EXT data is “0” is used for effect control. It is executed only once after the microcomputer 100 starts its operation. Also, the random number error flag is set only when the effect control command received first from the game control microcomputer 560 is the input port data designation command and the random number error designation bit in the EXT data is “0”. Is done.

  In step S613A, if the received effect control command is a background designation command, the effect control CPU 101 stores the background designation command in the background designation command storage area formed in the RAM (step S613B).

  If the received effect control command is a variation pattern command (step S614), the effect control CPU 101 stores the variation pattern command in a variation pattern command storage area formed in the RAM (step S615). Then, a variation pattern command reception flag is set (step S616).

  If the received effect control command is the first symbol variation designation command (step S616A), the effect control CPU 101 sets the ornament symbol varying flag (the first ornament symbol varying flag or the second ornament symbol varying flag). If so, the decorative symbol stop request flag is set (steps S616B and S616C). Also, the first symbol variation request flag is set (step S616D). If the decorative symbol variation flag is not set, the process of step S616C is not executed, and the first symbol variation request flag is set (step S616D).

  If the received effect control command is the second symbol variation designation command (step S616E), the effect control CPU 101 sets the ornament symbol stop request flag if the ornament symbol variation flag is set (steps S616F and S616G). ). Also, the second symbol variation request flag is set (step S616H). If the decorative symbol variation flag is not set, the process of step S616G is not executed, and the second symbol variation request flag is set (step S616H).

  If the received effect control command is a display result specifying command (step S617), the effect control CPU 101 stores the display result specifying command in a display result specifying command storage area formed in the RAM (step S618). . Then, a display result specifying command reception flag is set (step S619).

  If the received effect control command is a symbol confirmation designation command (step S621), the effect control CPU 101 sets a confirmed command reception flag (step S622).

  If the received effect control command is one of the jackpot start 1-4 designation commands (step S623), the effect control CPU 101 sets the jackpot start 1-4 designation command reception flag (step S624).

  If the received presentation control command is a combined pending storage number designation command (step S625A), the presentation control CPU 101 uses the second byte data (EXT data) of the combined pending storage count designation command as a combined pending storage count storage area. (Step S625B).

  If the received effect control command is the first start winning designation command (step S625C), the effect control CPU 101 sets the first start winning flag (step S625D). If the received effect control command is the second start winning designation command (step S625E), the effect control CPU 101 sets the second start winning flag (step S625F). If the received effect control command is a total pending storage number subtraction designation command (step S625G), the effect control CPU 101 sets a total pending storage number subtraction designation command reception flag (step S625H).

  If the received effect control command is a customer waiting demonstration designation command (step S625I), the effect control CPU 101 performs control for starting the customer waiting demonstration effect in the effect display device 9 (step S625J).

  If the received effect control command is a power-on specification command (initialization specification command) (step S631), the effect control CPU 101 displays an initial screen on the effect display device 9 indicating that the initialization process has been executed. Control is performed (step S632A). The initial screen includes an initial display of predetermined production symbols. Also, an initial notification flag is set (step S632B).

  If the received effect control command is a power failure recovery designation command (step S633), a predetermined power failure recovery screen (screen for displaying information notifying the player that the gaming state is continuing) is displayed. Control to display on the effect display device 9 is performed (step S634), and an initial notification flag is set (step S635).

  If the received effect control command is an abnormal prize notification designation command (D000 (H)) (step S636), the effect control microcomputer 100 sets an abnormal prize notification designation command reception flag (step S637).

  If the received effect control command is a jackpot end 1 designation command (step S641), the effect control CPU 101 sets a jackpot end 1 designation command reception flag (step S642). If the received effect control command is a jackpot end 2 designation command (step S643), the effect control CPU 101 sets a jackpot end 2 designation command reception flag (step S644).

  If the MODE data of the received effect control command is FF (H), that is, if the input port data designation command is received, the processes of steps S650A to S665 and S671 to S681 are performed (step S650).

  In step S650A, effect control CPU 101 sets an input port data designation reception flag indicating that an input port data designation command has been received. Next, the effect control CPU 101 checks whether or not the door closed state flag which is an internal flag is set (step S651). If the door closed state flag which is an internal flag (the flag indicating that the effect control CPU 101 recognizes that the glass door frame 2 and the mechanism plate 11A are closed) is not set (that is, the door). If it is recognized as an open state), the process proceeds to step S655. When the door closed state flag is set (that is, when it is recognized as the door closed state), after executing the door open / close confirmation process (step S652), the door open / close confirmation process performs the door closed state flag. Is reset (that is, when the opening of the door (glass door frame 2 or mechanism plate 11A) is detected), the door opening error notification flag is set to request the start of the door opening error notification (steps S653, S654). ).

  Further, the effect control CPU 101 inputs the current time signal (hour, minute, second) from the real-time clock 381 (step S654A). Then, the effect control CPU 101 stores information (door opening history information) indicating that the door opening state is detected in the door opening history storage area provided in the backup RAM 382 (step S654B). In this case, based on the time signal input in step S654A, the door opening history information is stored in the door opening history storage area in association with the time when the door opening state is detected.

  By performing the processing of steps S654A and S654B described above, control for monitoring the opening of the door (glass door frame 2 and mechanism plate 11A) is performed by the production control microcomputer 100, and the real time clock 381 is used for opening. Door opening history information including time is recorded. Note that the opening of the door may be monitored by specifying whether or not it is within the closing time of the amusement store using the real-time clock 381 and recording the door opening history information.

  The door opening history information stored in the door opening history storage area may be displayed. For example, when the gaming machine is turned on, the production control microcomputer 100 reads the door opening history information stored in the door opening history storage area of the backup RAM 382, and based on the read door opening history information, A history of door opening time may be displayed. Further, for example, the production control microcomputer 100 reads the door opening history information stored in the door opening history storage area of the backup RAM 382 in accordance with a button operation by a game clerk or the like, and based on the read door opening history information, A history of door opening time may be displayed.

  When the door closed state flag is not set (that is, when it is recognized as a door open state), after the door open / close confirmation process is executed (step S655), the door open / close confirmation process performs the door closed state. When the flag is set (that is, when closing of the door (glass door frame 2 or mechanism plate 11A) is detected), the door open error notification flag is reset and the error notification release flag is set (steps S656 and S657).

  FIG. 92 is a flowchart showing door opening / closing confirmation processing. In the door opening / closing confirmation process, the effect control CPU 101 first confirms whether or not the door closed state flag is set (step S685). When the door closed state flag is not set (when it is recognized that the door is open), it is confirmed whether or not the door (glass door frame 2 or mechanism plate 11A) is closed. (Step S686). In this case, the effect control CPU 101 uses the door opening error designation bit in the EXT data of the input port data designation command (data stored in the command reception buffer but transferred to the register from the command reception buffer). Is “1” (corresponding to closing, see FIG. 14), it is determined that the door is closed. Even if the input port data designation command is not received, if the door open signal is not input via the backup power supply circuit 506 of the main board 31, it is determined that the door is closed. On the other hand, when the door opening error designation bit is “0” (corresponding to opening), it is determined that the door is still open. Even when the input port data designation command is not received, it is determined that the door is still open if the door open signal is input via the backup power supply circuit 506 of the main board 31.

  If the door is closed (Y in step S686), the effect control CPU 101 increments the value of the door monitoring counter by 1 (step S687). If the door is still open (N in step S686), the value of the door monitoring counter is set to 0 (step S688).

  When the process of step S687 has been executed, it is confirmed whether or not the value of the door monitoring counter has reached a predetermined value (10 in this example) (step S689). When the value of the door monitoring counter reaches a predetermined value, the door closing state flag is set, and the value of the door monitoring counter is set to 0 (step S690).

  When the door closed state flag is set (when it is recognized that the door is closed), it is confirmed whether or not the door (the glass door frame 2 or the mechanism plate 11A) has been opened. (Step S691). In this case, when the door opening error designation bit in the EXT data of the input port data designation command is “0” (corresponding to opening), the effect control CPU 101 determines that the door is open. Even if the input port data designation command has not been received, if the door opening signal is input via the backup power supply circuit 506 of the main board 31, it is determined that the door is open. On the other hand, when the door opening error designation bit is “1” (corresponding to closing), it is determined that the door is still closed. Even when the input port data designation command is not received, if the door open signal is not input via the backup power supply circuit 506 of the main board 31, it is determined that the door is still closed.

  If the door is open (Y in step S691), the effect control CPU 101 increments the value of the door monitoring counter by 1 (step S692). If the door is still closed (N in step S691), the value of the door monitoring counter is set to 0 (step S693).

  When the process of step S692 is executed, it is confirmed whether or not the value of the door monitoring counter has reached a predetermined value (10 in this example) (step S694). When the value of the door monitoring counter reaches a predetermined value, the door closing state flag is reset, and the value of the door monitoring counter is set to 0 (step S695).

  With the above processing, when the door closed state flag is set, if the input port data designation command with the door open error signal “0” is continuously received for a predetermined time, the door closed state flag is reset. . Even if the input port data designation command has not been received, if the door open signal is continuously input through the backup power supply circuit 506 of the main board 31 for a predetermined time, the door closed state flag is reset. To do. In addition, when the door closed state flag is not reset, if the input port data designation command whose door open error signal is “1” is continuously received for a predetermined time, the door closed state flag is set. Even if the input port data designation command is not received, if the door open signal is not input via the backup power supply circuit 506 of the main board 31 continuously for a predetermined time, the door closed state flag is set. To do.

  When the door of the game frame 11 is opened and closed, the detection signal of the door opening switch 155a causes chattering, but after the state of the detection signal of the door opening switch 155a is stabilized by the above processing, the door closing state flag is set. The set / reset state is changed. That is, the change of the door closing state flag set / reset state is prevented from being temporarily repeated, and as a result, the setting of the door open error notification flag is prevented from being temporarily changed. .

  Further, the production control CPU 101 checks whether or not the payout error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S658), and changes from “1” to “0”. If the change has occurred, that is, when cancellation of the payout error is detected (see FIG. 14), the payout error notification flag is reset, the error notification release flag is set (step S659), and the process proceeds to step S679. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the payout error bit has changed.

  Further, it is confirmed whether or not the payout error designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S660). Is detected, a payout error notification flag is set to request the start of payout error notification (step S661), and the process proceeds to step S679.

  Further, the effect control CPU 101 checks whether or not the ball break error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S662), and “1” to “0”. Is changed, that is, when cancellation of the ball break error is detected (see FIG. 14), the ball break error notification flag is reset, the error notification release flag is set (step S663), and the process proceeds to step S679. . The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the ball break error bit has changed.

  Further, it is confirmed whether or not the ball break error designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S664). When a break error is detected, a ball break error notification flag is set to request the start of a ball break error notification (step S665), and the process proceeds to step S679.

  In addition, the production control CPU 101 checks whether or not the full error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S671), and changes from “1” to “0”. When the change has occurred, that is, when the release of the full tank error is detected (see FIG. 14), the full tank error notification flag is reset, the error notification release flag is set (step S672), and the process proceeds to step S679. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the full error bit has changed.

  Further, it is confirmed whether or not the full error specification bit in the EXT data of the input port data specification command has changed from “0” to “1” (step S673). Is detected, a full tank error notification flag is set to request the start of full tank error notification (step S674), and the process proceeds to step S679.

  In addition, the effect control CPU 101 checks whether or not a prize ball payout notification flag indicating that the prize ball payout notification is being executed is set (step S675). If the prize ball payout notification flag is not set, it is confirmed whether or not the prize ball count designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S676). When it changes from “0” to “1”, that is, when the payout number count switch 301 is turned on, a prize ball payout notification flag is set to request the start of the prize ball payout notification (step S677). Then, a predetermined value (for example, a value corresponding to 1 second) is set in the prize ball count designation monitoring timer (step S678). The prize ball count designation monitoring timer is a timer for confirming whether or not the prize ball payout has ended. When the prize ball count designation monitoring timer times out, the prize ball payout notification is terminated. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the prize ball count designation bit has changed.

  When the prize ball payout notification flag is set, when the prize ball count designation bit in the EXT data of the input port data designation command changes from “0” to “1”, the prize ball count designation monitoring timer has a predetermined value. Is reset (steps S680 and S681). When the payout number count switch 301 is continuously turned on by the processing of steps S680 and S681, the prize ball count designation monitoring timer does not time out.

  In step S679, the EXT data of the received input port data designation command (FFYY (H)) (stored in the command reception buffer but transferred to the register from the command reception buffer) is stored in the next step. When the input port data designation command is received, the data is stored in the EXT data storage area of the RAM for use as the EXT data of the previously received input port data designation command. In the initialization process in step S701, the contents of the EXT data storage area are initialized to 20 (H). 20 (H) corresponds to the case where each error signal and the prize ball count signal are in the OFF state (see input port 0 in FIG. 14). Then, the process proceeds to step S601. If it is confirmed in step S645 that the MODE data of the effect control command is not FF (H), the effect control CPU 101 sets a flag corresponding to the received effect control command (step S666). Then, the process proceeds to step S601.

  If the reception command is not stored in the command reception buffer in step S601, the effect control CPU 101 checks whether or not the input port data designation reception flag is set (step S682A). If not set, the effect control CPU 101 confirms whether or not a door opening signal is input via the backup power supply circuit 506 of the main board 31 (step S682B). If the door opening signal is input (that is, if the door opening signal is directly input via the main board 31), the processing of steps S682C to S682K is performed.

  In this embodiment, even when the power supply from the backup power supply 505 mounted on the main board 31 is supplied and the power supply to the gaming machine is stopped, the door opening signal is output to the CPU 101 for effect control. Is physically input directly. Therefore, the effect control CPU 101 cannot receive the input port data designation command even when the power supply to the gaming machine is stopped, but the door via the backup power supply circuit 506 of the main board 31. Based on the direct input of the release signal, the processes of steps S682C to S682K are performed.

  In step S682C, a door closed state flag (a flag indicating that the effect control CPU 101 recognizes that the glass door frame 2 and the mechanism plate 11A are closed) that is an internal flag is not set. (In other words, when it is recognized that the door is open), the process proceeds to step S682I. When the door closed state flag is set (that is, when it is recognized as the door closed state), after executing the door open / close confirmation process (step S682D), the door open / close confirmation process performs the door closed state flag. Is reset (that is, when the opening of the door (glass door frame 2 or mechanism plate 11A) is detected), the door opening error notification flag is set to request the start of the door opening error notification (steps S682E and S682F). ).

  Further, the production control CPU 101 inputs the current time signal (hour, minute, second) from the real-time clock 381 (step S682G). Then, the effect control CPU 101 stores information (door opening history information) indicating that the door opening state is detected in the door opening history storage area provided in the backup RAM 382 (step S682H). In this case, based on the time signal input in step S682G, the door opening history information is stored in the door opening history storage area in association with the time when the door opening state is detected.

  By performing the processing of steps S682G and S682H described above, the control for monitoring the opening of the door (glass door frame 2 and mechanism plate 11A) is performed by the production control microcomputer 100, and the real-time clock 381 is used for opening. Door opening history information including time is recorded. Note that the opening of the door may be monitored by specifying whether or not it is within the closing time of the amusement store using the real-time clock 381 and recording the door opening history information.

  The door opening history information stored in the door opening history storage area may be displayed. For example, when the gaming machine is turned on, the production control microcomputer 100 reads the door opening history information stored in the door opening history storage area of the backup RAM 382, and based on the read door opening history information, A history of door opening time may be displayed. Further, for example, the production control microcomputer 100 reads the door opening history information stored in the door opening history storage area of the backup RAM 382 in accordance with a button operation by a game clerk or the like, and based on the read door opening history information, A history of door opening time may be displayed.

  When the door closed state flag is not set (that is, when it is recognized as a door open state), after the door open / close confirmation process is executed (step S682I), the door open / close confirmation process performs the door closed state. When the flag is set (that is, when closing of the door (glass door frame 2 or mechanism plate 11A) is detected), the door open error notification flag is reset and the error notification release flag is set (steps S682J and S682K).

  If the input port data designation reception flag is set in step S682A, the effect control CPU 101 resets the input port data designation reception flag (step S682L) and ends the process. That is, since the input port data designation command is received from the game control microcomputer 560 and the processing of S650A to S665 and S671 to S681 has already been executed, the processing is terminated as it is.

  FIG. 93 is an explanatory diagram showing an example of a variable display mode of decorative symbols (first decorative symbol and second decorative symbol). In this embodiment, the first decorative symbol display 9a and the second decorative symbol display 9b are composed of two LEDs. And as shown in FIG. 93, it lights alternately every predetermined time (for example, 0.5 second). When the display result of the special symbol is a jackpot symbol, the upper LED is turned on as a display result of a decorative symbol reminiscent of the jackpot (see FIG. 93A). Further, when the display result of the special symbol is changed to the off symbol, the lower LED is turned on as the display result of the decorative symbol reminiscent of the off symbol (see FIG. 93B).

  FIG. 94 is an explanatory diagram showing an example of the display state of the summation pending storage display unit 18c. As shown in FIGS. 94 (A) and 94 (B), the total pending storage display portion 18c displays a number of circles (up to 8) corresponding to the total pending storage number. The effect control microcomputer 100 causes the VDP 109 to display a circle so that the first reserved memory and the second reserved memory can be distinguished. For example, a circle corresponding to the first reserved memory is displayed in red, and a circle corresponding to the second reserved memory is displayed in green.

  FIG. 94 (C) shows an example of the display state of the total suspension storage display unit 18c at the time of power failure recovery. As shown in FIG. 94 (C), at the time of power recovery, a number of stars corresponding to the total number of pending storage is displayed on the total pending storage display unit 18c. FIG. 94D shows an example of the display state of the total pending storage display unit 18c when the total pending storage number designation command is received from the game control microcomputer 560 but the start winning designation command cannot be received. ing. As shown in FIG. 94 (D), when the start winning designation command cannot be received, a blue circle is displayed on the total pending storage display unit 18c.

  As shown in FIG. 94C, at the time of power failure recovery, the production control microcomputer 100 displays a display corresponding to the original first reserved memory (first start winning memory) (in this example, a red circle is displayed). ) And the display corresponding to the second reserved memory (second start-up winning memory) (in this example, the display of the green circle) is a display of the number specified by the total reserved memory number designation command (this In the example, an asterisk) is displayed on the summed hold storage display unit 18c. Therefore, it becomes possible to easily grasp that the gaming state has been restored by using the display of the total suspension storage display unit 18c. In addition, if the display mode of the summed hold storage display unit 18c at the time of power failure recovery is different from the display mode corresponding to the original first hold memory and the display mode corresponding to the second hold memory, this embodiment. It is not restricted to changing the shape of the displayed image. For example, the color may be changed without changing the shape, or the size may be changed.

  As shown in FIG. 94D, when the start winning designation command cannot be received, the effect control microcomputer 100 displays the display corresponding to the original first reserved memory (in this example, a red circle). The image corresponding to the increased reserved memory is displayed in a different manner from the display corresponding to the second reserved memory (in this example, the display of the green circle). Therefore, it is possible to easily grasp that an abnormality has occurred with respect to transmission / reception of the effect control command (in this example, the start winning designation command). In addition, if the display mode of the summed hold storage display unit 18c at the time of power failure recovery is different from the display mode corresponding to the original first hold memory and the display mode corresponding to the second hold memory, this embodiment. It is not restricted to changing the color of the image displayed like this. For example, the shape may be changed without changing the color, or the size may be changed.

  FIG. 95 is an explanatory diagram illustrating an example of a display state of the effect display device 9 when a power failure recovery designation command is received. As shown in FIG. 95, when the production control microcomputer 100 receives the power failure recovery designation command, the game state is restored to the effect symbol display area 91 of the effect display device 9, and the game is played from the game state before the power failure. Display to inform you that you can continue. In this embodiment, at the time of power failure recovery, the display mode in the total pending storage display unit 18c is changed to a predetermined mode (in this example, an asterisk), but notification that the gaming state is restored (game before power failure) (Informing that the game can be continued from the state) is performed at the same time, it is possible to prevent a player who appears suspicious about the change in the display mode of the summed hold storage display unit 18c.

  FIG. 96 is a flowchart showing the effect control process (step S705) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S806 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command has been received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the change pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the effect symbol change start process (step S801).

  Production symbol variation start processing (step S801): Control is performed so that the variation of the production symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the effect symbol changing process (step S802).

  Production symbol variation processing (step S802): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the effect symbol variation stop process (step S803).

  Effect symbol variation stop processing (step S803): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the effect symbol variation is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S804) or the variation pattern command reception waiting process (step S800).

  Big hit display process (step S804): After the end of the variation time, control is performed to display a screen for notifying the effect display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805).

  Big hit game processing (step S805): Control during big hit game is performed. For example, when a special winning opening opening designation command or a special winning opening open designation command is received, display control of the number of rounds in the effect display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the big hit end process (step S806).

  Big hit end processing (step S806): In the effect display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 97 is a flowchart showing a variation pattern command reception wait process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812). Then, the value of the effect control process flag is updated to a value corresponding to the effect symbol variation start process (step S801) (step S813).

  FIG. 98 is a flowchart showing the effect symbol variation start process (step S801) in the effect control process shown in FIG. In the effect symbol variation start process, the effect control CPU 101 reads data indicating the variation pattern command from the variation pattern command storage area (step S816).

  Next, it is confirmed whether or not the first symbol variation request flag is set (step S816A). When the first symbol variation request flag is set, the first symbol variation request flag is reset (step S816B), and the first ornament symbol variation request flag indicating that the variation of the first ornament symbol is started is set. (Step S816C). Then, for example, a value corresponding to 0.5 seconds is set in the decorative symbol switching timer for determining the switching timing of the lighting LED (step S816D). Thereafter, the process proceeds to step S817.

  If the first symbol variation request flag is not set (corresponding to the case where the second symbol variation request flag is set), the second symbol variation request flag is reset (step S816E). A second decorative symbol variation request flag indicating that variation is to be started is set (step S816F). Then, for example, a value corresponding to 0.5 seconds is set in the decorative symbol switching timer (step S816G). Thereafter, the process proceeds to step S817.

  Next, it is confirmed whether or not the display result specifying command reception flag is set (step S817). If the display result specifying command reception flag is not set, the process proceeds to step S830. When the display result specifying command reception flag is set, the display result (stop pattern) of the effect symbol is displayed according to the data stored in the display result specifying command storage area (that is, the received display result specifying command). Determination is made (step S818).

  FIG. 99 is an explanatory diagram showing an example of the stop symbol of the effect symbol in the effect display device 9. In the example shown in FIG. 99, when the received display result specifying command indicates a normal jackpot (when the received display result specifying command is a display result 2 designation command), the effect control CPU 101 uses the stop design as a stop symbol. A combination of effect symbols in which the left middle right symbol is an even number of symbols (a stop symbol reminiscent of the occurrence of a normal jackpot) is determined. When the received display result specifying command indicates a probable big hit (when the received display result specifying command is a display result 4 designation command), the effect control CPU 101 uses the left middle right symbol as an odd symbol as an odd symbol. The combination of the production symbols arranged in accordance with (the stop symbol that reminds of the occurrence of a probable big hit) is determined. When the received display result specifying command indicates a small hit or suddenly probable big hit (when the received display result specifying command is a display result 3 specifying command or a display result 5 specifying command), the presentation control CPU 101 A combination of “135” (a stop symbol reminiscent of occurrence of a small hit or suddenly probable big hit) is determined as a left middle right production symbol as a stop symbol. And in the case of detachment (when the received display result specifying command is a display result 1 designation command), a combination of effect symbols other than the above is determined. However, when a reach effect is involved, a combination of effect symbols with left and right aligned is determined. Note that the combination of the left, middle, and right effect symbols derived and displayed on the effect display device 9 is the “stop symbol” of the effect symbol.

  If the game control microcomputer 560 is configured to transmit a dedicated variation pattern command according to the type of jackpot, the effect control CPU 101 does not depend on the display result command in step S818. You may make it determine the stop symbol of an effect symbol based on the received fluctuation pattern command.

  The effect control CPU 101 extracts, for example, a random number for determining the stop symbol, and uses the stop symbol determination table in which the data indicating the combination of effect symbols and numerical values are associated with each other to generate the stop symbol of the effect symbol. decide. That is, the stop symbol is determined by selecting data indicating the combination of effect symbols corresponding to the numerical value matching the extracted random number.

  As for the effect symbols, a stop symbol that recalls a big hit is called a big hit symbol. In addition, a stop symbol reminiscent of a probable big hit is called a probable big hit symbol, and a stop symbol reminiscent of a normal big hit is called a normal big hit symbol. A stop symbol that suddenly recalls a probable big hit is called a sudden probable big hit symbol, and a stop symbol that recalls a small hit is called a small hit symbol. And a stop symbol that reminds of a loss is called a loss symbol.

  Further, the effect control CPU 101 resets the display result specifying command reception flag (step S819). Next, a process table corresponding to the variation pattern is selected (step S833). Then, the process timer in the process data 1 of the selected process table is started (step S834).

  FIG. 100 is an explanatory diagram of a configuration example of the process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the effect display device 9 in accordance with the data set in the process table. In this embodiment, in addition to the process table used for the normal game effect shown in FIG. 100, a notification process table (notification process table) used when notifying various gaming states such as error notification. Is prepared. The notification process table will be described later.

  The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. In the display control execution data, data indicating each variation aspect constituting the variation aspect during the variable display time (variation time) of the variable display of the effect symbols is described. Specifically, data relating to the change of the display screen of the effect display device 9 is described. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table and performs control to display the effect design in the variation mode set in the display control execution data for the time set in the process timer set value.

  The process table shown in FIG. 100 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern.

  FIG. 101 is an explanatory diagram showing an example of lamp control contents executed in response to process data (including notification process data) when each production control command is received. As shown in FIG. 101, for example, when the effect control CPU 101 receives a jackpot end 1 designation command and sets the gaming state to the normal state, the center decoration lamps 125a to 125f and the stage lamp on the gaming board 6 are displayed. Control is performed so that only 126a to 126f are lit. Then, while the game state is the normal state, an effect is made such that only the center decoration lamps 125a to 125f and the stage lamps 126a to 126f on the game board 6 are turned on.

  In addition, for example, when the game control CPU 101 receives a jackpot end 2 designation command and changes the gaming state to a certain change state, the center decoration lamps 125a to 125f and the stage lamps 126a to 126f on the gaming board 6 are turned on. In addition, each lamp (excluding the dish lamp) 281a to 281l, 282a to 282e, and 283a to 283e on the game frame 11 side is controlled to blink at a predetermined time interval (for example, 1 second). While the game state is in the probable state, in addition to the lighting of the center decoration lamps 125a to 125f and the stage lamps 126a to 126f on the game board 6, each lamp (excluding the dish lamp) 281a to 281a to the game frame 11 side. An effect is made such that 281l, 282a to 282e, and 283a to 283e blink at a predetermined time interval (for example, 1 second).

  For example, when the big hit start designation command is received and the big hit is made, the effect control CPU 101 causes the center decoration lamps 125a to 125f and the stage lamps 126a to 126f on the game board 6 to blink and the game frame. The 11-side lamps (excluding the dish lamp) 281a to 281l, 282a to 282e, and 283a to 283e are flashed at a time interval (for example, 0.5 seconds) faster than the probability variation state. By performing such an effect, compared to when the gaming state is in the probable state, by flashing more lamps at a faster time interval than in the probable state, compared to when in the promising state when the big hit occurs Can produce a more flashy impression.

  In addition, when the effect control CPU 101 receives an input port data designation command in which a random number error designation bit is set and performs random number error notification, each lamp (excluding the dish lamp) 281a to 281a on the game frame 11 side. An effect is made to light up 281l, 282a to 282e, and 283a to 283e. When an input port data designation command in which the full tank error designation bit is set is received and a full tank error notification is made, an effect of blinking the pan lamps 82a to 82d is performed. When receiving an input port data designation command in which the door opening error designation bit is set and notifying the door opening error, each lamp (except for the dish lamp) 281a to 281l, 282a to 282e, An effect of blinking 283a to 283e is performed. When an input port data designation command in which the ball-out error designation bit is set is received and a ball-out error notification is made, an effect of blinking the top frame lamps 281a to 281l on the game frame 11 side is performed. When an input port data designation command in which the payout error designation bit is set is received and a payout error notification is made, an effect is performed such that the top frame lamps 281a to 281l on the game frame 11 side blink. When an abnormal winning notification designation command is received and an abnormal winning notification is made, an effect is made such that the top frame lamps 281a to 281l on the game frame 11 side are blinked.

  In this embodiment, even when the input port data designation command cannot be received (for example, when the input port data designation command is not transmitted because the power supply to the gaming machine is stopped). Even if the door opening error notification is made based on the input of the door opening signal via the backup power supply circuit 506 of the main board 31, each lamp (excluding the dish lamp) 281a on the game frame 11 side is also provided. -281l, 282a to 282e, 283a to 283e are flashed.

  In addition, when the effect control CPU 101 receives an input port data designation command in which the prize ball count designation bit is set and performs a prize ball payout notification, the left prize ball lamp 51a on the game frame 11 side and the right prize are displayed. An effect of blinking the ball lamp 51b is performed.

  The production control CPU 101 determines that any of the error flags (random number error flag, full tank error notification flag, door open error notification flag, ball out error notification flag, payout error notification flag) is not set. Control of the effect device (the effect display device 9 as an effect part and the speaker 27 as an effect part) is executed according to the contents of 1 (display control execution data 1, sound number data 1) (steps S835A and S835B). For example, a command is output to the VDP 109 in order to display an image according to the variation pattern on the effect display device 9. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  In addition, the effect control CPU 101 executes serial setting processing in order to control various lamps as effect components in accordance with the lamp control execution data 1 (step S835C). For example, when the gaming state is the normal state, the effect control CPU 101 sets lamp control signals for lighting only the center decoration lamps 125a to 125f and the stage lamps 126a to 126f in a predetermined data storage area. . Further, when the gaming state is a probable change state, the center decoration lamps 125a to 125f and the stage lamps 126a to 126f are turned on, and all the lamps provided on the game frame 11 side (the dish lamp and the prize ball lamp are turned on). Except) Lamp control signals for lighting 281a to 281l, 282a to 282e, and 283a to 283e are set in a predetermined data storage area. The lamp control signal set in step S835C is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, the effect control CPU 101 performs control so that the effect symbol is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  If any one of the error flags is set, the rendering device is controlled in accordance with the contents of the process data 1 excluding the sound number data 1 and the lamp control execution data 1 (steps S835A and S835D). In other words, when any error flag is set, when a new variable display of the effect symbol is started, the sound effect corresponding to the variable display and the display effect by the lamp are not executed. The sound output and lamp display effects according to various error notifications (random error notification, full tank error notification, door opening error notification, ball break error notification, payout error notification) are continued.

  In addition, when performing the process of step S835D, the CPU 101 for effect control does not simply output a command based on the display control execution data 1 to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. That is, control is performed such that the display at that time (error notification is made) on the effect display device 9 and the image of the display effect of the variable display of the effect symbol are simultaneously displayed on the effect display device 9. That is, when any error flag is set, when a new variable display of the production symbol is started, not only the display production according to the variable display is executed, but various error notifications are performed. The notification according to is continued.

  Then, a value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S836), and the value of the effect control process flag is set to a value corresponding to the effect symbol variation process (step S802). (Step S837).

  In step S830, it is confirmed whether or not a variation pattern command that can be used for both a normal big hit and a probable big hit is received. In this embodiment, as shown in FIG. 26, the fluctuation pattern commands of “reach C / shortening”, “reach C”, and “super reach A” are usually used for both big hits and probable big hits. This is a variable pattern command. Therefore, the CPU 101 for effect control receives the variation pattern command that can be used for both the normal big hit and the probable big hit when the data indicating those fluctuation pattern commands is stored in the fluctuation pattern command storage area. It is determined that When it is determined that the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the stop symbol as the normal big hit symbol (step S832). In addition, when it is determined that a variation pattern command other than the variation pattern command that can be used for both a normal big hit and a probable big hit is received, the stop symbol is a combination of effect symbols according to the received variation pattern. (Step S831). In this embodiment, a variation pattern command other than the variation pattern command that can be used for both a normal jackpot and a probable variation jackpot is used at the time of losing or is used according to the type of jackpot ( (See FIG. 26). Therefore, when the variation control command 101 other than the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the deviation based on the received variation pattern command. It is possible to specify whether it is determined to be a big hit or a small hit, and if it is determined to be a big hit, the type of the big hit can be specified.

  As described above, the effect control microcomputer 100 receives the variation pattern command that can be used for both the normal big hit and the probable big hit, and when the display result specifying command cannot be received, Since the display result (stop symbol) is determined to be a normal jackpot symbol, it is possible to make the player recognize whether or not a specific gaming state occurs even if the display result specifying command cannot be received. In addition, by including information that can specify the display result of the effect symbol in the variation pattern command, the effect control microcomputer 100 can display the display result specifying command without using a command other than the variation pattern command and the display result specifying command. Since the display result of the effect symbol can be determined even if it cannot be received, the types of commands transmitted by the game control microcomputer 560 do not increase, and as a result, the control burden on the game control microcomputer 560 does not increase.

  FIG. 102 is a flowchart showing the effect symbol changing process (step S802) in the effect control process. In the effect symbol changing process, the effect control CPU 101 checks whether or not the decoration symbol stop request flag is set (step S840). If the decorative symbol stop request flag is set, the process proceeds to step S848.

  In this embodiment, the decorative symbol stop request flag is set when the first symbol variation designation command or the second symbol variation designation command is received during the variation of the ornament symbol (steps S616B, S616C, S616F in FIG. 85). , S616G). The fact that the first symbol variation designation command or the second symbol variation designation command was received during the variation of the decorative symbol means that the display result should be derived and displayed after the variation of the effect symbol and the decorative symbol was originally terminated. For some reason (for example, the noise on the signal line between the main board 31 and the effect control board 80 causes the effect control microcomputer 100 to not receive the symbol confirmation command), the effect design and the decorative design fluctuate. It means that it has continued.

  Therefore, when the decorative symbol stop request flag is set, the process proceeds to step S848 in order to immediately stop the variation of the effect symbol and the decorative symbol.

  When the decorative symbol stop request flag is not set, the effect control CPU 101 subtracts 1 from the value of the process timer (step S841) and subtracts 1 from the value of the variation time timer (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844).

  In addition, any of the error flags (random number error flag, full tank error notification flag, door opening error notification flag, ball run out error notification flag, payout error notification flag) is not set. Based on the display control execution data and the sound number data, the control state of the effect display device 9 as the effect device is changed (steps S845A and S845B).

  In step S845B, the effect control CPU 101 outputs a command to the VDP 109 in order to display an image corresponding to the variation pattern on the effect display device 9, for example. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  Further, the effect control CPU 101 executes serial setting processing in order to control various lamps as effect components according to the lamp control execution data (step S845C). For example, when the gaming state is the normal state, the effect control CPU 101 sets lamp control signals for lighting only the center decoration lamps 125a to 125f and the stage lamps 126a to 126f in a predetermined data storage area. . Further, when the gaming state is a probable change state, the center decoration lamps 125a to 125f and the stage lamps 126a to 126f are turned on, and all the lamps provided on the game frame 11 side (the dish lamp and the prize ball lamp are turned on). Except) Lamp control signals for lighting 281a to 281l, 282a to 282e, and 283a to 283e are set in a predetermined data storage area. The lamp control signal set in step S845C is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  When any one of the error flags is set, the rendering device is in accordance with the contents of the process data i (i is any one of 2 to n) (excluding the sound number data i and the lamp control execution data i). Control is executed (steps S845A and S845D). Therefore, when any one of the error flags is set, the sound effect according to the variable display of the effect design and the display effect by the lamp are not executed, but various error notifications (random error notification, full tank error notification) In addition, the sound output and the lamp display effect according to the door opening error notification, the ball breakage error notification, and the payout error notification) are continued.

  Further, when the process of step S845D is performed, the presentation control CPU 101 does not simply output a command based on the display control execution data i to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. . Therefore, when any one of the error flags is set, not only the display effect according to the variable display of the effect symbol is executed, but also the notification according to various error notifications is continued.

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the effect symbol variation stop process (step S803) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the variation time timer has not timed out, if the symbol confirmation designation command is received, the process shifts to control to stop variation.For example, a variation pattern command indicating a long variation time due to noise between substrates is received. Even in such a case, it is possible to end the variation of the effect symbol when the regular variation time has elapsed (when the variation of the special symbol ends).

  FIG. 103 is a flowchart showing the effect symbol variation stop process (step S803) in the effect control process. In the effect symbol variation stop process, the effect control CPU 101 checks whether or not the decoration symbol stop request flag is set (step S850). If the decorative symbol stop request flag is set, the decorative symbol stop request flag is reset (step S850A), and the process proceeds to step S853.

  If the decorative symbol stop request flag is not set, it is confirmed whether or not the confirmed command reception flag is set (step S851). If the confirmation command reception flag is set, the confirmation command reception flag is reset (step S852), and the process proceeds to step S853.

  If it is confirmed in the determination process in step S851 that the confirmation command reception flag is not set, the variation time measured by the effect control CPU 101 has elapsed, but the symbol confirmation designation command has not been received. The effect design variation continues until the symbol confirmation designation command is received. In such a case, the effect control CPU 101 changes the effect design variation mode by shaking fluctuation (each effect design is varied up and down or left and right). It is preferable to display in a recognizable manner that the variation time has passed but has not yet been determined, such as by changing the display mode to a repetitive display of enlargement and reduction.

  In step S853, control for deriving and displaying a stop symbol is performed according to data (data indicating the stop symbol) stored in the effect symbol display result storage area. In addition, a decorative symbol variation end flag is set (step S853A). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  When it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S804) (step S855).

  If it is determined not to win, the effect control CPU 101 checks whether or not the time reduction state flag is set (step S856). The short time state flag is set when the gaming state is a short time state (see step S886 described later). If the time reduction state flag is set, the value of the time reduction variation counter is incremented by 1 (step S857).

  Then, the production control CPU 101 confirms whether or not the value of the time-varying variation number counter is 100 (step S858). If the value of the hour / short fluctuation counter is 100, the hour / short state flag is reset (step S859). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S860).

  In this embodiment, the effect control microcomputer 100 ends the effect symbol variation (variable display) on the condition that the symbol confirmation designation command is received (see steps S851 and S853). However, when the variation time timer based on the received variation pattern command times out, control may be performed to end the variation of the effect symbol without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  FIG. 104 is a flowchart showing the jackpot display process (step S804) in the effect control process. In the jackpot display process, the effect control CPU 101 checks whether or not the jackpot start 1-4 designation command reception flag indicating that any of the jackpot start 1-4 designation commands has been received is set (step S871). If any one of the big hit start 1 to 4 designation command reception flags is set, control is performed to display a game start screen corresponding to the set flag on the effect display device 9 (step S872). Further, the set flag (one of the big hit start 1-4 designation command reception flags) is reset (step S873). Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805) (step S874).

  In step S872, if the big hit start 2 designation command is received, the production control CPU 101 performs a control to display a screen for informing the start of the small hit game on the production display device 9. Further, when the big hit start 4 designation command is received, control is performed to display a screen for informing the start of the sudden probability change big hit game on the effect display device 9. When the jackpot start 1 designation command or the jackpot start 3 designation command is received, a screen for informing the start of the jackpot game (a screen for informing the start of the jackpot game and a notice of the start of the sudden probability change jackpot game) Control is performed to display on the effect display device 9.

  FIG. 105 is a flowchart showing the big hit end process (step S806) in the effect control process. In the jackpot end process, the effect control CPU 101 checks whether or not the jackpot end effect timer is set (step S880). If the big hit end effect timer is set, the process proceeds to step S885. If the jackpot end effect timer is not set, a jackpot end designation command reception flag (a jackpot end 1 designation command reception flag or a jackpot end 2 designation command reception flag) indicating that the jackpot termination designation command has been received is set. It is confirmed whether or not there is (step S881). When the jackpot end designation command reception flag is set, the jackpot end designation command reception flag is reset (step S882), and a value corresponding to the jackpot end display time is set in the jackpot end presentation timer (step S883). Then, the effect display device 9 is controlled to display a jackpot end screen (screen for notifying the end of the jackpot game) (step S884). Specifically, an instruction to display the big hit end screen is given to the VDP 109.

  In this embodiment, even if the type of jackpot is different, the same jackpot end screen is displayed on the effect display device 9. In this embodiment, the big hit end display and the small hit end display are the same. However, the big hit end display and the small hit end display may be divided according to the type of the big hit.

  In step S885, 1 is subtracted from the value of the big hit end effect timer. Then, the effect control CPU 101 checks whether or not the value of the jackpot end effect timer is 0, that is, whether or not the jackpot end effect time has elapsed (step S886). If not, the process ends. If it has elapsed, the time reduction state flag is set (step S887), and the time reduction number counter is set to 0 (step S888). If the jackpot end 1 designation command is received, the probability variation state flag is reset (steps S889 and S891). When the jackpot end 1 designation command has not been received (when the jackpot end 2 designation command has been received), the probability variation state flag is set (steps S889, S890). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S892).

  The probability variation state flag and the time reduction state flag are used, for example, when the effect control CPU 101 notifies the probability variation state and the time reduction state by the background or each lamp in the effect display device 9.

  FIG. 106 is a flowchart showing a first decorative symbol display control process in the effect control main process shown in FIG. In the first decorative symbol display control process, the effect control CPU 101 checks whether or not the first decorative symbol changing flag is set (step S1881). If the first decorative symbol variation flag is set, the process shifts to step S1885. If the first decorative symbol variation flag is not set, it is confirmed whether or not the first decorative symbol variation request flag is set (step S1882). If the first decorative symbol variation request flag is set, the first decorative symbol variation request flag is reset (step S1883), and the first decorative symbol variation flag is set (step S1884).

  In step S1885, it is confirmed whether the decorative symbol variation end flag is set. The decorative symbol variation end flag is set in step S853A (see FIG. 103). If the decorative symbol variation end flag is set, the decorative symbol variation end flag is reset (step S1886), and the display result is displayed on the first decorative symbol display unit 9a according to the data stored in the decorative symbol display result storage area. Is derived and displayed (step S1891), and the first decorative symbol variation flag is reset (step S1892).

  If the decorative symbol change end flag is not set, the value of the decorative symbol switching timer is decremented by 1 (step S1887). If the value of the decorative symbol switching timer is 0 (step S1888), that is, if it is the lighting LED switching timing, the LED to be lit in the first decorative symbol display 9a is switched (step S1889), and the decorative symbol is switched. For example, a value corresponding to 0.5 seconds is reset in the switching timer (step S1890).

  By the control as described above, the LEDs that are turned on in the first decorative symbol display 9a are switched every 0.5 seconds, for example, and variable display of the first decorative symbol is realized.

  Note that the program of the second decorative symbol display control process (step S707) is configured in the same manner as the first decorative symbol display control process. That is, in the above description of the first decorative symbol display control process, if “first” is read as “second”, the second decorative symbol display control process will be described.

  107 to 109 are flowcharts showing the hold storage display control process in the effect control main process. In the hold memory display control process, the effect control CPU 101 stores the data in the sum hold memory number storage area in which the second byte data (EXT data) of the sum hold memory number designation command is stored in the sum hold memory number counter. It is confirmed whether or not the value is larger than the value (step S2901). If the data in the total pending storage number storage area is not larger than the value of the total pending storage number counter, the process proceeds to step S2941.

  The fact that the data in the total pending storage count storage area is larger than the value of the total pending storage count counter means that a new total pending storage count designation command has been received. When the power is turned on, the value of the total pending storage number counter is 0 by the initialization process in step S701.

  When the data in the total reserved memory number storage area is larger than the value of the total reserved memory number counter, whether or not the production control CPU 101 has a power failure recovery flag indicating that a power failure recovery designation command has been received is set. Confirmation is made (step S2902). If the power failure recovery flag is set, the power failure recovery flag is reset (step S2903), and the number of stars corresponding to the data (value) in the total pending storage number storage area is displayed in the total pending storage display unit 18c. It is displayed (step S2904). That is, the number of star images stored in the total reserved storage number storage area is displayed (see FIG. 94C).

  In addition, the production control CPU 101 sets the data of the total reserved memory number storage area in the unknown start winning memory number counter (step S2905). The unknown start winning memory number counter is a counter formed in the RAM, and is a counter for counting the number of reserved memories that are unknown whether the reserved memory corresponding to the first starting prize or the reserved memory corresponding to the second starting prize is unknown. It is. Hereinafter, the reserved memory in which the reserved memory corresponding to the first start prize or the reserved memory corresponding to the second start prize is unknown is referred to as unknown reserved memory.

  Further, in the total pending storage table, the number of data corresponding to the data (value) in the total pending storage number storage area is changed to data indicating “unknown” (step S2906). The total hold storage table is a table formed in the RAM, and whether each hold storage is a hold storage corresponding to the first start prize, a hold memory corresponding to the second start prize, or whether it is unknown. This is a table in which data indicating is set.

  Then, the data in the total pending storage number storage area is set in the total pending storage number counter (step S2907).

  When the power failure recovery flag is not set, the effect control CPU 101 checks whether or not the first start winning flag indicating that the first start winning designation command has been received is set (step S2909). If the first start winning flag is set, the first starting winning flag is reset (step S2910), the number of circles displayed in the total pending storage display unit 18c is increased by 1, and the increased circle is displayed in red. Control is performed (step S2911). Also, the value of the first start winning counter is incremented by 1 (step S2912), and the data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “first” in the total pending storage table (step S2912). S2913). For example, if the data in the total pending storage number storage area is “5”, the fifth data in the total pending storage table is set to data indicating “first”. That is, the data corresponding to the increased reserved storage is set to data indicating “first”.

  Then, it is confirmed whether or not the value of the first start winning counter has reached the upper limit “4” (step S2914). If it is not “4”, the process proceeds to step S2907. If it is “4”, it is confirmed whether or not the value of the unknown start winning counter is 0 (step S2915). If the value of the unknown start winning counter is 0, the process proceeds to step S2907. If the value of the unknown start winning counter is not 0 at this stage, it means that the number of unknown reserved memories indicated by the value of the unknown start winning counter is actually a reserved memory based on the second start winning prize. Because the upper limit number of the first reserved memory number is 4 and the value of the first start winning counter is 4, other reserved memories (the number of reserved memories exceeding 4) are the first start winning prizes. This is because it is not based on the reserved memory. That is, the other reserved memory is a reserved memory based on the second start winning prize.

  Therefore, when the value of the unknown start winning counter is not 0, the effect control CPU 101 changes the star displayed on the total pending storage display unit 18c to a green circle corresponding to the second start winning. (Step S2916). Further, the data indicating “unknown” in the total pending storage table is changed to data indicating “second” (step S2917). Further, the value of the unknown start winning counter is set to 0 (step S2918), and the value of the second starting winning counter is updated (step S2919). In step S2919, the value of the unknown starting winning counter before being set to 0 is added to the value of the second starting winning counter. Then, control goes to a step S2907.

  By performing such control, an abnormality occurs in the transmission / reception of the production control command, an unknown hold memory is generated, and when the display corresponding to the unknown hold memory is displayed on the total hold memory display unit 18c, the display is normal. Display can be restored.

  If the first start winning flag is not set, it is confirmed whether or not the second starting winning flag is set (step S2921). If the second start winning flag is not set, the process proceeds to step S2931. If the second start winning flag is set, the second starting winning flag is reset (step S2922), the number of circles displayed in the total pending storage display unit 18c is increased by 1, and the increased circle is displayed. Control is performed to display green (step S2923). Further, the value of the second start winning counter is incremented by 1 (step S2924), and the data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “second” in the total pending storage table (step S2924). S2925).

  Then, it is confirmed whether or not the value of the second start winning counter has reached the upper limit “4” (step S2926). If it is not “4”, the process proceeds to step S2935. If it is “4”, it is confirmed whether or not the value of the unknown start winning counter is 0 (step S2927). If the value of the unknown start winning counter is 0, the process proceeds to step S2935. When the value of the unknown start winning counter is not 0, the effect control CPU 101 changes the star displayed on the summation pending storage display unit 18c to a red circle corresponding to the first start winning (step). S2928). Further, the data indicating “unknown” in the total pending storage table is changed to data indicating “first” (step S2929). Further, the value of the unknown start winning counter is set to 0 (step S2930), and the value of the first starting winning counter is updated (step S2934). In step S2934, the value of the unknown start winning counter before being set to 0 is added to the value of the first starting winning counter. Then, control goes to a step S2935.

  In step S2935, the data in the total pending storage number storage area is set in the total pending storage number counter.

  In step S2931, control is performed so that the number of displays in the total suspension storage display unit 18c is increased by 1, and the increased display is displayed in blue. Further, the value of the unknown start winning counter is incremented by 1 (step S2932), and the data corresponding to the data (value) in the total reserved storage number storage area is set to data indicating “unknown” in the total pending storage table (step S2933). . Then, control goes to a step S2935.

  In step S2941, the effect control CPU 101 confirms whether or not the total pending storage number subtraction designation command reception flag is set. If the total pending storage count subtraction designation command reception flag is set, the total pending storage count subtraction designation command reception flag is reset (step S2942), and the circle displayed most recently on the total pending storage display section 18c is displayed. Alternatively, control is performed so that the star mark is erased and each circle mark or star mark is shifted to the side of the erased circle mark or star mark (step S2943). Then, it is confirmed whether or not the oldest data in the summation pending storage table is data indicating “first” (step S2944). If the data indicates “first”, the value of the first start winning counter is − 1 (step S2945). Furthermore, in order to erase the oldest data in the total pending storage table, the data in the total pending storage table is shifted (step S2951). Also, the value of the total pending storage number counter is decremented by -1 (step S2952), and the value of the total pending storage number counter is set in the total pending storage number storage area (step S2953).

  If the oldest data in the summation pending storage table is not data indicating “first”, it is confirmed whether or not it is data indicating “second” (step S2946). If the data indicates “second”, the value of the second start winning counter is decremented by 1 (step S2947). Then, control goes to a step S2951. If the oldest data in the summation pending storage table is not data indicating “second”, the value of the unknown start winning counter is decremented by 1 (step S2948). Then, control goes to a step S2951.

  By the control as described above, the red circle is incremented by 1 when the first start winning designation command and the total pending storage designation command are received in the total pending storage display unit 18c, and the second start winning designation command and the total are displayed. Control is executed to increase the green circle by 1 when a pending storage number designation command is received. Further, when the total pending storage number designation command is received but neither the first start prize designation command nor the second start prize designation command is received, control for increasing the blue circle by one is realized. When the total pending storage number subtraction designation command is received, the circle or star displayed in the total pending storage display unit 18c is decremented by one.

  110 to 112 are explanatory diagrams illustrating an example of data set in the total pending storage table and a display example of the total pending storage display unit 18c.

  FIG. 110A illustrates an example of the case where the process of step S2913 is executed. That is, an example is shown in the case where the reserved memory based on the first start winning memory is increased. FIG. 110B shows an example of the case where the process of step S2933 is executed. That is, an example is shown in which it is unclear whether the first start winning memory or the second starting winning memory is based, but the reserved memory increases. FIG. 30C shows an example in which the processes in steps S2913 and S2916 are executed. That is, an example is shown in which the hold memory based on the first start winning memory is increased and the value of the first start winning counter is “4”.

  FIG. 111D illustrates an example in which the process of step S2951 is executed. That is, an example in which the data in the total pending storage table is shifted to delete the oldest data in the total pending storage table based on the reception of the total pending storage number subtraction designation command. FIG. 111E shows an example of the case where the processes of steps S2904 and S2906 are executed. That is, based on the receipt of the total pending storage number designation command together with the power failure recovery designation command, a number of stars corresponding to the data (value) in the total pending storage number storage area is displayed on the total pending storage display unit 18c, An example in which the number of pieces of data corresponding to the data (value) in the total reserved storage number storage area is set as data indicating “unknown” in the total pending storage table.

  FIG. 111 (F) shows an example of the case where the combined pending storage number designation command is received after receiving the combined pending storage count designation command together with the power failure recovery designation command. In the example shown in FIG. 111 (F), after the total pending storage number designation command is received together with the power failure recovery designation command, the total pending storage number designation command is received together with the second start prize designation command, and the processes of steps S2923 and S2925 are performed. It is an example when it is executed.

  When the total pending storage number designation command is received together with the power failure recovery designation command, the data as shown on the left side of FIG. 111 (F) is set in the total pending storage table, and the total pending storage display unit 18c displays the data shown in FIG. The display shown on the left side of 111 (F) is made. Thereafter, when a total pending storage number designation command is received together with the second start winning designation command, the regular second startup is performed in the total pending storage display portion 18c. Display about winning (display of NO5) is made.

  FIG. 112 (G) shows an example of a case where a combined pending storage number designation command is received after receiving a combined pending storage count designation command together with a power failure recovery designation command. In the example shown in FIG. 112 (G), after receiving the combined pending storage number designation command together with the power failure recovery designation command, the combined pending storage number designation command is received together with the first start prize designation command, and the processing of steps S2911 and S2913 is performed. It is an example when it is executed.

  When the total pending storage number designation command is received together with the power failure recovery designation command, the data as shown on the left side of FIG. 112 (G) is set in the total pending storage table, and the total pending storage display unit 18c displays the data shown in FIG. 112 (G) is displayed as shown on the left side, and then when the total pending storage number designation command is received together with the first start winning designation command, the total pending storage display unit 18c performs the normal first startup. Display about winning (display of NO5) is made.

  FIG. 112 (H) received the total pending storage number designation command together with the second start prize designation command in the state shown on the left side of FIG. 112 (H) (the same as the state shown on the right side of FIG. 112 (G)). An example of the case is shown. In this case, as shown on the right side of FIG. 112 (H), a display for the regular second start winning (NO6 display) is made.

  As described above, after the total pending storage number designation command is transmitted together with the power failure recovery designation command, display capable of specifying the first pending memory number and the second pending memory number can be normally performed.

  Next, the notification control process process in step S710 will be described. First, various error notification modes executed in the notification control process will be described. FIG. 113 is an explanatory diagram showing an example of various error notifications and prize ball payout notifications executed in the notification control process. As shown in FIG. 113, the door opening error notification is executed while the glass door frame 2 or the mechanism plate 11A is opened (for example, while the detection signal of the door opening sensor 155 is input). When performing the door opening error notification, the effect control microcomputer 100 performs control to blink all the lamps (excluding the dish lamp and the prize ball lamp) 281a to 281l, 282a to 282e, and 283a to 283e on the game frame 11 side. . In addition, control is performed so that a predetermined error sound (for example, a beep sound) is output to the speaker 27 together with a sound “door is open”.

  Further, the ball break error notification is executed from the occurrence of a ball break until the ball break state is canceled (for example, while a detection signal of a ball break switch is input). The effect control microcomputer 100 performs control of blinking the top frame lamps 281a to 281l on the game frame 11 side when notifying the ball break error. The full tank error notification is executed from the occurrence of the full tank state of the lower pan until the full tank state is canceled (for example, while the detection signal of the full tank switch is input). When performing the full tank error notification, the production control microcomputer 100 performs control to cause the tray lamps 82a to 82d on the game frame 11 side to blink and to output a sound “the bottom plate is full”. In addition, the effect display device 9 is controlled to display “The bottom plate is full”. In this case, when display by the game effect (for example, variable display of the effect symbol) is performed on the effect display device 9, the character string “bottom plate is full” is superimposed on the effect display device 9. .

  Also, the payout error notification is executed from the occurrence of the payout error until the payout error state is canceled. When performing the payout error notification, the effect control microcomputer 100 performs control to blink the top frame lamps 281a to 281l on the game frame 11 side. Further, the random number error notification is executed until the power is turned off after the random number error is detected when the gaming machine is turned on. When performing random number error notification, the effect control microcomputer 100 lights all the lamps 281a to 281l, 282a to 282e, and 283a to 283e on the game frame 11 side, as well as a predetermined number. Control is performed to output an error sound (for example, a beep sound). In addition, control is performed to display “error” on the effect display device 9. In this case, when display by the game effect (for example, variable display of the effect symbol) is performed on the effect display device 9, the character string “error” is superimposed on the effect display device 9.

  The prize ball payout notification is executed during a period in which the prize ball payout is being executed. However, since the end point of the prize ball payout notification is determined based on the prize ball count designation bit in the input port data designation command by the effect control microcomputer 100, it is slightly delayed from the end point of the actual prize ball payout. . When performing the prize ball payout notification, the effect control microcomputer 100 blinks the left prize ball lamp 51a and the right prize ball lamp 51b on the game frame 11 side and outputs a predetermined notification sound (prize ball payout notification sound). To control.

  Also, the abnormal winning notification is executed from the occurrence of the abnormal winning until the power is turned off. When performing the abnormal winning notification, the production control microcomputer 100 lights all the lamps 281a to 281l, 282a to 282e, and 283a to 283e on the game frame 11 side, and performs predetermined operations. Control is performed to output an error sound (for example, a beep sound). In addition, the effect display device 9 is controlled to display “a winning error has occurred”. In this case, when display by the game effect (for example, variable display of the effect symbol) is performed on the effect display device 9, the character string “a winning error has occurred” is superimposed on the effect display device 9. .

  FIG. 114 is a flowchart showing the notification control process (step S710) in the main process shown in FIG. In the notification control process, the effect control CPU 101 performs one of steps S1900 and S1901 according to the value of the notification control process flag. In each process, the following process is executed.

  The notification start process (step S1900) includes an initial notification flag set in the command analysis process, each error flag (random number error flag, full tank error notification flag, payout error notification flag, out of ball error notification flag) and prize ball payout notification flag. This is a process for starting notification of an error or the like based on the above. When the notification is started, the value of the notification control process flag is changed to a value corresponding to the processing during notification (step S1901).

  The in-notification process (step S1901) continues the notification based on the initial notification flag, each error flag (random number error flag, full tank error notification flag, payout error notification flag, ball runout error notification flag) and the winning ball payout notification flag. It is processing to do. Further, the notification is ended based on the error notification release flag set in the command analysis process or based on the fact that the prize ball payout notification flag is reset. When the notification is finished, the value of the notification control process flag is changed to a value corresponding to the notification start process (step S1901).

  115 and 116 are flowcharts showing the notification start processing (step S1900) in the notification control process. In the notification start process, the production control microcomputer 100 first checks whether or not the initial notification flag is set (step S1911). The initial notification flag is set when an initialization designation command (power-on designation command, power failure restoration designation command) is received from the game control microcomputer 560 (see steps S632B and S635 in FIG. 88). If set, the production control microcomputer 100 sets a value corresponding to the initial notification period value in the period timer 1 (step S1912). The initial notification period is a period in which initialization notification is performed in response to reception of an initialization designation command. The production control microcomputer 100 ends the initialization notification when the initial notification period elapses.

  If the initial notification flag is not set, the production control microcomputer 100 checks whether or not the door opening error notification flag is set (step S1913). If set, the production control microcomputer 100 selects notification process data corresponding to the door opening error (step S1914). In this embodiment, a notification process table (notification process) for controlling the speaker 27 and the lamps 281a to 281l, 282a to 282e, 283a to 283e, 51a, 51b, and 82a to 82d when performing various notifications. Table) is prepared in advance. The notification process table will be described later.

  Next, the production control microcomputer 100 starts a notification process timer (step S1915) and controls the speaker 27 according to the content of the notification process data 1 (step S1916). For example, the production control microcomputer 100 controls the speaker 27 so as to output a predetermined error sound (for example, a beep sound) together with a sound such as “the door is open”.

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1917). For example, the production control microcomputer 100 generates lamp control signals for blinking all the lamps 281a to 281l, 282a to 282e, and 283a to 283e provided in the game frame 11. Set to a predetermined data storage area. The lamp control signal set in step S1917 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604. Then, control goes to a step S1949.

  In this embodiment, even when the power supply to the gaming machine is stopped, the effect control microcomputer 100 and the game frame 11 are provided from the backup power supply circuit 383 mounted on the effect control board 80. Power is supplied to the lamps 281a to 281l, 282a to 282e, and 283a to 283e. Therefore, even when the power supply to the gaming machine is stopped, the production control microcomputer 100 will at least play a game if the opening of the door (the glass door frame 2 or the mechanism plate 11A) is detected. The lamps 281a to 281l, 282a to 282e, and 283a to 283e provided on the frame 11 are blinked to notify a door opening error. Note that the power supply from the backup power supply circuit 383 may not be supplied to the effect control microcomputer 100 when the power supply to the gaming machine is stopped. In this case, for example, the door detection signal from the door opening switch 155a is not input to the effect control microcomputer 100 via the main board 31, and the lamps 281a to 281l, 282a to 282e, and 283a to 283e are used as they are. Even if the power supply to the gaming machine is stopped by connecting directly to the terminal (amplifying the voltage as necessary so that the lamp and LED can be turned on) The lamps 281a to 281l, 282a to 282e, and 283a to 283e may be blinked to notify a door opening error. By doing so, the power consumption can be reduced as compared with the case where the production control microcomputer 100 is continuously operated. Therefore, the capacity of the battery and the capacitor can be reduced, and the cost can be reduced.

  If the door opening error notification flag is not set, the production control microcomputer 100 checks whether or not the random number error flag is set (step S1918). If set, the production control microcomputer 100 performs control to display a random number error display screen indicating that it is a random number error on the production display device 9 (step S1919). Next, the production control microcomputer 100 selects a notification process table corresponding to the random number error (step S1920). Next, the production control microcomputer 100 starts the notification process timer (step S1921) and controls the speaker 27 according to the content of the notification process data 1 (step S1922). For example, the production control microcomputer 100 controls the speaker 27 so as to output a predetermined error sound (for example, a beep sound).

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1923). For example, the production control microcomputer 100 generates lamp control signals for blinking all the lamps 281a to 281l, 282a to 282e, and 283a to 283e provided in the game frame 11. Set to a predetermined data storage area. The lamp control signal set in step S1923 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604. Then, control goes to a step S1949.

  If the random error flag is not set, the production control microcomputer 100 confirms whether or not the prize ball payout notification flag is set (step S1924). If set, the production control microcomputer 100 selects a notification process table corresponding to the prize ball payout notification (step S1925). Next, the production control microcomputer 100 starts a notification process timer (step S1926) and controls the speaker 27 according to the content of the notification process data 1 (step S1927). For example, the production control microcomputer 100 controls the speaker 27 so as to output a predetermined prize ball payout notification sound.

  In this embodiment, when notifying that the winning ball is being paid out, notification is performed using the speaker 27 in addition to the lamp. However, only the notification processing using the lamp is performed and the speaker 27 is used. The notification process using the sound that has been heard may not be performed.

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the left prize ball lamp 51a and the right prize ball lamp 51b (step S1928). For example, the effect control microcomputer 100 sets lamp control signals for lighting the left prize ball lamp 51a and the right prize ball lamp 51b provided in the game frame in a predetermined data storage area. The lamp control signal set in step S1928 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Are output to the frame side IC substrates 603 and 604. Then, control goes to a step S1949.

  If the winning ball payout notification flag is not set, the production control microcomputer 100 checks whether or not the full tank error notification flag is set (step S1929). If it is set, the production control microcomputer 100 performs control to display a full tank error display screen on the production display device 9 indicating a full tank error (step S1930). Next, the production control microcomputer 100 selects a notification process table corresponding to the full tank error (step S1931). Next, the production control microcomputer 100 starts a notification process timer (step S1932) and controls the speaker 27 according to the content of the notification process data 1 (step S1933). For example, the production control microcomputer 100 controls the speaker 27 so as to output a sound such as “the bottom plate is full”.

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1934). For example, the effect control microcomputer 100 sets lamp control signals for blinking the dish lamps 82a to 82d provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1934 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. To the frame-side IC substrate 605.

  If the full tank error notification flag is not set, the production control microcomputer 100 checks whether or not the payout error notification flag is set (step S1935). If set, the production control microcomputer 100 selects a notification process table corresponding to the payout error (step S1936) and starts a notification process timer (step S1937).

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1938). For example, the effect control microcomputer 100 sets a lamp control signal for blinking the top frame lamps 281a to 281l provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1938 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  In this embodiment, when a payout error is notified, only the notification process using the lamp is performed and the notification process using the speaker 27 is not performed. However, the speaker 27 is used in addition to the lamp. You may make it perform notification which was.

  If the payout error notification flag is not set, the production control microcomputer 100 checks whether or not the ball break error notification flag is set (step S1939). If set, the production control microcomputer 100 selects a notification process table corresponding to the ball break error (step S1940) and starts a notification process timer (step S1941).

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1942). For example, the effect control microcomputer 100 sets a lamp control signal for blinking the top frame lamps 281a to 281l provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1942 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using a sound using the speaker 27 is not performed when a ball break error is notified will be described. The used notification may be performed.

  If the ball break error notification flag is not set, the production control microcomputer 100 checks whether or not the abnormal winning notification designation command reception flag is set (step S1943). If set, the production control microcomputer 100 performs control to display an abnormal winning display screen indicating that an abnormal winning has occurred on the presentation display device 9 (step S1944). Next, the production control microcomputer 100 selects a notification process table corresponding to the abnormal winning (step S1945). Next, the production control microcomputer 100 starts the notification process timer (step S1946) and controls the speaker 27 according to the content of the notification process data 1 (step S1947). For example, the production control microcomputer 100 controls the speaker 27 so as to output a sound such as “a winning error has occurred”.

  Next, the production control microcomputer 100 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282e, 283a to 283e, and 82a to 82d. (Step S1948). For example, the effect control microcomputer 100 sets lamp control signals for blinking the dish lamps 82a to 82d provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1948 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. To the frame-side IC substrate 605.

  In step S1949, the production control microcomputer 100 changes the value of the notification control process flag to a value corresponding to the processing during notification (step S1901), and ends the processing.

  117 to 119 are flowcharts showing the notification process (step S1901) in the notification control process. In the notification process, the production control microcomputer 100 first checks whether or not the initial notification flag is set (step S1960). The initial notification flag is set when an initialization designation command (power-on designation command, power failure restoration designation command) is received from the game control microcomputer 560 (see steps S632B and S635 in FIG. 88). If the initial notification flag is not set, the process proceeds to step S1965. If the initial notification flag is set, the value of the timer 1 set in step S1912 is decremented by 1 (step S1961). When the value of the period timer 1 becomes 0, that is, when the initial notification period has elapsed, the initial notification flag is reset (steps S1962, S1963). If the value of the period timer 1 is not 0, the process is terminated as it is. Thus, in this embodiment, the initial notification period (abnormal winning notification prohibition period) is configured to be measured on the production control microcomputer 100 side.

  Further, the effect control microcomputer 100 outputs a command for erasing the initial screen or the power failure recovery screen in the effect display device 9 to the VDP 109 (step S1964). The VDP 109 erases the initial screen or the power failure recovery screen from the effect display device 9 according to the command. Then, the process proceeds to step S2010.

  If the initial notification flag is not set, the production control microcomputer 100 checks whether or not the door opening error notification flag is set (step S1965). If not set, the process proceeds to step S1971. If set, the production control microcomputer 100 decrements the notification process timer by 1 (step S1966) and switches the notification process data when the notification process timer times out (step S1967). That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S1968).

  FIG. 120 is an explanatory diagram of a configuration example of a notification process table. The notification process table is a table in which process data to be referred to when the presentation control microcomputer 100 performs various notifications by controlling the presentation device. In other words, the production control microcomputer 100 controls the speaker 27 and each lamp according to the data set in the notification process table, and performs notification such as error notification. The notification process table is composed of data obtained by collecting a plurality of combinations of process timer set values, notification lamp control execution data, and notification sound number data. In the process timer set value, the duration in the sound output state and the lamp display state is set. The effect control microcomputer 100 refers to the notification process table, and controls the lighting / non-lighting state of each lamp in a manner set in the lamp display control execution data for the time set in the process timer set value. At the same time, the sound output using the speaker 27 is controlled.

  The notification process table shown in FIG. 120 is stored in the ROM of the effect control board 80. In addition, the notification process table is prepared according to the type of error (random number error, full tank error, door opening error, ball break error, payout error, abnormal winning error). Further, in this embodiment, every time the notification process timer times out, the lighting of the pattern A and the lighting of the pattern B are switched, and the lighting or blinking is controlled.

  Next, the production control microcomputer 100 controls the speaker 27 based on the notification sound number data (step S1969). In step S1969, the production control microcomputer 100 outputs sound data indicating sound output corresponding to the corresponding notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control microcomputer 100 causes the speaker 27 to output a sound “the door is open” and a predetermined error sound (for example, a beep sound).

  Further, the production control microcomputer 100 executes serial setting processing in order to control each lamp corresponding to the corresponding error notification in accordance with the notification lamp control execution data (step S1970). For example, in step S1970, the effect control microcomputer 100 causes all the lamps (excluding the dish lamp and the prize ball lamp) 281a to 281l, 282a to 282e, and 283a to 283e provided on the game frame 11 side to blink. Are set in a predetermined data storage area. The lamp control signal set in step S1970 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, even when the power supply to the gaming machine is stopped, the effect control microcomputer 100 and the game frame 11 are provided from the backup power supply circuit 383 mounted on the effect control board 80. Power is supplied to the lamps 281a to 281l, 282a to 282e, and 283a to 283e. Therefore, even when the power supply to the gaming machine is stopped, the production control microcomputer 100 will at least play a game if the opening of the door (the glass door frame 2 or the mechanism plate 11A) is detected. The lamps 281a to 281l, 282a to 282e, and 283a to 283e provided on the frame 11 are blinked to notify a door opening error.

  If the door opening error notification flag is not set, the production control microcomputer 100 checks whether or not the random number error flag is set (step S1971). If set, the production control microcomputer 100 decrements the notification process timer (step S1972), and when the notification process timer times out (step S1973), switches the notification process data. That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S1974).

  Next, the production control microcomputer 100 controls the speaker 27 based on the notification sound number data (step S1975). In step S1975, the production control microcomputer 100 outputs sound data indicating sound output corresponding to the corresponding notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control microcomputer 100 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the production control microcomputer 100 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the notification lamp control execution data (step S1976). For example, in step S1976, the production control microcomputer 100 turns on all the lamps (excluding the dish lamp and the prize ball lamp) 281a to 281l, 282a to 282e, and 283a to 283e provided on the game frame 11 side. Are set in a predetermined data storage area. The lamp control signal set in step S1976 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the random error flag is not set, the production control microcomputer 100 checks whether or not the abnormal winning notification designation command reception flag is set (step S1977). If set, the production control microcomputer 100 decrements the notification process timer by 1 (step S1978) and switches the notification process data when the notification process timer times out (step S1979). That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S1980).

  Next, the production control microcomputer 100 controls the speaker 27 based on the notification sound number data (step S1981). In step S 1981, the production control microcomputer 100 outputs sound data indicating sound output corresponding to the corresponding notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control microcomputer 100 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the production control microcomputer 100 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the notification lamp control execution data (step S1982). For example, in step S1982, the production control microcomputer 100 turns on all the lamps (excluding the dish lamp and the prize ball lamp) 281a to 281l, 282a to 282e, and 283a to 283e provided on the game frame 11 side. Are set in a predetermined data storage area. The lamp control signal set in step S1982 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the abnormal winning notification designation command reception flag is not set, the production control microcomputer 100 checks whether or not the winning ball payout notification flag is set (step S1983). If not set, the process proceeds to step S1993. If set, the value of the prize ball count designation monitoring timer is decremented by 1 (step S1984). If the prize ball count designation monitoring timer times out (step S1985), the prize ball payout notification flag is reset (step S1991), and control is performed to turn off the left prize ball lamp 51a and the right prize ball lamp 51b (step S1991). Step S1992). Specifically, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion ICs 613 and 614. Then, the process proceeds to step S2010.

  If the award ball count designation monitoring timer has not timed out, the notification process timer is decremented by 1 (step S1986). When the notification process timer has timed out (step S1987), the notification process data is switched. That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S1988).

  Next, the production control microcomputer 100 controls the speaker 27 based on the notification sound number data (step S1989). In step S1989, the production control microcomputer 100 outputs sound data indicating sound output corresponding to the prize ball payout notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control microcomputer 100 controls the speaker 27 so as to output a predetermined prize ball payout notification sound.

  Further, the production control microcomputer 100 executes serial setting processing in order to control each lamp in accordance with the notification of winning ball payout in accordance with the notification lamp control execution data (step S1990). In step S1990, the effect control microcomputer 100 sets a lamp control signal for turning on or off the prize ball lamps 51a and 51b provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S1990 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the winning ball payout notification flag is not set, the production control microcomputer 100 checks whether or not the full tank error notification flag is set (step S1993). If not set, the process proceeds to step S1999. If set, the production control microcomputer 100 decrements the notifying process timer (step S1994), and when the notifying process timer times out (step S1995), switches the notifying process data. That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S1996).

  Next, the production control microcomputer 100 controls the speaker 27 based on the notification sound number data (step S1997). In step S1997, the production control microcomputer 100 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control microcomputer 100 causes the speaker 27 to output a sound “the bottom plate is full”.

  Further, the production control microcomputer 100 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the notification lamp control execution data (step S1998). For example, in step S1998, the effect control microcomputer 100 sets a lamp control signal for blinking the pan lamps 82a to 82d in a predetermined data storage area. The lamp control signal set in step S1998 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the full tank error notification flag is not set, the production control microcomputer 100 checks whether or not the payout error notification flag is set (step S1999). If not set, the process proceeds to step S2004. If it is set, the production control microcomputer 100 decrements the notification process timer (step S2000), and when the notification process timer times out (step S2001), switches the notification process data. That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S2002).

  Further, the production control microcomputer 100 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the notification lamp control execution data (step S2003). For example, in step S2003, the effect control CPU 101 sets lamp control signals for blinking the top frame lamps 281a to 281l provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2003 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the payout error notification flag is not set, the production control microcomputer 100 confirms whether or not the ball-out error notification flag is set (step S2004). If not set, the process proceeds to step S2009. If set, the production control microcomputer 100 decrements the notification process timer (step S2005) and switches the notification process data when the notification process timer times out (step S2006). That is, the process timer setting value set next in the notification process table is set in the notification process timer (step S2007).

  Further, the production control microcomputer 100 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the notification lamp control execution data (step S2008). For example, in step S2008, the production control microcomputer 100 sets a lamp control signal for blinking the top frame lamps 281a to 281l provided on the game frame 11 side in a predetermined data storage area. The lamp control signal set in step S2008 is output to the serial output circuit 353 in the serial input / output process (step S711) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, as shown in FIG. 113, when notifying a ball break error or payout error, no sound is output from the speaker 27, but when notifying a ball break error or payout error. Alternatively, sound output control using the speaker 27 may be performed.

  In step S2009, the production control microcomputer 100 checks whether or not an error notification release flag is set. If it is set, the process proceeds to step S2010. If it is not set, the process is terminated as it is. In step S2010, the production control microcomputer 100 changes the value of the notification control process flag to a value corresponding to the notification start process (step S1900), and ends the process. Note that changing the value of the notification control process flag to a value corresponding to the notification start process (step S1900) means that error notification is immediately stopped, but at that time, various error notification modes (FIG. 113) is returned to the original state. If the error notification release flag is set, the error notification flag is also reset, so if the decorative symbol change is being executed at that time, it is subject to the condition that no other error notification flag is set. The aspects of the effect display device 9, various lamps, and the speaker 27 return to the aspect corresponding to the variation pattern (see steps S845A to S845C in FIG. 102).

  Various notifications are executed by executing the processing as described above. In addition, the random number error notification is performed from the game control microcomputer 560 by the effect control command transmitted first except for the power-on designation command and the power failure recovery designation command after the power supply to the gaming machine is started. Since the random number error is notified to 100, the priority is highest regardless of the control order.

  In this embodiment, when another error occurs while a certain error notification is being executed (including the case where a plurality of errors occur simultaneously), the error notification mode is set to other error. The error notification mode may be changed. For example, when the door open error notification flag is set during the execution of the full tank error notification, the error notification mode becomes the door open error notification mode (in the program, prior to the processing of steps S1993 to S1998). Since the process of step S1965 is configured to be executed). In that case, the production control microcomputer 100 switches the notification process table to be used. Also, the error notification mode does not change, and error notification for other errors may be started after the currently executed error notification ends. For example, when the ball full error notification flag is set while the full tank error notification is being executed, the full tank error notification is continued, and after the full tank error notification ends, the error notification about the ball full error starts. (Since the program is configured so that the process of step S2004 is not executed when the process of steps S1993 to S1998 is executed. In addition, during the error notification being executed, Because the error notification flag remains set).

  However, when another error occurs while a certain error notification is being executed, the error notification mode may be changed to the error notification mode for other errors at all times. In such a control, when it is determined “N” in step S1960, the production control microcomputer 100 determines that all error notification flags (random number error flag, door opening error notification flag, full tank error notification flag, Whether or not a full tank error notification flag and an abnormal winning notification designation command reception flag) are set is confirmed. Further, as an error notification mode, in addition to an error notification mode when each error occurs independently (see FIGS. 113 and 121), an error notification mode when a plurality of types of errors occur is defined. . For example, error notification mode when only door opening error occurs, error notification mode when door opening error and random number error occur, error notification when door opening error, random number error and full error occur The mode of error notification when a door opening error, a random number error, a full tank error, and a ball breakage error occur is defined. For other errors, in addition to an error notification mode when an error occurs independently, an error notification mode when one or more other errors are generated is defined. Data indicating these error modes is stored as a table in the ROM, for example. The effect control microcomputer 100 selects an error notification mode with reference to a table corresponding to the set one or more error notification flags. Then, error notification based on the selected error notification mode is executed. When any error notification flag is reset during execution of error notification corresponding to a plurality of errors, the error notification mode is changed to the error notification mode except for the error corresponding to the error notification flag. Change to

  In this embodiment, the setting / resetting of the winning ball payout notification flag is also determined by the notification control process. However, the winning ball payout based on the set / reset of the winning ball payout notification flag and the setting of the winning ball is set. Notification control may be executed by processing different from the notification control process.

  Next, a lamp control signal set in a predetermined data storage area according to the notification lamp control execution data will be described. FIG. 121 is an explanatory diagram showing an example of a lamp control signal output by a serial signal method in the notification control process. As shown in FIG. 121, in this embodiment, notification lamp control execution data of two patterns (pattern A and pattern B) is used for each type of notification. In this embodiment, the blinking display of the lamp is controlled by switching and using the notification lamp control execution data for the pattern A and the pattern B. Further, the production control microcomputer 100 stores the lamp control signal shown in FIG. 121 in a predetermined lamp control signal storage area provided in advance in the ROM in association with the notification lamp control execution data. Then, the production control microcomputer 100 extracts a lamp control signal from a predetermined lamp control signal storage area based on the notification lamp control execution data, and outputs it to the serial output circuit 353.

  Further, as shown in FIG. 121, each lamp control signal is stored in a predetermined lamp control signal storage area with the addresses of the output destination serial-parallel conversion ICs 611 to 615 added thereto. For example, since the address of the serial-parallel conversion IC 611 that supplies a control signal to some of the lamps 281a to 281f among the ceiling lamps is “01”, the address “ “0001” is added. In addition, since the address of the serial-parallel conversion IC 612 that supplies the control signal to the other lamps 281g to 281l among the ceiling lamps is “02”, the 8-digit data body for controlling the lamp is included. The address “0010” is added and stored. Further, since the address of the serial-parallel conversion IC 613 that supplies the control signal to the lamps 283a to 283e of the right frame lamp and the right prize ball lamp 51b is “03”, the address of the 8-digit data body for controlling the lamp is addressed. Stored with “0011” added. Further, since the address of the serial-parallel conversion IC 614 that supplies the control signal to the lamps 282a to 282e of the left frame lamp and the left prize ball lamp 51a is “04”, the address of the 8-digit data body for controlling the lamp is addressed. Stored with “0100” added.

  When a random number error is notified, as shown in FIG. 121, the control data body is “00111111” or “00011111” in each of the serial-parallel conversion ICs 611 to 614 whose addresses are “01” to “04”. A lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting each lamp are all 1 is output, and all the lamps (excluding dish lamps and prize ball lamps) 281a to 281a provided on the game frame 11 side. 281l, 282a to 282e, 283a to 283e are turned on.

  When notifying the door opening error, as shown in FIG. 121, first, based on the pattern A notification lamp control execution data, the serial-parallel conversion ICs 611 to 611 having addresses from “01” to “04”. A lamp control signal whose control data body is “00111111” or “00011111” is transmitted to 614. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting each lamp are all 1 is output, and all the lamps (excluding dish lamps and prize ball lamps) 281a to 281a provided on the game frame 11 side. 281l, 282a to 282e, 283a to 283e are turned on. Further, when the process data is switched, the control data body is “00000000” in each serial-parallel conversion IC 611 to 614 whose addresses are “01” to “04” based on the lamp control execution data for notification of pattern B. A lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting each lamp are all 0 is output, and all the lamps 281a to 281l, 282a to 282e, 283a to 283e provided on the game frame 11 side are output. Turns off. When notifying the door opening error by repeatedly performing such control, all the lamps 281a to 281l, 282a to 282e, 283a to 283e provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying the payout error, as shown in FIG. 121, first, the control data body is “00111111” in the serial-parallel conversion IC 611 whose address is “01” based on the notification lamp control execution data for pattern A. Is transmitted, and the lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 612 whose address is “02”. That is, a lamp control signal in which the logical values of the bits corresponding to some of the LEDs constituting the ceiling lamp are all 1 is output, and only the ceiling lamps 281a to 281f provided on the game frame 11 side are turned on. . At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 611 whose address is “01” based on the notification lamp control execution data for pattern B, and the address is A lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion IC 612 of “02”. That is, a lamp control signal in which the logical values of the bits corresponding to some other LEDs of the ceiling lamp are all 1 is output, and constitutes another part of the ceiling lamp provided on the game frame 11 side. Only the LED is lit. When notifying a payout error by repeating such control, the top frame lamps 281a to 281f and the top frame lamps 281g to 281l provided on the game frame 11 side are alternately blinked at predetermined time intervals. Control is performed.

  When notifying the ball break error, as shown in FIG. 121, first, serial-parallel conversion ICs 611 and 612 having addresses “01” and “02” based on the notification lamp control execution data for pattern A, respectively. In addition, a lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting the ceiling lamp are all 1 is output, and the ceiling lamps 281a to 281l provided on the game frame 11 side are turned on. In addition, when the process data is switched, the serial data to the serial-parallel conversion ICs 611 and 612 having the addresses “01” and “02” and the control data body “00000000” based on the lamp control execution data for the pattern B notification. A control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting the ceiling lamp are all 0 is output, and the ceiling lamps 281a to 281l provided on the game frame 11 side are turned off. When such a control is repeatedly performed to notify a ball-out error, control is performed such that only the top frame lamps 281a to 281l provided on the game frame 11 side blink at predetermined time intervals.

  In the case of notifying a full tank error, as shown in FIG. 121, first, based on the notification lamp control execution data for pattern A, the control data body is “00001111”. Lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the dish lamps 82a to 82d are all 1 is output, and the dish lamps 82a to 82d are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 whose address is “05” based on the notification lamp control execution data for pattern B. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting the dish lamp are all 0 is output, and the dish lamps 82a to 82d are turned off. When such a control is repeatedly performed to notify a full tank error, control is performed so that only the pan lamps 82a to 82d blink at a predetermined time interval.

  In the ramp control signal output to the serial-parallel conversion IC 615, the first bit is an input signal to the lamp 82a, the second bit is an input signal to the lamp 82b, the third bit is an input signal to the lamp 82c, 4 The bit corresponds to the input signal to the lamp 82d, and the fifth bit corresponds to the input signal to the lamp 83.

  When notifying the winning ball payout, as shown in FIG. 121, a lamp control signal whose control data body is “00100000” is sent to each serial-parallel conversion IC 613, 614 with addresses “03” and “04”. Sent. That is, a lamp control signal having a logical value of 1 corresponding to the LEDs constituting the prize ball lamp is output, and the left prize ball 51a and the right prize ball lamp 51b provided on the game frame 11 side are turned on.

  At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted based on the notification lamp control execution data for pattern B. That is, a lamp control signal in which the logical value of the bit corresponding to the LED constituting the prize ball lamp is 0 is output, and the left prize ball 51a and the right prize ball lamp 51b provided on the game frame 11 side are turned off.

  When notifying the abnormal winning, as shown in FIG. 121, first, based on the notification lamp control execution data for pattern A, the serial-parallel conversion ICs 611 and 612 having addresses “01” and “02” are first notified. The lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting the ceiling lamp are all 1 is output, and the ceiling lamps 281a to 281l provided on the game frame 11 side are turned on. In addition, when the process data is switched, the serial data to the serial-parallel conversion ICs 611 and 612 having the addresses “01” and “02” and the control data body “00000000” based on the lamp control execution data for the pattern B notification. A control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs constituting the ceiling lamp are all 0 is output, and the ceiling lamps 281a to 281l provided on the game frame 11 side are turned off. When such a control is repeatedly performed to notify a ball-out error, control is performed such that only the top frame lamps 281a to 281l provided on the game frame 11 side blink at predetermined time intervals.

  In the example shown in FIG. 121, the lamp control signal is also supplied to the serial-parallel conversion ICs 611 to 615 of lamps that are not subject to display control when performing notification. By doing so, it is possible to reliably turn off the lamp that is not the control target at the time of error notification.

  However, when performing various notifications, the lamp control signal may not be output (transmitted) to the serial-parallel conversion ICs 611 to 615 of the lamps that are not subject to display control.

  Next, the serial setting process will be described. FIG. 122 is a flowchart illustrating an example of the serial setting process. The serial setting process is performed, for example, when effect display variable display is performed in the effect control process (see steps S835C and 845C) or when various notifications are made (steps S1917, S1923, S1928, S1941, S1945, S1949, S1970). , S1976, S1983, S1998, S2003, S2008). Here, the control of the movable members 151 to 153 is also referred to.

  In the serial setting process, the effect control CPU 101 first reads out lamp control execution data (such as lamp lighting pattern data accompanying the variation pattern, motor control data (step S835C only), etc.) from the ROM (step S950). In this case, for example, when performing the serial setting process during the execution of the variable display of the effect symbol, the effect control CPU 101 reads the lamp control execution data in the process table shown in FIG. When serial setting processing is performed in the notification control process, notification lamp control execution data in the notification process table shown in FIG. 120 is read.

  Next, the effect control CPU 101 confirms whether or not there is a change in the display state of each lamp based on the read lamp control execution data (step S951). If the display state of each lamp is changed, the CPU 101 for effect control extracts the lamp control signal to which the address of the serial-parallel conversion IC of the lamp to be displayed is added from a predetermined lamp control signal storage area ( Step S952). Next, the header data (1FF (H)), mark bit, and end bit shown in FIG. 20 are added to the extracted ramp control signal, and a predetermined data storage area provided in the RAM is set (step S953). Then, a lamp control signal output request flag is set (step S954).

  For example, when the serial setting process is executed in steps S907, S922, and S929 in the notification control process, one of the addressed lamp control signals shown in FIG. 121 is read in step S952, and the data is read in step S953. It will be set in the storage area.

  Next, the effect control CPU 101 reads display control execution data from the ROM (step S955). In this case, for example, when the serial setting process is performed during execution of variable display of the effect symbol, the effect control CPU 101 reads display control execution data of the process table shown in FIG. On the other hand, when the serial setting process is performed in the notification control process, since the display control execution data is not included in the notification process table shown in FIG. 120, N is determined as it is in the next step S956. Become.

  Next, the effect control CPU 101 confirms whether or not the movable effect of any of the movable members 151 to 153 is included in the game effect based on the read display control execution data (step S956). When the movable members 151 to 153 are movable, the effect control CPU 101 adds a motor control signal to which the address (“06” in this example) of the serial-parallel conversion IC of the movable members 151 to 153 to be moved is added. Are extracted from a predetermined motor control signal storage area (step S957). Next, the header data (1FF (H)), mark bit, and end bit shown in FIG. 20 are added to the extracted motor control signal, and a predetermined data storage area provided in the RAM is set (step S958). Then, a motor control signal output request flag is set (step S959).

  FIG. 123 is an explanatory diagram showing a configuration example of a data storage area in which a lamp control signal and a motor control signal to be output are set. In this example, nine data storage areas for storing the lamp control signal or the motor control signal are prepared, and the lamp control signal and the motor are sequentially output to the panel side IC substrate 601 and the frame side IC substrates 602 to 605. Control signals are sequentially stored in step S953.

  FIG. 124 is a flowchart illustrating a specific example of the serial input / output process (step S711). In the serial input / output process, the production control CPU 101 first checks whether the lamp control signal output request flag or the motor control signal output request flag is set (step S970). If set, the lamp control signal output request flag or the motor control signal output request flag is reset (step S971), and the lamp control signal and the motor control signal stored in the data storage area are transferred to the serial output circuit 353. Output (step S972). In this case, when a plurality of lamp control signals are set in the data storage area, the effect control CPU 101 sequentially reads each lamp control signal and outputs it to the serial output circuit 353 in step S972. The output lamp control signal and motor control signal are converted into serial data by the serial output circuit 353 and serially transmitted to the board side IC board 601 and the frame side IC boards 602 to 605 via the relay boards 606 and 607. It will be output in the signal system.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the board side IC substrate 601 via the relay substrates 606 and 607 (step S973). The input IC 621 mounted on the panel-side IC board 601 latches the detection signals of the position sensors 151b, 152b, 153b based on the input input signal being input, and relays boards 606, 607 in a serial signal system. Is output to the effect control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S974). In step S974, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying the time by which the serial input circuit 354 receives the input data from the input IC 621.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the frame side IC substrate 605 via the relay substrate 607 (step S975). The input IC 620 mounted on the board-side IC board 605 latches the detection signals of the operation buttons 81a to 81e based on the input input signal being input, and produces the effect via the relay board 607 in a serial signal system. The data is output to the control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S976). In step S976, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying by the time for which the serial input circuit 354 receives the input data from the input IC 620.

  As described above, according to this embodiment, the door opening switch 155a for detecting whether or not the door (the glass door frame 2 or the mechanism plate 11A) is opened and the power supply to the gaming machine are stopped. Even if it exists, the backup power supply 505 which can supply electric power to the door opening switch 155a is provided. Further, even if the power supply to the gaming machine is stopped based on the detection that the door (the glass door frame 2 or the mechanism plate 11A) is opened by the door opening switch 155a, the predetermined first 2 is provided with an information terminal board 34 capable of outputting a door opening signal indicating that the opening of the second frame has been detected to an external device (for example, a hall computer) provided outside the gaming machine 1. Therefore, it is possible to effectively prevent an illegal act performed by opening the door (glass door frame 2 or mechanism plate 11A). Further, the game control microcomputer 560 determines that an abnormal winning has occurred based on the fact that a winning detection signal is input from the count switch 23 in a gaming state other than the big hit gaming state. Then, the production control microcomputer 100 executes abnormality notification indicating that the abnormal winning has occurred, based on the determination that the abnormal winning has occurred. Therefore, it is possible to effectively prevent an illegal act that generates an illegal prize without opening the door (the glass door frame 2 or the mechanism plate 11A). Therefore, the illegal act performed by opening the door (glass door frame 2 or mechanism plate 11A) provided in the gaming machine is prevented and the illegal winning is performed without opening the door (glass door frame 2 or mechanism plate 11A). It is possible to prevent fraud that generates

  In addition, according to this embodiment, the information terminal board 34 is provided with semiconductor relays (PhotoMOS relays) PC1 to PC9, and the semiconductor relays PC1 to PC9 are in a case where power supply to the gaming machine 1 is stopped. Even if it exists, it drives with the electric power supplied from the backup power supply 505. FIG. Therefore, an illegal signal input to the information terminal board 34 can be prevented.

  Further, according to this embodiment, when power supply to the gaming machine 1 is stopped, among the circuits and circuit elements provided in the gaming machine 1, the semiconductor relays PC1 to PC9 provided on the information output board. In other circuits and circuit elements, diodes 506a and 917 for preventing backflow that prevent the current from the backup power supply 505 from flowing back are provided. For this reason, it is possible to prevent the current from being supplied in the reverse direction, and it becomes impossible to detect whether the door (the glass door frame 2 or the mechanism plate 11A) provided in the gaming machine 1 or the gaming frame 11 is opened. The situation can be prevented.

  For example, when the power supply to the gaming machine is stopped by simply providing a backup power source and enabling the relay to be driven even when the power supply is stopped, as in the gaming machine described in JP-A-2006-26032 However, although voltage can be applied to the door opening switch 155a and the game frame opening switch 155b, the backup voltage from the backup power supply 505 is also applied to the power supply board 910 side, and backup power is wasted due to the discharge effect. It will be consumed. Therefore, in this embodiment, the backflow prevention diodes 506a and 917 are provided to prevent a situation in which the backup power from the backup power supply 505 is wasted. In this embodiment, the case where the backflow prevention diode 506a is provided in the backup power supply circuit 506 has been described. However, for example, it may be provided in a portion other than the backup power supply circuit 506 on the main board 31, A relay board may be provided between the main board 31 and the power supply circuit 910 to mount a backflow preventing diode.

  Further, according to this embodiment, the main board 31 on which the game control microcomputer 560 for executing the game control process for controlling the progress of the game is mounted, the ball payout device 97 for paying out the game ball, A payout control board 37 on which a payout control microcomputer 370 for executing a payout control process for controlling the payout device 97 is mounted, a payout number count switch 301 for detecting that a game ball has been paid out by the ball payout device 97, and A single information terminal board 34 that is connected only to the main board 31 and outputs input information to an external device (for example, a hall computer) outside the gaming machine 1 is provided. The game control microcomputer 560 outputs control information generated during the execution of the game control process, and the game is based on the fact that the payout count switch 301 detects that a predetermined number of game balls have been paid out. Control information indicating that the ball has been paid out is output to the information terminal board 34. Therefore, the wiring work for the information terminal board 34 can be facilitated.

  Further, according to this embodiment, the door opening switch 155a outputs a door opening signal when it detects that the glass door frame 2 is opened or the mechanism plate 11A is opened. The information terminal board 34 is connected to the door opening signal from the door opening switch 155 a via the main board 31. Therefore, the wiring work for the information terminal board 34 can be facilitated.

Embodiment 2. FIG.
In the first embodiment, all effect means (variable display device 9, sound output device (speaker) 27 and LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f) has been described, but each rendering means may be controlled using separate control boards. Hereinafter, a sound / lamp control board for controlling the sound output device 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the lamps, and a symbol control board for controlling the variable display device 9 A second embodiment including the above will be described.

  In the present embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from the first embodiment will be mainly described.

  FIG. 125 is a block diagram illustrating a circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the second embodiment. In this embodiment, the circuit mounted on the sound / lamp control board 80b controls the sound output of the sound output device 27, the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282e, 283a to 283e, Display control of 51a and 51b is performed. In addition, the symbol control board 80a performs display control of the effect display device 9. In this embodiment, “effect control” means display control of the effect display device 9, sound output control of the speaker 27, lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282e, 283a. It means performing an effect such as a game effect by performing display control of ˜283e, 51a, and 51b. Further, in this embodiment, the effect control means includes a symbol control microcomputer 100a that performs display control of the effect display device 9, sound output control of the speaker 27, and lamps 125a to 125f, 126a to 126f, 281a to This is realized by the sound / lamp control microcomputer 100b including the sound / lamp control CPU 101b for performing the display control of 281l, 282a to 282e, 283a to 283e, 51a, 51b.

  The sound / lamp control board 80b includes a sound / lamp control microcomputer 100b including a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356, and an input capture signal output unit 357. It is equipped with. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  Further, the sound / lamp control microcomputer 100 b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal for driving the lamp (parallel data) into serial data and outputs the serial data to the relay board 606.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 611 to 615 and the input IC 620 mounted on the frame side IC substrates 602 to 605 via the relay substrate 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 619 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to the serial-parallel conversion ICs 611 to 619 and the input ICs 620 and 621.

  Further, the input capture signal output unit 357 inputs the input capture signal (latch signal) to the board side IC board 601 or the frame side IC boards 602 to 605 via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Is output. The input IC 620 mounted on the frame side IC board 605 latches the detection signals of the operation buttons 81a to 81e when an input input signal from the sound / lamp control microcomputer 100b is input, and relays the board 606 in a serial signal system. , 607 to the sound / lamp control microcomputer 100b. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b, 152b, and 153b when the input capture signal from the sound / lamp control microcomputer 100b is input, and the serial signal And output to the sound / lamp control microcomputer 100b via the relay substrate 606.

  Further, the sound / lamp control microcomputer 100b outputs sound number data to the speech synthesis IC 173. The voice synthesizing IC 173 generates a voice or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data showing the output form of the sound effect or sound in a time series in a predetermined period (for example, the changing period of the effect design).

  The signal for driving the lamp and the sound number data are transmitted bidirectionally (a response signal is transmitted from the signal receiving side to the transmitting side) between the sound / lamp controlling microcomputer 100b, the lamp driver 352, and the voice synthesis IC 173. Communication).

  In this embodiment, the sound / lamp control board 80b is mounted with a real time clock (RTC) 381 for outputting the current time. The sound / lamp control microcomputer 100b receives from the real-time clock 381 a date signal indicating the current date (year, month, day, day of the week) and a time signal indicating the current time (hour, minute, second). Various processes are executed based on the date and time. The real-time clock 381 normally operates with power from the gaming machine when power is supplied to the gaming machine, and when the gaming machine is turned off, the backup power supply circuit mounted on the sound / lamp control board 80b. The power supply is supplied from 383 (for example, a battery). Therefore, the real time clock 381 can measure the current date and time even when the gaming machine is turned off. Note that the real-time clock 381 may be operated by power supplied from the backup power supply circuit 383 even when power is supplied to the gaming machine.

  The power of the backup power supply circuit 383 is also supplied to the backup RAM 382 mounted on the sound / lamp control board 80b. That is, the backup RAM 382 is normally supplied with power from the gaming machine when power is supplied to the gaming machine, and back-up power source mounted on the sound / lamp control board 80b when the gaming machine is powered off. Power is supplied from the circuit 383. Note that the backup RAM 382 may be supplied with power from the backup power supply circuit 383 even when power is supplied to the gaming machine.

  In this embodiment, the power of the backup power supply circuit 383 is also supplied to the sound / lamp control microcomputer 100b mounted on the sound / lamp control board 80b when the power of the gaming machine is turned off. Is done. Therefore, in this embodiment, the sound / lamp control microcomputer 100b can be operated by the power supply from the backup power supply circuit 383 even when the gaming machine is turned off after the game shop is closed. it can. In this embodiment, the door opening signal from the door opening switch 155a passes through the symbol control board 80a via the main board 31 and the symbol control board 80a (without being input to the symbol control microcomputer 100a). And input to the sound / lamp control board 80b. Therefore, in this embodiment, for example, the sound / lamp control microcomputer 100b receives a detection signal from the door opening switch 155a even when the power of the gaming machine is turned off. A process of notifying that the LED of each lamp is lit and that the door is in an open state (the glass door frame 2 and the mechanism plate 11A being in an open state) is executed.

  In this embodiment, the power source of the backup power supply circuit 383 is a sound / lamp control microcomputer 100b, a real time clock 383, a backup RAM 382, and the minimum necessary circuits and elements such as LEDs of each lamp (for example, effect display). (Except for the liquid crystal display device such as the device 9). By doing so, the power supply to the sound / lamp control microcomputer 100b, the real-time clock 383, and the backup RAM 382 can be continued until the game store is closed until the next morning (for example, 12 hours). To do.

  In this embodiment, the case where the real-time clock 381, the backup RAM 382, and the backup power supply circuit 383 are mounted on the sound / lamp control board 80b is shown, but it may be mounted on the symbol control board 80a.

  The symbol control board 80a is equipped with a symbol control microcomputer 100a including a symbol control CPU 101a and RAM. The RAM may be externally attached. In the symbol control board 80a, the symbol control microcomputer 100a operates in accordance with a program stored in a built-in or external ROM (not shown). Further, the symbol control microcomputer 100a performs display control of the effect display device 9 using the LCD on the VDP (video display processor) 109 based on the effect control command received from the main board 31 via the relay board 77. Let it be done.

  The symbol control microcomputer 100a reads necessary data from a character ROM (not shown) in accordance with the effect control command received from the game control microcomputer 560. The character ROM stores character image data frequently used among the images displayed on the effect display device 9, specifically, people, characters, figures, symbols, etc. (including effect symbols) in advance. Is. The symbol control microcomputer 100 a outputs the data read from the character ROM to the VDP 109. The VDP 109 performs display control of the effect display device 9 based on data input from the symbol control microcomputer 100a.

  In this embodiment, the VDP 109 that performs display control of the effect display device 9 is mounted on the symbol control board 80a. The VDP 109 has an address space independent of the symbol control microcomputer 100a, and maps a VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP. Then, the VDP 109 outputs the image data in the VRAM to the effect display device 9.

  Further, the symbol control microcomputer 100 a transmits (transfers) an effect control command (a variation pattern command or a display result designation command) from the main board 31 to the sound / lamp control board 80 b via the input / output port 104.

  FIG. 126 shows a configuration example of the symbol control board 80a, the sound / lamp control board 80b, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, and 605 in the second embodiment. FIG. The sound / lamp control microcomputer 100b of the sound / lamp control board 80b (specifically, the sound / lamp control CPU 101b) outputs a clock signal to the relay board 607 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and clock signal input from the sound / lamp control microcomputer 100b to the serial-parallel conversion ICs 616 to 619 mounted on the board side IC board 601. And each serial-parallel conversion IC616-619 converts the input serial data into parallel data, and each lamp 125a-125f, 126a-126f, 127a-127c provided in the game board 6, and each movable member The motors 151a to 151c are supplied.

  Further, the relay board 607 is connected to the relay board 606 through a single wiring route in a bus type. The serial data line 300 and the clock signal line 301 connected to each of the serial-parallel conversion ICs 616 to 619 are connected on the board side IC substrate 601 in a bus form.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the sound / lamp control microcomputer 100b mounted on the board-side IC board 601 are connected to the input signal line, the clock signal line 301, and the input capture signal line 303 via the relay board 606. Is connected. The sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it.

  As shown in FIG. 104, the serial data and clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 611 to 615 mounted on the frame side IC boards 602 to 605, respectively. And each serial-parallel conversion IC611-615 converts the input serial data into parallel data, and each lamp 281a-281l, 282a-282e, 283a-283e, 82a-82d, 83 provided in the game frame 11 is provided. To supply.

The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 611 to 614 are connected in a bus format on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 126, first, the serial-parallel conversion IC 614 of the frame-side IC board 604 is input, and the serial-parallel conversion IC 614 and the serial-parallel conversion IC 611 and the serial-parallel of the frame-side IC board 602 are input. The signals are input in the order of the parallel conversion IC 612, and further input from the serial-parallel conversion IC 612 to the serial-parallel conversion IC 613 of the frame side IC substrate 603. The serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion IC 615 are directly connected from the relay substrate 607.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81 a to 81 e provided on the game frame 11 is mounted on the frame side IC board 605. In this embodiment, the input IC 620 and the sound / lamp control microcomputer 100b mounted on the frame side IC board 605 are connected to the input signal line 302, the clock signal line 301, and the input capture signal line via the relay board 607. 303 is connected. The sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the sound / lamp control microcomputer 100b outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data.

  In this embodiment, addresses are assigned in advance to the serial-parallel conversion ICs 611 to 619. The sound / lamp control microcomputer 100b outputs serial data to which an address is added when outputting a control signal converted into serial data. When each serial-parallel conversion IC 611-619 inputs serial data, it checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. Supply to each lamp. If the addresses do not match, supply to each lamp is not performed.

  FIG. 127 is a block diagram illustrating another circuit configuration example of the relay board 77, the sound / lamp control board 80c, and the symbol control board 80d according to the second embodiment. In the example shown in FIG. 127, the sound / lamp control microcomputer 100b mounted on the sound / lamp control board 80c includes the sound output control of the sound output device 27, the lamps 125a to 125f, 126a to 126f, 281a to 281l, Display control of 282a to 282e, 283a to 283e, 51a, 51b is performed. In addition, the symbol control board 80d performs display control of the effect display device 9. The sound / lamp control microcomputer 100 b receives an effect control command from the main board 31 via the relay board 77.

  The sound / lamp control microcomputer 100b transmits the effect control command received from the main board 31 to the symbol control board 80d via the input / output port 702. The symbol control board 80d is equipped with a symbol control microcomputer 100a including a symbol control CPU 101a and RAM. The symbol control microcomputer 100a causes the VDP (video display processor) 109 to perform display control of the effect display device 9 using the LCD, based on the effect control command received from the sound / lamp control board 80c.

  Other operations are the same as those in the first embodiment or the case shown in FIGS. 125 and 126.

  In each of the embodiments described above, the backup power supply circuit 506 is mounted on the main board 31, and the door open signal from the door open switch 155a is transmitted via the backup power supply circuit 506 mounted on the main board 31. This is input to the terminal board 34, the production control board 80, and the like. By having such a configuration, it is configured to include one information terminal board 34 that is connected only to the main board 31 and outputs input information to an external device (for example, a hall computer) outside the gaming machine 1. Based on the fact that the control microcomputer 560 outputs control information generated during the execution of the game control process and the payout number count switch 301 detects that a predetermined number of game balls have been paid out, the game balls are paid out. When control information indicating that the information has been issued is output to the information terminal board 34, the wiring work for the information terminal board 34 can be facilitated.

  The door open signal from the door open switch 155a and the game frame open signal from the game frame open switch 155b are temporarily input to a board other than the main board 31, and the backup power supply circuit 506 is set to a board other than the main board 31. You may make it mount in.

  For example, as shown in FIG. 128, a backup power supply circuit 506 is mounted on a power supply board 910, and a door open signal from the door open switch 155a and a game frame open signal from the game frame open switch 155b are first input to the power supply board 910. You may comprise as follows. Then, the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are input to the information terminal board 34, the effect control board 80, etc. via the backup power supply circuit 910 of the power supply board 910. You may do it. With such a configuration, the wiring between the power supply substrate 910 and the backup power supply circuit 506 can be eliminated, and the power supply wiring can be simplified.

  For example, as shown in FIG. 129, a backup power supply circuit 506 is mounted on the information terminal board 34, and the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are sent to the information terminal board 34. You may make it input directly into. With such a configuration, it is possible to effectively prevent an illegal act performed by opening the glass door frame 2 and the mechanism plate 11A without complicating the wiring pattern (print pattern) of the main board 31 and the power supply board 910. Can do.

  For example, as shown in FIGS. 130 and 131, when the payout control board 37 is backed up, a backup power supply circuit 506 is mounted on the payout control board 37, and a door open signal from the door open switch 155a and A game frame release signal from the game frame release switch 155 b may be first input to the backup power supply circuit 506 of the payout control board 37. Then, the door open signal from the door open switch 155a and the game frame open signal from the game frame open switch 155b are input to the information terminal board 34, the effect control board 80, etc. via the backup power supply circuit 506 of the payout control board 37. You may make it do. With such a configuration, when signals relating to payout such as prize ball signals are directly input from the payout control board 37 to the information terminal board 34, signals relating to payout such as prize ball signals can be wired together. Also, when a signal relating to payout such as a prize ball signal is input to the information terminal board 34 via the main board 31, the wiring between the payout control board 37 and the main board 31 can be integrated, The handling can be facilitated. In general, the payout control board 37, the door opening switch 155a, and the game frame opening switch 155b are all mounted on the mechanism plate 11A. A game frame release signal from the game frame release switch 155b can be once input to the control board (payout control board 37). Therefore, compared to the case where the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are wired across the front frame 11B, etc., the wiring is accidentally disconnected. Can make it harder to happen.

  In addition, the board on which the backup power supply circuit 506 is mounted and the board that inputs the door opening signal from the game frame opening signal from the door opening switch 155a and the game frame opening switch 155b may be separate boards. For example, when the backup power supply circuit 506 is mounted on the main board 31, the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b are sent to the power supply board 910 other than the main board 31 and the payout control board. 37, the information may be input to the information terminal board 34 or the production control board 80 first. Further, for example, when the backup power supply circuit 506 is mounted on the power supply board 910, the door open signal from the door open switch 155a and the game frame open signal from the game frame open switch 155b are sent to the main board 31 other than the power supply board 910. You may make it input to the control board 37, the information terminal board 34, or the production | presentation control board 80 first. Further, for example, when the backup power supply circuit 506 is mounted on the information terminal board 34, the door opening signal from the door opening switch 155 a and the game frame opening signal from the game frame opening switch 155 b are sent to the main board 31 other than the information terminal board 34. First, the payout control board 37, the power supply board 910, or the effect control board 80 may be input. For example, when the backup power supply circuit 506 is mounted on the payout control board 37, the main board 31 other than the payout control board 37 receives the door open signal from the door open switch 155 a and the game frame open signal from the game frame open switch 155 b. The information terminal board 34, the power supply board 910, or the effect control board 80 may be first input. Further, the backup power supply circuit 506 may be mounted on the effect control board 80. In this case, the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b may be input to the effect control board 80 first, Input may be first made to the board 31, the information terminal board 34, the power supply board 910, or the payout control board 37.

  In each of the embodiments described above, the signal line for the door opening signal from the door opening switch 155a and the game frame opening signal from the game frame opening switch 155b is physically connected directly to the effect control board 80 or the like. In addition, a case has been shown where an effect control command (input port data designation command) including a bit indicating the door open / close state is transmitted to the effect control microcomputer 100 or the like. It may not be included. Then, the production control microcomputer 100 and the like determine whether there is a door opening error based on only the door opening signal directly input via the backup power supply circuit 506 of the main board 31 and notify the door opening error. You may do it.

  In each embodiment described above, the first special symbol process (see step S27A) and the second special symbol process (see step S27B) are executed as separate processes. The special symbol process may be shared between the case of one special symbol and the case of the second special symbol. In this case, in the game control microcomputer 560, for example, in the common special symbol process, first, either the first start port switch 13a or the second start port switch 14a is in the ON state according to the same process as step S321. If so, a common start port switch passing process is executed. Further, the game control microcomputer 560 determines which of the first start port switch 13a and the second start port switch 14a is in the on state in the common start port switch passing process. If the first start port switch 13a is in the on state, a value (for example, “first”) indicating that the first start port switch 13a is in the on state is set in a predetermined start port pointer, and the second start port If the switch 14a is in an on state, a value (for example, “second”) indicating that the second start port switch 14a is in an on state is set to a predetermined start port pointer. In addition, the game control microcomputer 560 uses a value of either the first reserved memory number counter or the second reserved memory number counter based on a value indicated by a predetermined start port pointer in the common start port switch passing process. 1 is added, and the total pending storage number counter is controlled to be added by 1 (see steps S1112 and S1113). In addition, the game control microcomputer 560 sets data (for example, “first” or “second”) indicated by a predetermined start-port pointer in the common start-port switch passing process (see step S114). In addition, the game control microcomputer 560 determines whether the first start prize memory number storage designation command or the second start prize memory designation command is based on the value indicated by the predetermined start mouth pointer in the common start mouth switch passing process. One of the transmission request flags is set (see step S1116).

  Further, the game control microcomputer 560 executes a common special symbol normal process. In the common special symbol normal process, the game control microcomputer 560 checks whether the first data in the reserved storage area is data indicating “first” or “second”. If it is data indicating “first”, a predetermined special symbol pointer (a pointer indicating whether special symbol process processing is being performed for the first special symbol or special symbol process processing is being performed for the second special symbol) The data indicating “first” is set to “1”. If the data indicates “second”, data indicating “second” is set in a predetermined special symbol pointer. In addition, the game control microcomputer 560 is stored in a storage area corresponding to the reserved memory number (first reserved memory number or second reserved memory number) = 1 indicated by the special symbol pointer in the common special symbol normal process. Each random number value is read (see step S53), or the content of the storage area is shifted by subtracting 1 from the reserved memory number counter (the first reserved memory number counter or the second reserved memory number counter) indicated by the special symbol pointer. (See step S55).

  As described above, in the common special symbol normal process, first, the process for the first special symbol, that is, the data indicating “first” indicating that the process is performed for the first start winning prize opening 13 is performed. Data indicating “first” indicating that the processing is to be performed, or data indicating “second” indicating that the processing is to be performed on the second start winning opening 14, that is, performing processing on the second special symbol. The data indicating “second” is set in the special symbol pointer, and in the subsequent processing in the common special symbol process, processing according to the data set in the special symbol pointer is executed. By doing, the process of step S300-S311 can also be made shared by the case where the first special symbol is the target and the case where the second special symbol is the target. Note that not all the processes in steps S300 to S311 are common to the case of the first special symbol and the case of the second special symbol, but the pre-opening process for the big prize opening (see step S306). Only the process up to the small hit end process (see step S311) may be made common between the case of the first special symbol and the case of the second special symbol.

  In each of the above embodiments, the game control means determines whether any one or more of the plurality of state detection signals input to the input port unit have changed, and the plurality of states. When it is determined that at least one of the detection signals has changed, a plurality of state detection signals input to the input port unit are collectively transmitted as a command, and the effect control means performs game control. It is configured to determine which of a plurality of types of information related to the state of the gaming machine has changed based on the command transmitted by the means, and to notify the electrical component corresponding to the information related to the determined state of the gaming machine Therefore, the control burden on the game control means does not increase when various types of notifications are made using electrical components.

  In each of the above embodiments, as an error notification, a random number error, a full tank error, a door opening error, a ball break error, and a payout error are reported as examples, but other errors related to the state of the gaming machine are notified. It may be. For example, even though the game control means does not perform control to open the special winning opening (for example, the special symbol process flag value 6-11 corresponds to steps S306 to S311 (see FIGS. 35 and 36)). When the detection signal of the count switch 23 is turned on, an abnormal winning signal indicating that fact is transmitted to the effect controlling means, and the effect controlling means receives a random error in response to the reception of the abnormal winning signal. The error notification may be performed in a mode different from the error notification mode of the full tank error, the door opening error, the ball running out error, and the payout error. When it is determined whether or not the control for opening the special winning opening is performed based on the value of the special symbol process flag, since the determination can be made with one data, the control burden on the game control means is light.

  Further, in each of the above embodiments, various notifications are executed by the lamp, the speaker 27, and the effect display device 9, and when executed by the effect display device 9, the notification display and the effect display are superimposed and displayed. However, for example, notification may be displayed in a part of the display area of the effect display device 9 without being superimposed.

  Further, in each of the above embodiments, the effect control command is transmitted from the main board 31 to the effect control board 80 and the like by the parallel signal method, but the effect control command may be transmitted by the parallel signal method. .

  In each of the above embodiments, the door opening signal from the door opening switch 155a is sent to the information terminal board 34, the game control microcomputer 560, and the effect control board 80 via the backup power supply circuit 506 of the main board 31. However, the backup power source 506 is used only for applying a backup voltage to the door opening switch 155a and the like, without passing through the backup power source circuit 506 (for example, the main board 31 is used as it is. Through), the door opening signal may be input to the information terminal board 34, the game control microcomputer 560, and the effect control board 80, respectively.

  Next, a description will be given of an effect mode during variable display of identification information in each of the embodiments described above. FIG. 132 is an explanatory diagram showing an effect mode of normal fluctuation (losing) in each of the above-described embodiments. In the normal variation resulting in a loss shown in FIG. 132, first, in the effect symbol display area 91 of the effect display device 9, the effect symbol (for example, a symbol in which a number is combined with a predetermined character) is changed by vertical scrolling. Then, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop), the effect symbol variably displayed in the middle row display area is finally stopped (third stop). In the example shown in FIG. 132, in the effect symbol display area 91, since the same effect symbols are not stopped in a state where the same symbols are aligned, the display result of the variable display is “lost”.

  FIG. 133 and FIG. 134 are explanatory diagrams showing a variation display effect mode corresponding to the runaway mode (for example, an effect executed by a change after sudden probability change big hit) in each of the embodiments described above. In the runaway mode change display shown in FIGS. 133 and 134, first, as shown in FIG. 133, in the effect symbol display area 91 of the effect display device 9, the effect symbol changes by vertical scrolling. Then, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop), the effect symbol variably displayed in the middle row display area is finally stopped (third stop). In the example shown in FIG. 133, in the effect symbol display area 91, since the same effect symbols are not stopped in a state where the same symbols are aligned, the display result of the variable display is “lost”. Next, a message such as “Runaway mode entered!” Is displayed at the center of the display screen of the effect display device 9, and the display shifts to the runaway mode change display. When actually performing a runaway mode effect, after suddenly displaying a stop pattern for a promiscuous big hit as a display result of the variable display (for example, “135”), suddenly enter the runaway mode as an effect during a probable big hit. After performing the effect as if it had been done and suddenly ending the jackpot effect of the probability variation jackpot, the display line of the effect symbol in the effect symbol display area 91 may be changed from 5 lines to 1 line. When the runaway mode is entered, in the effect symbol display area 91 of the effect display device 9, the effect symbol starts to change again by vertical scrolling. Then, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop), the effect symbol variably displayed in the middle row display area is finally stopped (third stop). In the example shown in FIG. 133, in the effect symbol display area 91, since the same effect symbols are not stopped in a state where the same symbols are aligned, the display result of the variable display is “lost”. Next, in the effect symbol display area 91 of the effect display device 9, the variation of the effect symbol is started again by vertical scrolling. Then, as shown in FIGS. 133 and 134, the effect symbols that are variably displayed in the left column display area in the effect symbol display area 91 first stop (first stop), and are variably displayed in the right column display area. The effect symbols that are being displayed next stop (second stop), and the effect symbols that are variably displayed in the middle row display area are finally stopped (third stop). In the example shown in FIG. 134, in the effect symbol display area 91, since the same effect symbols are not stopped in a state where the same symbols are aligned, the display result of the variable display is “lost”.

  FIG. 135 and FIG. 136 execute the reach effect of the synchronization reach mode (for example, the effect executed by the change after the sudden probability change big hit) and the change display corresponding to the runaway mode in each embodiment shown above. It is explanatory drawing which shows the production | presentation aspect in the case of doing. In the fluctuation display of the synchronized reach and runaway mode shown in FIGS. 135 and 136, first, as shown in FIG. 135, in the effect symbol display area 91 of the effect display device 9, the effect symbol starts to be changed by vertical scrolling. Then, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 135, the two symbols are stopped and displayed in the left column in the effect symbol display area 91, and the two symbols are stopped and displayed in the right column. Is done. Also, one of the symbols stopped and displayed in the left column and one of the symbols stopped and displayed in the right column were stopped and displayed in the same symbol (in this example, “6”), and further stopped and displayed in the left column. Another symbol and another symbol stopped and displayed in the right column are stopped and displayed with the same symbol (in this example, “7”), and the state shifts to a synchronized reach effect with double reach applied. When shifting to the synchronized reach effect, the change display of the effect symbol in the middle row becomes the low speed change (slow change). Next, the display pattern 91 is changed to a display mode in which four reach symbols are displayed small in the four corners in the effect symbol display area 91, and a predetermined character (a panda character in FIG. 135) and a number (“3” in FIG. 135) are combined. In a state where the large symbol is divided into two, a display is made as if one approaches the center of the screen from the left side of the display screen and the other from the right side of the display screen. Next, after the large symbols once merged at the center of the screen, they are divided again into two, and a display is made as if one side is separated from the left side of the display screen and the other side is separated to the right side of the display screen. . Next, after a predetermined blank symbol (in FIG. 135, a combination of a star and an ellipse) is displayed at the center of the display screen, the blank symbol is dispersed from the center to the four corners of the effect symbol display area 91 and disappears. A display of such an aspect is made. Next, in a state where a large symbol that combines another character (a bear character in FIG. 135) and another number (“4” in FIG. 135) is divided into two, one from the left side of the display screen and the other Is displayed as if it approaches the center of the screen from the right side of the display screen. Next, after the large symbols once merged at the center of the screen, they are divided again into two, and a display is made as if one side is separated from the left side of the display screen and the other side is separated to the right side of the display screen. . Next, as shown in FIG. 136, after a predetermined blank symbol is displayed again at the center of the display screen, the display is such that the blank symbol is dispersed and disappears from the center to the four corners of the effect symbol display area 91. Is made. Next, according to the same display mode, in the example shown in FIG. 136, each of the display screens is in a state where a large character that matches a predetermined character and a number (“5” to “8”) is divided into two. From the left side of the display screen, the other side is displayed from the right side of the display screen to the center of the screen. Next, after the large symbols once merged at the center of the screen, they are divided again into two, and a display is made as if one side is separated from the left side of the display screen and the other side is separated to the right side of the display screen. . In addition, according to the same display mode, after a predetermined blank symbol is displayed again in the center of the display screen, a display of a mode in which the blank symbol is dispersed and disappears from the center to the four corners of the effect symbol display area 91 is displayed. Made. Next, in a state where a large symbol combining another character (an elephant character in FIG. 136) and another number (“9” in FIG. 135) is divided into two, one is from the left side of the display screen. The display is performed as if the other side approaches the center of the screen from the right side of the display screen. Next, after the large symbols are combined in the center of the screen, a display is made as if an explosion suddenly occurred in the screen. Then, a message such as “Runaway mode rush!” Is displayed at the center of the display screen of the effect display device 9, and the runaway mode (for example, high probability state) is entered, and runaway occurs in the same manner as in FIGS. 133 and 134. Variation display in the mode is executed.

  FIG. 137 is an explanatory diagram showing a variation display effect mode including a mission effect in each of the embodiments described above. In the mission effect shown in FIG. 137, first, as shown in FIG. 137, in the effect symbol display area 91 of the effect display device 9, the variation of the effect symbol is started by vertical scrolling. Next, while the variable display is being executed, a message such as “alarm” is suddenly displayed on the entire display screen, a message such as “entering mission mode!” Is displayed, and the mode is shifted to the mission mode. When the mode is shifted to the mission mode, a predetermined character A (a girl character in FIG. 137) follows a predetermined character B (a character having a slot machine as a motif in FIG. 137) together with a mission message such as “Catch me!” On the display screen. Correct images are displayed. When the mode is shifted to the mission mode, the effect symbol variation display is displayed small in the lower right of the effect symbol display area 91. Next, an image as if the character A captured the character B is displayed, and a message such as “commission completed!” Is displayed on the display screen. In addition, the display is stopped in a state where the variation display of the effect symbols at the lower right of the screen is aligned with the same symbol (“7” in FIG. 137). Then, in the effect symbol display area 91, the effect symbols are displayed in a stopped state in a state where the effect symbols are largely aligned with the same symbol (“7” in FIG. 137), and the display result of the variable display becomes “big hit”.

  FIG. 138 and FIG. 139 are explanatory diagrams showing the effect modes when the reach effect of the sword reach mode in each of the embodiments described above is executed. In the variable display including the reach effect of the sword reach shown in FIGS. 138 and 139, first, as shown in FIG. 138, in the effect symbol display area 91 of the effect display device 9, the change of the effect symbol is started by vertical scrolling. . Next, an image of a panel on which a predetermined character C (male character in FIG. 138) is drawn is displayed at the center of the display screen. Next, the displayed panel is rotated, and the surface of the panel is changed to a surface on which a predetermined character B (character having a slot machine as a motif in FIG. 138) is drawn. Further, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character A (a girl character in FIG. 138) is drawn. Then, the image of the panel on which the predetermined character A is drawn is displayed at the center of the display screen, and the message “OK? I'm going!” Is displayed on the panel. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 138, the left and right effect symbols are stopped and displayed in a state where the same symbols (“7” in FIG. 138) are aligned, and reach is applied. And it shifts to reach production, and the fluctuation display of the production symbol in the middle row becomes low speed fluctuation (slow fluctuation). Next, a mission message such as “Tear off everything!” Is displayed on the display screen, and an image in which a predetermined character A swings a sword up is displayed. In addition, in the effect symbol display area 91, the display mode is changed so that the two reach symbols are displayed small on the left and right upper ends. Next, after a predetermined symbol (“8” in FIG. 138) is displayed at the center of the display screen, a display is made such that the symbol is split into two. Next, after the next symbol (“9” in FIG. 138) is displayed at the center of the display screen, the display is made such that the symbol is split into two. Next, according to the same display mode, in the example shown in FIG. 139, after the symbols “1” to “4” are displayed, such a display is made that these symbols are cut into two. Next, the next symbol (“5” in FIG. 139) is further displayed in the center of the display screen, and after the character A is struggling to cut the symbol, the character A becomes a two-sword user. Change. With such an effect, an effect called a so-called tilt effect is executed. Then, a display is made such that the symbol (“5” in FIG. 139) is torn. Next, after the next symbol (“6” in FIG. 139) is further displayed in the center of the display screen, and after a display that makes it difficult for the character A to tear the symbol again (a so-called tilt effect), A display that the design is torn is made. Next, the same symbol (“7” in FIG. 139) as the reach symbol displayed at the upper left and right ends is displayed at the center of the display screen, and the display is as if the symbol is shining. Next, a message such as “Completely defeated!” Is displayed, and the effect symbol display area 91 is displayed in a stopped state with the same effect symbol (“7” in FIG. 139) aligned in the effect symbol display area 91. The display result is “big hit”.

  FIG. 140 and FIG. 141 are explanatory diagrams showing other effect modes in the case of executing the reach effect of the sword reach mode in each of the embodiments described above. In the variable display including the reach effect of the sword reach shown in FIGS. 140 and 141, first, as shown in FIG. 140, in the effect symbol display area 91 of the effect display device 9, the change of the effect symbol is started by vertical scrolling. . Next, an image of a panel on which a predetermined character C (male character in FIG. 140) is drawn is displayed at the center of the display screen. Next, the displayed panel is rotated, and the surface of the panel is changed to a surface on which a predetermined character B (character having a slot machine as a motif in FIG. 140) is drawn. Further, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character A (a girl character in FIG. 140) is drawn. Then, the image of the panel on which the predetermined character A is drawn is displayed at the center of the display screen, and the message “OK? I'm going!” Is displayed on the panel. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 140, the left and right effect symbols are stopped and displayed in a state where the same symbols (“7” in FIG. 140) are aligned, and reach is applied. And it shifts to reach production, and the fluctuation display of the production symbol in the middle row becomes low speed fluctuation (slow fluctuation). Next, a mission message such as “Tear off everything!” Is displayed on the display screen, and an image in which a predetermined character A swings a sword up is displayed. In addition, in the effect symbol display area 91, the display mode is changed so that the two reach symbols are displayed small on the left and right upper ends. Next, after a predetermined symbol (“8” in FIG. 140) is displayed at the center of the display screen, a display is made in which the symbol is split into two. Next, after the next symbol (“9” in FIG. 140) is displayed at the center of the display screen, the display is made such that the symbol is cut into two. Next, in the example shown in FIG. 141 according to the same display mode, after the symbols “1” to “4” are displayed, such a display is made that these symbols are cut into two. Next, the next pattern (“5” in FIG. 141) is further displayed in the center of the display screen, and after the display that character A has a hard time cutting the pattern is displayed, character A becomes a two-sword user. Change. With such an effect, an effect called a so-called tilt effect is executed. Then, a display is made such that the symbol (“5” in FIG. 141) is torn. Next, the next symbol (“6” in FIG. 141) is further displayed at the center of the display screen, and a display (a so-called tilting effect) that makes it difficult for the character A to tear the symbol again is displayed. Is displayed as if left uncut. Next, the character A takes out the dual saw instead of the sword, and displays (so-called relief effect) to cut the remaining symbol (“6” in FIG. 141). Next, a display is displayed as if the remaining pattern was crushed into fine dust. Next, the same symbol (“7” in FIG. 141) as the reach symbol displayed at the upper left and right ends is displayed at the center of the display screen, and the display is as if the symbol is shining. Next, a message such as “Completely defeated!” Is displayed, and the effect symbol display area 91 is displayed in a state where the effect symbols are largely stopped and displayed with the same symbol (“7” in FIG. 141) aligned. The display result is “big hit”.

  FIGS. 142 and 143 are explanatory views showing the effect modes in the case of executing the reach effect of the dual sort reach mode in each of the embodiments described above. In the variable display including the reach effect of the dual sort shown in FIGS. 142 and 143, first, as shown in FIG. 142, in the effect symbol display area 91 of the effect display device 9, the effect symbol starts to be changed by vertical scrolling. The Next, an image of a panel on which a predetermined character C (male character in FIG. 142) is drawn is displayed at the center of the display screen. Next, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character B (character having a slot machine as a motif in FIG. 142) is drawn. Further, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character A (a girl character in FIG. 142) is drawn. Then, the image of the panel on which the predetermined character A is drawn is displayed at the center of the display screen, and the message “I will not lose!” Is displayed on the panel. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 142, the left and right effect symbols are stopped and displayed in a state where the same symbols (“7” in FIG. 142) are aligned, and reach is applied. And it shifts to reach production, and the fluctuation display of the production symbol in the middle row becomes low speed fluctuation (slow fluctuation). Next, a mission message such as “Crush all!” Is displayed on the display screen, and an image in which a predetermined character A swings up the dual saw is displayed. In addition, in the effect symbol display area 91, the display mode is changed so that the two reach symbols are displayed small on the left and right upper ends. Next, after the symbol group (“8”, “9” in FIG. 142) is approaching toward the center of the display screen, the symbol (“8” in FIG. 142) is displayed. A display like grinding with a dual saw is made. Next, according to the same display mode, in the example shown in FIG. 142, the symbols “9” to “3” coming toward each other are displayed one after another using a dual saw. Next, according to the same display mode, after the display that the next symbol group (“4”, “5” in FIG. 142) is approaching further toward the center of the display screen, the symbol that comes toward (“4” in FIG. 142) is displayed such that it is crushed with a dual saw. Next, the next symbol (“5” in FIG. 143) is displayed at the center of the display screen, and a display (so-called tilting effect) is made so that the character A has difficulty in crushing the symbol with a dual saw. In this case, as shown in FIG. 143, the symbol (“5” in FIG. 143) is strong, and a display is made such that the dual saw is rebounded once. Next, while the character A says “Still still!”, A display is made to try again to crush the symbol (“5” in FIG. 143), and a display to crush the symbol is displayed. Next, the next symbol (“6” in FIG. 143) is further displayed in the center of the display screen, and a display (so-called tilting effect) is made so that character A has a hard time crushing the symbol again with a dual saw. The Then, a display appears as if character A finally crushed the symbol (“6” in FIG. 143). Next, the same symbol (“7” in FIG. 143) as the reach symbol displayed at the upper left and right ends is displayed at the center of the display screen, and the display is as if the symbol is shining. Next, a message such as “Completely defeated!” Is displayed, the effect symbols are displayed in the effect symbol display area 91 in a stopped state with the same effect symbols (“7” in FIG. 143) aligned and displayed in a variable display. The display result is “big hit”.

  FIG. 144 and FIG. 145 are explanatory diagrams showing the effect modes when the reach effect of the batting reach mode in each embodiment described above is executed. In the variable display including the reach effect of the hit reach shown in FIGS. 144 and 145, first, as shown in FIG. 144, in the effect symbol display area 91 of the effect display device 9, the effect symbol changes by vertical scrolling. . Next, an image of a panel on which a predetermined character C (male character in FIG. 144) is drawn is displayed at the center of the display screen. Next, the displayed panel is rotated, and the surface of the panel is changed to a surface on which a predetermined character B (character having a slot machine as a motif in FIG. 144) is drawn. Further, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character A (a girl character in FIG. 144) is drawn. Then, the image of the panel on which the predetermined character A is drawn is displayed at the center of the display screen, and the message “I am going!” Is displayed on the panel. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 144, the left and right effect symbols are stopped and displayed in a state where the same symbols (“7” in FIG. 144) are aligned, and reach is applied. And it shifts to reach production, and the fluctuation display of the production symbol in the middle row becomes low speed fluctuation (slow fluctuation). Next, a mission message such as “Destroy all!” Is displayed on the display screen, and an image in which a predetermined character A swings a fist is displayed. In addition, in the effect symbol display area 91, the display mode is changed so that the two reach symbols are displayed small on the left and right upper ends. Next, after the display that the predetermined symbol (“8” in FIG. 144) approaches toward the center of the display screen is displayed, the symbol (“8” in FIG. 144) that is approaching is destroyed with a fist. Is displayed. Next, after the display that the next symbol (“9” in FIG. 144) is approaching toward the center of the display screen, the symbol (“9” in FIG. 144) that is approaching is destroyed with a fist. Is displayed. Next, according to the same display mode, in the example shown in FIG. 145, a display is made such that each of the symbols “1” to “4” that come toward you is destroyed with a fist. Next, according to the same display mode, a display is made such that the next symbol (“5” in FIG. 145) is approaching further toward the center of the display screen, and the character A has a hard time destroying the symbol. Such a display (so-called tilt production) is made. Then, the display is such that the character A has finally defeated the symbol (“5” in FIG. 145). Next, according to the same display mode, a display is made such that the next symbol (“6” in FIG. 145) is approaching further toward the center of the display screen, and the character A has a hard time destroying the symbol. In addition, a display (a so-called tilting effect) is made such that the character A grasps both fists and protrudes as if the character A re-enters his spirit. Then, a display appears as if character A has finally destroyed the symbol (“6” in FIG. 145) with both fists. Next, the same symbol (“7” in FIG. 145) as the reach symbol displayed at the upper left and right ends is displayed at the center of the display screen, and the display is as if the symbol is shining. Next, a message such as “Completely defeated!” Is displayed, the effect symbols are displayed in the effect symbol display area 91 in a stopped state with the same effect symbols (“7” in FIG. 145) aligned and displayed in a variable display. The display result is “big hit”.

  FIG. 146 is an explanatory diagram showing an effect aspect when executing the reach effect of the normal reach in each of the embodiments described above. In the variation display including the reach effect of the normal reach shown in FIG. 146, first, as shown in FIG. Next, an image of a panel on which a predetermined character C (male character in FIG. 146) is drawn is displayed at the center of the display screen. Next, the displayed panel is rotated, and the surface of the panel is changed to a surface on which a predetermined character B (character having a slot machine as a motif in FIG. 146) is drawn. Further, the displayed panel rotates, and the surface of the panel changes to a surface on which a predetermined character A (a girl character in FIG. 146) is drawn. Then, the image of the panel on which the predetermined character A is drawn is displayed at the center of the display screen, and the message “Leach!” Is displayed on the panel. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 146, the two symbols are stopped and displayed in the left column in the effect symbol display area 91, and the two symbols are stopped and displayed in the right column. Is done. Also, one of the symbols stopped and displayed in the left column and one of the symbols stopped and displayed in the right column were stopped and displayed in the same symbol (in this example, “7”), and further stopped and displayed in the left column. Another symbol and another symbol stopped and displayed in the right column are stopped and displayed with the same symbol (in this example, “8”), and a transition is made to a reach effect with double reach. When shifting to the reach effect, the change display of the effect symbol in the middle row becomes the low speed change (slow change). Next, the effect symbols variably displayed in the middle row display area are finally stopped (third stop). Then, in one line on the display screen, the effect symbols are displayed in a stopped state with the same symbols (“7” in FIG. 146) aligned, and the display result of the variable display becomes “big hit”.

  FIG. 147 is an explanatory diagram showing an effect aspect in the case of executing the reach effect of full rotation reach in each of the embodiments described above. In the variable display including the reach effect of full rotation reach shown in FIG. 147, first, as shown in FIG. 147, in the effect symbol display area 91 of the effect display device 9, the change of the effect symbol is started by vertical scrolling. Next, the effect symbols variably displayed in the left display area in the effect symbol display area 91 are stopped first (first stop), and the effect symbols variably displayed in the right display area are then stopped. (Second stop). In this case, as shown in FIG. 147, the two symbols are stopped and displayed in the left column in the effect symbol display area 91, and the two symbols are stopped and displayed in the right column. Is done. Also, one of the symbols stopped and displayed in the left column and one of the symbols stopped and displayed in the right column were stopped and displayed in the same symbol (in this example, “6”), and further stopped and displayed in the left column. Another symbol and another symbol stopped and displayed in the right column are stopped and displayed with the same symbol (in this example, “7”), and a transition is made to a reach effect with double reach. Next, a predetermined character C (a male character in FIG. 147) appears on the display screen, and a predetermined message is displayed as a line of the character C. In addition, in the effect symbol display area 91, the display mode is changed so that two reach symbols are displayed small at the lower right end. Next, in a state where the left, middle and right effect symbols are aligned with the same symbol, all the effect symbols start to be displayed again (so-called full rotation reach effect). Next, the effect symbols on the display screen are displayed with the same symbols (“7” in FIG. 147) arranged in a stopped state, and the display result of the variable display becomes “big hit”. In this case, display is performed as if each symbol is shaking, and the background color of the display screen changes to black.

  In addition, the pachinko gaming machine of each of the above embodiments can be given a predetermined game value to a player mainly when the special symbol that is variably displayed on the variable display unit based on the start winning prize becomes the predetermined symbol. A pachinko machine that can be given a predetermined gaming value to a player when there is a prize in a predetermined area of an electric game that is released based on a start prize, or a start prize The present invention is applied even to a pachinko game machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the stop symbol of the symbol variably displayed becomes a predetermined symbol combination. it can. Furthermore, the present invention can be applied to a slot machine that inserts game medals and sets a bet number and plays a game, or a game machine that inserts game balls instead of game medals and sets a bet number and plays a game.

  The present invention is provided with a predetermined first frame and a predetermined second frame rotatably attached to the predetermined first frame, and performs a predetermined game using a game ball. And a variable display device that variably displays a plurality of types of identification information that can be distinguished from each other and displays and displays a display result, and when a specific display result is derived and displayed on the variable display device, The present invention is applied to a gaming machine such as a pachinko gaming machine that is shifted to an advantageous specific gaming state.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front of a game frame. It is a front view which shows the front of a game board. It is explanatory drawing which shows the state which opened the game frame. It is the disassembled perspective view which decomposed | disassembled and showed the mechanism board attached to the back surface of a front frame. It is explanatory drawing which shows the back surface of a game board. It is the rear view which looked at the game board from the back. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the structural example of a payout control board. It is a block diagram which shows the circuit structural example of a relay board | substrate and an effect control board. It is a block diagram which shows the structural example of a power supply board. It is a block diagram which shows the structural example of an information terminal board. It is explanatory drawing which shows the bit allocation example of the output port in the microcomputer for game control. It is explanatory drawing which shows the bit allocation example of the input port in the microcomputer for game control. It is a circuit diagram which shows the internal structure of an information terminal board. FIG. 4 is a block diagram illustrating a configuration example of an effect control board, a relay board, a board side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is a block diagram which shows the structure of each serial-parallel conversion IC. It is explanatory drawing which shows the example of the format of the serial data output from the microcomputer for production control. It is a timing diagram which shows the example of the input timing of the serial data and clock signal to serial-parallel conversion IC, and the output timing of parallel data. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows an example of a fluctuation pattern. It is explanatory drawing which shows the example of the format of the presentation control command transmitted as a serial data system. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows the example of the transmission timing of an effect control command. It is explanatory drawing which shows the example of the transmission timing of an effect control command. It is explanatory drawing which shows the example of the transmission timing of an effect control command. It is explanatory drawing which shows the structure of the EXT data of an input port data designation | designated command. It is a flowchart which shows production control command control processing. It is a flowchart which shows production control command control processing. It is a flowchart which shows a 1st special symbol process process. It is a flowchart which shows a 1st special symbol process process. It is a flowchart which shows a 1st start port switch passage process. It is explanatory drawing which shows the structural example of a pending | holding storage specific information storage area (holding specific area). It is a flowchart which shows a 1st special symbol normal process. It is a flowchart which shows a 1st special symbol normal process. It is a flowchart which shows a 1st fluctuation pattern setting process. It is a flowchart which shows a 1st display result specific command transmission process. It is a flowchart which shows the 1st reserved memory number transmission process in a 1st special symbol process process. It is a flowchart which shows a 1st special symbol change process. It is a flowchart which shows a 1st special symbol stop process. It is a flowchart which shows a 1st big hit end process. It is a flowchart which shows a 1st small hit | end process. It is explanatory drawing which shows an example of the content of a payout command signal. It is a block diagram which shows the signal line etc. which are used for transmission / reception of a payout control signal. It is a timing diagram which shows an example of how to output a payout control signal. It is explanatory drawing which shows the relationship between the state of the detection signal of a payout number count switch, and the output state of a prize ball count signal. It is explanatory drawing which shows each 1 byte buffer formed in RAM used by switch processing. It is a flowchart which shows the process example of a switch process. It is a flowchart which shows an example of a prize ball process. It is explanatory drawing which shows the specific example of a prize ball number table. It is a flowchart which shows a prize ball number addition process. It is a flowchart which shows a prize ball control process. It is a flowchart which shows prize ball waiting processing 1. It is a flowchart which shows a prize ball transmission process. It is a flowchart which shows the winning ball waiting process 2. FIG. It is a flowchart which shows prize ball waiting processing 3. It is a flowchart which shows an input port data confirmation process. It is a flowchart which shows an information output process. It is a flowchart which shows an information output process. It is a flowchart which shows an information output process. It is a flowchart which shows an information output process. It is a flowchart which shows an information output process. It is a flowchart which shows an information output process. It is a flowchart which shows an abnormal winning notification process. It is explanatory drawing which shows the example of bit allocation of the output port in the microcomputer for payout control. It is explanatory drawing which shows the example of bit allocation of the input port in the microcomputer for payout control. It is a flowchart which shows the payout control process which the microcomputer for payout control performs. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is a flowchart which shows an input determination process. It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is explanatory drawing which shows the structural example of a command reception buffer. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a door opening / closing process. It is explanatory drawing which shows an example of the aspect of the variable display of a decoration symbol (a 1st decoration symbol and a 2nd decoration symbol). It is explanatory drawing which shows the example of the display state of a total pending storage display part. It is explanatory drawing which shows the example of the display state of the production | presentation display apparatus 9 at the time of receiving a power failure recovery designation | designated command. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is a flowchart which shows an effect design fluctuation start process. It is explanatory drawing which shows an example of the stop symbol of an effect symbol. It is explanatory drawing which shows the structural example of process data. It is explanatory drawing which shows the example of the control content of the lamp performed according to process data, when each presentation control command is received. It is a flowchart which shows the process during effect design change. It is a flowchart which shows an effect design fluctuation stop process. It is a flowchart which shows a big hit display process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a 1st decoration symbol display control process. It is a flowchart which shows a pending | holding memory | storage display control process. It is a flowchart which shows a pending | holding memory | storage display control process. It is a flowchart which shows a pending | holding memory | storage display control process. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the data set to a summation pending storage table, and the example of a display of a summation pending storage display part. It is explanatory drawing which shows the example of the aspect of the various alerting | reporting performed in alerting | reporting control process processing. It is a flowchart which shows alerting | reporting control process processing. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is explanatory drawing which shows the structural example of the process table for alerting | reporting. It is explanatory drawing which shows the example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is a flowchart which shows an example of a serial setting process. It is explanatory drawing which shows one structural example of the data storage area | region where the lamp control signal and motor control signal of an output object are set. It is a flowchart which shows the specific example of a serial input / output process. It is a block diagram which shows the circuit structural example of the relay board | substrate in 2nd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the structural example of the symbol control board in 2nd Embodiment, a sound / lamp control board, a relay board, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the other circuit structural example of the relay board | substrate in 2nd Embodiment, a sound / lamp control board, and a symbol control board. FIG. 3 is a block diagram showing a circuit configuration example of a power supply board when a backup power supply circuit is mounted on a power supply board and a door opening signal from a door opening switch is first input to the power supply board. It is a block diagram which shows the circuit structural example of an information terminal board when mounting a backup power supply circuit in an information terminal board, and inputting the door open signal from a door open switch directly into an information terminal board. FIG. 5 is a block diagram showing a configuration example of a payout control board when a backup power supply circuit is mounted on the payout control board and a door opening signal from a door opening switch is directly input to the payout control board. It is a block diagram showing a circuit configuration example of an information terminal board when a backup power supply circuit is mounted on a payout control board and a door open signal from a door open switch is directly input to the payout control board. It is explanatory drawing which shows the production | presentation aspect of normal fluctuation | variation (losing). It is explanatory drawing which shows the production | presentation aspect of the fluctuation | variation display corresponding to runaway mode. It is explanatory drawing which shows the production | presentation aspect of the fluctuation | variation display corresponding to runaway mode. It is explanatory drawing which shows the production | presentation aspect in the case of performing the fluctuation display corresponding to runaway mode while performing the reach production of a synchronous reach aspect. It is explanatory drawing which shows the production | presentation aspect in the case of performing the fluctuation display corresponding to runaway mode while performing the reach production of a synchronous reach aspect. It is explanatory drawing which shows the production | presentation aspect of the variable display containing a mission effect. It is explanatory drawing which shows the effect aspect in the case of performing the reach effect of a sword reach aspect. It is explanatory drawing which shows the effect aspect in the case of performing the reach effect of a sword reach aspect. It is explanatory drawing which shows the other effect aspect in the case of performing the reach effect of a sword reach aspect. It is explanatory drawing which shows the other effect aspect in the case of performing the reach effect of a sword reach aspect. It is explanatory drawing which shows the production | presentation aspect in the case of performing the reach production of a dual saw reach aspect. It is explanatory drawing which shows the production | presentation aspect in the case of performing the reach production of a dual saw reach aspect. It is explanatory drawing which shows the effect aspect in the case of performing the reach effect of a hit reach aspect. It is explanatory drawing which shows the effect aspect in the case of performing the reach effect of a hit reach aspect. It is explanatory drawing which shows the production | presentation aspect in the case of performing the reach production of normal reach. It is explanatory drawing which shows the production | presentation aspect in the case of performing the reach production of full rotation reach.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8a 1st special symbol display device 8b 2nd special symbol display device 9 Production display device 9a 1st decorative symbol display device 9b 2nd decorative symbol display device 13 1st starting winning port 14 2nd starting winning port 20 Special Variable winning ball equipment 31 Game control board (main board)
34 Information terminal board 37 Dispensing control board 48 Full switch 56 CPU
51a left prize ball lamp 51b right prize ball lamp 155a door opening switch 155b game frame opening switch 187 payout number count switch 301 out of ball switch 370 payout control microcomputer 505 backup power supply 506 backup power supply circuit 560 game control microcomputer 910 power supply board 78 Serial output circuit 80 Production control board 81 Operation buttons 82a to 82d Dish lamp (LED)
83 Operation button lamp (LED)
100 effect control microcomputer 101 effect control CPU
125a-125f Center decoration lamp (LED)
126a-126f Stage lamp (LED)
281a-281l Ceiling lamp (LED)
282a-282e Left frame lamp (LED)
283a-283e Right frame lamp (LED)

Claims (5)

A predetermined first frame and a predetermined second frame rotatably attached to the predetermined first frame are provided, and a predetermined game can be performed using a game ball. A variable display device that variably displays a plurality of types of identification information that can be distinguished from each other and that displays and displays a display result, and that is advantageous for a player when a specific display result is derived and displayed on the variable display device A gaming machine for transition to a gaming state,
Opening detection means for detecting that the predetermined second frame is opened; and
A backup power supply capable of supplying power to the opening detection means even when power supply to the gaming machine is stopped,
Even if the power supply to the gaming machine is stopped based on the detection of the opening of the predetermined second frame by the opening detection means, the opening of the predetermined second frame is performed. An information output board capable of outputting a frame opening detection signal indicating that the frame is detected to an external device provided outside the gaming machine;
A variable winning ball apparatus that can change to an open state in the specific gaming state;
Winning detection means for detecting a gaming ball won in the variable winning ball device and outputting a winning detection signal;
The process flag value necessary for executing a plurality of types of processes for controlling the progress of the game in a predetermined order is updated when a condition to be updated is satisfied, and the process corresponding to the process flag value is executed. Process processing execution means to perform,
A winning determination means for determining whether or not the winning detection signal from the winning detection means is input;
When the process flag is equal to or a value of a predetermined value or more, it determines that the process flag by it is determined that the non-predetermined value or more figures indicate a value other than the predetermined range , Abnormal winning determination means for determining that an abnormal winning has occurred based on the fact that the winning determination means has input the winning detection signal;
An abnormality notification means for executing an abnormality notification indicating that the abnormal winning has occurred, based on the fact that the abnormal winning determination is determined by the abnormal winning determination means,
The predetermined range includes a value corresponding to a process of controlling the variable winning ball apparatus to an open state. The information output board is provided with a photorelay,
The gaming machine according to claim 1, wherein the photo relay is driven by power supplied from a backup power source even when power supply to the gaming machine is stopped.   When the power supply to the gaming machine is stopped, the current from the backup power source flows back to the circuits and circuit elements other than the photo relay provided on the information output board among the circuits and circuit elements provided in the gaming machine. The game machine according to claim 2, further comprising a backflow prevention circuit that prevents the supply of the backflow. A gaming machine in which a player can play a predetermined game using a game medium and pays out the game medium to the player based on the fact that a payout condition is satisfied,
A game control board on which a game control means for executing a game control process for controlling the progress of the game is mounted;
A payout means for paying out the game medium;
A payout control board equipped with a payout control means for executing a payout control process for controlling the payout means;
A payout detecting means for detecting that the game medium has been paid out by the payout means;
As an information output board, there is provided one board that is connected only to the game control board and outputs the inputted information to an external device outside the gaming machine,
The game control means includes game control information output means for outputting control information generated during execution of the game control process,
The game control information output means outputs the control information indicating that the game medium has been paid out to the information output board based on the fact that the payout detection means has detected that a predetermined number of game media have been paid out. The game machine according to any one of claims 1 to 3. A glass frame rotatably attached to the game frame and a mechanism plate to which various mechanism parts are attached are provided.
The opening detection means outputs a frame opening detection signal when detecting that the glass frame is opened or the mechanism plate is opened,
The gaming machine according to claim 4, wherein the information output board receives the frame opening detection signal from the opening detection means via a game control board.

Images