JP5043220B2 - Game machine - Google Patents

Description

The present invention includes a game frame installed to be openable and closable with respect to the outer frame attached to the game frame, and a game board including various components that are attached to predetermined plate-like member and a plate-like body, the game board It relates to exchangeable gaming machines.

  As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a prize area such as a prize opening provided in the game area, a predetermined number of prize balls are paid out to the player. There is something to be done. Further, a variable display device capable of variably displaying the identification information (also referred to as “variation”) is provided on the game board, and the player when the display result of the variable display of the identification information in the variable display device becomes the specific display result. Some are configured to be controllable to a specific gaming state advantageous to the user.

  The specific game state means a state advantageous for a player who is given a predetermined game value. Specifically, the specific game state is, for example, a state in which a special variable winning device is advantageous for a player who is likely to win a ball (a big hit game state), or a state in which a right to be advantageous for a player has occurred. In this state, a predetermined game value such as a state where conditions for paying out premium game media are easily established is given.

  In such a gaming machine, the fact that the display result of the variable display device that displays the symbol as identification information is a combination of specific display modes (specific display result) determined in advance is generally referred to as “big hit”. When the big hit occurs, for example, the big winning opening is opened a predetermined number of times, and the game shifts to a big hit gaming state where the hit ball is easy to win. And in each open period, if there is a prize for a predetermined number (for example, 10) of the big prize opening, the big prize opening is closed. And the number of times the special winning opening is opened is fixed to a predetermined number (for example, 15 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and even if the number of winnings does not reach a predetermined number, the big winning opening is closed when the opening time elapses. Further, when a predetermined condition (for example, winning in the V zone provided in the big prize opening) is not established at the time when the big prize opening is closed, the big hit gaming state is ended. Some are also available.

Japanese Patent Laying-Open No. 2003-190416 (paragraphs 0043-0046, FIGS. 13-15) JP 2003-164560 A (paragraphs 0029-0030, FIG. 1)

An object of the present invention is to make it possible to easily attach and detach a game frame and a game board in a game machine in which a game frame and a game board are detachable .

A gaming machine according to the present invention includes a game frame (for example, a game frame 11) installed so as to be openable and closable with respect to an outer frame, a predetermined plate-like body, and various parts attached to the plate-like body. A game machine including a game board (e.g., game board 6) including the exchangeable game board and disposed on the front surface of the game machine, and a predetermined light emitter (e.g., each LED 84a to 84f of the lower plate lamp). And a storage unit (for example, a surplus ball tray (lower plate) 4) that can store a game medium and an electrical component for production (for example, a variable display device 9, a speaker 27, Sending effect control commands for controlling the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f) of the lamp A game control means (for example, a game control microcomputer 560), and an effect control means for controlling an electrical component for effect including a light emitter provided in the storage unit in accordance with an effect control command transmitted by the game control means (For example, the effect control microcomputer 100), the game control means and the effect control means are mounted on the game board, and the game control means includes command transmission means for transmitting the effect control command to the effect control means. The effect control means outputs an output means (for example, in the effect control microcomputer 100 in the effect control microcomputer 100) based on the effect control command received from the game control means, for outputting a control signal for controlling the electric parts for effect in the serial signal system. A board side serial-parallel conversion circuit (for example, a part for executing step S708) provided in the game board Serial - parallel conversion IC616～618) and a plurality of frame side serial provided game frame - parallel converter circuit (for example, a serial - further comprising a parallel conversion IC610～615), panel-side serial - parallel converter circuit, effect The control signal input from the output means of the control means is converted from the serial signal system to the parallel signal system, and among the electrical parts for production, the electrical parts provided on the game board (for example, LED 125a to 125f, 126a to lamps) 126f, the motors 151a, 152a), and the plurality of frame side serial-parallel conversion circuits convert the control signal input from the output means of the effect control means from the serial signal method to the parallel signal method, Among the electrical components, the electrical components provided in the game frame (for example, LED 281a to 28 of the lamp) 11, 282 a to 282 f, 283 a to 283 f, 82 a to 82 f, 83, 84 a to 84 f) , and a board side serial-parallel conversion circuit and a plurality of frame side serial-parallel conversion circuits, or effect control means, The plurality of frame side serial-parallel conversion circuits are connected through one system wiring, and at least a part of the panel side serial-parallel conversion circuit or the plurality of frame side serial-parallel conversion circuits are of the same system. Connected in series with wiring, the output means is a serial signal system with fixed length data including control signal information of all production electrical parts connected to the same system wiring for each predetermined period The board side serial-parallel conversion circuit or the plurality of frame side serial-parallel conversion circuits connected to the same system wiring The control signal of unit data output every predetermined cycle is sequentially transferred as it is to either the panel side serial-parallel conversion circuit or the plurality of frame side serial-parallel conversion circuits connected to the lower side of the main wiring. The control signal is output based on the unit data at a predetermined timing .
According to such a configuration, the effect control means includes an output means for outputting a control signal for controlling the electric parts for the effect in a serial signal system based on the effect control command received from the game control means, The board-side serial-parallel conversion circuit and the plurality of frame-side serial-parallel conversion circuits, or the production control means and the plurality of frame-side serial-parallel conversion circuits are configured to be connected through one line of wiring. Therefore, the number of wires between the game board and the game frame can be reduced. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board.

Predetermined light emitters (for example, the LEDs 84a to 84f of the lower dish lamp) provided in the storage unit are provided on the peripheral part of the storage unit (for example, the upper surface side of the surplus ball tray (lower plate) 4). It is desirable to be configured as described above.
According to such a configuration, it is possible to make it easier for the player to recognize a notification state such as a full tank notification by causing a predetermined light emitter provided in a manner surrounding the storage unit to emit light.

The effect control means is a storage unit light emitter control means (for example, an effect control microcomputer for controlling the light emission state of the light emitter provided in the gaming machine including a predetermined light emitter provided in the storage unit according to the game state. (Step S 835 C, S 845 C, S 1917, S 1923, S 1928, S 1934, S 1941, S 1945, S 1949, S 1970, S 1976, S 1983, S 1990, S 1998, S 2003, S 2008 are executed according to the setting contents of the serial setting process) The full tank notification control means includes a light emission mode different from that when the light emission state of the light emitter provided in the storage section is controlled by the storage light emitter control means, and the predetermined light emitter provided in the storage section. Full light notification is executed by controlling the light emission state (for example, production Patronage microcomputer 100, by executing the steps S1941, S1998, notifies the full Tan'era by blinking the respective LED84a~84f the lower tray lamp.) May be configured so.
According to such a configuration, it is possible to eliminate the need to provide a special light emitter only for reporting the full tank state, and to reduce the cost for full tank notification.

The gaming machine includes a relay board (for example, the relay boards 606 and 607) that relays the connection between the board-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit, or the frame-side serial-parallel conversion circuit and the effect control means, The relay board (for example, the relay board 607) that relays the connection may be provided.
According to such a configuration, it is possible to easily perform the detachment work between the game frame and the game board only by performing the connection work to and the removal work from the relay board.

The gaming machine includes an assembly board (for example, a board-side IC board 601 on which a plurality of serial-parallel conversion ICs 616 to 618 are installed, a plurality of serial-boards), and a plurality of frame-side serial-parallel conversion circuits or board-side serial-parallel conversion circuits. The frame-side IC substrate 602) on which the parallel conversion ICs 610 and 611 are mounted may be provided.
According to such a configuration, the number of parts in the gaming machine can be reduced.

The gaming machine includes a game control board (for example, main board 31) on which game control means (for example, a game control microcomputer 560) is mounted, a payout means (for example, a ball payout device 97) for paying out game media. , A payout control board (for example, payout control board 37) on which a payout control means (for example, payout control microcomputer 370) for executing a payout control process for controlling the payout means, and effect control means (eg, effect control) are mounted. And an effect control board (for example, the effect control board 80) on which the microcomputer 100 is mounted, and each of the plurality of types of information relating to the state of the gaming machine including an error state relating to the payout of the game medium is provided on the payout control board. A corresponding state detection signal (for example, data of bits 0 to 4 of input port 1 shown in FIG. 15) is output to the game control board. Status notification means (for example, a part for executing input determination processing in the payout control microcomputer 370 (see FIG. 75) and an output circuit 373B) are provided, corresponding to each of a plurality of types of information relating to the state of the gaming machine. The state detection signal is input to an input port unit (for example, input port 1 shown in FIG. 15) that can be accessed at a time on the game control board, and the game control means receives a plurality of state detection signals input to the input port unit. State detection signal determination means for determining whether or not any one of the states has changed (for example, a part for executing the processing of steps S1582 and S1583 (see FIG. 61) in the game control microcomputer 560); The state detection signal determining means determines that one or more of the plurality of state detection signals has changed. Sometimes, the input port data transmission means (for example, the game control microcomputer 560 in steps S1584 to S1586, S591 to S593) transmits the states of a plurality of state detection signals input to the input port unit as commands. Processing (see FIG. 61 and FIG. 62)), and the effect control means changes any state of a plurality of types of information related to the state of the gaming machine based on the command transmitted by the input port data transmitting means. Input port data determining means for determining whether or not (for example, the part for executing the processing of steps S611, S651 to S653, S655, S656, S658, S660, S662, S664, S671, S673, and S676 in the microcomputer 100 for effect control) ) And output means are input State notification control means (for example, notification start processing and notification in the production control microcomputer 100) that outputs a control signal for notification corresponding to the information on the state of the gaming machine determined by the force port data determination means. It may be configured to include a portion (see FIG. 95) for executing the intermediate processing.
According to such a configuration, each of a plurality of types of information relating to the state of the gaming machine can be distinguished and notified, and in such a case, the control burden of information determination of the game control means is not increased. be able to. In addition, since the plurality of state detection signals are transmitted from the game control board on condition that any one or more of the plurality of state detection signals input to the input port unit have changed, the game control board It is difficult to grasp the control state of the game control means based on the signal transmitted from the player, and as a result, there is a high possibility that fraud can be prevented.

It is the front view which looked at the pachinko game machine from the front. It is a front view which shows the front of a game frame. It is a front view which shows the front of a game board. It is a figure which shows the front and upper surface of a hit ball supply tray (upper plate). It is a figure which shows the front and upper surface of a surplus ball | bowl tray (lower plate). It is explanatory drawing which shows operation | movement of the truck as a movable member. It is explanatory drawing which shows operation | movement of the beam as a movable member. It is explanatory drawing which shows the state which opened the game frame. It is explanatory drawing which shows the back surface of a game board. It is a block diagram which shows the circuit structural example of a game control board (main board). It is a block diagram which shows the component relevant to payout, such as a payout control board and a ball payout apparatus. It is a block diagram which shows the circuit structural example of a relay board | substrate and an effect control board. It is a block diagram which shows the structural example of an information terminal board. It is explanatory drawing which shows the example of the bit allocation of the output port in a game control means. It is explanatory drawing which shows the example of the bit allocation of the input port in a game control means. FIG. 4 is a block diagram illustrating a configuration example of an effect control board, a relay board, a board side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each serial-parallel conversion IC. It is explanatory drawing which shows the example of the address provided to each input IC. It is a block diagram which shows the structure of each serial-parallel conversion IC. It is explanatory drawing which shows the example of the format of the serial data output from the microcomputer for production control. It is a timing diagram which shows the example of the input timing of the serial data and clock signal to serial-parallel conversion IC, and the output timing of parallel data. It is a block diagram which shows the structure of each input IC. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows the main process which CPU in a main board | substrate performs. It is a flowchart which shows a 2 ms timer interruption process. It is explanatory drawing which shows each random number. It is explanatory drawing which shows an example of a big hit determination value. It is explanatory drawing which shows an example of a fluctuation pattern. It is explanatory drawing which shows the example of the format of the presentation control command transmitted as a serial data system. It is explanatory drawing which shows an example of the content of an effect control command. It is explanatory drawing which shows an example of the transmission timing of an effect control command. It is explanatory drawing which shows the structure of the EXT data of an input port data designation | designated command. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a special symbol process process. It is a flowchart which shows a starting port switch passage process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a special symbol normal process. It is a flowchart which shows a fluctuation pattern setting process. It is a flowchart which shows a display result specific command transmission process. It is a flowchart which shows the special symbol change process. It is a flowchart which shows a special symbol stop process. It is a flowchart which shows a big hit end process. It is a flowchart which shows a small hit end process. It is a flowchart which shows an example of a normal symbol process process. It is a flowchart which shows a normal symbol normal process. It is a flowchart which shows a normal symbol fluctuation | variation process. It is a flowchart which shows a normal symbol stop process. It is explanatory drawing which shows the example of a high base time table and a low base time table. It is a flowchart which shows a normal electric accessory operating process. It is explanatory drawing which shows an example of the content of the payout command signal etc. which are transmitted with respect to the payout control microcomputer from the game control microcomputer. It is a block diagram which shows the signal line etc. which are used for transmission / reception of each control signal. It is a timing diagram which shows an example of the method of outputting a payout command signal. It is explanatory drawing which shows the relationship between the state of the detection signal of a payout number count switch, and the output state of a prize ball count signal. It is a flowchart which shows an input port data confirmation process. It is a flowchart which shows the process example of a switch process. It is a flowchart which shows an example of a prize ball process. It is explanatory drawing which shows the example of a prize ball number table. It is a flowchart which shows a prize ball number addition process. It is a flowchart which shows a prize ball control process. It is a flowchart which shows an abnormal winning notification process. It is a flowchart which shows the transmission process of the presentation control command based on the presentation control command transmission request flag in the presentation control command control process. It is explanatory drawing which shows the example of the bit allocation of the output port in the microcomputer for payout control. It is explanatory drawing which shows the example of the bit allocation of the input port in the microcomputer for payout control. It is a flowchart which shows the payout control process which a payout control means performs. It is a flowchart which shows a prize ball lending control process. It is a flowchart which shows the payout start waiting process. It is a flowchart which shows a payout motor stop waiting process. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is a flowchart which shows payout passage waiting processing. It is explanatory drawing which shows the relationship between the kind of error, and the display of LED for an error display. It is a flowchart which shows an error process. It is a flowchart which shows an error process. It is a flowchart which shows the process of the part which transmits the input data of the input ports 0 and 1 to a main board | substrate among input determination processes. It is a flowchart which shows the presentation control main process which CPU for presentation control performs. It is explanatory drawing which shows the structural example of a command reception buffer. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a command analysis process. It is a flowchart which shows a door opening / closing confirmation process. It is a flowchart which shows production control process processing. It is a flowchart which shows a fluctuation pattern command reception waiting process. It is a flowchart which shows a decoration design change start process. It is explanatory drawing which shows an example of the stop symbol of a decoration symbol. It is explanatory drawing which shows the structural example of process data. It is explanatory drawing which shows the example of the control content of the lamp performed according to process data, when each presentation control command is received. It is a flowchart which shows a process during decoration design change. It is a flowchart which shows a decoration design change stop process. It is a flowchart which shows a big hit display process. It is a flowchart which shows a big hit end process. It is explanatory drawing which shows the example of the alerting | reporting screen displayed on a variable display apparatus. It is explanatory drawing which shows the example of the aspect of the various error alerting | reporting performed in alerting | reporting control process processing. It is a flowchart which shows alerting | reporting control process processing. It is a flowchart which shows a notification start process. It is a flowchart which shows a notification start process. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is a flowchart which shows the process during alerting | reporting. It is explanatory drawing which shows the structural example of the process table for error alerting | reporting. It is explanatory drawing which shows the example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows the other example of the lamp control signal output as a serial data system in alerting | reporting control process processing. It is explanatory drawing which shows the example of the motor control signal output as a serial data system in a game production. It is a flowchart which shows an example of a serial setting process. It is explanatory drawing which shows one structural example of the data storage area | region where the lamp control signal and motor control signal of an output object are set. It is a flowchart which shows the specific example of a serial input / output process. It is explanatory drawing which shows the example of the condition of the display effect in a variable display apparatus, the sound effect by a speaker, and the display effect by each lamp | ramp. It is explanatory drawing which shows the example of the condition of the display effect in a variable display apparatus, the sound effect by a speaker, and the display effect by each lamp | ramp. It is explanatory drawing which shows the state in which multiple game machines are installed in the game store. It is a block diagram which shows the other structural example of an effect control board, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is explanatory drawing which shows the example of the pulse train supplied to LED when performing gradation control of LED. It is a block diagram which shows the structural example of the effect control board in the case of controlling brightness using LED of the lamp | ramp which performs gradation control, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the circuit structural example of the relay board | substrate and effect control board in 2nd Embodiment. It is a block diagram which shows the structural example of the presentation control board in a 2nd Embodiment, a relay board | substrate, a board | substrate side IC board, and a frame side IC board. It is a block diagram which shows the structure of each serial-parallel conversion IC in 2nd Embodiment. It is explanatory drawing which shows the example of the control signal row | line | column containing the lamp | ramp control signal output as a serial data system in the alerting | reporting control process in 2nd Embodiment. It is explanatory drawing which shows the example of the control signal sequence containing the motor control signal output as a serial data system in the game effect in 2nd Embodiment. It is a flowchart which shows the example of the serial setting process in 2nd Embodiment. It is explanatory drawing which shows the example of 1 structure of the data storage area | region where the control signal sequence containing the lamp control signal and motor control signal of the output object in 2nd Embodiment is set. It is a flowchart which shows the specific example of the serial input / output process in 2nd Embodiment. It is a block diagram which shows the other structural example of the production | presentation control board in a 2nd embodiment, a relay board, a board side IC board, and a frame side IC board. It is a block diagram which shows the circuit structural example of the relay board | substrate in 3rd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board. It is a flowchart which shows the main process which the microcomputer for symbol control in 3rd Embodiment performs. It is a flowchart which shows the main process which the microcomputer for sound / lamp control in 3rd Embodiment performs. It is a block diagram which shows the other structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board. It is a block diagram which shows the other circuit structure example of the relay board | substrate in 3rd Embodiment, a sound / lamp control board, and a symbol control board. It is a block diagram which shows the further another structural example of the symbol control board in a 3rd embodiment, a sound / lamp control board, a relay board, a board side IC board, and a frame side IC board. It is a block diagram which shows the example of a connection of a main board | substrate, a payout control board, an effect control board, and an information terminal board.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, the overall configuration of a pachinko gaming machine that is an example of a gaming machine will be described. FIG. 1 is a front view of a pachinko gaming machine as viewed from the front. FIG. 2 is a front view showing the front of the game frame 11. FIG. 3 is a front view showing the front of the game board. FIG. 4 is a view showing the front and top surfaces of a hit ball supply tray (upper plate) 3 provided in the game frame 11. FIG. 5 is a view showing the front and top surfaces of the surplus ball tray (lower pan) 4 provided in the game frame 11. In the following embodiments, a pachinko gaming machine will be described as an example. However, the gaming machine according to the present invention is not limited to a pachinko gaming machine, and can be applied to other gaming machines such as a slot machine.

  The pachinko gaming machine 1 includes an outer frame (not shown) formed in a vertically long rectangular shape, and a game frame 11 attached to the inside of the outer frame so as to be opened and closed. Further, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape that is provided in the game frame 11 so as to be opened and closed. The game frame 11 is a front frame (not shown) that is installed so as to be openable and closable with respect to the outer frame, a mechanism plate to which mechanism parts and the like are attached, and various parts attached to them (excluding game boards to be described later). ).

  As shown in FIGS. 1 to 3, the pachinko gaming machine 1 has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hitting ball supply tray (upper plate) 3 capable of storing game balls paid out from the payout device 97. Under the hitting ball supply tray 3, an extra ball receiving tray (lower plate) 4 for storing game balls that cannot be accommodated in the hit ball supply tray 3 and a hitting operation handle (operation knob) 5 for launching the game balls are provided. . In addition, the hitting ball supply tray (upper plate) 3 and the surplus ball receiving tray (lower plate) 4 may be integrated. On the back surface of the glass door frame 2, there is a plastic frame constituting a part of the game frame 11 as shown in FIG. 3. The plastic frame includes a mechanism plate, and components such as a power supply circuit (not shown) and a speaker 27 are attached to the mechanism plate. In addition, the plastic frame of the game frame 11 is provided with a relay board 607 that relays the wiring between the game frame 11 and the game board 6. Moreover, as shown in FIG. 3, the game board 6 is attached to the front frame of the game frame 11 so that attachment or detachment is possible. The game board 6 is a structure including a plate-like body constituting the game board 6 and various components attached to the plate-like body. A game area 7 is formed on the front surface of the game board 6.

  Near the center of the game area 7, there is provided a variable display device (image display device) 9 including a plurality of variable display portions each variably displaying a decorative pattern for performance. The variable display device 9 has, for example, three variable display portions (symbol display areas) of “left”, “middle”, and “right”. The variable display device 9 performs variable display of a decorative symbol as a symbol for decoration (production) during the variable symbol display period of the special symbol by the special symbol indicator 8. The variable display device 9 that performs variable display of decorative symbols is controlled by an effect control microcomputer mounted on the effect control board.

  Below the variable display device 9, there is provided a special symbol display (special symbol display device) 8 for variably displaying a special symbol as identification information. In this embodiment, the special symbol display 8 is realized by a simple and small display (for example, 7 segment LED) capable of variably displaying a number of, for example, 00 to 99. Note that the special symbol display 8 is not limited to displaying a two-digit number, and may be configured to variably display a number of other digits such as 0 to 9. In addition, the variable display device 9 performs variable display of a decorative symbol as a symbol for decoration (for production) during the variable symbol display period of the special symbol by the special symbol indicator 8.

  In this embodiment, in the gaming machine 1, the display result of the variable display of the identification information in the special symbol display 8 and the variable display device 9 is the specific display result (the big hit symbol (including the small hit symbol)). In this case, it is configured to be controllable to a specific gaming state advantageous to the player (a big hit gaming state (specifically, a probable big hit state, a normal big hit state, a sudden probable big hit state, a small hit state). A gaming state means a state that is advantageous to a player who is given a predetermined gaming value, specifically, when a transition is made to a specific gaming state (a big hit gaming state (including a small hit state)). The winning slot is advantageous for a player who is easy to win a ball, and the game control microcomputer 560, as will be described later, has a special symbol process in the special symbol process. In this embodiment, as will be described later, when the value of the special symbol process flag is 5 or more, the gaming state is shifted to the special gaming state. .

  On the right side of the special symbol display 8 is a special symbol hold composed of four indicators for displaying the number of effective winning balls that have entered the start winning openings 13, 14, that is, the number of hold memories (also referred to as start memory or start prize memory). A storage indicator 18 is provided. Every time there is an effective start prize, the display color of one display is changed. Each time the variable display on the special symbol display 8 is started, the display color of one display is restored. In the display area of the variable display device 9, a special symbol reserved storage display area including four display areas for displaying the number of reserved memories may be provided. Further, in this embodiment, the upper limit value of the number of reserved memories is 4, but the upper limit value may be a larger value. Further, the upper limit value may be changed according to the gaming state.

  A first start winning opening 13 is provided below the variable display device 9. The game ball won in the first start winning opening 13 is guided to the back of the game board 6 and detected by the first start opening switch 13a.

  Further, a second start winning opening 14 is formed immediately below the first starting winning opening 13. The second start winning opening 14 is provided with a variable winning ball apparatus 15 that opens and closes. When the variable winning ball device 15 is in the closed state, no gaming ball is won in the second starting winning port 14, and when the variable winning ball device 15 is in the open state, the gaming ball can be won in the second starting winning port 14. . The variable winning ball device 15 is opened and closed by a solenoid 16. When the variable winning ball device 15 is in the open state, it becomes easier for the game ball to win the second start winning opening 14 (easy to start winning), which is advantageous to the player. The game ball that has won the second start winning opening 14 is guided to the back of the game board 6 and detected by the second start opening switch 14a.

  Below the second start winning opening 14, there is provided a special variable winning device that is opened by the solenoid 21 in the big hit gaming state or the small hit gaming state. The special variable winning device includes an opening / closing plate 20 and forms a big winning opening. The game ball that has entered the big prize opening is detected by the count switch 23.

  On the right side of the variable display device 9, a trolley 151 as a movable member used for a game effect is provided. In the game effect, the truck 151 can produce an effect of jumping from the right side of the variable display device 9 to the left side as shown in FIG. 6 according to the control of the effect control means.

  Further, on the upper and right sides of the variable display device 9, a beam 152 is provided as a movable member used for a game effect. As shown in FIG. 7, the beam 152 can perform an effect that collapses from the upper part and the right side of the variable display device 9 according to the control of the effect control means in the game effect.

  Further, as shown in FIG. 4, the pachinko gaming machine 1 includes operation buttons 81 a to 81 e that can be operated by the player during the game on the hitting ball supply tray (upper plate) 3. For example, when the operation buttons 81a to 81e are operated (pressed), the trolley 151 and the beam 152 as movable members are operated.

  When a game ball wins the gate 32 and is detected by the gate switch 32a, the variable display of the normal symbol display 10 is started. In this embodiment, variable display is performed by alternately lighting left and right lamps (designs can be visually recognized when lit). For example, if the right lamp is lit at the end of variable display, it is a win. And when the stop symbol in the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball apparatus 15 is opened for a predetermined number of times. Below the normal symbol display 10 is provided a normal symbol start memory display 41 having a display unit with four LEDs for displaying the number of winning balls that have entered the gate 32. Each time there is a prize at the gate 32, the normal symbol start memory display 41 increases the number of LEDs to be turned on by one. Each time variable display on the normal symbol display 10 is started, the number of LEDs to be lit is reduced by one.

  The game board 6 is provided with a plurality of winning ports (ordinary winning ports) 29, 30, 33, and 39. The winning holes 29, 30, 33, and 39 for the game balls are awarded to the winning port switches 29a and 30a, respectively. , 33a, 39a. Each winning opening 29, 30, 33, 39 constitutes a winning area provided in the game board 6 as an area for accepting game media and allowing winning. The start winning openings 13, 14 and the big winning opening also constitute a winning area that accepts game media and allows winning. In addition, the game balls won in the respective winning openings 29, 30, 33, 39 may be detected by one switch.

  A decoration member 154 is attached to the center of the game area 7 so as to surround the variable display device 9, and a decoration lamp (center decoration) that is lit or flashed during the game is placed above the decoration member 154. Lamp). In this embodiment, six LEDs 125a to 125f are provided as center decoration lamps. In addition, the decoration member 154 is provided with a decoration lamp (stage lamp) that is lit or flashed during the game so as to surround the variable display device 9. In this embodiment, six LEDs 126a to 126f are provided as stage lamps.

  Further, at the lower part of the game area 7, there is an out port 26 for absorbing game balls that have not won a prize. Two speakers 27 that emit sound effects are provided on the left and right upper portions outside the game area 7. A top frame lamp, a left frame lamp, and a right frame lamp are provided on the outer periphery of the game area 7. Further, a decoration LED is installed around each structure in the game area 7. The top frame lamp, the left frame lamp, the right frame lamp, and the decoration LED are examples of a decorative light emitter provided in the gaming machine. In this embodiment, twelve LEDs 281a to 281l are provided as ceiling lamps. In addition, six LEDs 282a to 282f are provided as left frame lamps. In addition, six LEDs 283a to 283f are provided as right frame lamps.

  Further, as shown in FIG. 4, the hitting ball supply tray (upper plate) 3 is provided with six LEDs 82 a to 82 f as upper plate lamps. In this embodiment, as shown in FIG. 4, two LEDs 82a and 82b are provided on the left side of the hitting ball supply tray (upper plate) 3, two LEDs 82c and 82d are provided on the front, and two LEDs 82e are provided on the right side. , 82f are provided. In this embodiment, the front of the gaming machine refers to the surface on the side facing the player when the player is playing (the side on which the player is viewing). Further, the side surface of the gaming machine refers to a surface on the side orthogonal to the player's line-of-sight direction when the player is playing a game. In this case, the left side as viewed from the player is referred to as the left side, and the right side as viewed from the player is referred to as the right side. These LEDs 82 a to 82 f are mounted on the respective substrates 331, 332, 333 and 334 provided on the back surface of the hitting ball supply tray (upper plate) 3.

  Further, as shown in FIG. 4, a lens cover 821 having an inverted “<” shape is attached to the left side surface of the hitting ball supply tray (upper plate) 3, and when the LEDs 82a and 82b are turned on or blinking, the lens Light is diffused by the cover 821, and the entire lens cover 821 appears to shine. Specifically, the lens cover 821 includes a protective lens cover and a light diffusion lens cover that is formed in a knurled shape or a cross-cut shape and has a jagged back surface, and the LEDs 82a and 82b. When is turned on or blinks, the light is diffused by the light diffusing lens cover so that the entire lens cover 821 can be seen to shine. The lens cover for light diffusion is colored in a predetermined color (for example, blue), and the entire LED cover 821 appears to shine in the predetermined color (for example, blue) by turning on or blinking the LEDs 82a and 82b. In addition, by using a transparent lens cover 821 and using full color LEDs as the LEDs 82a and 82b and changing the emission color of the LEDs 82a and 82b, the entire lens cover 821 can be seen to shine in a predetermined color (for example, blue). May be. It should be noted that lens parts (for example, those on which logo marks or the like are drawn) are also used for the inner triangular portion 821A of the lens cover 821 on the left side surface of the hitting ball supply tray (upper plate) 3, and the inner LEDs 82a and 82b are used. You may make it light-emit and see by (You may provide LED different from LED82a, 82b.). Alternatively, an opaque synthetic resin part may be used as the triangular portion 821A inside the lens cover 821 on the left side surface of the hitting ball supply tray (upper plate) 3.

  Further, as shown in FIG. 4, a belt-shaped lens cover 822 is attached to the front of the hitting ball supply tray (upper plate) 3, and when the LEDs 82 c and 82 d are turned on or blinking, the lens cover 822 emits light. When diffused, the entire lens cover 822 appears to shine. Specifically, the lens cover 822 includes a protective lens cover and a light diffusion lens cover that is formed in a knurled shape or a cross-cut shape and has a jagged back surface, and the LEDs 82c and 82d. When is turned on or blinks, the light is diffused by the light diffusing lens cover, and the entire lens cover 822 can be seen to shine. The lens cover for light diffusion is colored with a predetermined color (for example, blue), and the LEDs 82c and 82d are turned on or blinking, so that the entire lens cover 822 appears to shine in the predetermined color (for example, blue). The lens cover 822 is made of a transparent material (colorless and transparent member), the full-color LED is used as the LEDs 82c and 82d, and the emission color of the LEDs 82c and 82d is changed. For example, it may appear to shine blue).

  Further, as shown in FIG. 4, a “<”-shaped lens cover 823 is attached to the right side surface of the hitting ball supply tray (top plate) 3, and when the LEDs 82 e and 82 f are lit or blinking, the lens cover At 823, the light is diffused and the entire lens cover 823 appears to shine. Specifically, the lens cover 823 includes a protective lens cover and a light diffusion lens cover formed in a knurled shape or a cross-cut shape and having a jagged back surface, and the LEDs 82e and 82f. When is turned on or blinks, the light is diffused by the light diffusing lens cover, and the entire lens cover 823 can be seen to shine. Further, the lens cover for light diffusion is colored in a predetermined color (for example, blue), and the LEDs 82e and 82f are turned on or blinking, so that the entire lens cover 823 appears to shine in the predetermined color (for example, blue). In addition, by using a transparent lens cover 823 and using full-color LEDs as the LEDs 82e and 82f and changing the emission color of the LEDs 82e and 82f, the entire lens cover 823 can be seen to shine in a predetermined color (for example, blue). May be. It should be noted that the inner LED 82e, 82f is also used by using lens parts (for example, a logo mark or the like) also on the triangular portion 823A inside the lens cover 823 on the right side surface of the hitting ball supply tray (top plate) 3. You may make it light-emit by (you may provide LED different from LED82e, 82f). Alternatively, an opaque synthetic resin component may be used as the triangular portion 823A inside the lens cover 823 on the right side surface of the hitting ball supply tray (upper plate) 3.

  The two lens covers 821 and 823 of the lens covers of the hitting ball supply tray (upper plate) 3 and the four LEDs 82a, 82b, 82e, and 82f of the LEDs of the upper tray lamp are respectively a hitting ball supply tray ( On the left side and the right side of the upper plate 3), it is provided at a position that is difficult for a player who is playing the game to view. As shown in FIG. 4, the operation buttons 81a to 81e are provided with one LED 83 as an operation button lamp.

  Moreover, as shown in FIG. 5, six LEDs 84a-84f are provided in the surplus sphere receptacle (lower pan) 4 as a lower pan lamp. In this embodiment, as shown in FIG. 5, six LEDs 84 a to 84 f are provided on the peripheral portion of the surplus ball tray (lower pan) 4 (in this example, the upper surface of the surplus ball tray (lower pan) 4). ing. These LEDs 84 a to 84 f are mounted on a substrate 431 provided on the back surface of the surplus sphere tray (lower pan) 4.

  Further, as shown in FIG. 5, a “U” -shaped lens cover 841 is attached to the upper surface of the surplus sphere tray (lower plate) 4, and when the LEDs 84 a to 84 f are lit or blinking, the lens cover 841 is mounted. The light is diffused and the entire lens cover 841 appears to shine. Specifically, the lens cover 841 includes a protective lens cover t9, a light diffusion lens cover formed in a knurled shape or a cross-cut shape, and a back surface formed in a jagged shape, and the LEDs 84a to 84f. When is turned on or blinks, the light is diffused by the light diffusing lens cover so that the entire lens cover 841 can be seen to shine. The lens cover for light diffusion is colored with a predetermined color (for example, blue), and the LEDs 84a to 84f are turned on or blinking, so that the entire lens cover 841 appears to shine in the predetermined color (for example, blue). In addition, by using a transparent lens cover 841 and using full color LEDs as the LEDs 84a to 84f and changing the emission color of the LEDs 84a to 84f, the entire lens cover 841 can be seen to shine in a predetermined color (for example, blue). May be.

  In this embodiment, lighting or blinking control according to the variation pattern is performed as the LED control of each lamp including the upper pan lamp and the lower pan lamp according to the normal game effect. In this embodiment, as will be described later, the lighting or blinking control of the LED of each lamp is performed based on the process data corresponding to the variation pattern.

  Further, as shown in FIG. 4, the hitting ball supply tray (upper tray) 3 is attached to the game frame 11 via a hinge portion 312 so as to be rotatable. Further, an opening lever 317 for opening the hitting ball supply tray (upper plate) 3 is provided on the right side surface opposite to the side where the hinge portion 312 is provided. The engagement state with the frame is released, and the hitting ball supply tray (upper plate) 3 is rotatable about the hinge portion 312. Further, the hitting ball supply tray (upper plate) 3 is provided with a tray portion 350 for storing game balls, and when a payout process or a ball lending process is performed, the game balls are received from the game ball inlet 311. The game ball is stored in the dish portion 350. Further, the dish part 350 is inclined so as to become lower in the direction from the left side surface to the right side surface, and the game balls stored in the dish part 350 are guided from the left side surface to the right side surface, and pass through the passage 350A. It is guided to the hitting position through. Further, an upper plate slide lever 313 is provided on the hitting ball supply plate (upper plate) 3. The bottom of the hitting ball supply tray (upper plate) 3 is provided with a through-hole for transferring the game balls accumulated in the hitting ball supply tray (upper plate) 3 to the surplus ball receiving tray (lower plate) 4. By sliding 313, the through hole at the bottom of the hit ball supply tray (upper plate) 3 is opened, and the game balls accumulated in the hit ball supply tray (upper plate) 3 are moved to the surplus ball receiving tray (lower plate) 4 side. Can flow in. The hitting ball supply tray (top plate) 3 is provided with a ball lending switch 314 for performing a lending request operation and a return switch 315 for returning a prepaid card inserted into the card unit. Yes. Note that the return switch is not limited to a prepaid card return operation. For example, if the game machine performs a ball lending process by inserting a coin-shaped recording medium (for example, an IC coin) into a card unit, a return switch The coin may be returned by operating 315. Further, the hitting ball supply tray (top plate) 3 is provided with a frequency display LED 316 for displaying the remaining frequency of the prepaid card or the like (the frequency that can be lent out, that is, the amount of value recorded on the recording medium). Yes.

  Further, as shown in FIG. 5, the surplus ball tray (lower pan) 4 is attached to the game frame 11 so as to be rotatable via a hinge portion 401. The surplus ball receiving tray (lower tray) 4 is provided with a tray portion 450 for storing game balls. When the upper tray slide lever 313 is operated, it flows from the hitting ball supply tray (upper tray) 3. The game balls and the game balls that have overflowed and flowed in when the hit ball supply tray (upper plate) 3 is full are stored. In this case, when the upper plate slide lever 313 is operated, or when the hitting ball supply tray (upper plate) 3 becomes full, the game balls from the hitting ball supply plate (upper plate) 3 are injected through the inlet 403 and the Stored in the portion 450. The surplus ball receiving tray (lower tray) 4 is provided with a lower tray slide lever 402. At the bottom of the extra ball tray (lower plate) 4, a through-hole is provided for transferring the game balls accumulated in the extra ball tray (lower plate) 4 to a ball box (box for containing game balls). By sliding the plate slide lever 402, the through-hole at the bottom of the surplus ball receiving tray (lower tray) 4 is opened, and the game balls accumulated in the surplus ball receiving tray (lower tray) 4 can flow into the ball box. it can.

  The game balls launched from the hit ball launching device enter the game area 7 through the hit ball rail, and then descend the game area 7. When a game ball enters the first start winning opening 13 and is detected by the first start opening switch 13a, or when a game ball enters the second start winning opening 14 and is detected by the second start winning opening switch 14a, If the variable display can be started, the special symbol on the special symbol display unit 8 starts variable display (variation), and the variable display device 9 starts variable display (variation). If it is not in a state where the variable display of symbols can be started, the start winning memory number is increased by one.

  The variable display of the special symbol on the special symbol display 8 and the variable display of the decorative symbol on the variable display device 9 are stopped when a certain time has passed. If the special symbol (stop symbol) at the time of stoppage is a jackpot symbol (specific display result), the game shifts to a jackpot gaming state. That is, the special winning opening is opened until a predetermined time elapses or a predetermined number (for example, 10) of game balls wins.

  When the game ball wins the gate 32, the normal symbol display unit 10 is in a state where the normal symbol is variably displayed. When the stop symbol on the normal symbol display 10 is a predetermined symbol (winning symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the probability variation state, the probability that the stop symbol in the normal symbol display 10 becomes a winning symbol is increased, and the opening time and the number of times of opening of the variable winning ball device 15 are increased. Further, in the short time state (the game state in which the variable symbol display time for special symbols is shortened), the opening time and the number of opening times of the variable winning ball device 15 may be increased.

  As described above, the pachinko gaming machine 1 of this embodiment is provided with lamps and LEDs as light emitters in various places. Further, a prepaid card unit (hereinafter also simply referred to as a “card unit”) that enables ball lending by inserting a prepaid card is installed adjacent to the pachinko gaming machine 1 (not shown).

  FIG. 8 is an explanatory diagram showing a state in which the game frame 11 is opened. As shown in FIG. 8, five substrates (frame side IC substrates) 602, 603, 604, 605A, and 605B for mounting ICs and the like are attached to the rear surface on the game frame 11 side. The frame-side IC board 602 attached to the upper part of the game frame 11 is mounted with serial-parallel conversion ICs 610 and 611 for converting serial data into parallel data. From the serial-parallel conversion ICs 610 and 611, the top frame lamp A control signal is supplied to each of the LEDs 281a to 281l. Further, the frame side IC substrate 603 attached to the right side (left side when viewed from the back side) of the game frame 11 is mounted with a serial-parallel conversion IC 612, and each LED 283 a to the right frame lamp from the serial-parallel conversion IC 612. A control signal is supplied to 283f. Further, the frame side IC substrate 604 attached to the left side (right side as viewed from the back side) of the game frame 11 is mounted with a serial-parallel conversion IC 613, and each LED 282 a-of the left frame lamp from the serial-parallel conversion IC 613. A control signal is supplied to 282f.

  Further, a frame side IC board 605A attached to the lower side of the game frame 11 and on the back side of the hitting ball supply tray (upper plate) 3 has a serial-parallel conversion IC 614 and an input for converting parallel data into serial data. IC 620 is mounted, from serial-parallel conversion IC 614 to LED 83 a of the operation button lamp provided on operation buttons 81 a to 81 e and each LED 82 a to 82 f of the upper plate lamp provided on hitting ball supply tray (upper plate) 3. A control signal is supplied. In addition, detection signals from the operation buttons 81a to 81e are input to the input IC 620 in parallel. A frame-side IC board 605B attached to the lower side of the game frame 11 and on the back side of the surplus ball tray (lower plate) 4 is mounted with a serial-parallel conversion IC 615, and the serial-parallel conversion IC 615 is mounted. Then, control signals are supplied to the LEDs 84 a to 84 f of the lower pan lamps provided in the surplus ball tray (lower pan) 4.

  As shown in FIG. 8, in this embodiment, the frame-side IC board 602 attached to the upper part of the game frame 11 among the frame-side IC boards 602, 603, 604, 605A, 605B has two serial- It is configured as a collective board on which a parallel conversion IC is mounted. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  Also, as shown in FIG. 8, a relay board 607 is attached to the game frame 11 side, and wiring from the relay board 607 is connected to the frame side IC board 604, and the frame side IC board 604 is connected to the frame side IC. The frame side IC substrate 602 is connected to the frame side IC substrate 603. Further, the wiring from the relay board 607 is connected to the frame side board 605A. Further, the wiring from the relay board 607 is connected to the frame side board 605B. Further, the wiring between the frame side IC substrates 602 to 604 and the wiring between the frame side IC substrates 604, 605A, and 605B and the relay substrate 607 are provided with connectors 156a to 156j on each substrate as shown in FIG. Connected. FIG. 8 shows a case where the wiring connection is performed using a connector of a type that is connected to the board in the vertical direction. You may make it perform.

  As shown in FIG. 6, the wiring from the connector 156 a of the relay board 607 is connected to the connector 156 b of the frame side IC board 604. The wiring pattern of the frame side IC substrate 604 is further branched from the connector 156b, one is connected to the serial-parallel conversion IC 613, and the other is connected to the connector 156c. Further, in the frame side IC substrate 604, the connector 156c is arranged at an end portion on the frame side IC substrate 602 side. The wiring from the connector 156c of the frame side IC substrate 604 is connected to the connector 156d of the frame side IC substrate 602. The wiring pattern of the frame side IC substrate 602 is further branched into three from the connector 156d and connected to the serial-parallel conversion IC 610, the serial-parallel conversion IC 611, and the connector 156e. Further, in the frame side IC substrate 602, the connector 156e is disposed at an end portion on the frame side IC substrate 603 side. The wiring from the connector 156e of the frame side IC substrate 602 is connected to the connector 156f of the frame side IC substrate 603. The wiring pattern of the frame side IC substrate 603 is connected to the serial-parallel conversion IC 612.

  Further, the wiring from the connector 156g of the relay board 607 is connected to the connector 156h of the frame side IC board 605A. The wiring pattern of the frame side IC substrate 605A is further branched from the connector 156h, and one is connected to the serial-parallel conversion IC 614 and the other is connected to the input IC 620.

  Further, the wiring from the connector 156i of the relay board 607 is connected to the connector 156j of the frame side IC board 605B. The wiring pattern of the frame side IC substrate 605B is connected to the serial-parallel conversion IC 615.

  Further, as shown in FIG. 8, a door opening sensor 155 for detecting the opening of the game frame 11 is attached.

  FIG. 9 is an explanatory view showing the back surface of the game board 6. As shown in FIG. 9, a base (board-side IC substrate) 601 for mounting an IC or the like is attached to the back surface of the game board 6. The board side IC substrate 601 is equipped with three serial-parallel conversion ICs 616 to 618 for converting serial data into parallel data, and a motor for driving the movable members 151 and 152 from the serial-parallel conversion IC 616. A control signal is supplied to 151a and 152a. Further, a control signal is supplied from the serial-parallel conversion IC 617 to the LEDs 125a to 125f of the center decoration lamp. Further, a control signal is supplied from the serial-parallel conversion IC 618 to each LED 126a to 126f of the stage lamp.

  As shown in FIG. 9, in this embodiment, the board side IC substrate 601 is configured as a collective substrate on which three serial-parallel conversion ICs are mounted. With such a configuration, it is possible to consolidate boards on which serial-parallel conversion ICs are mounted, and it is possible to reduce the number of parts in the gaming machine.

  The board side IC board 601 is equipped with an input IC 621 for converting parallel data into serial data, and detection signals from the position sensors 151b and 152b for detecting the positions of the movable members 151 and 152 are input ICs 621. Are input in parallel.

  Further, as shown in FIG. 9, a relay board 606 is attached to the game board 6 side, and a relay board 607 is provided on the game frame 11 side. The wiring from the effect control means is first connected to the relay board 606 and further connected to the relay board 607. The wiring from the relay board 606 is connected to the board side IC board 601. Further, as shown in FIG. 9, the wiring between the board side IC substrate 601 and the relay substrate 606, the wiring between the relay substrates 606 and 607, and the wiring between the relay substrate 606 and the effect control means are as shown in FIG. Are connected using connectors 157a to 157e. The connection method of the connectors 157a to 157e is the same as the connection method of the connectors 156a to 156h shown in FIG.

  Further, the relay relays the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, and 605B and the serial-parallel conversion ICs 616 to 618 mounted on the panel side IC substrate 601. A substrate may be provided. In this case, the relay board may be arranged on either the game frame 11 side or the game board 6 side.

  Further, a relay board may be provided to relay the effect control board 80 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602, 603, 604, 605A, and 605B. In this case, the relay board may be arranged on either the game frame 11 side or the game board 6 side.

  An opening is formed in the upper plate of the plastic frame above the hole for paying out the game ball, and a relay board 607 is provided in the opening. The relay board 607 is a board that relays through the front and back connectors. The connector 157a is disposed on the front side of the plastic frame, and the connectors 156a, 156g, and 156i are disposed on the back side. Further, the relay board 607 is disposed at the end of the opening to which the game board 6 is attached. As shown in FIG. 6, the relay board 607 is formed in a shape that follows the shape of the end of the opening to which the game board 6 is attached. The relay board 607 is in a state of being shifted so that the positions of the connector 157a arranged on the front side and the connectors 156a, 156g, 156i arranged on the back side do not overlap.

  A relay board 606 is provided on the back side of the game board 6. As shown in FIG. 9, the relay board 606 is provided at the end of the game board 6 so as to be positioned in the vicinity of the relay board 607 of the plastic frame. The relay board 606 is a board that relays via a connector, and connectors 157b to 157d are arranged. The connector 157b is connected to the production control microcomputer 100 mounted on the game board 6.

  FIG. 10 is a block diagram showing an example of the circuit configuration of the main board (game control board) 31. FIG. 10 also shows a payout control board 37, an effect control board 80, and the like. A game control microcomputer (corresponding to a game control means) 560 for controlling the pachinko gaming machine 1 according to a program is mounted on the main board 31. The game control microcomputer 560 includes a ROM 54 for storing a game control (game progress control) program and the like, a RAM 55 as storage means used as a work memory, a CPU 56 for performing control operations in accordance with the program, and an I / O port unit 57. And a serial output circuit for converting parallel data into serial data and outputting the serial data. In this embodiment, the ROM 54 and the RAM 55 are built in the game control microcomputer 560. That is, the game control microcomputer 560 is a one-chip microcomputer. The one-chip microcomputer only needs to incorporate at least the CPU 56 and the RAM 55, and the ROM 54 may be external or built-in. The I / O port unit 57 may be externally attached.

  A random number circuit 503 for generating hardware random numbers is connected to the game control microcomputer 560. The game control microcomputer 560 reads the random number value from the random number circuit 503 when the condition for extracting the random number value is satisfied. The random number circuit 503 is a counter that counts clock signals having a predetermined frequency, and the count value of the counter becomes a random value. A clock signal having a predetermined frequency supplied to the random number circuit 503 is input to a clear terminal of a monitoring circuit (watchdog timer (WDT)) 504. The monitoring circuit is a counter that counts a clock signal having a frequency higher than the frequency of the clock signal input to the clear terminal, but the count value is reset when the clock signal input to the clear terminal becomes high level, for example. Therefore, when the clock signal input to the clear terminal stops for some reason, the monitoring circuit 504 counts up. The fact that the monitoring circuit 504 has counted up indicates that no clock signal is supplied to the random number circuit 503. When counting up, the monitoring circuit 504 outputs a random number error signal indicating that the random number circuit 503 is not operating normally to the gaming control microcomputer 560.

  In the game control microcomputer 560, the CPU 56 executes control in accordance with the program stored in the ROM 54, so that the game control microcomputer 560 (or CPU 56) executes (or performs processing) hereinafter. Specifically, the CPU 56 executes control according to a program. The same applies to microcomputers mounted on substrates other than the main substrate 31.

  Also, an input driver circuit for supplying detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a and 39a to the game control microcomputer 560. 58 is also mounted on the main board 31. The main board also includes an output circuit 59 for driving the solenoid 16 for opening and closing the variable winning ball device 15 and the solenoid 21 for opening and closing the special variable winning ball device 20 that forms a big winning opening in accordance with a command from the game control microcomputer 560. 31.

  In addition, the game control microcomputer 560 includes a special symbol display 8 that variably displays special symbols, a normal symbol display 10 that variably displays normal symbols, a special symbol hold memory display 18, and a normal symbol hold memory display 41. Perform display control.

  The serial output circuit 78 mounted on the game control microcomputer 560 is constituted by a shift register or the like. The serial control circuit 78 converts the presentation control command output from the CPU 56 into serial data, and sends it to the presentation control board 80 via the relay board 77. Send. The serial output circuit 78 converts the control signal output from the CPU 56 into serial data, and via the relay board 77, the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol. Output to the on-hold storage display 41. The special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10 and the normal symbol hold storage display 41 are provided with serial-parallel conversion ICs for converting serial data into parallel data, respectively. The control signal from the relay board 77 is converted into parallel data and supplied to the special symbol display 8, the special symbol hold storage display 18, the normal symbol display 10, and the normal symbol hold storage display 41.

  The game control microcomputer 560 may include an output circuit that transmits the effect control command in the parallel signal format, and the effect control command output from the CPU 56 may be transmitted to the effect control board 80 in the parallel signal format.

  An information output circuit 64 that outputs an information output signal such as jackpot information indicating the occurrence of a jackpot gaming state to an external device such as a hall computer via an information terminal board (frame board / external terminal board) 34 is also mainly used. It is mounted on the substrate 31. The information terminal board 34 is installed on the back surface of the gaming machine. An information output signal from the payout control board 37 is also input to the information terminal board 34 (see FIG. 11).

  In addition, a storage tank for storing game balls is installed on the back surface of the gaming machine, and the game balls stored in the storage tank reach the ball payout device. Above the ball payout device, a ball break switch as a game medium break detection means is provided. When the ball break switch detects a ball break, the dispensing operation of the ball dispensing device stops. The ball break switch is a switch for detecting the presence or absence of a game ball in the game ball passage, but a ball break detection switch for detecting the shortage of supply balls in the storage tank is also provided in a portion close to the storage tank. When the shortage of balls detection switch detects a shortage of game balls, the game balls are replenished from the replenishment mechanism provided on the gaming machine installation island.

  When a large number of game balls as prizes based on winning a prize and game balls based on a ball lending request are paid out and the hitting ball supply tray 3 is full, the game balls are guided to the surplus ball receiving tray 4 through the surplus ball passage. When the game ball is further paid out, a sensing lever (not shown) presses a full tank switch (not shown) as a storage state detection means, and the full tank switch as a storage state detection means is turned on. In this state, the rotation of the payout motor in the ball payout device is stopped, the operation of the ball payout device is stopped, and the driving of the ball hitting device is also stopped.

  Further, in this embodiment, the effect control means (configured by the effect control microcomputer) mounted on the effect control board 80 is used to provide effect control from the game control microcomputer 560 via the relay board 77. The command is received by a serial signal system (serial communication system: a system in which data is transmitted by one signal line), and display control of the variable display device 9 for variably displaying decorative symbols is performed.

  Further, the effect control means mounted on the effect control board 80 controls the display of the center decoration lamps 125a to 125f and the stage lamps 126a to 126f provided on the game board 6, and is provided on the frame side. Display frame lamps 281a to 281l, left frame lamps 282a to 282f, right frame lamps 283a to 283f, upper pan lamps 82a to 82f, operation button lamp 83 and lower pan lamps 84a to 84f. Controls sound output.

  The effect control microcomputer 100 of the effect control board 80 includes lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, which are output from the effect control means. A serial output circuit 353 for converting a control signal for display control of 84a to 84f from parallel data to serial data is mounted. In addition, the effect control microcomputer 100 of the effect control board 80 is equipped with a serial input circuit 354 that converts the input serial data into parallel data and outputs the parallel data to the effect control means. Therefore, the effect control means outputs the control signal as a serial data system via the serial output circuit 353, whereby the lamps 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82a. Display control of 82f, 83, 84a to 84f (specifically, light emission control, that is, lighting control (flashing control)) is performed.

  On the game board side, a board-side IC board 601 on which a serial-parallel conversion IC for converting serial data into parallel data is mounted. The board side IC substrate 601 is connected to the effect control substrate 80 via the relay substrate 606. On the game frame 11 side, frame-side IC substrates 602, 603, 604, 605A, and 605B on which serial-parallel conversion ICs for converting serial data into parallel data are mounted. Each frame side IC substrate 602, 603, 604, 605A, 605B is connected to the effect control substrate 80 via the relay substrate 606, 607.

  As shown in FIG. 10, the effect control board 80, the relay board 606, and the relay board 607 are connected to each other by a single wiring route in a bus shape.

  FIG. 11 is a block diagram showing components related to payout, such as the payout control board 37 and the ball payout device 97. As shown in FIG. 11, the payout control board 37 includes a payout control microcomputer 370 including an payout control CPU 371 (an example of an electric component control microcomputer that controls electrically driven electric components). It is installed. In this embodiment, the payout control microcomputer 370 is a one-chip microcomputer and incorporates at least a RAM. The payout control CPU 371, the RAM (not shown), the ROM (not shown) storing the payout control program, the I / O port, and the like constitute the payout control means. That is, the payout control means is realized by a payout control CPU 371, a payout control microcomputer 370 having a RAM and a ROM, and an I / O port. The I / O port may be built in the payout control microcomputer 370.

  Detection signals from the ball break switch 187 and the full tank switch 48 are input to the I / O port 372 f of the payout control board 37 via the relay board 72. The detection signal of the payout number count switch 301 is input to the I / O port 372e of the payout control board 37 via the relay board 72. A detection signal from the payout motor position sensor 295 is input to the I / O port 372e of the payout control board 37 via the relay board 72. The payout motor 289 is provided in the ball payout device 97 and rotates to pay out payout game balls stored on the back surface of the game machine. The payout motor position sensor 295 is a sensor composed of a light emitting element (LED) and a light receiving element for detecting the rotational position of the payout motor 289, and is used for detecting that the game ball is clogged, that is, so-called ball biting. It is done. In the payout control microcomputer 370 mounted on the payout control board 37, the detection signal from the ball break switch 187 indicates that the ball is out of ball, or the detection signal from the full tank switch 48 indicates that the ball is full. Then, the ball payout process is stopped. Furthermore, when the detection signal from the full tank switch 48 indicates a full tank state, the ball launching from the ball striking device is stopped. Note that even when the detection signal from the full tank switch 48 indicates a full state, the ball firing from the ball striking device may not be stopped. When the signal line from the game control microcomputer 560 is connected to the ball hitting device, the game control microcomputer 560 stops the ball shot from the ball hitting device. Also good.

  When there is a winning game ball at the winning opening, a prize ball number signal (payout number data) indicating the number of prize balls to be paid out and a prize ball number signal are fetched from the output circuit 67 of the main board 31 as a payout command signal. A prize ball REQ signal (capture request signal) requesting (reception) is output (transmitted). Specifically, it is turned on. The award ball number signal is composed of 4-bit data (binary 4-digit data) and is output through four signal lines. Note that the on state of the signal, that is, the output state is a state where the signal is significant, and turning on means that the signal receiving side is instructed to start some processing based on the signal. To do. For example, when the prize ball number signal indicating the number of prize balls and the prize ball REQ signal are turned on, the microcomputer 370 is commanded to recognize the number of prizes indicated by the prize ball number signal. Means that. Alternatively, the signal may be turned on by outputting a signal, and the signal may be turned off by stopping the signal output. However, a signal corresponding to the on state is output when the signal is turned on, and the signal is output according to the off condition when the signal is turned off. Alternatively, the on state and the off state may be switched by outputting a signal.

  The prize ball REQ signal and the prize ball number signal are input to the I / O port 372e via the input circuit 373A. When the payout control microcomputer 370 receives the prize ball number signal via the I / O port 372e, the payout control microcomputer 370 controls to drive the ball payout device 97 to pay out the number of game balls indicated by the prize ball number signal. The prize ball REQ signal and the prize ball number signal correspond to a payout command signal for designating the number of payouts.

  The payout control microcomputer 370 outputs a prize ball information signal indicating the number of prize balls paid out and a ball rental number signal indicating the number of balls lent to the information terminal board (frame board / external terminal board) 34 via the output port 372g. To do. Although a driver circuit is installed outside the output port 372g, the description is omitted in FIG.

  Also, the payout control microcomputer 370 outputs an error signal to the error display LED 374 using a 7-segment LED via the output port 372c. A detection signal from an error release switch 375 for releasing the error state is input to the input port 372f of the payout control board 37. The error cancel switch 375 is used to cancel the error state by software reset.

  Further, a drive signal from the payout control microcomputer 370 to the payout motor 289 is transmitted to the payout motor 289 in the payout mechanism portion of the ball payout device 97 via the output port 372a and the relay board 72. A driver circuit (motor drive circuit) is installed outside the output port 372a, but is not shown in FIG.

  A card unit control microcomputer is mounted on the card unit 50 installed adjacent to the gaming machine. In addition, the card unit 50 is provided with a usable display lamp, a connecting table direction indicator, a card insertion display lamp, and a card insertion slot. The interface board (relay board) 66 is connected to a power display LED 60, a ball lending LED 61, a ball lending switch 62, and a return switch 63 (not shown in FIG. 1) provided in the vicinity of the hitting ball supply tray 3. .

  A card lending switch signal indicating that the ball lending switch 62 has been operated and a return switch signal indicating that the return switch 63 has been operated are provided to the card unit 50 from the interface board 66 in accordance with the player's operation. . Further, a card balance display signal indicating a prepaid card balance and a ball lending display signal are given from the card unit 50 to the interface board 66. Between the card unit 50 and the payout control board 37, a connection signal (VL signal), a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal) and a pachinko machine operation signal ( PRDY signal) is transmitted / received via the input port 372f and the output port 372d. An interface board 66 is interposed between the card unit 50 and the payout control board 37. Therefore, a signal such as a connection signal (VL signal) is transmitted and received between the card unit 50 and the payout control board 37 via the interface board 66 as shown in FIG.

  When the power of the pachinko gaming machine 1 is turned on, the payout control microcomputer 370 mounted on the payout control board 37 outputs a PRDY signal to the card unit 50. The card unit control microcomputer outputs a VL signal when the power is turned on. The payout control microcomputer 370 determines the connected / unconnected state of the card unit 50 according to the input state of the VL signal. When a card is received in the card unit 50, the ball lending switch is operated and a ball lending switch signal is input, the card unit control microcomputer outputs a BRDY signal to the payout control board 37. When a predetermined delay time elapses from this point, the card unit control microcomputer outputs a BRQ signal to the payout control board 37.

  Then, the payout control microcomputer 370 raises the EXS signal to the card unit 50 and, when detecting the fall of the BRQ signal from the card unit 50, drives the payout motor 289 to give a predetermined number of rental balls to the player. Pay out. When the payout is completed, the payout control microcomputer 370 causes the EXS signal to the card unit 50 to fall. Thereafter, when a BRDY signal from the card unit 50 is not in an ON state, a prize ball payout control is executed when a payout command signal is received from the game control means.

  In this embodiment, the case where the card unit 50 is installed adjacent to the gaming machine as a separate body from the gaming machine is taken as an example, but the card unit 50 may be integrated with the gaming machine. . Further, the present invention can be applied even in the case where game balls corresponding to the amount of money are lent out in accordance with coin insertion.

  Further, the detection signal of the door opening sensor 155 is input to the payout control board 37. In the payout control board 37, the detection signal of the door opening sensor 155 is not input to the payout control microcomputer 370 but is output to the main board 31 via the output circuit 373B. The output may be output to the main board 31 without going through the output circuit 373B. Further, the payout control microcomputer 370 outputs signals corresponding to detection signals of the full switch 48, the ball break switch 187, and the payout number count switch 301 to the main board 31 via the output port 372b and the output circuit 373B. However, the detection signals of the full tank switch 48, the ball break switch 187 and the payout count switch 301 that are input to the payout control microcomputer 370 are branched at the payout control board 37, and the branched detection signal is output to the output circuit 373B. Via the main board 31. In such a configuration, the payout control microcomputer 370 need not output from the output port 372b signals corresponding to the detection signals of the full tank switch 48, the ball break switch 187, and the payout number count switch 301.

  The detection signal of the door opening sensor 155 input to the payout control board 37 may be further output from the information output circuit 64 to the information terminal board 34 via the main board 31. In this case, the detection signal of the door opening sensor 155 is directly output to the information terminal board 34 via the main control board 31 and the payout control board 37 without being input to both the game control microcomputer 560 and the payout control microcomputer 370. You may make it do.

  FIG. 12 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80. In addition, although the example shown in FIG. 12 shows the case where only the effect control board 80 is provided regarding effect control, you may provide a lamp driver board | substrate and an audio | voice output board | substrate. In this case, the lamp driver board and the sound output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control microcomputer 100 including an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356 and an input capture signal output unit 357. It is installed. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives an effect control command via the serial input circuit 102 and the input port 103. In this case, the serial input circuit 102 converts the effect control command received as the serial data method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 based on the effect control command.

  In this embodiment, a VDP 109 that performs display control of the variable display device 9 in cooperation with the effect control microcomputer 100 is mounted on the effect control board 80. The VDP 109 has an address space independent of the production control microcomputer 100, and maps a VRAM therein. VRAM is a buffer memory for developing image data. The VDP 109 outputs the image data in the VRAM to the variable display device 9 via the frame memory.

  The effect control CPU 101 outputs to the VDP 109 a command for reading out necessary data from a CGROM (not shown) in accordance with the received effect control command. The CGROM stores character image data and moving image data displayed on the variable display device 9, specifically, a person, characters, figures, symbols, etc. (including decorative designs), and background image data in advance. ROM. The VDP 109 reads image data from the CGROM in response to the instruction from the effect control CPU 101. The VDP 109 executes display control based on the read image data.

  As a signal direction regulating means, the signal inputted from the main board 31 is allowed to pass through the relay board 77 only in the direction toward the effect control board 80 (the signal is not passed in the direction from the effect control board 80 to the relay board 77). The unidirectional circuit 74 is mounted. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 12 illustrates a diode.

  Further, the effect control CPU 101 outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606. Further, the production control CPU 101 outputs the sound number data to the speech synthesis IC 173.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 610 to 615 and the input IC 620 mounted on the frame side IC boards 602, 603, 604, 604A, and 605B via the relay boards 606 and 607. The The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 618 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial-parallel conversion ICs 610 to 618 and the input ICs 620 and 621.

  In addition, the input capture signal output unit 357 receives input to the board side IC board 601 or the frame side IC boards 602, 603, 604, 604A, and 605B via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Output a latch signal. When the input IC 620 mounted on the frame side IC board 605A receives an input capture signal from the production control microcomputer 100, the detection signals of the operation buttons 81a to 81e are latched, and the relay boards 606 and 607 are serial data systems. To the production control microcomputer 100. The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b and 152b when an input input signal from the production control microcomputer 100 is input, and relays the serial board as a serial data system. It outputs to the production control microcomputer 100 via 606.

  When the sound number IC 173 receives the sound number data, the sound synthesizing IC 173 generates a sound or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  FIG. 13 is a block diagram illustrating a configuration example of the information terminal board 34. In the example shown in FIG. 13, a signal is input to the information terminal board 34 from the main board 31 via the cable 343 and the connector 341, and a signal is input from the payout control board 37 via the cable 344 and the connector 342. A signal input via the cable 343 is output to, for example, a hall computer via the driver circuit 345, the connector 347, and the cable 349. A signal input via the cable 344 is output to, for example, a hall computer via the driver circuit 346, the connector 348, and the cable 349.

  In the information terminal board (frame board / external terminal board) 34 shown in FIG. 13, the upper part (area where the connector 341, driver circuit 345 and connector 347 are provided) in FIG. The lower portion (the region where the connector 342, the driver circuit 346, and the connector 348 are provided) corresponds to the frame external terminal board. That is, a part related to a signal from the main board 31 or a signal from the payout control board 37 (for example, an information output signal from the payout control board 37 (specifically, a prize ball information signal indicating the number of prize balls paid out or a lending) It is possible to easily determine whether the portion is related to a ball lending number signal indicating the number of balls)).

  FIG. 14 is an explanatory diagram showing an example of output port assignment in the game control means. As shown in FIG. 14, the output port 0 is an output port for a payout command signal transmitted to the payout control board 37. Note that the logic (eg, 0 is on) opposite to the “logic” (eg, 1 is on) shown in FIG. 14 may be used.

  From the output port 1, a solenoid (large winning opening door solenoid) 21 for opening and closing a variable winning ball apparatus 20 for opening and closing a large winning opening and a solenoid (ordinary electric accessory solenoid) 16 for opening and closing the variable winning ball apparatus 15 are opened. The drive signal for is output. Output ports 0 and 1 are part of the I / O port unit 57 shown in FIG. Further, the time when the signal is in the ON state corresponds to the state where the “signal is being output”.

  FIG. 15 is an explanatory diagram showing an example of bit assignment of input ports in the game control means. As shown in FIG. 15, the bits 0 to 7 of the input port 0 have a count switch 23, a gate switch 32a, winning port switches 33a, 39a, 29a, 30a, a second starting port switch 14a, and a first starting port, respectively. A detection signal of the switch 13a is input.

  In addition, the winning ball count signal, the full tank signal, the ball runout signal, the payout error signal, and the door opening / closing signal from the payout control board 37 are input to bits 0 to 4 of the input port 1, respectively. The high level “1” of the prize ball count signal corresponds to the ON state (the state where the payout number count switch 301 is ON). The high level “1” of the full signal corresponds to the on state (the full switch 48 is on). The high level “1” of the ball break signal corresponds to the on state (the state in which the ball break switch 187 is turned on). A high level “1” of the door opening / closing signal corresponds to a state where the door opening sensor 155 does not detect the opening of the game frame 11 (a state where the door is closed).

  A random number error signal from the monitoring circuit 504 is input to bit 5 of the input port 1. The low level (“0”) of the random number error signal corresponds to the ON state (the state where the random number error has occurred). That is, the monitoring circuit 504 maintains the random number error signal at a high level when normal, but changes the random number error signal to a low level when abnormal. Note that a logic opposite to the “logic” shown in FIG. 15 may be used. For example, an input signal in which 1 is on may be an input signal in which 0 is on.

  Bits 0 and 1 of the input port 2 are supplied with a power-off signal from the power supply board and a clear switch detection signal (clear signal), respectively. The power-off signal is a signal that is output when a power supply monitoring circuit mounted on the power supply board detects a decrease in a predetermined voltage. The clear switch is a switch that can be operated by a game clerk or the like, and is a switch that is operated when the RAM 55 is to be initialized. The input ports 0 to 2 are a part of the I / O port unit 57 shown in FIG. Further, the time when the signal is in the ON state corresponds to the state where the “signal is input”.

  FIG. 16 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, 605A, and 605B. The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the production control microcomputer 100 to the serial-parallel conversion ICs 616 to 618 mounted on the board side IC board 601. And each serial-parallel conversion IC616-618 converts the input serial data into parallel data, LED125a-125f of each lamp provided in the game board 6, 126a-126f, motor 151a of each movable member, It supplies to 152a.

  Further, the relay board 607 is connected to the relay board 606 through a single wiring route in a bus type, and the serial data line 300 and the clock signal line 301 connected to each serial-parallel conversion IC 616 to 618 are connected to the board side. It is connected to the bus form on the IC substrate 601. The connection to the bus type means that a plurality of serial-parallel conversion ICs or relay boards are connected to one wiring route.

  Each serial-parallel conversion IC 616 to 618 mounted on the board-side IC board 601 has a unique ID. In this embodiment, as shown in FIG. 16, the ID of IC 616 is 06, the ID of IC 617 is 07, and the ID of IC 618 is 08.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the production control microcomputer 100 mounted on the board-side IC board 601 include an input signal line 302, a clock signal line 301, and an input capture signal line 303 via a relay board 606. The presentation control microcomputer 100 is connected and outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input fetch signal (latch signal) and outputs it to the effect control microcomputer 100 via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it. In this embodiment, the unique ID of the input IC 621 is 11, as shown in FIG.

  As shown in FIG. 16, the serial data and clock signal input to the relay board 607 are supplied to the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602, 603, 604, 605A, and 605B. The And each serial-parallel conversion IC610-615 converts the input serial data into parallel data, LED281a-281l of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a-82f, 83, 84a to 84f.

  The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 610 to 613 are connected in a bus format on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 16, first, the serial-parallel conversion IC 613 of the frame-side IC substrate 604 is input, and the serial-parallel conversion IC 613 and the serial-parallel conversion IC 610 of the frame-side IC substrate 602 and the serial-parallel The signals are input in the order of the parallel conversion IC 611, and further input from the serial-parallel conversion IC 611 to the serial-parallel conversion IC 612 of the frame side IC substrate 603. The serial data line and the clock signal line connected to the serial-parallel conversion IC 614 are directly connected from the relay substrate 607. The serial data line and the clock signal line connected to the serial-parallel conversion IC 615 are directly connected from the relay board 607.

  Each serial-parallel conversion IC 610-615 mounted on each frame side IC substrate 602, 603, 604, 605A, 605B has a unique ID. In this embodiment, as shown in FIG. 16, the ID of IC 610 is 00, the ID of IC 611 is 01, the ID of IC 612 is 02, the ID of IC 613 is 03, and the ID of IC 614 is 04. The ID of the IC 615 is 05.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81a to 81e provided on the game frame 11 is mounted on the frame side IC board 605A. In this embodiment, an input signal line, a clock signal line, and an input take-in signal line are connected to the input IC 620 mounted on the frame side IC board 605A and the effect control microcomputer 100 via the relay boards 606 and 607. Thus, the production control microcomputer 100 outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the production control microcomputer 100 outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the effect control microcomputer 100 via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data. In this embodiment, the unique ID of the input IC 620 is 10 as shown in FIG.

  The serial-parallel conversion ICs 616 to 618 mounted on the panel-side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame-side IC substrates 602, 603, 604, 605A, and 605B have one system wiring. Connected through. Specifically, the connection via one line of wiring means that the relay boards 606 and 607 are connected in a bus type, and the serial-parallel conversion ICs 610 to 618 are connected in a bus type or a daisy chain type. It is that. In this embodiment, as shown in FIG. 16, the serial-parallel conversion ICs 610 to 618 are connected in a bus type. As described above, in this embodiment, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC board 601 and the serial-boards mounted on the frame-side IC boards 602, 603, 604, 605A, 605B. Parallel ICs 610 to 615 are connected to each other via a single line of wiring using connectors 156a to 156j and 157a to 157e via relay boards 606 and 607. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 610 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B. A common clock signal is input from the production control microcomputer 100 to 615 and the input ICs 620 and 621. Therefore, the wiring of the clock signal to the serial-parallel conversion ICs 610 to 618 and the wiring of the clock signal to the input ICs 620 and 621 can be shared, communication between the effect control means and the board side IC 601 board, Communication between the effect control means and the frame side IC substrates 602, 603, 604, 605A, and 605B can be realized using one channel, respectively, and the number of wirings can be reduced. Also, serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601, serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605 A, and 605 B, and input ICs 620 and 621, Can be easily synchronized, and the number of wiring lines for clock signals can be reduced.

  In this embodiment, each serial-parallel conversion IC 610 to 618 is assigned an address in advance, and when the production control microcomputer 100 outputs a control signal converted to serial data, the serial data is addressed to serial data. Is added and output. When serial data is input, each serial-parallel conversion IC 610-618 checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. Are supplied (ie, output) to the LEDs of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  As shown in FIG. 16, the production control microcomputer 100 performs bidirectional communication with the board side IC substrate 601 and the frame side IC substrates 602, 603, 604, 605A, and 605B (specifically, serial data). Are transmitted to the serial-parallel conversion ICs 610 to 618, and input signals are input from the input ICs 620 and 621). Therefore, a data input terminal and a data output terminal are provided, and data input and data output are performed in one channel. And can be done. In this embodiment, as shown in FIG. 16, a data input terminal and a data output terminal of one channel are respectively connected to different output target devices (in this example, serial-parallel conversion ICs 610 to 618) and input target devices ( In this example, the input ICs 620 and 621) are connected. With such a configuration, when the output target device and the input target device are originally different devices, the communication should be performed using different channels in both directions. Communication is possible, and the number of channels between the production control microcomputer 100 and the board-side IC board 601 and the frame-side IC boards 602, 603, 604, 605A, 605B is reduced.

  In this embodiment, the channel is a terminal for a data line (output data line), a clock signal line, an input signal line (input data line), and an input take-in signal line (signal line for input data read request). Is a set. One channel may include a ground wire or a terminal dedicated to the power source. Further, in this embodiment, a case where both data input and data output are performed using one channel is shown, but an output-dedicated channel in which only a terminal for a data line (output data line) and a clock signal line is set. May be used. Alternatively, an input-only channel in which only terminals for input signal lines (input data lines) and input take-in signal lines (input data read request signal lines) are set may be used.

  17 and 18 are explanatory diagrams showing examples of addresses given to the serial-parallel conversion ICs 610 to 618. In this embodiment, the production control microcomputer 100 stores the addresses of the serial-parallel conversion ICs 610 to 618 shown in FIGS. 17 and 18 in a predetermined address storage area previously provided in the ROM.

  In this embodiment, as shown in FIGS. 17 and 18, in the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, and 605B, an address 00 is assigned to the IC 610. Thus, the address 01 is assigned to the IC 611, the address 02 is assigned to the IC 612, the address 03 is assigned to the IC 613, the address 04 is assigned to the IC 614, and the address 05 is assigned to the IC 615. Further, in the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601, the address 006 is assigned to the IC 616, the address 07 is assigned to the IC 617, and the address 08 is assigned to the IC 618.

  The serial-parallel conversion ICs 610 to 618 may be assigned the same ID as the unique ID of the IC, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC. Good.

  Also, as shown in FIGS. 17 and 18, the serial-parallel conversion IC 610 whose address is 00 converts serial data into parallel data, and the LED of the top frame lamp of the game frame 11 (in this example, the top frame lamp 281a). To 6 LEDs (281a to 281f) of .about.281l. The serial-parallel conversion IC 611 whose address is 01 converts serial data into parallel data, and the LED of the ceiling lamp of the game frame 11 (in this example, the other six LEDs (281g to 281g to 280g). 281 l)). The serial-parallel conversion IC 612 whose address is 02 converts the serial data into parallel data and supplies the parallel data to the LEDs of the right frame lamp of the game frame 11 (in this example, 6 LEDs (283a to 283f)). The serial-parallel conversion IC 613 whose address is 03 converts the serial data into parallel data and supplies it to the LEDs of the left frame lamp of the game frame 11 (in this example, 6 LEDs (282a to 282f)).

  Further, the serial-parallel conversion IC 614 whose address is 04 converts serial data into parallel data, and an upper plate lamp (in this example, 6 LEDs (82a to 82f)) provided on the hitting ball supply tray 3 of the game frame 11. And an operation button lamp 83 (one lamp in this example) provided on the operation buttons 81a to 81e. As shown in FIG. 17, the hitting ball supply tray 3 is provided with two LEDs on the front, left side, and right side as upper plate lamps.

  The serial-parallel conversion IC 615 whose address is 05 converts the serial data into parallel data, and lower tray lamps provided in the surplus ball receiving tray 4 of the game frame 11 (in this example, 6 LEDs (84a to 84f)) To supply.

  The serial-parallel conversion IC 616 whose address is 06 converts serial data into parallel data, and each movable member provided in the game board 6 (in this example, a role imitating the shape of a beam and a truck). It is supplied to a motor for driving (in this example, three motors (151a, 152a) are each in the direction opposite to the forward direction). The serial-parallel conversion IC 617 whose address is 07 converts serial data into parallel data, and each lamp of the decorative structure (center decoration) provided in the center of the game board 6 (in this example, six LEDs (125a To 125 f)). Further, the serial-parallel conversion IC 618 whose address is 08 converts serial data into parallel data, and supplies it to each stage lamp (in this example, six LEDs (126a to 126f)) provided around the variable display device 9. To do.

  In this embodiment, each input IC 620, 621 is also given an address in advance. FIG. 19 is an explanatory diagram illustrating an example of addresses given to the input ICs 620 and 621. The production control microcomputer 100 stores the addresses of the input ICs 620 and 621 in a predetermined address storage area provided in advance in the ROM. In this embodiment, as shown in FIG. 19, an address 10 is assigned to the input IC 620 mounted on the frame side IC board 605, and an address 11 is assigned to the input IC 621 mounted on the board side IC board 601. ing.

  Each input IC 620, 621 may be given the same ID as the unique ID of the IC as an address, or may be given an address including numbers, characters, and symbols different from the unique ID of the IC.

  Further, as shown in FIG. 19, the input IC 620 whose address is 10 is the detection signal of the operation buttons 81a to 81e provided in the game frame 11 (whether or not the operation buttons 81a to 81e themselves are turned on, the operation button 81a ˜81e) is inputted in parallel, converted into serial data, and outputted. The input IC 621 whose address is 11 inputs the detection signals of the position sensors 151b and 152b (two in this example) provided on each movable member of the game board 6 in parallel, converts them into serial data, and outputs them. To do.

  FIG. 20 is a block diagram showing the configuration of each serial-parallel conversion IC 610-618. As illustrated in FIG. 20, the serial-parallel conversion ICs 610 to 618 include a data latch unit 651, a shift register 652, a header / address detection unit 653, a data buffer 655, and a sync driver 656.

  The data latch unit 651 includes, for example, a latch circuit. When serial data is input, the data latch unit 651 latches the input data bit by bit at the rising timing of the clock signal pulse and outputs the latched data to the shift register 652. The shift register 652 sequentially stores data input bit by bit from the data latch unit 651. The shift register 652 shifts stored data bit by bit at the rising timing of the pulse of the clock signal. By repeatedly shifting the stored data bit by bit as described above, the data finally input as serial data (that is, in a serial manner) is stored in the shift register 652.

  FIG. 21 is an explanatory diagram showing an example of the format of serial data output from the production control microcomputer 100. FIG. 21A shows a data format of serial data output as lamp lighting data for individually lighting or extinguishing the LEDs of each lamp provided on the game board 6 or the game frame 11. FIG. 21B shows the format of serial data output as a reset command for resetting the LEDs of the respective lamps provided on the game board 6 and the game frame 11 to turn them off.

  As shown in FIG. 21A, the lamp lighting data is composed of 28 bits, and includes 9-bit header data, mark bits (M), 8-bit addresses, 8-bit data, and end bits (E). .

  The header data represents the head of the data, and is 1FF (h) in this example. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the address and between the address and the data. The address is the address of the data-output destination serial-parallel conversion IC. An ID that is a unique serial number of each of the serial-parallel conversion ICs 610 to 618 may be used as the address.

  The data (8 bits) is for controlling the lighting state of the LED of each lamp, and includes, for example, a logical value 1 as a bit corresponding to the LED of the lamp to be lit, Corresponding bits contain the logical value 0. The end bit (E) indicates the end of data, and has a logical value of 0 in this example.

  As shown in FIG. 21B, the reset command is composed of 19 bits, and includes 9-bit header data, mark bits (M), 8-bit reset data, and end bits (E).

  The header data represents the head of the data, and is 1FF (h) in this example. The mark bit (M) is a bit (logical value 0 in this example) representing a data delimiter, and is inserted between the header data and the reset data. The reset data is for resetting the lighting states of the LEDs of the respective lamps so that all the lamps are extinguished. The end bit (E) indicates the end of data, and has a logical value of 0 in this example.

  In this embodiment, the lamp lighting data shown in FIG. 21A or the reset command shown in FIG. 21B is input, and the shift register 652 is repeatedly shifted bit by bit at the rising timing of the clock signal pulse. Will be stored.

  The header / address detector 653 detects the header and address from the data stored in the shift register 652. First, the header / address detection unit 653 constantly detects data from the shift register 652, and confirms whether or not the content of the detected data matches 1FF (h) corresponding to the header data. If it matches the header data (1FF (h)), it is determined that the position that matches the header data is the head of the data, and it is determined that one set of lamp lighting data or reset command is stored in the shift register 652. Next, the header / address detection unit 653 detects the 11th to 18th bits of data from the head corresponding to the address from the shift register 652, and whether or not it matches the address previously given to the serial-parallel conversion IC. To check. The board side IC substrate 601 and each frame side IC substrate 602, 603, 604, 605A, 605B are provided with an address storage register 654 for storing the address of each serial-parallel conversion IC to be mounted, for example. The address detection unit 653 may confirm whether or not the address detected from the shift register 652 matches the address stored in the address storage register 654 in advance. If the addresses match, the header / address detection 653 determines that data destined for the serial-parallel conversion IC has been input, and outputs an input capture signal (latch signal) to the data buffer 655. If the addresses do not match, the header / address detection 653 does not output the input capture signal to the data buffer 655. That is, in this case, since the data is not destined for the serial-parallel conversion IC, the data stored in the shift register 652 is discarded without being output to the data buffer 655.

  20 shows a case where the address storage register 654 is provided in advance on the board side IC substrate 601 and the frame side IC substrates 602, 603, 604, 605A, 605B. Thus, an external hardware circuit (for example, the effect control board 80 is mounted) via an address terminal (8 terminals (corresponding to each bit of the 8-bit address)) provided in the serial-parallel conversion IC. An address may be input from the circuit). Then, an address may be input to the serial-parallel conversion IC by controlling the input of each address terminal to high or low from the external hardware circuit side. In this case, for example, the external hardware circuit sets the input to the terminal to high by applying a voltage to the terminal corresponding to any bit of the address, or sets the input to the terminal to low by switching to the ground. Control to do.

  The data buffer 655 is constituted by, for example, a latch register. When an input capture signal is input from the header / address detector 653, the data of the 20th to 27th bits from the head corresponding to the data portion is captured from the shift register 652. Latch with. The data buffer 655 supplies (that is, outputs) the fetched data to the LEDs of each lamp as parallel data (Q0 to Q7).

  If the data stored in the shift register 652 is a reset command, the 11th to 18th bits from the beginning all store data having a logical value of 1. In this case, the data buffer 655 determines that a reset command has been input when all data having a logical value of 1 is fetched, and the LEDs of all the lamps are reset and turned off.

  The sync driver 656 inverts and outputs the logical value of the parallel data output from the data buffer 655 based on a predetermined logic inversion setting signal, or outputs it as it is. For example, when the predetermined logic inversion setting signal is High, the signal is turned on when the bit value of the parallel data output from the data buffer 655 is 1 (that is, the corresponding bit value of the lamp lighting data is 1), An ON signal is output to the LED of each lamp. In this embodiment, the set value of the logic inversion setting signal is set in advance in the registers provided on the panel side IC substrate 601 and the frame side IC substrates 602, 603, 604, 605A, and 605B. According to the set value, an ON signal is output to the LED of each lamp, and the LED of each lamp is turned on.

  FIG. 22 is a timing chart showing an example of the input timing of serial data and clock signals to the serial-parallel conversion IC and the output timing of parallel data. Note that FIG. 22 illustrates a case where lamp lighting data is input as a serial data method. As shown in FIG. 22, the serial data is input to the shift register 652 of the serial-parallel conversion IC in units of 1 bit in the order of header data, mark bits, addresses, mark bits, data, and end bits. The series of data is set as one set. The header / address detection unit 653 does not detect header data until one set of serial data (in this example, lamp lighting data) is completely input, so the output of the data buffer 655 does not change. Therefore, the lighting pattern based on the previously received serial data is output as it is as a parallel data system from the serial-parallel conversion IC.

  When all sets of serial data have been input, the data portion from the data stored in the shift register 652 is latched in the data buffer 655, and a lighting pattern based on the newly received serial data is output as a parallel data system. In this embodiment, as shown in FIG. 22, among the parallel data output from the serial-parallel conversion IC, Q0 and Q4 are the rising timing of the pulse of the next clock signal after the completion of the serial data input. Immediately, the data is switched to new lighting pattern data. Q1 and Q5 are switched to new lighting pattern data with a delay of one clock from Q0 and Q4. Q2 and Q6 are switched to new lighting pattern data with a delay of two clocks from Q0 and Q4. Further, Q3 and Q7 are switched to new lighting pattern data with a delay of three clocks from Q0 and Q4.

  FIG. 23 is a block diagram showing the configuration of each of the input ICs 620 and 621. As shown in FIG. 23, in this embodiment, each of the input ICs 620 and 621 is configured by a plurality (eight in this example) of D flip-flops 661 to 668. In this embodiment, detection signals from the operation buttons 81a to 81e or the position sensors 151b and 152b are input in parallel to the input ICs 620 and 621, and input to one of the D flip-flops 661 to 668 for each detection signal. The A clock signal is input to each of the D flip-flops 661 to 668, and each D flip-flop 661 to 668 sequentially performs a shift operation at the rising edge of the clock. The detection signals input in parallel are converted into serial data and output.

  An input capture signal (latch signal) is input to each of the D flip-flops 661 to 668 from the effect control microcomputer 100 at a predetermined timing. When an input capture signal is input, detection signals from the operation buttons 81a to 81e or the position sensors 151b and 152b are latched by the D flip-flops 661 to 668, respectively. The latched detection signal is sequentially shifted at the rising edge of the clock and output as a serial data system.

  Next, the operation of the gaming machine will be described. 24 and 25 are flowcharts showing main processing executed by the game control microcomputer 560 on the main board 31. FIG. When power is supplied to the gaming machine and power supply is started, the input level of the reset terminal to which the reset signal is input becomes high level, and the gaming control microcomputer 560 (specifically, the CPU 56) After executing a security check process, which is a process for confirming whether the contents of the program are valid, the main process after step S1 is started. In the main process, the CPU 56 first performs necessary initial settings.

  In the initial setting process, the CPU 56 first sets the interrupt prohibition (step S1). Next, the interrupt mode is set to interrupt mode 2 (step S2), and a stack pointer designation address is set to the stack pointer (step S3). After initialization of the built-in device (CTC (counter / timer) and PIO (parallel input / output port), which are built-in devices (built-in peripheral circuits)) is performed (step S4), the RAM is accessible (Step S5). In the interrupt mode 2, the address synthesized from the value (1 byte) of the specific register (I register) built in the CPU 56 and the interrupt vector (1 byte: least significant bit 0) output from the built-in device is This mode indicates an interrupt address.

  Next, the CPU 56 checks the state of the output signal of the clear switch (for example, mounted on the power supply board) input via the input port (step S6). When the ON is detected in the confirmation, the CPU 56 executes a normal initialization process (steps S10 to S15, including S44 and S45).

  If the clear switch is not on, check whether data protection processing of the backup RAM area (for example, power supply stop processing such as addition of parity data) was performed when power supply to the gaming machine was stopped (Step S7). When it is confirmed that such protection processing is not performed, the CPU 56 executes initialization processing. Whether there is backup data in the backup RAM area is confirmed, for example, by the state of the backup flag set in the backup RAM area in the power supply stop process.

  When it is confirmed that the power supply stop process has been performed, the CPU 56 performs data check of the backup RAM area (step S8). In this embodiment, a parity check is performed as a data check. Therefore, in step S8, the calculated checksum is compared with the checksum calculated and stored by the same process in the power supply stop process. When the power supply is stopped after an unexpected power failure or the like, the data in the backup RAM area should be saved, so the check result (comparison result) is normal (matched). That the check result is not normal means that the data in the backup RAM area is different from the data when the power supply is stopped. In such a case, since the internal state cannot be returned to the state when the power supply is stopped, an initialization process that is executed when the power is turned on is not performed when the power supply is stopped.

  If the check result is normal, the CPU 56 recovers the game state restoration process (steps S41 to S43) for returning the internal state of the game control means and the control state of the electrical component control means such as the effect control means to the state when the power supply is stopped. Process). Specifically, the start address of the backup setting table stored in the ROM 54 is set as a pointer (step S41), and the contents of the backup setting table are sequentially set in the work area (area in the RAM 55) (step S42). ). The work area is backed up by a backup power source. In the backup setting table, initialization data for an area that may be initialized in the work area is set. As a result of the processing in steps S41 and S42, the saved contents of the work area that should not be initialized remain as they are. The part that should not be initialized is, for example, data indicating the gaming state before the power supply is stopped (special symbol process flag, probability variation flag, time reduction flag, etc.), and the area where the output state of the output port is saved (output port buffer) ), A portion in which data indicating the number of unpaid prize balls is set.

  Further, the CPU 56 transmits a power failure recovery designation command as an initialization command at the time of power supply recovery (step S43). Then, the process proceeds to step S14A.

  In this embodiment, it is confirmed whether the data in the backup RAM area is stored using both the backup flag and the check data. However, only one of them may be used. That is, either the backup flag or the check data may be used as an opportunity for executing the game state restoration process.

  In the initialization process, the CPU 56 first performs a RAM clear process (step S10). The RAM clear process initializes predetermined data (for example, count value data of a counter for generating a big hit determination random number) to 0, but is initialized to an arbitrary value or a predetermined value. You may make it do. Alternatively, the entire area of the RAM 55 may not be initialized, and predetermined data (for example, count value data of a counter for generating a big hit determination random number) may be left as it is. Further, the start address of the initialization setting table stored in the ROM 54 is set as a pointer (step S11), and the contents of the initialization setting table are sequentially set in the work area (step S12).

  By the processing of steps S11 and S12, for example, a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a total prize ball number storage buffer, a special symbol process flag, an award ball flag, a ball out flag, and a payout stop An initial value is set to a flag such as a flag for selectively performing processing according to the control state.

  Further, the CPU 56 initializes a sub board (a board on which a microcomputer other than the main board 31 is mounted) (a command indicating that the game control microcomputer 560 has executed an initialization process). Is also transmitted to the sub-board (step S13). For example, when the initialization control microcomputer 100 receives the initialization designation command, the variable display device 9 performs screen display for notifying that the control of the gaming machine has been initialized, that is, initialization notification.

  Further, the CPU 56 sets an abnormality notification prohibition flag (step S44) and sets a value corresponding to the prohibition period value in the prohibition period timer (step S45). The prohibition period value is a value indicating a period during which an abnormal winning notification described later is prohibited. The abnormality notification prohibition flag is a flag indicating that notification of an abnormal winning is prohibited, and is maintained in the set state until the prohibition period timer times out. Therefore, the start of the abnormal winning notification is prohibited for a predetermined period after the initialization notification is started in the variable display device 9.

  Instead of managing the period during which the abnormal winning notification is prohibited on the game control microcomputer 560 side, it may be managed on the effect control microcomputer 100 side. In this case, when receiving the initialization designation command from the game control microcomputer 560, the production control microcomputer 100 sets the abnormality notification prohibition flag and sets a value corresponding to the prohibition period value in the prohibition period timer. Then, the production control microcomputer 100 maintains the abnormality notification prohibition flag in the set state until the prohibition period timer times out, and performs control so as to prohibit notification of abnormal winning. In this case, when the game control microcomputer 560 transmits the initialization designation command in step S13, the game control microcomputer 560 performs control so that the process directly proceeds to step S14A without executing the processes of steps S44 and S45.

  Further, the CPU 56 inputs data (input data) of the input port 1 (see FIG. 14) (step S14A), and generates an input port data designation command (see FIG. 30) in which the input data is set to the second byte. (Step S14B). It should be noted that immediately after the power supply to the gaming machine is started, when an abnormality occurs in which the clock signal is not supplied to the random number circuit 503, the data of bit 5 of the input port 1 is “0”. . Further, the CPU 56 stores the input data in the input port 1 buffer that is an area of the RAM 55 (step S14C).

  It should be noted that the input port data is input by inputting the data of the input port 1 and the input data is set to the second byte only by the timer interrupt processing described later without executing the processing of steps S14A to S14C in the main processing. You may make it transmit to an effect control board.

  In step S15, the CPU 56 sets a register of the CTC built in the game control microcomputer 560 so that a timer interrupt is periodically taken every predetermined time (for example, 2 ms). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value. In this embodiment, it is assumed that a timer interrupt is periodically taken every 2 ms.

  When the execution of the initialization process (steps S10 to S15) is completed, the CPU 56 repeatedly executes the display random number update process (step S17) and the initial value random number update process (step S18) in the main process. When executing the display random number update process and the initial value random number update process, the interrupt disabled state is set (step S16). When the display random number update process and the initial value random number update process are finished, the interrupt enabled state is set. Set (step S19). In this embodiment, the display random number is a random number for determining the variation pattern, and the display random number update process is a process for updating the count value of the counter for generating the display random number. The initial value random number update process is a process for updating the count value of the counter for generating the initial value random number. In this embodiment, the initial value random number is a counter for generating a random number for determining whether or not to win a normal symbol (for example, a special symbol determining (big hit type determining) random number generating counter, This is a random number for determining the initial value of the count value, such as a random number generating counter for ordinary symbol determination. When the big hit determination is performed using software random numbers, the initial value random number includes a random number for determining the initial value of the count value of the big hit determination random number generation counter. A game control process for controlling the progress of the game, which will be described later (the game control microcomputer 560 controls game devices such as a variable display device, a variable winning ball device, a ball payout device, etc. provided in the game machine itself. In the process of transmitting a command signal to be controlled by another microcomputer, or a game machine control process), the count value of the random number for determination per normal symbol is one round (the random number for determination per normal symbol is taken). When the value is incremented by the number of values between the minimum value and the maximum value of the possible values), an initial value is set in the counter.

  When the timer interrupt occurs, the CPU 56 executes the timer interrupt process in steps S20 to S35 shown in FIG. In the timer interrupt process, first, a power-off detection process for detecting whether or not a power-off signal is output (whether or not an on-state is turned on) is executed (step S20). The power-off signal is output when, for example, a voltage drop monitoring circuit mounted on the power supply board detects a drop in the voltage of the power supplied to the gaming machine. In the power-off detection process, when detecting that the power-off signal has been output, the CPU 56 executes a power supply stop process for saving necessary data in the backup RAM area. Next, detection signals from the gate switch 32a, the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, and 39a are input via the input driver circuit 58, These state determinations are performed (switch processing: step S21).

  Next, the CPU 56 executes display control processing for performing display control of the special symbol display 8, the normal symbol display 10, the special symbol hold storage display 18, and the normal symbol hold storage display 41 (step S22). For the special symbol display 8 and the normal symbol display 10, control for outputting a drive signal to each display is executed according to the contents of the output buffer set in steps S34 and S35.

  Further, the CPU 56 performs a process for notifying an abnormal winning when it detects that a game ball has won a prize winning opening at a time other than the regular time (step S23: abnormal winning notifying process).

  Further, the CPU 56 executes an input port data confirmation process for transmitting the input data of the input port 1 to the effect control microcomputer 100 when the input data of the input port 1 (see FIG. 15) changes (step). S23A).

  Next, a process of updating the count value of each counter for generating each random number for determination such as a random number for determining jackpot symbols used for game control is performed (determination random number update process: step S24). The CPU 56 further performs a process of updating the count value of the counter for generating the initial value random number and the display random number (initial value random number update process, display random number update process: steps S25 and S26).

FIG. 27 is an explanatory diagram showing each random number. Each random number is used as follows.
(1) Random 1: Decide a special symbol's off symbol (stop symbol) (for determining off symbol)
(2) Random 2: Determines the special symbol stop symbol when generating a big hit (for big hit symbol determination)
(3) Random 3: Determine the variation pattern (variation time) of special symbols (for variation pattern determination)
(4) Random 4: Determines whether or not to generate a hit based on the normal symbol (for normal symbol hit determination)
(5) Random 5: Random 4 initial value is determined (for determining random 4 initial value)

  As will be described later in the special symbol normal processing, in this embodiment, whether or not to make a big hit is determined based on the hardware random number (random R) read from the random number circuit 503. The type of jackpot (for example, whether to be a promiscuous jackpot or a normal jackpot) is determined. Then, based on the jackpot symbol determination random number (random 2) shown in FIG. 27, the stop symbol of the jackpot symbol (for example, one of the odd symbols) is determined. That is, in this embodiment, first, based on the random number R, which is a hardware random number, whether to win or not and the type of jackpot are collectively determined. Then, if it is decided to win, the special symbol stop symbol is determined based on the jackpot symbol determining random number which is a software random number. Specifically, in the special symbol normal process described later, the game control microcomputer 560 performs a jackpot determination process based on the random R, determines whether or not to win and determines the type of jackpot (step (See S61 to S63). Then, if it is determined to be a big hit (see Y in step S63), a special symbol stop symbol is determined based on the big hit symbol determining random number (see steps S82 and S83).

  It should be noted that whether or not to make a jackpot and the type of jackpot may be determined using separate random numbers. For example, the game control microcomputer 560 first determines only whether or not to make a big hit using a random R, and then determines the type of jackpot together with a special symbol stop symbol based on the big hit symbol determining random number. It may be determined.

  In step S24 in the game control process shown in FIG. 26, the game control microcomputer 560 uses a counter for generating the jackpot symbol determination random number (2) and the random number for determination per regular symbol (4). Count up (add 1). That is, they are determination random numbers, and other random numbers are display random numbers or initial value random numbers. In addition, in order to improve a game effect, you may make it use random numbers other than the random number of said (1)-(5). In this embodiment, the big hit determination random number is a random number generated by the hardware (random number circuit) built in the game control microcomputer 560. However, the big hit determination random number is generated by the game control microcomputer 560 as the big hit determination random number. Software random numbers generated based on a program may be used.

  Further, the CPU 56 performs special symbol process processing (step S27). In the special symbol process, the corresponding symbol is executed in accordance with a special symbol process flag for controlling the special symbol display 8 and the special prize opening in a predetermined order. The CPU 56 updates the value of the special symbol process flag according to the gaming state.

  Next, normal symbol process processing is performed (step S28). In the normal symbol process, the CPU 56 executes a corresponding process according to the normal symbol process flag for controlling the display state of the normal symbol display 10 in a predetermined order. The CPU 56 updates the value of the normal symbol process flag according to the gaming state.

  Further, the CPU 56 performs a process of sending an effect control command to the effect control microcomputer 100 (effect control command control process: step S29). In this embodiment, in step S29, the game control microcomputer 560 causes the MODE data or EXT data (MODE data to which the address of the destination serial-parallel conversion ICs 610 to 618 is added) constituting the effect control command. Alternatively, transmission control is performed by adding header data, mark bits, and end bits to (EXT data). The effect control command is converted into serial data by the serial output circuit 78 and transmitted to the effect control board 80 via the relay board 77.

  Further, the CPU 56 performs information output processing for outputting data such as jackpot information, start information, probability variation information supplied to the hall management computer, for example (step S30).

  Further, the CPU 56 performs prize ball processing for setting the number of prize balls based on detection signals from the first start port switch 13a, the second start port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a. Execute (Step S31). Specifically, the payout control is performed in accordance with winning detection based on any one of the first starting port switch 13a, the second starting port switch 14a, the count switch 23, and the winning port switches 29a, 30a, 33a, 39a being turned on. A payout control command (award ball number signal) indicating the number of winning balls is output to a payout control microcomputer mounted on the substrate 37. The payout control microcomputer drives the ball payout device 97 in accordance with a payout control command indicating the number of winning balls.

  In this embodiment, a RAM area (output port buffer) corresponding to the output state of the output port is provided. However, the CPU 56 relates to on / off of the solenoid in the RAM area corresponding to the output state of the output port. The contents are output to the output port (step S32: output process).

  Further, the CPU 56 performs special symbol display control processing for setting special symbol display control data for effect display of the special symbol in the output buffer for setting the special symbol display control data according to the value of the special symbol process flag ( Step S33). For example, if the change speed is 1 frame / 0.2 seconds until the end flag is set when the start flag set in the special symbol process is set, the CPU 56, for example, every 0.2 seconds passes. Then, the value of the display control data set in the output buffer is incremented by one. Further, the CPU 56 performs variable display of the special symbol on the special symbol display 8 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Further, the CPU 56 performs a normal symbol display control process for setting normal symbol display control data for effect display of the normal symbol in an output buffer for setting the normal symbol display control data according to the value of the normal symbol process flag ( Step S34). For example, when the start flag related to the variation of the normal symbol is set, the CPU 56 switches the display state (“◯” and “×”) for the variation rate of the normal symbol every 0.2 seconds until the end flag is set. With such a speed, the value of the display control data set in the output buffer (for example, 1 indicating “◯” and 0 indicating “x”) is switched every 0.2 seconds. Further, the CPU 56 outputs a normal signal on the normal symbol display 10 by outputting a drive signal in step S22 according to the display control data set in the output buffer.

  Thereafter, the interrupt permission state is set (step S35), and the process is terminated.

  With the above control, in this embodiment, the game control process is started every 2 ms. The game control process corresponds to the processes of steps S21 to S34 (excluding step S30) in the timer interrupt process. In this embodiment, the game control process is executed by the timer interrupt process. However, in the timer interrupt process, for example, only a flag indicating that an interrupt has occurred is set, and the game control process is performed by the main process. May be executed.

  FIG. 28 is an explanatory diagram of a jackpot determination table. The jackpot determination table is a table in which a jackpot determination value to be compared with the random R is set. The jackpot determination determination table includes a normal jackpot determination table (see FIG. 28A) used in a normal state (a gaming state that is not a probability change state) and a probability change jackpot determination table (FIG. 28B) used in a probability change state. See). The numerical values described in the left column of FIGS. 28A and 28B are jackpot determination values. When the value of the random R matches any one of the jackpot determination values, the CPU 56 determines that the jackpot is to be made. The CPU 56 extracts the count value of the random number circuit at a predetermined time and uses the extracted value as the jackpot determination random value. If the jackpot determination random value matches the jackpot determination value shown in FIG. Is determined to be a big hit (probable big hit or normal big hit).

  The probability variation jackpot is a jackpot that shifts the gaming state after the jackpot game to a probability variation state in which there is a high probability of being determined to be a jackpot compared to the normal state. Usually, the big hit is a big hit that shifts the gaming state after the big hit game to a state that is not a probable change state. Note that the number of rounds in the case of a probable big hit and the normal big hit is larger than that in the case of a small hit and a sudden probable big hit, for example, 15 rounds.

  The small win is a hit in which the number of times of opening the big winning opening is allowed in the big hit gaming state. Note that when the small hit game ends, the gaming state does not shift to the probable change state. Suddenly probable jackpot is a jackpot where the number of times the big prize opening is allowed is 2 in the big hit gaming state, but the opening time of the big prize opening is extremely short, and the gaming state after the big hit game is shifted to the probable state It ’s a big hit. That is, in this embodiment, the number of rounds is the same between the sudden probability big hit and the small hit.

  In the big hit game of sudden probability change big hit, the number of rounds is smaller than in the case of normal big hit and probability variable big hit, and the allowance opening time for each round (for example, 29 seconds in the case of normal big hit and probability variable big hit) On the other hand, 0.5 seconds) is shorter than the case of the normal big hit and the probability variation big hit, but only the number of rounds may be reduced, or only the allowance opening allowance time may be shortened.

  In the determination using the big hit determination random number (random R), only whether or not the big hit is determined is determined, and the big hit is determined according to the type of the symbol determined using the big hit symbol determination random number (random 2). May be determined (for example, whether it is a probability big hit or a normal big hit).

  FIG. 29 is an explanatory diagram showing an example of a variation pattern used in this embodiment. As will be described later, in this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). In FIG. 29, “EXT” indicates EXT data of the second byte in the effect control command having a two-byte structure. “Variation time” indicates the variation time of the special symbol (variable display period of identification information).

  “Normal fluctuation” is a fluctuation pattern without a reach mode. “Normal fluctuation / shortening” is a fluctuation pattern without a reach mode and a fluctuation time shorter than “normal fluctuation”. “Normal reach” is a variation pattern that is accompanied by a reach mode but whose display result (stop symbol) does not become a big hit symbol. “Reach A” is a variation pattern having a reach form different from “normal reach”. A different reach mode means that a different mode of change mode (speed, direction of rotation, etc.), a character image, or the like appears in the variable display device 9 in the reach change time (a period in which the reach effect is performed). The background design is different. For example, in “normal reach”, a reach mode is realized by only one type of change mode, whereas in “reach A”, a reach mode including a plurality of change modes having different speeds and directions of change is realized. Further, “reach A / shortening” is a variation pattern having a reach manner similar to “reach A”, but reach variation time is shorter than “reach A”. “Reach A / Extension” is a variation pattern having a reach manner similar to “Reach A”, but the reach variation time is longer than “Reach A”.

  “Reach B” is a fluctuation pattern having a reach mode different from “Normal reach” and “Reach A”. Further, “reach B / shortening” is a variation pattern having a reach manner similar to “reach B”, but the reach variation time is shorter than “reach B”. “Reach B / extension” is a variation pattern having a reach manner similar to “reach B”, but reach variation time is longer than “reach B”. “Reach C” is a variation pattern having a reach form different from “normal reach”, “reach A”, and “reach B”. “Reach C / shortening” is a variation pattern having a reach manner similar to “reach C”, but reach variation time is shorter than “reach C”.

  “Super reach A” is a variation pattern having a reach mode different from “normal reach”, “reach A”, “reach B”, and “reach C”. is there. “Super reach B” is a variation pattern having a reach form different from “normal reach”, “reach A”, “reach B”, “reach C” and “super reach A”. This is a variation pattern. “Reach A / Accuracy” is a variation pattern having a reach form different from “Normal reach”, “Reach A”, “Reach B”, “Reach C”, “Super reach A” and “Super reach B”. It should be noted that the reach form of “reach A / accuracy” is a reach form similar to “reach A”.

  In this embodiment, in the case of a big hit, the game control microcomputer 560 is “reach A / shortening”, “reach A”, “reach B / shortening”, “reach B”, “reach C / shortening”. ", Reach C", "Super Reach A" or "Super Reach B". Further, in the case of a probable big hit, the game control microcomputer 560 is “reach A / extension”, “reach B / extension”, “reach C / shortening”, “reach C”, “super reach A” or “ Select "Super Reach B". In case of sudden big odds, select “Reach A / Random”. In the case of a small hit, select “reach A / small hit”.

  Further, as shown in FIG. 29, a variation pattern selected only in the case of a normal big hit, a variation pattern selected only in the case of a probable big hit, and a normal big hit and a probable big hit can be selected. There are fluctuation patterns.

  In the short-time state, the fluctuation patterns of “normal fluctuation / shortening”, “reach A / shortening”, “reach B / shortening”, and “reach C / shortening” are selected. In the non-time-short state, other variation patterns are selected. However, the variation pattern of “reach A / accuracy” is used in both the short-time state and the non-short-time state.

  In this embodiment, when a big hit occurs and the big hit game ends, the gaming state becomes a short-time state thereafter until the execution of 100 special symbol changes (variable display) is completed. In addition, when variable display of a special symbol is started when variable display is finished, when it is decided to change to a probable change state when the special symbol variable display is started, the game state is changed into a probable change state when the big hit game is ended. Migrated. If the gaming state at that time is a probability variation state, the probability variation state is continued.

  After the transition to the probability changing state, the state of the probability changing state is short and the state is short until the execution of the variation (variable display) of 100 special symbols is completed. In addition, in the non-probability change state after the big hit game is over, the game state is changed to the normal state (the game state that is not the probability change state and not the short-time state) when the execution of 100 special symbol changes (variable display) is completed. Transition.

  Next, a method for sending a control command from the game control microcomputer 560 to the effect control microcomputer 100 will be described. In this embodiment, the effect control command is converted from parallel data to serial data by the serial output circuit 78 and transmitted from the main board 31 to the effect control board 80 via the relay board 77.

  In this embodiment, the presentation control command has a 2-byte structure, the first byte represents MODE (command classification), and the second byte represents EXT (command type). The first bit (bit 7) of the MODE data is always set to “1”, and the first bit (bit 7) of the EXT data is always set to “0”. Note that such a command form is an example, and other command forms may be used. For example, a control command composed of 1 byte or 3 bytes or more may be used.

  FIG. 30 is an explanatory diagram showing an example of the format of the effect control command transmitted as the serial data method. As shown in FIG. 30, when transmitting the effect control command, the game control microcomputer 560 (specifically, the CPU 56) first adds header data and mark bits to MODE data (MODE data to which an address is added), Transmission control is performed by adding an end bit. Then, the serial output circuit 78 converts the MODE data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77. Next, the game control microcomputer 560 performs transmission control by adding header data, mark bits, and end bits to EXT data (EXT data with an address added). Then, the serial output circuit 78 converts the EXT data to which the header data, the address, the mark bit, and the end bit are added into serial data, and transmits the serial data to the effect control board 80 via the relay board 77.

  FIG. 31 is an explanatory diagram showing an example of the contents of the effect control command transmitted by the game control microcomputer 560. In the example shown in FIG. 31, commands 8001 (H) to 800F (H) are effect control commands (variation) for designating a variation pattern of decorative symbols that are variably displayed on the variable display device 9 in response to variable display of special symbols. Pattern command). The effect control command for designating the variation pattern is also a command for designating the variation start. Therefore, when the production control microcomputer 100 receives any of the commands 8001 (H) to 800F (H), the variable display device 9 controls the variable display device 9 to start variable display of the decorative symbols. In this embodiment, the variable display of the special symbol and the variable display of the decorative symbol are synchronized (the variable display start time and the variable display end time are the same), so the decorative pattern variation pattern (variation time) Determining also means determining the variation pattern (variation time) of the special symbol.

  The commands 8C01 (H) to 8C05 (H) are effect control commands indicating whether or not to make a big hit and the type of the big hit game. The effect control microcomputer 100 determines the display result of the decorative symbols in response to the reception of the commands 8C01 (H) to 8C05 (H). Therefore, the commands 8C01 (H) to 8C05 (H) are referred to as display result specifying commands. As the variation pattern command, a variation control command can be specified, and an effect control command that can identify all of whether it is a big hit, whether it is a probable big hit, or a small hit is transmitted. In this case, the display result specifying command may not be transmitted. By doing so, the number of effect control commands transmitted to the effect control microcomputer 100 can be reduced.

  Command 8F00 (H) is an effect control command (symbol confirmation designation command) indicating that the variable display (fluctuation) of the decorative symbols is terminated and the display result (stop symbol) is derived and displayed. When receiving the symbol confirmation designation command, the effect control microcomputer 100 ends the variable display (fluctuation) of the decorative symbols and derives and displays the display result. The derived display is to finally stop and display the symbol.

  Command 9000 (H) is an effect control command (initialization designation command: power-on designation command) transmitted when power supply to the gaming machine is started. Command 9200 (H) is an effect control command (power failure recovery designation command) transmitted when power supply to the gaming machine is resumed. When the power supply to the gaming machine is started, the game control microcomputer 560 transmits a power failure recovery designation command if data is stored in the backup RAM, and if not, initialization designation is performed. Send a command.

  Command 9F00 (H) is an effect control command (customer waiting demonstration designation command) for designating a customer waiting demonstration.

  The commands A001 to A004 (H) are effect control commands for displaying the fanfare screen, that is, designating the start of the big hit game (big hit start designation command: fanfare designation command). The jackpot start designation commands include jackpot start 1 designation to jackpot start designation 4 designation commands depending on the type of jackpot. The command A1XX (H) is an effect control command (special command during opening of a big winning opening) indicating a display during the opening of the big winning opening for the number of times (round) indicated by XX. A2XX (H) is an effect control command (designation command after opening the big winning opening) indicating the closing of the big winning opening for the number of times (round) indicated by XX.

  Command A301 (H) displays a jackpot end screen, that is, specifies the end of the jackpot game, and also specifies an effect control command (special jackpot end 1 designation command: ending) that specifies that the game is a non-probable big hit (usually a big hit) 1 designation command). Command A302 (H) is an effect control command for displaying the jackpot end screen, that is, the end of the jackpot game and specifying that it is a probable big hit (big hit end 2 designation command: ending 2 designation command). is there.

  Command D001 (H) is an effect control command (abnormal winning notification designation command) for instructing notification of abnormal winning.

  Command FFYY (H) is an effect control command (input port data designation command) indicating input data of input port 1. YY indicates input data of the input port 1.

  The effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80 receives the above-described effect control command from the game control microcomputer 560 mounted on the main board 31. Then, the display state of the variable display device 9 is changed according to the contents shown in FIG. 31, the display state of the lamp is changed, and the sound number data is output to the audio output board 70.

  FIG. 32 is an explanatory diagram illustrating an example of the transmission timing of the effect control command. As shown in FIG. 32, the game control microcomputer 560 transmits a change pattern command and a display result specifying command at the start of change. When the variable display time has elapsed, a symbol confirmation designation command is transmitted.

  Before transmitting the variation pattern command, a background designation command for designating a background image in the variable display device 9 according to the gaming state (for example, normal state / short time state / probability variation state) may be transmitted. Further, an effect control command indicating the number of reserved memories may be transmitted following the display result specifying command.

  FIG. 33 is an explanatory diagram showing a configuration of EXT data (YY portion) of the command FFYY (H) (input port data designation command). The bit assignment of the EXT data is the same as the bit assignment of the input port 1 shown in FIG. That is, a random number error designation bit corresponding to the random number error signal is assigned to bit 5 (D5). Bit 4 (D4) is assigned a door opening error designation bit corresponding to the door opening / closing signal. A payout error designation bit corresponding to the payout error signal is assigned to bit 3 (D3). Bit 2 (D2) is assigned a ball-out error designation bit corresponding to the ball-out error signal. Bit 1 (D1) is assigned a full tank error designation bit corresponding to the full tank error signal. A prize ball count designation bit corresponding to the prize ball count signal is assigned to bit 0 (D0). In the example shown in FIG. 33, since bits 6 and 7 of the EXT data of the input port data designation command are unused, the bits indicate information indicating an error determined by the game control microcomputer 560 (for example, In the case where it is configured to determine whether or not an abnormal winning at the big winning opening has occurred, the detection of the count switch 23 even though the occurrence of the abnormal winning, that is, the control for opening the big winning opening is not performed. This information can be used when transmitting information indicating that the signal is turned on) to the production control microcomputer 100.

  Note that not all bit states of the input port 1 are transmitted as input port data designation commands as they are, but when any error occurs, the error state is added and the input port data designation command is transmitted. It may be. For example, it is determined whether or not a random circuit error has occurred. If it has occurred, an input port data designation command may be transmitted with a value added to the bit (bit D5) corresponding to the random circuit error.

  The prize ball count signal is input to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being input to the game control microcomputer 560. May be. Further, the prize ball count signal is not input to the payout control microcomputer 370, and is directly passed through the main board 31 and the payout control board 37 (that is, through both the main board 31 and the payout control board 37). ), It may be configured to input to the information terminal board 34. The prize ball count signal is once input to the payout control microcomputer 370 and then input to the game control microcomputer 560 and then input to the information terminal board 34 via the game control microcomputer 560. You may do it. Further, the prize ball count signal may not be input to the effect control board 80.

  The full error signal is inputted to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being inputted to the game control microcomputer 560. Also good. Further, the full tank error signal is not input to the payout control microcomputer 370, but directly through the main board 31 and the payout control board 37 (that is, through both the main board 31 and the payout control board 37). The information terminal board 34 may be configured to input. In addition, the full tank error signal is once input to the payout control microcomputer 370 and then input to the game control microcomputer 560, and is input to the information terminal board 34 via the game control microcomputer 560. It may be. Further, the full error signal may not be input to the effect control board 80.

  The ball break error signal is inputted to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being inputted to the game control microcomputer 560. May be. Further, the ball break error signal is not input to the payout control microcomputer 370 without passing through the main board 31 and the payout control board 37 (that is, through both the main board 31 and the payout control board 37). ), It may be configured to input to the information terminal board 34. In addition, after the ball break error signal is once input to the payout control microcomputer 370, it is further input to the game control microcomputer 560 and is input to the information terminal board 34 via the game control microcomputer 560. You may do it. Further, it may be configured not to input the ball break error signal to the effect control board 80.

  The payout error signal is inputted to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being inputted to the game control microcomputer 560. Also good. Further, the payout error signal may be further input from the payout control microcomputer 370 to the game control microcomputer 560 and input to the information terminal board 34 via the game control microcomputer 560. Further, the payout error signal may not be input to the effect control board 80.

  The door opening / closing signal is input to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being input to the game control microcomputer 560. Also good. Further, the door opening / closing signal is not input to the payout control microcomputer 370, but directly through the main board 31 and the payout control board 37 (that is, through both the main board 31 and the payout control board 37). The information terminal board 34 may be configured to input. In addition, the door opening / closing signal is once input to the payout control microcomputer 370 and then input to the game control microcomputer 560, and is input to the information terminal board 34 via the game control microcomputer 560. It may be. Further, the door opening / closing signal may not be input to the effect control board 80.

  The random number error signal is input to the information terminal board 34 as it is through the main board 31 (that is, through the main board 31) without being input to the game control microcomputer 560. Also good. Further, the random number error signal is not input to the payout control microcomputer 370, but directly through the main board 31 and the payout control board 37 (that is, through both the main board 31 and the payout control board 37). The information terminal board 34 may be configured to input. Further, the random number error signal may not be input to the effect control board 80.

  FIG. 34 and FIG. 35 are flowcharts showing an example of a special symbol process process (step S27) program executed by the game control microcomputer 560 (specifically, the CPU 56) mounted on the main board 31. As described above, in the special symbol process, a process for controlling the special symbol display 8 and the special winning opening is executed. In the special symbol process, if the first start port switch 13a or the second start port switch 14a for detecting that a game ball has won the start winning port 13 is turned on, that is, a start winning is generated. If so, start port switch passage processing is executed (steps S311 and S312). Then, any one of steps S300 to S310 is performed.

  The processes in steps S300 to S310 are as follows.

  Special symbol normal processing (step S300): Executed when the value of the special symbol process flag is zero. When the game control microcomputer 560 is ready to start the variable display of the special symbol, it checks the number of reserved memories (the number of start winning memories). The reserved memory number can be confirmed by the count value of the reserved memory number counter. If the number of reserved memories is not 0, it is determined whether or not to win. Then, the internal state (special symbol process flag) is updated to a value (1 in this example) corresponding to step S301.

  Fluctuation pattern setting process (step S301): This process is executed when the value of the special symbol process flag is 1. The stop symbol after the variable display of the special symbol is determined. Also, the variation pattern is determined, and the variation time in the variation pattern (variable display time: the time from the start of variable display until the display result is derived and displayed (stop display)) Decide to do. Also, a variable time timer for measuring the special symbol variable time is started. Then, the internal state (special symbol process flag) is updated to a value (2 in this example) corresponding to step S302.

  Display result specifying command transmission process (step S302): executed when the value of the special symbol process flag is 2. Control for transmitting a display result specifying command to the production control microcomputer 100 is performed. Then, the internal state (special symbol process flag) is updated to a value (3 in this example) corresponding to step S303.

  Special symbol changing process (step S303): This process is executed when the value of the special symbol process flag is 3. When the variation time of the variation pattern selected in the variation pattern setting process elapses (the variation time timer set in step S301 times out, that is, the variation time timer value becomes 0), the internal state (special symbol process flag) is stepped. Update to a value corresponding to S304 (4 in this example).

  Special symbol stop process (step S304): executed when the value of the special symbol process flag is 4. The variable display on the special symbol display 8 is stopped and the stop symbol is derived and displayed. In addition, control for transmitting a symbol confirmation designation command to the effect control microcomputer 100 is performed. When the big hit flag is set and the small hit flag is not set, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. If the small hit flag is set, the internal state (special symbol process flag) is updated to a value (8 in this example) corresponding to step S308. If the big hit flag is not set, the internal state (special symbol process flag) is updated to a value corresponding to step S300 (0 in this example). The effect control microcomputer 100 controls the variable display device 9 to stop the decorative symbols when it receives the symbol confirmation designation command transmitted by the game control microcomputer 560.

  Preliminary winning opening opening process (step S305): This is executed when the value of the special symbol process flag is 5. In the pre-opening process for the big prize opening, control for opening the big prize opening is performed. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S306 (6 in this example). The pre-opening process for the big winning opening is executed for each round, but when the first round is started, the pre-opening process for the big winning opening is also a process for starting the big hit game.

  Large winning opening opening process (step S306): This process is executed when the value of the special symbol process flag is 6. A control for transmitting an effect control command for round display during the big hit gaming state to the effect control microcomputer 100, a process for confirming the completion of the closing condition of the big prize opening, and the like are performed. If the closing condition for the special prize opening is satisfied and there are still remaining rounds, the internal state (special symbol process flag) is updated to a value (5 in this example) corresponding to step S305. When all the rounds are completed, the internal state (special symbol process flag) is updated to a value corresponding to step S307 (7 in this example).

  Big hit end process (step S307): executed when the value of the special symbol process flag is 7. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the big hit gaming state has ended. Further, a process for setting a flag (for example, a probability variation flag) indicating a gaming state is performed. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  Small hit release pre-processing (step S308): This process is executed when the value of the special symbol process flag is 8. In the pre-opening process for small hits, control is performed to open the big prize opening. Specifically, a counter (for example, a counter that counts the number of game balls that have entered the big prize opening) is initialized, and the solenoid 21 is driven to open the big prize opening. Also, the execution time of the special prize opening opening process is set by the timer, and the internal state (special symbol process flag) is updated to a value corresponding to step S309 (9 in this example). Note that the pre-opening process for small hits is executed each time the big winning opening is opened in the small hits, but if the big winning opening is opened for the first time, the pre-opening for small hits starts the small hit game. It is also a process to do.

  Small hit release processing (step S309): executed when the value of the special symbol process flag is 9. Control for transmitting the presentation control command of the opening of the big winning opening (corresponding to the big winning round display) during the small hit gaming state to the microcomputer 100 for the production control and confirmation of the closing condition of the big winning opening are confirmed. Perform processing. When the closing condition of the big prize opening is satisfied and the number of opening of the big prize opening still remains, the internal state (special symbol process flag) is set to a value (8 in this example) corresponding to step S308. Update. In addition, when all the opening times (for example, two times) are finished, the internal state (special symbol process flag) is set to a value corresponding to step S310 (in this example, 10 (decimal number)). Update.

  Small hit end process (step S310): executed when the value of the special symbol process flag is 10. Control is performed to cause the microcomputer 100 for effect control to perform display control for notifying the player that the small hit gaming state has ended. Then, the internal state (special symbol process flag) is updated to a value (0 in this example) corresponding to step S300.

  FIG. 36 is a flowchart showing the start-port switch passing process in step S312. In the start port switch passing process, the CPU 56 checks whether or not the reserved storage number is 4 which is the upper limit value (step S211). If the number of reserved memories is 4, the process is terminated.

  If the number of reserved memories is not 4, the value of the reserved memory number counter indicating the number of reserved memories is incremented by 1 (step S212). Further, the CPU 56 extracts software random numbers (counter value for generating a big hit symbol determination random number, etc.) and random R (big hit determination random number), and uses them as an extracted random number value of the reserved memory number counter. A process of storing in the storage area in the storage buffer corresponding to the value is executed (step S213). In step S213, the CPU 56 extracts random values 1 to 3 (see FIG. 27) as software random numbers, and extracts the random R by reading the count value of the random number circuit. In the reserved storage buffer, the same number of storage areas as the upper limit value of the number of reserved memories is secured. Further, a counter for generating a jackpot symbol determination random number and the like and a reserved storage buffer are formed in the RAM 55. “Formed in RAM” means an area in the RAM.

  37 and 38 are flowcharts showing the special symbol normal process (step S300) in the special symbol process. In the special symbol normal process, the CPU 56 checks the value of the number of reserved storage (step S51). Specifically, the count value of the pending storage number counter is confirmed. If the number of reserved memories is 0, the process is terminated.

  If the reserved memory number is not 0, the CPU 56 reads each random number value stored in the storage area corresponding to the reserved memory number = 1 in the reserved memory number buffer of the RAM 55 and stores it in the random number buffer area of the RAM 55 (step S52). Then, the value of the reserved memory number is reduced by 1 (the count value of the reserved memory number counter is decremented by 1), and the contents of each storage area are shifted (step S53). That is, each random number value stored in the storage area corresponding to the reserved memory number = n (n = 2, 3, 4) in the reserved memory number buffer of the RAM 55 is stored in the storage area corresponding to the reserved memory number = n−1. To store. Therefore, the order in which the random number values stored in the respective storage areas corresponding to the number of reserved memories is extracted always matches the order of the number of reserved memories = 1, 2, 3 and 4. Yes.

  Then, the CPU 56 reads a random R (a jackpot determination random number) from the random number buffer area (step S61), and executes a jackpot determination module (step S62). The big hit judgment module compares the big hit judgment value (see Fig. 28) determined in advance with the big hit judgment random number, and if they match, the big hit (normal big hit, probability variation big hit or sudden probability variation big hit) or small hit This is a program for executing the process to be determined.

  Note that when the gaming state is in the probability variation state, the CPU 56 uses the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 28B is set, and the gaming state is in the normal state (non-probability variation state). Is, the jackpot determination value in the table in which the jackpot determination value as shown in FIG. 28 (A) is set is used. If it is determined to be a big hit (step S63), the process proceeds to step S81. Note that deciding whether or not to make a big hit means deciding whether or not to shift to the big win gaming state, but deciding whether or not to make the stop symbol in the special symbol display 8 a big hit symbol. It is also a thing.

  If it is decided not to win, the CPU 56 reads out the design symbol random number from the random number buffer area (step S64), and determines the stop symbol based on the design symbol random number (step S65). In this case, an off symbol (for example, any of even symbols) is determined.

  Further, when the time reduction flag indicating the time reduction state is set (step S66), the value of the time reduction counter indicating the number of times the special symbol can be changed in the time reduction state is decremented by 1 (step S67). When the value of the time reduction counter becomes 0, a time reduction end flag is set in order to shift the gaming state to the non-time reduction state when the variable display ends (steps S68 and S69). Then, the process proceeds to step S90.

  In step S81, the CPU 56 sets a big hit flag. Then, the big hit symbol determination random number is read from the random number buffer area (step S82), and the big hit symbol (for example, one of the odd symbols) as the stop symbol is determined based on the big hit symbol determination random number (step S83). Here, the stop symbol is determined without distinguishing between the probable big hit and the normal big hit.

  Next, the CPU 56 sets a probability variation jackpot flag if it is determined to be a probability variation jackpot (steps S84 and S85). If it is determined that the sudden probability change big hit is suddenly set, the sudden probability change big hit flag is set (steps S86 and S87). If it is determined to be a small hit, a small hit flag is set (steps S88 and S89). Then, the value of the special symbol process flag is updated to a value corresponding to the variation pattern setting process (step S301) (step S90). When the probability variation big hit flag or the sudden probability variation big hit flag is set, the gaming state is shifted to the probability changing state when the big hit game is finished.

  In this embodiment, whether or not to make a big hit and the type of big hit are determined based on the big hit determination random number (see FIG. 28), but the big hit is determined based on the big hit determination random number. When a predetermined jackpot symbol (predetermined probability variation jackpot symbol or sudden probability variation jackpot symbol) is determined based on the random number for determining the jackpot symbol when it is determined to be a jackpot You may make it control to a probability change state.

  FIG. 39 is a flowchart showing the variation pattern setting process (step S301) in the special symbol process. In the variation pattern setting process, the CPU 56 reads the variation pattern determination random number from the random number buffer area (step S100). Then, the variation pattern is determined based on the variation pattern determination random number (step S101).

  Here, when the gaming state is a non-time saving state and it is determined to be out of play, “normal variation” or “normal reach” is selected (see FIG. 29). If the gaming state is a non-time-saving state and it is determined to be a big hit, “reach A”, “reach A / extension”, “reach B”, “reach B / extension”, “reach C” ”,“ Super Reach A ”,“ Super Reach B ”or“ Reach A · Accuracy ”(see FIG. 29). When it is determined to be a promising big hit out of the big hits, “reach A / extension”, “reach B / extension”, “reach C”, “super reach A” or “super reach B” is selected. In addition, when it is determined that the sudden probability change is a big hit, “reach A / accuracy” is selected. In addition, when it is determined to be a small hit, “reach A / small hit” is selected. If it is determined that the big hit is a normal big hit, “reach A”, “reach B”, “reach C” or “super reach A” is selected.

  When the game state is the short time state and it is determined to be out of play, “normal variation / shortening” is selected (see FIG. 29). If the gaming state is a short-time state and it has been decided to win the game, select “Reach A / Shorten”, “Reach B / Short”, “Reach C / Short” or “Reach A / Success” Select (see FIG. 29). When it is determined to be a promising big hit out of the big hits, “reach C / shortening” is selected. When it is decided to suddenly change the probability big hit, select “reach A / accuracy”. In addition, when it is determined to be a small hit, “reach A / small hit” is selected. When it is determined that the big hit is the normal big hit, “reach A / shortening”, “reach B / shortening” or “reach C / shortening” is selected.

  In order to facilitate the selection as described above, a variation pattern table is used according to the game state (whether or not it is a short-time state) and the determination result of whether or not to make a big hit (rejected and big hit types, respectively) . The variation pattern table is stored in the ROM 54, but is prepared according to the gaming state and the determination result as to whether or not to win. In each variation pattern table, data indicating a variation pattern that can be selected and a numerical value corresponding to the data are set. Then, the CPU 56 selects a variation pattern table according to the gaming state and the determination result as to whether or not to win, and corresponds to a numerical value that matches the value of the variation pattern determination random number in the selected variation pattern table. Select a variation pattern. Therefore, the game control microcomputer 560 selects the variation pattern depending on whether or not the jackpot has already been determined and whether or not the probability variation jackpot is set.

  Then, the CPU 56 performs control to transmit a variation pattern command (see FIG. 29) corresponding to the variation pattern selected in step S101 to the effect control microcomputer 100 (step S103). Specifically, when the CPU 56 transmits an effect control command to the effect control microcomputer 100, the address of the command transmission table (preliminarily set for each command in the ROM) corresponding to the effect control command is used as a pointer. set. And the address of the command transmission table according to an effect control command is set to a pointer, and an effect control command is transmitted in an effect control command control process (step S29).

  Moreover, the variation of the special symbol is started (step S104). For example, a start flag referred to in the special symbol display control process in step S34 is set. Further, a value corresponding to the variation time (see FIG. 29) corresponding to the selected variation pattern is set in the variation time timer formed in the RAM 55 (step S105). Then, the value of the special symbol process flag is updated to a value corresponding to the display result specifying command transmission process (step S302) (step S106).

  FIG. 40 is a flowchart showing the display result specifying command transmission process (step S302). In the display result specifying command transmission process, the CPU 56 performs any one of the display control 1 designation to the display result 5 designation according to the determined type of jackpot (including the jackpot) (see FIG. 31). Control to send. Specifically, the CPU 56 first checks whether or not the big hit flag (which is also set when the small hit is determined) is set (step S110). If not set, control is performed to transmit a display result 1 designation command (step S111). When the big hit flag is set, when the probability variation big hit flag is set, control for transmitting the display result 4 designation command is performed (steps S112 and S113). When the sudden probability big hit flag is set, control for transmitting a display result 5 designation command is performed (steps S114 and S115). When the small hit flag is set, control for transmitting a display result 3 designation command is performed (steps S116 and S117). When none of the probability variation big hit flag, sudden probability variation big hit flag, and small hit flag is set, control is performed to transmit a display result 2 designation command (step S118). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol changing process (step S303) (step S119).

  FIG. 41 is a flowchart showing the special symbol changing process (step S303) in the special symbol process. In the special symbol changing process, the CPU 56 decrements the variable time timer by 1 (step S121), and when the variable time timer times out (step S122), the value of the special symbol process flag corresponds to the special symbol stop process (step S304). The updated value is updated (step S123). If the variable time timer has not timed out, the process ends.

  FIG. 42 is a flowchart showing the special symbol stop process (step S304) in the special symbol process. In the special symbol stop process, the CPU 56 sets an end flag referred to in the special symbol display control process in step S34 to end the variation of the special symbol, and performs control for deriving and displaying the stop symbol on the special symbol display 8. (Step S131). Moreover, control which transmits the symbol determination designation | designated command to the microcomputer 100 for production control is performed (step S132). When the big hit flag is not set, the process proceeds to step S146 (step S133).

  If the big hit flag is set, the CPU 56 resets the probability variation flag and the short time flag (step S134) and controls to send a big hit start designation command if set (step S135). Specifically, when the probability variation big hit flag is set, a big hit start 3 designation command is transmitted, and when the probability variation big hit flag is suddenly set, a big hit start 4 designation command is transmitted. If it is set, a jackpot start 2 designation command is transmitted. Otherwise, a jackpot start 1 designation command is transmitted.

  Further, a value corresponding to the big hit display time (time for notifying the occurrence of the big hit in the variable display device 9, for example) is set in the big hit display time timer (step S136). If the small hit flag is set, the value of the special symbol process flag is updated to a value corresponding to the small hit release pre-processing (step S308) (steps S137 and S138). If the small hit flag is not set, the value of the special symbol process flag is updated to a value corresponding to the pre-opening process for the big prize opening (step S305) (step S139). The case where the small hit flag is not set is a case where the normal big hit, the probability variation big hit or the sudden probability variation big hit is determined.

  In step S146, the CPU 56 checks whether or not the time reduction end flag is set. If the time saving end flag is not set, the process proceeds to step S149. If the time reduction end flag is set, the time reduction end flag is reset (step S147), and the time reduction flag indicating that the gaming state is the time reduction state is reset (step S148). Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S149).

  The time reduction end flag is set in step S69 in the special symbol normal process. In addition, the gaming state shifts to a non-time saving state by resetting the time saving flag. At this stage, if the gaming state is a probability variation state, the gaming state becomes a probability variation state of a non-short-time state. On the other hand, if it is in the non-probable change state, it shifts to a normal state (a state that is not in the probabilistic change state and is not in the time-short state).

  In the big winning opening opening pre-processing, when the big hit display time timer is set, the CPU 56 controls to open the big winning opening when the big hit display time timer times out, and sets the big winning opening opening time timer. Set a value corresponding to the opening time (for example, 29 seconds for normal big hits and probable big hits, and 0.5 seconds for sudden big odds), and the special symbol process flag value is processed while the big prize opening is open The value is updated to a value corresponding to (Step S306). The case where the big hit display time timer is set is the case before the start of the first round. When the interval timer (timer for determining the interval time between rounds) is set, when the interval timer times out, control is performed to open the big prize opening and the opening time ( For example, a value corresponding to 29 seconds is set for a normal big hit and a probable big hit, and a value corresponding to 0.5 seconds is set for a sudden probable big hit, and the value of the special symbol process flag is set to a process for opening a big winning opening (step S306). ) To a value corresponding to.

  In the process during opening of the big prize opening, the CPU 56 does not finish the final round when the big prize opening time timer times out or the number of winning balls to the big prize opening reaches a predetermined number (for example, 10). In this case, control for closing the special winning opening is performed, a value corresponding to the interval time is set in the interval timer, and the value of the special symbol process flag is set to a value corresponding to the pre-opening process for the special winning opening (step S305). Update. When the final round is completed, the value of the special symbol process flag is updated to a value corresponding to the jackpot end process (step S307).

  FIG. 43 is a flowchart showing the big hit end process (step S307) in the special symbol process. In the jackpot end process, the CPU 56 checks whether or not the jackpot end display timer is set (step S150). If the jackpot end display timer is set, the process proceeds to step S154. If the jackpot end display timer is not set, the jackpot flag is reset (step S151), and control for transmitting a jackpot end designation command is performed (step S152). Here, if the probability variation jackpot flag or the sudden probability variation bonus flag is set, a jackpot end 2 designation command is transmitted, and if the probability variation jackpot flag or the sudden probability variation bonus flag is not set, the jackpot end 1 designation is specified. Send a command. Then, a value corresponding to the display time corresponding to the time during which the jackpot end display is performed on the variable display device 9 (the jackpot end display time) is set in the jackpot end display timer (step S153), and the processing is ended. The jackpot end display timer has a display time that is longer than the count switch detection time, which is the time that the count switch 23 can detect a game ball that has won a big winning opening immediately before the jackpot ends even after the jackpot ends. A long time is set. By doing so, it is possible to prevent a situation where an abnormal winning notification is executed at an unnatural timing when an abnormal winning is detected immediately after the end of the big hit.

  In step S154, 1 is subtracted from the value of the big hit end display timer. Then, the CPU 56 checks whether or not the value of the jackpot end display timer is 0, that is, whether or not the jackpot end display time has elapsed (step S155). If not, the process ends. If it has elapsed, the time reduction flag is set to shift the gaming state to the time reduction state (step S156), and 100 is set in the time reduction counter (step S157).

  Then, it is confirmed whether or not the probability variation big hit flag or the sudden probability variation big flag is set (step S158). If the probability variation jackpot flag or sudden probability variation winning flag is set, the set flag (probability variation jackpot flag or sudden probability variation winning flag) is reset (step S159), the probability variation flag is set and the gaming state is set. The state is changed to a certain change state (step S161). If the gaming state at that time is a probability variation state, the probability variation flag has already been set. Then, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S162).

  In the pre-opening process for small hits in step S308, the same process as the pre-opening process for the big prize opening (step S305) is performed. However, instead of updating the value of the special symbol process flag to a value corresponding to the large winning opening opening process, the special symbol process flag is updated to a value corresponding to the small hit opening process. Further, in the small hit opening process in step S309, the same process as the big prize opening opening process (step S306) is performed. However, when the big winning opening is opened for the first time in small hits (that is, the first of the two big winning openings opened during the small hit), the value of the special symbol process flag is processed before the small hit opening process. If the value is updated to a value corresponding to (Step S308) and is opened for the second time (that is, the second of the two big prize opening during the small hit), the value of the special symbol process flag Is updated to a value corresponding to the small hit end process (step S310).

  FIG. 44 is a flowchart showing the small hit end process (step S310) in the special symbol process. In the small hit end process, the CPU 56 checks whether or not the small hit end display timer is set (step S170). If the small hit end display timer is set, the process proceeds to step S174. When the big hit end display timer is not set, the big hit flag and the small hit flag are reset (steps S171A and S171B), and control for transmitting the big hit end 1 designation command is performed (step S172). Then, the small hit end display timer sets a value corresponding to the display time corresponding to the time during which the small hit end display is performed on the variable display device 9 (small hit end display time) in the small hit end display timer ( Step S173), the process is terminated. The small hit end display timer has a count switch detection as a display time, which is a time during which the count switch 23 can detect a game ball that has won a big winning opening just before the small hit end even after the end of the small hit. A time longer than the time is set. By doing so, it is possible to prevent a situation in which an abnormal winning notification is executed at an unnatural timing when an abnormal winning is detected immediately after the end of the small hit.

  In step S174, 1 is subtracted from the value of the small hit end display timer. Then, the CPU 56 checks whether or not the value of the small hit end display timer is 0, that is, whether or not the small hit end display time has elapsed (step S175). If not, the process ends. If it has elapsed, the value of the special symbol process flag is updated to a value corresponding to the special symbol normal process (step S300) (step S176).

  Next, the normal symbol process (step S28) executed by the game control microcomputer 560 will be described. FIG. 45 is a flowchart showing an example of the normal symbol process. In the normal symbol process, when the game control microcomputer 560 detects that the game ball has passed through the gate 32 and the gate switch 32a is turned on (step S111), the game switch microcomputer 560 performs the gate switch passage process (step S112). Run. Then, the game control microcomputer 560 executes any one of the processes shown in steps S100 to S103 according to the value of the normal symbol process flag.

  Gate switch passage processing (step S112): The game control microcomputer 560 checks whether or not the count value of the gate passage memory counter (the number of gate passage memories) has reached the maximum value (in this example, “4”). If the maximum value has not been reached, the count value of the gate passage storage counter is incremented by one. Note that the LED of the normal symbol storage memory display 41 is turned on according to the value of the gate passage storage counter. Then, the game control microcomputer 560 performs a process of extracting the value of the random number for determination per ordinary symbol (random 4) and storing it in the storage area (ordinary symbol determination buffer) corresponding to the value of the number of passing gates. .

  Normal symbol normal processing (step S100): The game control microcomputer 560 is in a state where normal symbol variation can be started (for example, when the value of the normal symbol process flag is a value indicating step S100) The normal symbol display 10 does not display the variation of the normal symbol, and the variable winning ball apparatus 15 is not in the opening / closing operation of the variable winning ball apparatus 15 based on the fact that the symbol is derived and displayed on the normal symbol display 10). Confirms the value of the gate passing memory number. Specifically, the count value of the gate passing memory number counter is confirmed. If the gate passing memory number is not 0, it is determined whether or not to win (whether or not to stop the normal symbol as a winning symbol). Then, the normal symbol variation time is set in the normal symbol process timer, and the timer is started. Then, the value of the normal symbol process flag is updated to a value (specifically “1”) indicating the normal symbol variation process (step S101).

  Normal symbol variation processing (step S101): The game control microcomputer 560 checks whether or not the ordinary symbol process timer has timed out. The normal symbol stop symbol display time is set in the symbol process timer, and the timer is started. Then, the value of the normal symbol process flag is updated to a value (specifically “2”) indicating the normal symbol stop process (step S102).

  Normal symbol stop processing (step S102): The game control microcomputer 560 checks whether or not the normal symbol process timer has timed out, and if it has timed out, checks whether or not the normal symbol stop symbol is a winning symbol. To do. If it is not a winning symbol (if it is a missing symbol), the value of the normal symbol process flag is updated to a value (specifically, “0”) indicating the normal symbol normal processing (step S100). On the other hand, if the stop symbol of the normal symbol is a winning symbol, the normal electric accessory operating time is set in the normal symbol process timer, and the timer is started. Further, it is confirmed whether or not the current gaming state is a high base state, and if it is a high base state, an opening pattern of the ordinary electric accessory (variable winning ball device 15) in the high base state is selected, If in the low base state, the release pattern of the ordinary electric accessory (variable winning ball apparatus 15) in the low base state is selected, and the selected release pattern is set. Then, the value of the normal symbol process flag is updated to a value (specifically “3”) indicating the normal electric accessory operation processing (step S103).

  Ordinary electric accessory actuating process (step S103): The game control microcomputer 560 wins a game ball to the ordinary electric accessory (variable winning ball apparatus 15) on the condition that the normal symbol process timer has not timed out. The ordinary electric accessory winning count process for counting the number (the number of winnings to the second start winning opening 14) is executed, and the ordinary electric accessory is released with the set opening pattern (of the variable winning ball apparatus 15). (Open / close operation is executed) Normal electric accessory release pattern processing is executed. When the normal symbol process timer times out, the value of the normal symbol process flag is updated to a value (specifically “0”) indicating the normal symbol normal process (step S100).

  FIG. 46 is a flowchart showing the normal symbol normal process (step S100). In the normal symbol normal process, the game control microcomputer 560 confirms whether or not the gate passing memory number is 0 by confirming the count value of the gate passing memory number counter (step S121). If the gate passing memory number is 0 (Y in step S121), the process is terminated as it is. If the gate passing memory number is not 0 (N in step S121), the game control microcomputer 560 reads the normal symbol random number value stored in the storage area corresponding to the gate passing memory number = 1. Store in the random number buffer area of the RAM 55 (step S122). Then, the game control microcomputer 560 decrements the value of the gate passing memory number counter by 1 and shifts the contents of each storage area (step S123). That is, the random number value for normal symbol determination stored in the storage area corresponding to the number of gate passing memories = n (n = 2, 3, 4) is stored in the storage area corresponding to the number of gate passing memories = n−1. Store. Therefore, the order in which the random numbers for determination per ordinary symbol stored in the respective storage areas corresponding to the respective gate passing memory numbers are extracted is always the order of the gate passing memory number = 1, 2, 3, 4 It is supposed to match.

  Next, the game control microcomputer 560 reads the normal symbol per-determination random number from the random number storage buffer (step S124), and determines whether to win or not based on the read random number value (step S125). Specifically, it is determined whether or not the value of the random number for normal symbol determination matches the hit determination value, and if there is a matching hit determination value, it is determined to be a hit. For example, when the hour / short flag is set, that is, when the base state is high (short time state, short state when probability change), the hit determination value is any one of 1 to 10, and when the low base state, the hit determination value is 3 or 7 and so on. If the random number for determination per normal symbol is updated in a numerical range of 0 to 10, the winning probability in the high base state is 10/11, and the winning probability in the low base state is 2/11. As described above, the hit is made with a high probability in the high base state, and the win is made only with a low probability in the low base state.

  Next, the game control microcomputer 560 sets the normal symbol change time in the normal symbol process timer (step S126), and starts the normal symbol change in the normal symbol display 10 (step S127). In this embodiment, as shown in FIG. 37, the variation time of the normal symbol at the time of low base is 30.0 seconds, and the variation time of the normal symbol at the time of high base is 1.0 seconds. . Then, the game control microcomputer 560 updates the value of the normal symbol process flag to a value (specifically “1”) indicating the normal symbol variation process (step S101) (step S128).

  FIG. 47 is a flowchart showing the normal symbol variation process (step S101). In the normal symbol variation process, the game control microcomputer 560 checks whether or not the value of the normal symbol process timer has reached 0, that is, whether or not the normal symbol process timer has expired (step S131). If the normal symbol process timer has not expired (N in step S131), the game control microcomputer 560 decrements the value of the normal symbol process timer by -1 (step S135).

  When the normal symbol process timer expires, that is, when the normal symbol variation time has elapsed (Y in step S131), the game control microcomputer 560 stops the variation of the normal symbol on the normal symbol display 10. (Step S132). Then, the game control microcomputer 560 sets the normal symbol stop symbol display time in the normal symbol process timer (step S133). Then, the game control microcomputer 560 updates the value of the normal symbol process flag to a value (specifically “2”) indicating the normal symbol stop process (step S102) (step S134).

  FIG. 48 is a flowchart showing the normal symbol stop process (step S102). In the normal symbol stop process, the game control microcomputer 560 checks whether or not the value of the normal symbol process timer has reached 0, that is, whether or not the normal symbol process timer has expired (step S141). If the normal symbol process timer has not expired (N in step S141), the game control microcomputer 560 decrements the value of the normal symbol process timer by -1 (step S142).

  When the normal symbol process timer expires, that is, when the normal symbol stop symbol display time has elapsed (Y in step S141), the game control microcomputer 560 determines whether or not the normal symbol stop symbol is a winning symbol. (Whether or not it is determined to be a win in step S125) is confirmed (step S143). Note that whether or not the stop symbol of the normal symbol is a winning symbol is determined by, for example, setting the normal symbol per symbol determination flag when it is determined to be a winning symbol in step S125, and checking whether or not the flag is set. Can do.

  When the stop symbol of the normal symbol is a winning symbol (Y in step S143), the game control microcomputer 560 sets the normal electric accessory operating time in the normal symbol process timer (step S144). The ordinary electric accessory operating time is the maximum time during which the ordinary electric accessory (variable winning ball device 15) can operate. The normal electric accessory operating time is set to be longer in the high base state than in the low base state.

  Next, the game control microcomputer 560 checks whether the game state is a high base state or a low base state (step S145). Whether the base state is the high base state or the low base state can be confirmed by checking whether or not the time reduction flag is set. When the time reduction flag is set, it can be determined that the high base state is set, and when the time reduction flag is not set, it can be determined that the low base state is set. In the high base state, a high base state flag indicating the high base state is set, and whether the base state is the high base state or the low base state is determined depending on whether or not the flag is set. You may do it.

  When in the high base state (Y in step S145), the game control microcomputer 560 selects the release pattern set in the high base time table shown in FIG. S146). On the other hand, when it is in the low base state (N in step S145), the game control microcomputer 560 selects the release pattern set in the low base time table shown in FIG. (Step S147). In the example shown in FIG. 49, the low base time table is set with data of an open pattern with an open time of 0.5 seconds and a single open count. Also, in the high base time table, data of an opening pattern with an opening time of 2.5 seconds and an opening frequency of 2 is set.

  Then, the game control microcomputer 560 sets the release pattern selected in step S146 or S147 in the release pattern buffer (step S148). When the opening pattern is set in the opening pattern buffer, the opening pattern time (in this case, the variable winning ball apparatus 15 is set) is added to the ordinary electric accessory opening pattern timer (the timer for measuring the opening time and closing time of the ordinary electric accessory). A process of setting a closing time until the first opening is performed is also performed. Thereafter, the value of the normal symbol process flag is updated to a value (specifically “3”) indicating the normal electric accessory operation processing (step S103) (step S149).

  In step S143, when it is determined that the stop symbol of the normal symbol is not a winning symbol but an off symbol (N in step S143), the game control microcomputer 560 sets the value of the normal symbol process flag to the normal symbol normal flag. The value (specifically “0”) indicating the process (step S100) is updated (step S150).

  FIG. 50 is a flowchart showing the ordinary electric accessory operating process (step S103). In the ordinary electric actor operation process, the game control microcomputer 560 checks whether or not the value of the normal symbol process timer has reached 0, that is, whether or not the normal symbol process timer has expired (step S161). If the normal symbol process timer has not expired (N in step S161), the game control microcomputer 560 decrements the value of the normal symbol process timer by -1 (step S162).

  Then, the game control microcomputer 560 loads the switch-on buffer into the register (step S163). The switch-on buffer is a buffer in which 1 is set in the corresponding bit of the switch when switch-on is detected, and 0 is set in the corresponding bit of the switch when the switch-off is detected.

  The game control microcomputer 560 checks whether 1 is set in the second start port switch input bit (corresponding bit of the second start port switch 14a) (step S164). That is, it is confirmed whether or not the second start opening switch 14a is turned on (whether or not a game ball has won the second start winning opening 14). If 1 is not set in the second start port switch input bit (N in step S164), the process proceeds to step S168. If 1 is set in the second start port switch input bit (Y in step S164), the second start port switch 14a is turned on. The number of the number of game balls won in the winning ball apparatus 15) is incremented by 1 (step S165). Then, the game control microcomputer 560 checks whether or not the value of the ordinary electric winning prize counter is less than 8 (step S166). If the value of the ordinary electric winning prize counter is not less than 8 (N in step S166), that is, if it is 8 or more, the game control microcomputer 560 clears (sets to 0) the value of the normal symbol process timer. (Step S167). With this process, the ordinary electric accessory actuating process is completed (see Y in step S161, S172). Thus, in this embodiment, when eight or more game balls win the variable winning ball device 15 within the normal electric accessory operating time, the normal electric accessory operating process is terminated. Note that the game control microcomputer 560 clears the normal symbol process timer when eight or more game balls have won the variable winning ball device 15 within the normal electric accessory operating time (see step S167), and the same timer. In the interruption process, the variable winning ball apparatus 15 is closed by setting the solenoid 16 in a non-excited state (see step S171), and the value of the normal symbol process flag is a value indicating the normal symbol normal process (step S100) ( Specifically, it may be updated to “0” (see step S172).

  Next, the game control microcomputer 560 decrements the value of the ordinary electric accessory release pattern timer by -1 (step S168). Then, the game control microcomputer 560 checks whether or not the value of the ordinary electric accessory release pattern timer is 0, that is, whether or not the ordinary electric accessory release pattern timer has expired (step S169). If not timed out (N in step S169), the process is terminated as it is. If time-out has occurred (Y in step S169), the game control microcomputer 560 sets the release pattern time in the normal electric accessory release pattern timer (step S170). Note that the game control microcomputer 560 sets the release pattern time in the normal electric accessory release pattern timer based on the release pattern (see step S148) set in the release pattern buffer in the normal symbol stop process.

  Then, the game control microcomputer 560 drives the solenoid 16 to open or close the ordinary electric accessory (variable winning ball apparatus 15) (step S171). In this case, the game control microcomputer 560 opens the variable winning ball apparatus 15 by exciting the solenoid 16. Alternatively, the game control microcomputer 560 closes the variable winning ball apparatus 15 by putting the solenoid 16 in a non-excited state.

  Specifically, when the ordinary electric accessory release pattern timer expires when the variable winning ball apparatus 15 is closed, the release time is set as the release pattern time in the ordinary electric accessory release pattern timer, and the output port buffer ( The variable winning ball apparatus 15 is opened by inverting the solenoid output bit of the ordinary electric accessory of the solenoid buffer. When the normal electric accessory release pattern timer expires when the variable winning ball apparatus 15 is in the open state, a closing time is set as an open pattern time in the normal electric accessory release pattern timer, and the normal output port buffer (solenoid buffer) The variable winning ball apparatus 15 is closed by reversing the electric accessory solenoid output bit.

  By the processes in steps S168 to S171 described above, an open pattern in the low base state and an open pattern in the high base state are realized. When the gaming state is in the low base state, the opening time is 0.5 seconds and the number of times of opening is one, so that, for example, 1.0 seconds from the start of the normal electric accessory activation process When the closing time elapses, the variable winning ball device 15 is opened and opened, and when the opening time of 0.5 seconds elapses thereafter, the variable winning ball device 15 is closed and closed. Further, when the gaming state is the high base state, the release time is 2.5 seconds and the number of times of opening is 2, so that, for example, 2.5 after the normal electric accessory actuating process is started. When the second closing time elapses, the variable winning ball device 15 is opened and opened, and when the opening time of 2.5 seconds elapses thereafter, the variable winning ball device 15 is closed and closed. When the closing time of 5 seconds elapses, the variable winning ball device 15 is opened and opened, and when the opening time of 2.5 seconds elapses, the variable winning ball device 15 is closed and closed.

  In step S161, when the normal symbol process timer expires (Y in step S161), the game control microcomputer 560 sets the value of the normal symbol process flag to the value indicating the normal symbol normal process (step S100) (specifically, step S100). Is updated to “0”) (step S172).

  Next, payout control commands (payout control signals) transmitted and received between the main board 31 and the payout control board 37 will be described. FIG. 51 is an explanatory diagram showing an example of the contents of a payout command signal and the like transmitted from the game control microcomputer 560 to the payout control microcomputer 370.

  The prize ball REQ signal is a signal that is in an output state (= ON state) when a prize ball number command is transmitted (that is, a trigger signal for a prize ball payout request). The 4-bit prize ball number signal is a signal (prize ball number command) output for designating the number of game balls (0 to 15) to be paid out. The prize ball count signal is a payout control signal transmitted from the payout control microcomputer 370 to the game control microcomputer 560 and is a signal corresponding to a detection signal of the payout number count switch 187.

  FIG. 52 is a block diagram showing signal lines and the like used for transmission / reception of each control signal shown in FIG. In FIG. 52, a signal indicating an abnormality relating to payout (a payout error signal, a ball running out signal, a full tank signal) and a signal indicating another abnormality (door opening error) (door open / close signal) are also output from the payout control microcomputer 370. It is shown to be transmitted to the game control microcomputer 560. Also, a prize ball count signal indicating a state of a detection signal of the number-of-payout count switch 301 at the time of prize ball payout is transmitted from the payout control microcomputer 370 to the game control microcomputer 560. As shown in FIG. 52, the prize ball REQ signal and the prize ball number signal are output by the game control microcomputer 560 via the output circuit 67 and input to the payout control microcomputer 370 via the input circuit 373A. . A signal from the payout control microcomputer 370 to the game control microcomputer 560 is output via the output circuit 373B and input via the input circuit 68.

  FIG. 53 is a timing chart showing an example of how to issue a payout command signal. As shown in FIG. 53, the winning detection switch (the first starting port switch 13a, the second starting port switch 14a, the count switch 23, the winning port switches 29a, 30a, 33a, 39a) has detected the winning of the game ball. Based on this, the game control microcomputer 560 turns on the prize ball REQ signal and turns the output state of the prize ball number signal into a state corresponding to the number of prize balls to be paid out in accordance with winning. Specifically, when the gaming control microcomputer 560 detects that a game ball has won a winning area provided in the gaming machine based on a detection signal from the winning detection switch, the gaming control microcomputer 560 calculates a predetermined number of winning balls. It is added to the contents of the total winning ball number storage buffer. When the content of the total winning ball number storage buffer becomes a non-zero value, the winning ball REQ signal is turned on, and the output state of the winning ball number signal is set in accordance with the number of winning balls to be paid out according to winning. Put it in a state.

  In this embodiment, four game balls are paid out when a game ball is detected by the first start port switch 13a or the second start port switch 14a, and 15 game balls are detected when the count switch 23 detects a game ball. Perform prize ball payout. When game balls are detected by the winning opening switches 29a, 30a, 33a, 39a, seven prize balls are paid out. Further, as described above, since the prize ball number signal is composed of 4 bits, among the prize ball number signals of 00 (H) to 0F (H) expressed in 8 bits, the lower 4 bits are The signal is transmitted from the main board 31 to the payout control board 37 by the award ball number signal. Hereinafter, it may be expressed as “00 (H) to 0F (H) prize ball number signal”, but in reality, the prize ball number signal is represented by 8 bits. This corresponds to the lower 4 bits of 0F (H).

  In this embodiment, as for the payout command signal, the prize ball number signal is transmitted by unidirectional communication in which the signal is transmitted only from the main board 31 toward the payout control board 37, but by bidirectional communication, A prize ball number signal may be transmitted from the main board 31 to the payout control board 37. In this case, for example, the payout control microcomputer 370 transmits an ACK signal (response signal) to the game control microcomputer 560 in response to reception of the prize ball REQ signal, or indicates that a prize ball number signal has been received. You may make it transmit an ACK signal to the microcomputer 560 for game control. Further, in this case, when the payout control microcomputer 370 outputs the ACK signal, it may keep the ACK signal on until the payout of the game ball is completed. Then, when the game ball payout is completed, the ACK signal may be turned off. By doing so, it is possible to check whether or not the game ball has been paid out on the game control microcomputer 560 side by checking whether or not the ACK signal has been turned off after being turned on. In this case, the game control microcomputer 560 may transmit the prize ball REQ signal and the prize ball number signal again if there is a prize ball that has not been paid out after the completion of the payout. Further, the payout control microcomputer 370 may turn on the ACK signal for a moment when receiving the prize ball REQ signal or the prize ball number signal. In this case, if there is a prize ball that has not been paid out based on the fact that the ACK signal is turned on and turned off, the prize ball REQ signal and the prize ball number signal are transmitted again. do it.

  When the prize ball number signal is transmitted by unidirectional communication in which a signal is transmitted only from the main board 31 toward the payout control board 37, the payout control microcomputer 370 receives the prize ball number signal. Then, the payout device 97 may be controlled so that the number of game balls designated by the prize ball number signal is paid out by INT interruption. With such a configuration, the game control microcomputer 560 can transmit the award ball number signal regardless of whether or not the game balls have been paid out. For this reason, the game control microcomputer 560 can eliminate the need to store the number of prize balls in the RAM or the like until one payout is completed, thereby preventing an increase in the storage capacity of the RAM or the like.

  FIG. 54 is an explanatory diagram showing the relationship between the state of the detection signal of the payout number count switch 187 and the output state of the prize ball count signal. As shown in FIG. 54, the state of the detection signal of the payout number count switch 187 and the output state of the prize ball count signal are almost similar. The delay time from the state of the detection signal of the payout count switch 187 in the output state of the prize ball count signal corresponds to the processing time in the payout control microcomputer 370. In this embodiment, even when a game ball is paid out based on a ball lending request from the card unit 50, the detection signal of the payout number count switch 187 is turned on, but the payout control microcomputer 370 is turned on. Transmits a prize ball count signal only when a prize ball is paid out based on winning.

  FIG. 55 is a flowchart showing the input port data confirmation processing in step S23A (see FIG. 26). In the input port data confirmation processing, the CPU 56 reads data (input data) of the input port 1 (see FIG. 15) from the input port 1 (step S581), and the input data of the input port 1 and the input formed in the RAM. An exclusive OR is performed for each bit with the contents of the port 1 buffer (step S582). If there is a bit with different logic (meaning “1” or “0”) between the input data of the input port 1 and the contents of the input port 1 buffer formed in the RAM, an 8-bit exclusive The operation result of the logical sum does not become 00 (H). Note that the calculation in step S582 may be performed by ANDing the input data of the input port 1 with the data input from the input port 1 in the previous process. In other words, any device that can recognize a change in the state of the input port by some kind of calculation is acceptable.

  Then, the CPU 56 determines whether or not the exclusive OR operation result is 00 (H) (step S583). If the calculation result is 00 (H), the process ends. If the calculation result is not 00 (H), the input data of the input port 1 is set to the second byte of the command buffer (step S584). Also, FF (H) is set in the first byte of the command buffer (step S585). Then, an effect control command transmission request flag is set (step S586). When confirming that the effect control command transmission request flag is set in the effect control command control process in step S29, the CPU 56 transmits the contents of the command buffer as an effect control command. Instead of transmitting the effect control command in the effect control command control process, the effect control command may be transmitted immediately instead of setting the effect control command transmission request flag.

  After setting the effect control command transmission request flag, the CPU 56 stores the input data of the input port 1 input in step S581 in the input port 1 buffer (step S587).

  The input data of the input port 1 is transmitted to the effect control microcomputer 100 on condition that the input data of the input port 1 has been changed by the control as described above. At that time, the game control microcomputer 560 transmits the input data of the input port 1 as it is as an effect control command. Therefore, even if there is a lot of information indicated by the signal input to the input port 1, the control burden on the game control means is light. However, the CPU 56 may once fetch the data of the input port 1 and store the fetched data in the input port 1 buffer every time.

  Further, since the presentation control command related to the input data of the input port 1 is output from the main board 31 on condition that the input data of the input port 1 has changed, for example, it is always 1 in a predetermined control period (period of 2 ms interval). The transmission cycle of the effect control command is difficult to grasp compared to the case where the effect control command is configured to be transmitted. That is, it becomes difficult to grasp the cycle of the predetermined control period. For example, when a jackpot determination random number (corresponding to random R in this embodiment) is updated as a software random number for each timer interrupt, the value of the counter for generating a random number related to the jackpot is determined in a predetermined control period. Since it is updated one by one, when the period of the predetermined control period is easily grasped, the timing at which the counter value becomes the prescribed value is easily grasped. Predetermined timing refers to the big hit determination random number when the big hit determination random number is created by software, or when it is configured to determine whether or not to make a probable big hit based on the big hit symbol determination random number For example, the timing coincides with the determination value, the timing when the value of the jackpot symbol determination random number matches the value corresponding to the probability variation symbol, and the like. The fact that the timing at which the value of the counter reaches the predetermined value is easily grasped means that it is easy to receive fraud. In this embodiment, it is possible to make it difficult to receive fraud.

  In this embodiment, as shown in FIG. 10, a random number circuit 503 and a monitoring circuit 504 are provided outside the game control microcomputer 560, and the random number error signal is input to the game control microcomputer 560 from the outside. Although the input port data designation command is transmitted when the signal changes, the game control microcomputer 560 may determine whether or not a random number error has occurred. For example, the clock signal supplied to the random number circuit 503 is used to reset the WDT, and the signal from the WDT is also input to the input port of the game control microcomputer 560. The CPU 56 of the game control microcomputer 560 The random number error designation bit of the input port data designation command (see FIG. 31) is set to a value corresponding to the error, assuming that a random number error has occurred when it is determined that the clock signal is interrupted by the error signal indicating the error state. To do. Also, the signal line level (high level or low level) of the random error signal from the monitoring circuit 504 is checked a plurality of times. For example, the signal line level of the random error signal becomes a level corresponding to the random error even once. Then, it may be determined that a random error has occurred. In those cases, the CPU 56 does not transmit the input data of the input port 1 as it is as an effect control command, but instead of the random number error in the second byte (EXT data) of the effect control command for the input data of the input port 1. After setting the value of the bit corresponding to the designated bit to a value corresponding to the random number error (“0” in this embodiment), it is set as an effect control command. In these cases, the CPU 56 may determine whether or not a random number error has occurred at the start of power supply, but may always determine after the start of power supply.

  Further, in this embodiment, the CPU 56 transmits the input data of the input port 1 as it is as the effect control command to the effect control microcomputer 100, but the CPU 56 receives a part of the input data of the input port 1 as it is. You may make it transmit, process a part, and transmit. For example, the processing may be performed after logical inversion. The logic inversion may be realized by a hardware inversion circuit. Further, as processing, for example, the bit position in one byte may be changed. The change (including shift) of the bit position may be realized by hardware wiring.

  Further, in this embodiment, the CPU 56 executes the input port data confirmation process shown in FIG. 55 by the timer interrupt process, but executes it in the main process (between steps S16 and S19 shown in FIG. 25). It may be.

  FIG. 56 is a flowchart showing a processing example of the switch process in step S21 in the game control process. In the switch process, the game control microcomputer 560 sets the content of the previous port buffer to the previous data (step S331). Further, the exclusive OR of the contents of the port buffer and the previous data is taken twice before (step S332). Then, the result of the exclusive OR operation is set as the previous data (step S333). At this stage, in the previous data, the bit having a different value among the 8 bits of the port buffer and the 8 bits of the previous port buffer is “1”. In addition, the contents of the previous port buffer are set in the port buffer two times before (step S334).

  Then, input port 0 data is input (step S335), and the input data is set in the previous port buffer (step S336). The processes in steps S334 and S336 correspond to a preparation process when the switch process is executed next time (after 2 ms).

  Next, the game control microcomputer 560 takes the logical product of the data input from the input port 0 and the previous data (step S337). At this stage, in the previous data, a bit having a different value among the 8 bits of the previous port buffer and the 8 bits of the previous port buffer is “1”. That is, among the detection signals of the seven switches, the bit corresponding to the detection signal changed from the state before 2 ms from the state before 4 ms (from “0” to “1” or from “1” to “0”). Is “1”. Therefore, when the logical product of the previous data and the data input from the input port 0 is taken in step S337, the bit that is “1” in the data input from the input port 0 and 2 ms before The bit whose state has changed from the state 4 ms before becomes “1”. That is, as a result of the logical product operation, the bit corresponding to the detection signal in which the current state is the on state and has been detected to have changed from the off state to the on state during the previous switch processing (2 ms before) is “ 1 ”. In other words, the bit corresponding to the detection signal that has changed from the off state to the on state and then detected the on state twice in succession is “1”. Note that “continuously twice” means “both the switch process executed at a certain time and the switch process executed 2 ms after the switch process”.

  The game control microcomputer 560 stores the result of the AND operation in the switch-on buffer (step S338). In the switch-on buffer, after changing from the off state to the on state, the bit corresponding to the detection signal in which the on state is detected twice consecutively is “1”. Therefore, the game control microcomputer 560 can confirm that the detection signal of the switch corresponding to the bit which is “1” in the switch-on buffer is surely turned on. Note that “definitely” means that the ON state has been detected twice in succession, that is, it can be considered that the ON state has continued for 4 ms. It can be done.

  FIG. 57 is a flowchart showing an example of the prize ball processing in step S31. In the prize ball process, the game control microcomputer 560 executes a prize ball number addition process (step S341) and a prize ball control process (step S342).

  In the prize ball number adding process, a prize ball number table shown in FIG. 58 is used. The prize ball number table is set in the ROM 54. The number of processes (in this example, “7”) is set at the start address of the winning ball number table, and the switch input bit determination for each switch of the winning opening from which the winning ball is to be paid out by winning from the next address. The value and the number of winning balls are sequentially set corresponding to each switch of the winning opening. The switch input bit determination value is a value corresponding to the bit to which the detection signal of each switch at the input port 0 is input (see FIG. 15).

  FIG. 59 is a flowchart showing the award ball number adding process in step S341. In the winning ball number adding process, the game control microcomputer 560 sets the start address of the winning ball number table as a pointer (step S351). Then, the data at the address pointed to by the pointer (in this case, the number of processes) is loaded (step S352). Next, the switch-on buffer is loaded into the register (step S353).

  Then, the pointer value is incremented by 1 (step S354), and the logical product of the contents of the switch-on buffer and the prize ball number table data pointed to by the pointer (in this case, the switch input bit determination value) is calculated (step S355). . Further, the value of the pointer is increased by 1 (step S356).

  If the calculation result in step S355 is not 0 (N in step S361), that is, if the detection signal of the switch to be inspected is on, the process proceeds to step S362A. If the calculation result in step S355 is 0 (Y in step S361), that is, if the detection signal of the switch to be inspected is not on, the number of processes is reduced by 1 (step S359), and if the number of processes is 0 The process ends, and if the number of processes is not 0, the process returns to step S354 (step S360).

  In step S362A, the game control microcomputer 560 checks whether or not the switch input bit determination value used in the process of step S355 is a count switch input bit determination value. That is, it is confirmed whether or not it is confirmed in step S361 that the count switch 23 is turned on (whether or not the switch to be inspected is the count switch 23).

  When the switch input bit determination value is the count switch input bit determination value (Y in step S362A), the game control microcomputer 560 checks whether or not the value of the special symbol process flag is 5 or more ( Step S362B). That the value of the special symbol process flag is 5 or more means that the processing after the pre-opening process of the big winning opening in step S304 is executed in the special symbol process. That is, it means that a big hit game or a small hit game is being played. Here, during the big hit game, it is a period from the start of the big hit display to the end of the big hit end processing. Further, during the small hit game, it is a period from the start of the small hit display until the end of the small hit end process. In other words, the value of the special symbol process flag being 5 or more indicates that there is a possibility that control for opening the big prize opening may be performed when the game control is normally executed. .

  When the value of the special symbol process flag is 5 or more (Y in step S362B), the game control microcomputer 560 uses the prize ball number table data pointed to by the pointer (in this case, the number of prize balls) as a prize ball. The added value is set (step S364), and the prize ball addition value is added to the contents of the 16-bit total prize ball number storage buffer formed in the RAM 55 (step S365). If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S357 and S358). Then, the process proceeds to step S359.

  The state where the value of the special symbol process flag is less than 5 is a state where the big hit game and the small hit game are not executed, and the control for opening the big winning opening is not executed. When it is detected that the count switch 23 is turned on in such a state, it means that an abnormal prize has occurred at the big prize opening or that the detection signal from the count switch 23 has a noise over a long period (over 4 ms). Means that you got on. Therefore, when it is detected that the count switch 23 is turned on in a state where the value of the special symbol process flag is less than 5 (N in step S362B), the prize ball addition value is added to the total prize ball number storage buffer. Do not execute control. That is, the prize ball payout based on the count switch 23 being turned on is not executed (the processes in steps S364 and S365 are skipped). Then, the process proceeds to step S359.

  When the switch input bit determination value is not the count switch input bit determination value (N in step S362A), the game control microcomputer 560 determines that the switch input bit determination value used in the process of step S355 is the second start port switch input. It is confirmed whether or not the bit determination value has been reached (step S363A). That is, it is confirmed in step S361 whether or not the second start port switch 14a has been turned on (whether or not the switch to be inspected is the second start port switch 14a).

  If the switch input bit determination value is the second start port switch input bit determination value (Y in step S363A), the game control microcomputer 560 checks whether the value of the normal symbol process flag is 3 or not. (Step S363B). That the value of the normal symbol process flag is 3 means that the normal electric accessory actuating process of step S103 is being executed in the normal symbol process. That is, it means that the ordinary electric accessory (variable winning ball apparatus 15) is being opened and closed.

  When the switch input bit determination value is not the second start port switch input bit determination value (N in Step S363A) and when the value of the normal symbol process flag is 3 (Y in Step S363B), the game control The microcomputer 560 sets the prize ball number table data pointed to by the pointer (in this case, the prize ball number) to the prize ball addition value (step S364), and the prize ball addition value is 16 bits formed in the RAM 55. Is added to the contents of the total number of winning balls storage buffer (step S365). If a carry occurs as a result of the addition, the content of the total number of winning balls storage buffer is set to 65535 (= FFFF (H)) (steps S357 and S358). Then, the process proceeds to step S359.

  The state where the value of the normal symbol process flag is not 3 is a state where the variable winning ball device 15 is not operating and the control for opening the variable winning ball device 15 is not executed. In such a state, it is detected that the second start opening switch 14a is turned on. This means that an abnormal winning has occurred in the second start winning opening 14 or a detection signal from the second start opening switch 14a is long. This means that noise has been applied for a period (over 4 ms). Therefore, when it is detected that the second start port switch 14a is turned on when the value of the normal symbol process flag is not 3 (N in step S363B), the prize ball addition value is added to the total prize ball number storage buffer. Do not execute the control. That is, the prize ball payout based on the fact that the second start port switch 14a is turned on is not executed (steps S364 and S365 are skipped). Then, the process proceeds to step S359.

  In the above processing, the game control microcomputer 560 determines whether or not an abnormal winning to the big winning opening has occurred based on the value of the special symbol process flag, but actually opens the big winning opening. When it is detected that the count switch 23 is turned on when the count switch 23 is not turned on, the prize ball payout based on the count switch 23 being turned on may not be executed. For example, when the solenoid 21 is driven to open the big prize opening, the big prize opening release flag is set, and when the big prize opening is closed, the big prize opening release flag is controlled to be opened. The prize ball payout may not be executed based on the fact that the count switch 23 is turned on when the flag is not set. However, when configured to determine whether or not an abnormal winning has occurred based on the value of the special symbol process flag as in this embodiment, it is determined whether or not an abnormal winning has occurred based on one data. As a result, the determination process is simplified. Since the big winning opening is opened or closed over a plurality of rounds, it is determined whether or not the abnormal winning has occurred by judging whether or not the actual winning opening is controlled. To be complicated. It should be noted that control may be performed so that prize ball payout is not prohibited even if an abnormal winning at the special winning opening occurs.

  In addition, since there is a certain distance between the entrance of the big prize opening and the position where the count switch 23 is installed, it is determined whether or not the control for actually opening the big prize opening is performed, and whether or not an abnormal prize has occurred. In determining whether or not, it is necessary to consider a game ball that may have won a prize winning slot immediately before closing after performing a control for closing the prize winning opening. That is, it is necessary to consider the time for the game ball to flow from the entrance of the big prize opening to the position where the count switch 23 is installed. In other words, it is necessary to start the determination as to whether or not an abnormal winning has occurred after a certain period of time has passed since the control for actually closing the special winning opening is performed. This also complicates the processing.

  However, as in this embodiment, when it is configured to determine whether or not an abnormal winning to the big winning opening has occurred after the big winning end processing or the small winning end processing is completed, It is not necessary to consider the time for the game ball to flow between the entrance of the mouth and the position where the count switch 23 is installed. This is because the game ball that has won the big winning opening immediately before closing has reached the installation position of the count switch 23 during the processing period of the big hit end processing or the small hit end processing after the big winning opening is closed. In this embodiment, during the processing period of the big hit end process or the small hit end process, that is, the period during which the big hit end display or the small hit end display is made on the variable display device 9, It is set longer than the time required to reach the installation position of the count switch 23.

  Also, the game control microcomputer 560 determines whether or not an abnormal winning has occurred in the second start winning opening 14 based on the value of the normal symbol process flag (see step S363B). When the ball device 15 is not opened (that is, when the variable winning ball device 15 repeats the opening / closing operation based on the opening pattern corresponding to the gaming state in the ordinary electric game machine operation processing shown in FIG. 50, the variable winning ball device 15 When it is detected that the second start port switch 14a is turned on when the second start port switch 14a is turned on, the prize ball payout may not be executed. However, when it is configured to determine whether or not an abnormal winning has occurred based on the value of the normal symbol process flag as in this embodiment, it is determined whether or not an abnormal winning has occurred based on one data. As a result, the determination process is simplified. For example, when the variable winning ball device 15 is opened or closed a plurality of times (twice in the embodiment) as in the high base state, the variable winning ball device 15 is actually opened. If it is determined whether or not the control is performed and it is determined whether or not an abnormal winning has occurred, the processing becomes complicated. However, the processing can be simplified by determining based on the normal symbol process flag. It should be noted that control may be performed so that prize ball payout is not prohibited even when an abnormal winning to the second start winning opening 14 occurs.

  In addition, since there is a certain distance between the entrance of the second start winning opening 14 and the installation position of the second start opening switch 14a, is it actually controlled to open the variable winning ball apparatus 15 or not? When determining whether or not an abnormal winning has occurred, a game ball that may have won the second start winning opening 14 immediately after closing after taking control of the variable winning ball device 15 is considered. There is a need to. That is, it is necessary to consider the time for the game ball to flow from the entrance of the second start winning opening 14 to the installation position of the second start opening switch 14a. Therefore, in this embodiment, the timing for determining the abnormal winning is delayed from the timing for closing the variable winning ball apparatus 15.

  Specifically, the time until the normal symbol process timer times out after the variable winning ball device 15 is closed last (that is, from when the variable winning ball device 15 is closed in step S171 to Y in step S161). Is set longer than the time until the game ball that has won the second start winning opening 14 reaches the installation position of the second start opening 14a. That is, in step S170, a closing time (for example, 5 seconds) is set as an opening pattern time in the ordinary electric accessory release pattern timer, and until the ordinary symbol process timer times out after the ordinary electric accessory is finally closed in step S171. The normal electric accessory operating time is set so that the time becomes shorter (for example, 3 seconds) than the closing time (for example, 5 seconds) (step S144). The time until the normal symbol process timer times out after the ordinary electric accessory is closed for the last time (for example, 3 seconds), the game ball that won the second start winning opening 14 is set at the installation position of the second start opening 14a. It is sufficiently longer than the time to reach. By doing so, it is possible to prevent erroneous detection that an abnormal winning has occurred due to the winning of the game ball immediately before the variable winning ball device 15 is closed.

  As a method of delaying the timing for determining the abnormal winning ball from the timing for closing the variable winning ball device 15, in the above example, the variable winning ball device 15 is closed a predetermined time before the value of the normal symbol process flag is switched from 3 to 0. However, when the value of the normal symbol process flag is switched from 3 to 0, the abnormal winning determination is made, but at the same time as the variable winning ball apparatus 15 is closed, the value of the normal symbol process flag is switched from 3 to 0. Alternatively, the abnormal winning determination may be performed after a predetermined time has elapsed since the value of the normal symbol process flag is switched from 3 to 0. Specifically, when the value of the normal symbol process flag is changed from 3 to 0 (for example, immediately before or immediately after step S172 in FIG. 50), a predetermined time is set in the count timer, and every timer interruption (every 2 ms) ) Count down the count timer. When it is determined in the award ball number addition process that the value of the normal symbol process flag is not 3 (N in Step S363B), it is determined whether or not the count timer is 0. When the count timer is 0, Step S364 is performed. The process of S365 is skipped and the process proceeds to the process of step S359. Even with such a configuration, it is possible to delay the timing for determining an abnormal winning with respect to the timing for closing the variable winning ball device 15.

  It should be noted that, even in the determination of an abnormal winning to the big winning opening, the timing for determining the abnormal winning by the same method can be delayed from the timing for closing the big winning opening (special variable winning ball apparatus 20). Specifically, when the value of the special symbol process flag is changed from 7 to 0 or from 10 to 0, a predetermined time is set in the count timer, and the count timer is counted down every timer interrupt (every 2 ms). Go. When it is determined in the prize ball number addition process that the value of the special symbol process flag is not 4 or more (N in step S362B), it is determined whether or not the count timer is 0. When the count timer is 0, step S364 is performed. , S365 is skipped and the process proceeds to step S359.

  If the value of the special symbol process flag is less than 4 in step S362B (N in step S362B) or the value of the normal symbol process flag is not 3 in step S363B (N in step S363B), prize ball payout is prohibited. The control to be performed may not be performed. As will be described later, when it is determined that an abnormal winning has occurred, the game control microcomputer 560 transmits an abnormal winning notification designation command to the effect control microcomputer 100, and the effect control microcomputer 100 receives an abnormal win. This is because it is considered that the generation of the prize ball based on the abnormal winning can be stopped to the minimum since the occurrence is notified.

  FIG. 60 is a flowchart showing the prize ball control processing in step S342. In the prize ball control process, the game control microcomputer 560 checks the contents of the total prize ball number storage buffer (step S371). If the value is 0, the process ends. If it is not 0, it is confirmed whether or not the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value (“15” in this example) (step S372). If the content of the total prize ball number storage buffer is equal to or greater than the prize ball command maximum value, the prize ball command maximum value is set in the prize ball number buffer (step S373). If the content of the total prize ball number storage buffer is smaller than the prize ball command maximum value, the content of the total prize ball number storage buffer is set in the prize ball number buffer (step S374). Then, the contents of the prize ball number buffer are set in the output port for outputting the prize ball number signal (step S375). Further, “1” is set to the bit of the prize ball REQ signal of the output port for outputting the prize ball REQ signal (step S376).

  A prize ball REQ signal is output by the processing of step S376. That is, the prize ball REQ signal is turned on (see FIG. 53). Further, a prize ball number signal is output by the process of step S375 (see FIG. 53). In this embodiment, the maximum prize ball command value is “15”. Therefore, a prize ball number signal designating the maximum number of payouts of “15” is transmitted to the payout control board 37. Note that the game control microcomputer 560 stores the number of wins for each payout number or for each payout slot, and transmits the award ball number signal to the payout control board 37 in descending order of the number of prize balls. Good. Conversely, the game control microcomputer 560 may transmit the award ball number signal to the payout control board 37 in order from the smallest number of award balls.

  When the winning ball number signal is transmitted, the game control microcomputer 560 subtracts the contents of the winning ball number buffer (the winning ball payout number commanded to the payout control means) from the contents of the total winning ball number storage buffer (step S377). ).

  Next, the game control microcomputer 560 sets the ON period of the prize ball REQ signal. Specifically, an initial value is set in the wait counter (step S378). Then, the value of the wait counter is decremented by 1 until the value of the wait counter becomes 0 (steps S379 and S380). When the value of the wait counter reaches 0, the on period is terminated.

  That is, “0” is set to the bit of the prize ball REQ signal of the output port for outputting the prize ball REQ signal (step S381), and 00 (H) is set to the output port for outputting the prize ball number signal. (Step S382).

  When the payout control microcomputer mounted on the payout board 37 receives the award ball number signal, it drives the payout device 97 so that the number of game balls specified by the award ball number signal is paid out.

  In this embodiment, as for the payout command signal, the prize ball number signal is transmitted by unidirectional communication in which the signal is transmitted only from the main board 31 toward the payout control board 37, but by bidirectional communication, A prize ball number signal may be transmitted from the main board 31 to the payout control board 37. In this case, for example, the payout control microcomputer 370 transmits an ACK signal (response signal) to the game control microcomputer 560 in response to reception of the prize ball REQ signal, or indicates that a prize ball number signal has been received. You may make it transmit an ACK signal to the microcomputer 560 for game control. Further, in this case, when the payout control microcomputer 370 outputs the ACK signal, it may keep the ACK signal on until the payout of the game ball is completed. Then, when the game ball payout is completed, the ACK signal may be turned off. By doing so, it is possible to confirm whether or not the game ball has been paid out on the game control microcomputer 560 side by confirming whether or not the CK signal is turned off after being turned on. . In this case, the game control microcomputer 560 may transmit the award ball number signal again if there is a payout winning ball after the payout is completed. Further, the payout control microcomputer 370 may turn on the ACK signal for a moment when receiving the prize ball REQ signal or the prize ball number signal. In that case, if there is a prize ball that has not been paid out based on the fact that the ACK signal is turned on and turned off, the prize ball number signal may be transmitted again.

  As described above, when the award ball number signal is transmitted by unidirectional communication in which a signal is transmitted only from the main board 31 toward the payout control board 37, the payout control microcomputer 370 receives the award control microcomputer 370. When the ball number signal is received, the payout device 97 may be controlled so that the number of game balls specified by the prize ball number signal is paid out by INT interruption. With such a configuration, the game control microcomputer 560 can transmit the award ball number signal regardless of whether or not the game balls have been paid out. For this reason, the game control microcomputer 560 can eliminate the need to store the number of prize balls in the RAM or the like until one payout is completed, thereby preventing an increase in the storage capacity of the RAM or the like.

  FIG. 61 is a flowchart showing the abnormal winning notification process in step S23. In the abnormal winning notification process, the game control microcomputer 560 checks whether or not the abnormal notification prohibition flag is set (step S1581). The abnormality notification prohibition flag is set in a main process that is executed when power supply to the gaming machine is started (see step S44 in FIG. 24). If the abnormality notification prohibition flag is not set, the process proceeds to step S1585. When the abnormality notification prohibition flag is set, the value of the prohibition period timer set in step S45 is decremented by 1 (step S1582). When the value of the prohibition period timer becomes 0, that is, when the prohibition period timer times out, the abnormality notification prohibition flag is reset (steps S1583 and S1584).

  Next, the game control microcomputer 560 checks whether or not the value of the special symbol process flag is equal to or greater than 5 (pre-processing for opening a big prize opening) (step S1585). When the value of the special symbol process flag is 5 or more (Y in step S1585), the game is in a big hit game or a small hit game. If it is in such a state, there is a possibility that a game ball will win the big winning opening, so the process proceeds to the processing of step S1590 without performing the confirmation process of the abnormal winning to the big winning opening.

  The state where the value of the special symbol process flag is less than 5 is a state where neither a big hit game nor a small hit game is played. In this state, if there is a game ball winning at the big winning opening, it can be determined that the winning is an abnormal winning. Therefore, an abnormal winning confirmation process for the special winning opening shown below is performed.

  That is, if the value of the special symbol process flag is less than 5 (N in step S1585), the game control microcomputer 560 loads the contents of the switch-on buffer into the register (step S1586). Then, the game control microcomputer 560 takes the logical product of the contents of the loaded switch-on buffer and the count switch input bit determination value (01 (H), see FIG. 58) (step S1587). When the content of the switch-on buffer is 01 (H), that is, when the count switch 23 is on, the logical product operation result is 01 (H). When the count switch 23 is not turned on, the operation result of the logical product is 0 (00 (H)).

  If the result of the logical product is not 0 (N in step S1588), it is determined that an abnormal winning is made to the big winning opening, and control is performed to transmit an abnormal winning notification designating command to the effect control board 80 (step S1588). S1589). On the other hand, if the result of the logical product is 0 (Y in step S1589), it is determined that no abnormal winning in the special winning opening has occurred, and the process proceeds to step S1590.

  By executing the processing from step S1585 to S1589 shown above, when the gaming state is not a specific gaming state (probability big hit state, normal big hit state, sudden probability variation big hit state or small hit state), the game ball wins a big prize. Based on the winning in the mouth, an abnormal winning is detected, and an abnormal winning notification is executed. In this embodiment, when the jackpot is closed, in the jackpot end process in the special symbol process, the jackpot end display timer is displayed as a display time just before the jackpot ends even after the jackpot ends. A time longer than the count switch detection time, which is a time during which the game ball that has won the big prize opening can be detected by the count switch 23, is set (see step S153). In addition, in the small hit end processing, the display time of the small hit end display timer is a time during which the count switch 23 can detect a game ball won in the big winning opening just before the small hit end even after the small hit end. A time longer than the count switch detection time is set. Therefore, even after the completion of a specific gaming state (including a small hit state), even if a winning of a game ball is detected until the predetermined grace period elapses after the large winning opening is closed, Is controlled so as not to be judged.

  In this embodiment, the specific gaming state has been described as including a small hit state. However, the specific gaming state does not include a small hit state, and the specific gaming state includes a probability variable big hit state, a normal big hit state, or a sudden probability variable big hit state. You may think that it is controlled by either. Also in this case, the processing from step S1585 to S1589 described above is executed, based on the fact that the game ball has won the big winning opening when the game state is neither the specific game state nor the small hit state. Thus, the abnormal winning is detected, and the abnormal winning notification is executed. In addition, even after the specific game state or the small hit state is finished, it is determined that an abnormal winning is detected even if a winning of a game ball is detected until a predetermined grace period elapses after the big winning opening is closed. Control not to.

  In step S1590, game control microcomputer 560 checks whether or not the value of the normal symbol process flag is 3 (normal electric accessory operation processing) (step S1590). The state where the value of the normal symbol process flag is 3 is a state where the normal electric accessory (variable winning ball device 15) is opened and closed. If it is in such a state (Y in step S1590), there is a possibility that a game ball may win the second start winning opening 14, so that an abnormal winning confirmation to the second starting winning opening 14 is not performed. The winning notification process is terminated.

  A state where the value of the normal symbol process flag is not 3 (N in step S1590) is a state where the normal electric accessory (variable winning ball device 15) is not opened or closed. If there is a game ball winning in the second start winning opening 14 in such a state, it can be determined that the winning is an abnormal winning. Therefore, the abnormal winning confirmation process to the second start winning opening 14 shown below is performed.

  That is, if the value of the normal symbol process flag is not 3 (N in step S1590), the game control microcomputer 560 loads the contents of the switch-on buffer into the register (step S1591). Then, the game control microcomputer 560 takes the logical product of the contents of the loaded switch-on buffer and the second start port switch input bit determination value (80 (H), see FIG. 58) (step S1592). When the content of the switch-on buffer is 80 (H), that is, when the second start port switch 14a is on, the logical product operation result is 80 (H). When the second start port switch 14a is not turned on, the logical product operation result is 0 (00 (H)).

  If the logical product operation result is not 0 (N in step S1593), it is determined that an abnormal winning has occurred in the second start winning opening 14, and control for transmitting an abnormal winning notification designation command to the effect control board 80 is performed. This is performed (step S1594). On the other hand, when the result of the logical product is 0 (Y in step S1593), it is determined that no abnormal winning has occurred in the second start winning opening 14, and control for transmitting an abnormal winning notification designation command is performed. The abnormal winning notification process is terminated.

  When the count switch 23 is turned on in a state where neither a big hit game nor a small hit game is performed by the above processing, an abnormal winning notification designation command is transmitted. The abnormal winning notification designation command is also transmitted when the second start opening switch 14a is turned on while the variable winning ball apparatus 15 is not opened or closed.

  In addition, the process of steps S1581 to S1583 prohibits the start of abnormality notification when the production control microcomputer 100 is performing initialization notification. The production control microcomputer 100 continues to execute the initialization notification until the period corresponding to the prohibition period has elapsed since the start of the abnormality notification.

  Note that in the process of step S1585, the game control microcomputer 560 determines whether or not an abnormal winning to the big prize opening has occurred based on the value of the special symbol process flag. Similarly, since it can be determined whether or not an abnormal winning has occurred based on one data, the determination process can be simplified. Further, as described above, since the big hit end process or the small hit end process is executed for a predetermined time after the special variable winning ball apparatus 20 is closed, the special variable winning ball apparatus 20 has won a big winning opening immediately before closing. The game ball is prevented from being detected by the count switch 23 after the value of the special symbol process flag returns to 0, and an error is not notified even though it is a regular winning. .

  Further, in the process of step S1590, the game control microcomputer 560 determines whether or not an abnormal winning to the second start winning opening 14 has occurred based on the value of the normal symbol process flag, so that step S363B Similar to the above process, since it can be determined whether or not an abnormal winning has occurred based on one data, the determination process can be simplified. In addition, as described above, as a method of delaying the timing for determining an abnormal prize from the timing for closing the variable winning ball apparatus 15, the variable winning ball apparatus 15 is set a predetermined time before the value of the normal symbol process flag is switched from 3 to 0. Is closed, and when the value of the normal symbol process flag is switched from 3 to 0, an abnormal winning determination is made. The game ball is prevented from being detected by the second start switch 14a after the value of the normal symbol process flag returns to 0, and an error is reported even though it is a regular winning. There is nothing.

  As described above, when the variable winning ball apparatus 15 is closed, the value of the normal symbol process flag is switched from 3 to 0, and after the predetermined time has elapsed since the value of the normal symbol process flag is switched from 3 to 0, You may make it perform determination. Also, in the determination of the abnormal winning to the big winning opening, the timing for determining the abnormal winning by the same method may be delayed from the timing for closing the big winning opening (special variable winning ball apparatus 20).

  Further, in this embodiment, a common abnormal winning notification designation command is transmitted when an abnormal winning at the big winning opening occurs and when an abnormal winning at the second start winning opening 14 occurs (steps S1589, S1594). However, a different abnormal prize notification designation command may be transmitted. Then, the production control microcomputer 100 turns on or blinks the LEDs 82a, 82b, 82e, and 82f on the side of the upper plate lamp in different production modes according to the received abnormal prize notification designation command (for example, with different lighting patterns). A) An abnormal winning notification may be executed.

  Further, after the abnormal winning notification designation command is transmitted in step S1589 or step S1594, for example, the process may be stopped by controlling to shift to an infinite loop. In addition, when performing control to shift to an infinite loop, control may be performed so that normal processing is resumed after exiting the infinite loop after the infinite loop is repeatedly executed for a predetermined period.

  FIG. 62 is a flowchart showing an effect control command transmission process based on the effect control command transmission request flag in the effect control command control process in step S29. In the effect control command control process, if the effect control command transmission request flag is set, the CPU 56 resets the effect control command transmission request flag (steps S591, S592), and transmits the contents of the command buffer as an effect control command. Therefore, after adding header data, mark bits, and end bits, the data is output to the serial output circuit 78 (step S593).

  Next, the operation of the payout control means by the payout control microcomputer 370 will be described. FIG. 63 is an explanatory diagram showing an example of output port assignment in the payout control microcomputer 370. As shown in FIG. 63, the output port 0 is an output port for outputting a signal of each phase supplied to the payout motor 289 by the stepping motor. The output port 1 is an output port for outputting a payout error signal, a ball out signal, a full tank signal, and a prize ball count signal to the game control microcomputer 560. The output port 2 is an output port for outputting each segment of the error display LED 374 using a 7-segment LED.

  Although not shown in FIG. 63, the payout control board 37 is also provided with an output port 3 for outputting an EXS signal and a PRDY signal to the card unit 50. The output ports 0, 1, and 2 correspond to the output ports 372a, 372b, and 372c shown in FIG.

  FIG. 64 is an explanatory diagram showing an example of input port bit assignment in the payout control microcomputer 370. As shown in FIG. 64, a 4-bit prize ball number signal is inputted to bits 0 to 3 of the input port 0, and a prize ball REQ signal from the main board 31 is inputted to bits 4, 6 and 7, respectively. The detection signal of the ball break switch 187 and the detection signal of the payout motor position sensor 295 are input. In addition, the detection signal of the payout number count switch 301, the operation signal from the error release switch 375, and the detection signal of the full switch 48 are input to bits 1 to 3 of the input port 1, respectively. The VL signal, the BRDY signal, and the BRQ signal from the card unit 50 are input to bits 4 to 6 of the input port 1, respectively. The input ports 0 and 1 correspond to the input ports 372e and 372f shown in FIG.

  Next, the operation of the payout control microcomputer 370 (specifically, the payout control CPU 371) will be described. FIG. 65 is a flowchart showing a payout control process executed by the payout control means. The payout control process is executed by a timer interrupt process based on a timer interrupt generated every 2 ms, for example. In the payout control process, the payout control CPU 371 first performs an input determination process (step S752). The input determination process is a process of detecting the states of the input port 0 and the input port 1 and reflecting the detection result in predetermined 2 bytes of RAM (referred to as an input state flag). In the payout control process, when control is performed based on the states of the input port 0 and the input port 1, the state of the input state flag is checked instead of directly checking the state of the input port. In the input determination process, the payout control CPU 371 also performs a process of transmitting the input data of the input ports 0 and 1 to the main board 31.

  Next, the payout control CPU 371 executes a payout motor control process (step S753). In the payout motor control process, when the payout motor 289 is to be driven, a process for outputting the patterns of the payout motors φ1 to φ4 to the output port 0 is performed.

  Also, the payout control CPU 371 executes a prepaid card unit control process for communicating with the card unit 50 (step S754). Next, the payout control CPU 371 executes main control communication processing for communicating with the game control means of the main board 31 (step S755). Further, a prize ball lending control process for performing a control to pay out a lending ball in response to a ball lending request from the card unit 50 and a control for paying out the number of award balls indicated by a prize ball number signal from the main board. Is executed (step S756).

  Then, the payout control CPU 371 executes error processing for detecting various errors (step S757). In addition, an information output process for outputting a prize ball information signal, a ball lending number signal, and the like output to the outside of the gaming machine is executed (step S758). Further, display control processing for performing a predetermined display on the error display LED 374 according to the result of the error processing is executed (step S759).

  In this embodiment, a RAM area (output port 0 buffer, output port 1 buffer, output port 2 buffer) corresponding to the output state of the output port is provided. The contents of the port 0 buffer, output port 1 buffer, and output port 2 buffer are output to the output port (step S760: output processing). The output port 0 buffer, output port 1 buffer, and output port 2 buffer include a payout motor control process (step S753), a prepaid card unit control process (step S754), a main control communication process (step S755), and an information output process (step S758). ) And display control processing (step S759).

  FIG. 66 is a flowchart showing the prize ball lending control processing in step S756. In the winning ball lending control process, the payout control CPU 371 confirms that the detection signal of the payout number count switch 301 is turned on (step S401). The value is decremented by 1 (steps S402 and S404), and if the ball is not being lent, the value of the unpaid prize ball counter is decremented by 1 (steps S402 and S403). Next, the payout ball detection bit of the payout control state flag formed in the RAM is set (step S405). The payout ball detection bit is a game regardless of whether the payout motor 289 is driven in one payout ball payout process (up to 15 balls) or one ball lending process (25 payouts) in the payout passing waiting process. This is used to detect that no sphere has passed through the payout number counting switch 301. Thereafter, any one of steps S410 to S412 is executed according to the value of the payout control code.

  In the winning ball lending control process, when checking the detection signal of the payout number count switch 301 or subtracting the unpaid number counter, the error bit check is not executed. Therefore, even if an error state relating to the payout of game balls is detected, every time a payout of game balls is detected by the payout number count switch 301, if the payout game balls are loaned balls, a ball rental unpaid number counter 1 is subtracted, and if it is a prize ball, a process of subtracting 1 from the prize ball unpaid number counter is executed. Therefore, even if an error related to payout occurs, the number of unpaid game balls can be managed accurately. That is, a game ball paid out from the ball payout device 97 before the payout control CPU 371 detects the occurrence of an error is detected by the payout number count switch 301 with a slight delay from the time of payout. The payout control CPU 371 generates an error when the occurrence of an error is detected after the game ball is paid out from the ball payout device 97 and before the game ball is detected by the payout number count switch 301. The game balls paid out from the ball payout device 97 before detection can be reflected in the award ball unpaid number counter or the ball lending unpaid number counter.

  FIG. 67 is a flowchart showing the payout start waiting process (step S410) executed when the payout control code is 0. In the payout start waiting process, the payout control CPU 371 does not execute the subsequent processes if an error bit (one or more of all error bits in the error flag (see FIG. 72)) is set (step S421). . The error flag is formed in the RAM.

  On the other hand, if the BRDY signal is not in the on state, the process for paying out a prize ball after step S431 is executed. If the BRDY signal is on and the BRQ signal, which is a ball lending request signal, is on, a ball lending operation flag is set (steps S423 and S424). Then, “25” is set in the unpaid ball lending number counter (step S425), and “25” is set in the payout motor rotation number buffer (step S426).

  The payout motor rotation frequency buffer is referred to in the payout motor control process (step S753). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer.

  Thereafter, the payout control CPU 371 sets a value (specifically “1”) corresponding to the payout motor activation preparation process (step S522) to the payout motor control code for selecting the process executed in the payout motor control process. It is set (step S427), the value of the payout control code is set to 1 (step S428), and the process ends.

  In step S431, the payout control CPU 371 checks whether or not the value of the winning ball unpaid-out counter is 0 (step S431). If 0, the process ends. The award ball unpaid-out counter is a value other than 0 when the communication related to the payout command signal is normally completed with the game control microcomputer 560 of the main board 31 in the main control communication end process. The number indicated by the prize ball number signal) is added. If the value of the award ball unpaid number counter is not 0, it is confirmed whether it is 15 or more (step S432). If it is less than 15, the value of the award ball unpaid number counter is set in the payout motor rotation count buffer (step S433), and if it is 15 or more, “15” is set in the payout motor rotation count buffer. Then, a winning ball operating flag is set (step S435), and the process proceeds to step S427.

  FIG. 68 is a flowchart showing the payout motor stop waiting process (step S411) executed when the payout control code is 1. In the payout motor stop waiting process, the payout control CPU 371 checks whether or not the payout operation is completed (step S441). For example, the payout control CPU 371 sets the number of rotations of the payout motor 289 when performing the payout operation, and determines whether or not the rotation control of the payout control motor 289 for the set number of rotations is finished. It is determined whether or not the operation is finished.

  When the payout operation is completed, the payout control CPU 371 sets the payout passing monitoring time in the payout control monitoring timer (step S442). The payout passing monitoring time is a time that has a margin in the time from when the last payout ball is paid out by the payout motor 289 until it passes through the payout number count switch 301. Then, the value of the payout control code is set to 2 (step S443), and the process ends.

  69 to 71 are flowcharts showing the payout passing waiting process (step S412) executed when the value of the payout control code is 2. In the payout passing waiting process, when a prize ball is being paid out, it is determined that the payout has been completed normally if the value of the prize ball unpaid number counter is zero. If the value of the award ball unpaid-out counter is not 0, if it is not in an error state, a re-payout operation of one game ball is tried up to 2 times. In the re-payout operation, when it is detected by the payout number count switch 301 that the game ball is actually paid out, it is determined that the payout has been completed normally. In this embodiment, the maximum number of game balls to be paid out in one prize ball payout operation is 15, and if the prize ball number signal is received during the prize ball payout, the value of the prize ball unpaid number counter is received. Therefore, even when the payout is completed normally, the value of the award ball non-payout number counter may not be 0.

  Further, when the ball lending is being paid out, it is determined that the payout has been completed normally if the value of the ball lending unpaid-out counter is 0. If the value of the ball lending unpaid number counter is not 0, and if it is not in an error state, a re-payout operation of one game ball or the remaining number of ball lending (corresponding to the value of the ball lending unpaid number counter) Try. In this embodiment, the number of game balls to be paid out in one ball lending and payout operation is 25 (fixed value), and the payout motor 289 is rotated so that 25 game balls are paid out. Therefore, when the value of the unpaid ball lending counter is not 0, the payout has not been completed normally.

  In the payout passing waiting process, the payout control CPU 371 first checks the value of the payout control timer, and if the value is 0, the process proceeds to step S453 (step S450). If the value of the payout control timer is not 0, the value of the payout control timer is decremented by 1 (step S451). If the value of the payout control timer is not 0 (step S452), that is, if the payout control timer has not timed out, the process is terminated. Note that the process in step S450 is a process that takes into account when a game ball payout retry operation to be described later is started. When the process of step S907 described later is executed, a retry operation is started through a route that moves from step S450 to S453.

  If the payout control timer has timed out (step S452), it is confirmed whether or not a ball lending payout process (ball lending operation) has been executed (step S453). Whether or not the ball lending operation has been executed is confirmed by whether or not the ball lending operation in-progress bit formed in the RAM is set (see steps S423 and S424). When the ball lending operation is not executed, that is, when the prize ball payout process (prize ball operation) is executed, the payout control CPU 371 checks the value of the award ball unpaid number counter (step S454). ). When the value of the winning ball unpaid-out counter is 0, it is determined that the winning ball payout process has been completed normally, and the payout ball detection bit in the payout control state flag, 1 bit during re-payout operation, and during re-payout operation 2 bits, the winning ball operating flag and the ball lending operating bit are reset (step S455), the payout control code is set to 0 (step S456), and the processing is terminated. This bit is set when the switch 301 is turned on, and indicates that the payout number counting switch 301 has detected at least one game ball during the payout operation. Further, 1 bit during the re-payout operation and 2 bits during the re-payout operation are control bits used when executing a re-payout process including two re-payout operations.

  The payout control CPU 371 determines that an error flag (specifically, a payout switch error error 1 bit, a payout switch error error 2 bit, and a payout case error bit when the value of the award ball unpaid number counter is not 0. (One or a plurality of bits) is not set (step S459), and if the payout ball detection bit is not set (step S461), the re-payout operation is executed. To do. If the error flag is set, the re-payout operation is not executed.

  As described above, in this embodiment, even when the payout is completed normally, the value of the unpaid prize ball number counter may not be 0. Therefore, if the payout ball detection bit is set, that is, if the payout number count switch 301 detects the payout of at least one game ball during the prize ball payout process, it is assumed that the prize ball payout process is normally completed. The process proceeds to step S455. For example, when 15 game balls should be paid out in one prize ball payout process, when only 14 game balls are actually paid out (the number of payout count switch 301 is 14 game balls). In this case, the payout ball detection bit is set, so it is considered that the award ball payout process has been completed normally. It should not have been done, and the shortage will be paid out in the next prize ball payout process, so there will be no disadvantage to the player.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not 2 bits during re-payout operation are set (step S462). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S463). If 1 bit is not set during the re-payout operation, 1 is set as the number of re-payout operations to execute the first re-payout operation (step S464), and 1 bit is set during the re-payout operation (step S465). ) The value of the re-payout operation number or the ball lending unpaid-out number counter is set in the payout motor rotation number buffer (step S466). The payout motor rotation frequency buffer is referred to in the payout motor control process (step S753). That is, in the payout motor control process, control is performed to rotate the payout motor 289 by the number of rotations corresponding to the value set in the payout motor rotation frequency buffer. In step S466, the value of the unpaid ball lending number counter is also handled because step S466 is used in the re-payout process in the lend-out process. That is, in step S466, the payout control CPU 371 sets the re-payout operation number in the re-payout process in the prize ball payout process, and sets the value of the ball lending unpaid number counter in the re-payout process in the ball lending payout process. . Thereafter, the payout control code is set to 1 (step S467), and the process is terminated.

  In step S463, when it is confirmed that 1 bit is set during the re-payout operation, the payout control CPU 371 sets 1 as the re-payout operation number in order to execute the second re-payout (step S468). Then, 1 bit is reset during the re-payout operation (step S469), and 2 bits are set during the re-payout operation (step S470). Then, control goes to a step S466.

  In step S462, when it is confirmed that 2 bits are set during the re-payout operation, the payout control CPU 371 did not pay out the game ball even after executing the re-payout process twice (payout number count switch). 301 has detected no game ball), the payout case error bit in the error flag is set (step S472). At that time, 2 bits during the re-payout operation are reset (step S471). Then, the process ends.

  As described above, if no game balls are paid out even if two re-payout operations are performed in the re-payout process (corrected payout process), it is determined that the game ball payout operation is defective and the payout number count switch is not A passing error bit (payout case error bit) is set.

  Accordingly, in this embodiment, the payout control CPU 371 determines in advance when it detects that the game ball has not been paid out based on the detection signal from the payout number count switch 301 as the payout detection means. Control is performed so that the payout means pays out one game ball up to a predetermined number of times (in this example, twice). In this embodiment, if the game ball is not paid out even if the retry operation for paying out the game ball is performed twice, the payout case error bit is set and an error is being generated. (Step S472), the payout case error bit may be set when it is detected for the first time that the game ball has not been paid out. Note that “retry operation (or“ retry ”,“ retry operation processing ”) means that the actual number of payouts is equal to the number of game balls paid out in spite of execution of a normal payout process. This is an operation to be executed when the amount is small, and means an operation for executing the payout process again in order to pay out unpaid game balls separately from the normal payout process.

  In the winning ball lending control process, the error bit is checked to determine whether or not to perform a payout operation (one winning ball payout or one ball lending). The payout start shown in FIG. Only in the waiting process. In the payout motor stop waiting process shown in FIG. 68 and the payout passing wait process shown in FIG. 69 and the like, the error bit is not checked. Note that the error bit is also checked in step S459 or the like in the payout passing waiting process, but this check is for determining whether or not a re-payout operation is performed, and is a payout operation (single prize ball payout or 1 This is not to determine whether or not to start ball lending. Therefore, after the process of step S426, S433, or step S434 is performed and the game ball payout process is started, the payout process is not interrupted even if an error occurs. In other words, when an error occurs, the game ball payout process is continued until a point at which the game ball can be cut well (at the time when one prize ball payout or one ball lending ends). The error bits in the error flag checked in step S421 include an error bit indicating that the connection confirmation signal from the main board 31 has been turned off. Therefore, even when the connection confirmation signal is turned off, the game ball payout process is stopped at a time when it is best to turn it off.

  Upon confirming that the ball lending / dispensing process (ball lending operation) has been executed in step S453, the payout control CPU 371 confirms whether or not the value of the unlapped ball lending number counter is 0 (step S457). . If it is 0, it is determined that the ball lending / dispensing process is normally completed, and the process proceeds to step S455.

  In step S457, if the value of the ball lending unpaid number counter is not 0, an error flag (specifically, any one of the payout switch error error 1 bit, the payout switch error error 2 bit, and the payout case error bit) Or one bit or a plurality of bits) is not set (step S475), and the re-payout process is executed. If the error flag is set, the re-payout process is not executed.

  In order to execute the re-payout process, the pay-out control CPU 371 first checks whether or not 2 bits during re-payout operation are set (step S476). If not set, it is confirmed whether or not 1 bit is set during the re-payout operation (step S477). If 1 bit is not set during the re-payout operation, 1 is set as the number of re-payout operations to execute the first re-payout operation (step S478), and 1 bit is set during the re-payout operation (step S479). ) After further resetting the payout ball detection bit (step S480), the process proceeds to step S466.

  In step S477, when it is confirmed that 1 bit is set during the re-payout operation, the payout control CPU 371 performs a process for executing the re-payout operation again. Specifically, 1 bit is reset during the re-payout operation (step S481). If the payout ball detection bit is set, that is, if the game ball is paid out in the first re-payout operation, the process proceeds to step S483. If the payout ball detection bit is not set, the process proceeds to step S484 in order to execute the second payout operation.

  In step S483, the payout ball detection bit is reset, and then the process proceeds to step S466. Therefore, in this case, since 1 bit remains set during the re-payout operation, the first (first) re-payout operation is performed again. In step S484, 1 is set as the number of re-payout operations (step S484), 2 bits during re-payout operation are set (step S485), and the process proceeds to step S466.

  In step S476, when it is confirmed that the 2 bits during re-payout operation are set, the payout control CPU 371 resets 2 bits during the re-payout operation (step S486), and if the payout ball detection bit is set, That is, if the game ball has been paid out by the re-payout operation, the process proceeds to step S483 to try to eliminate the remaining unpaid portion. If the payout ball detection bit is not set, it is determined that the game ball has not been paid out even if the re-payout process is executed twice (the payout number count switch 301 has not detected a game ball). A payout case error bit is set (step S488). Then, the process ends.

  As described above, if one game ball is not paid out even if two re-payout operations are continuously performed in the re-payout process (corrected payout process) related to the ball lending process, a game ball payout operation is performed. As a failure, a payout count switch non-passing error bit (payout case error bit) is set. In this embodiment, the ball lending control process is executed with priority over the prize ball control process (the process after step S431) (see step S422). Priority may be given to execution.

  Next, error processing will be described. FIG. 72 is an explanatory diagram showing the relationship between the type of error and the display of the LED 374 for error display. In this embodiment, the numerical value displayed on the error display LED 374 is the same as the corresponding bit of the error flag. For example, the display of “0” corresponds to bit 0 of the error flag. As shown in FIG. 72, when disconnection of the payout number count switch 301 or ball clogging at the payout number count switch 301 is detected, the error display LED 374 is set to “0” as a payout switch abnormality detection error 1. Control the display. The detection of the disconnection of the payout count switch 301 or the clogging of the balls in the payout count switch 301 is determined by the detection signal of the payout count switch 301 not being turned off.

  When the detection signal of the payout number count switch 301 is turned on even though the game ball is not paying out, a control is performed to display “1” on the error display LED 374 as a payout switch abnormality detection error 2. Do. If the detection signal of the payout count switch 301 does not turn on despite the rotation abnormality of the payout motor 289 or the game ball being paid out, “2” is displayed on the error display LED 374 as a payout case error. Control. When the prize ball REQ signal is turned on at an improper timing, or when the prize ball REQ signal is turned off at an improper timing, “3” is displayed in the error display LED 374 as a prize ball REQ signal error. Control to display. It is detected in the main control communication process that the prize ball REQ signal is turned on or off at an incorrect timing.

  Further, when the lower pan is full, that is, when the full switch 48 is turned on, a control is performed to display “4” on the error display LED 374 as a full error. When the supply ball is insufficient, that is, when the ball break switch 187 is turned on, control is performed to display “5” on the error display LED 374 as a ball break error.

  Further, when the VL signal from the card unit 50 is turned off, control is performed to display “6” on the error display LED 374 as a prepaid card unit unconnected error. When communication with the card unit 50 is performed at an improper timing, control is performed to display “7” on the error display LED 374 as a prepaid card unit communication error. The prepaid card unit communication error is detected in the prepaid card unit control process (step S754).

  Among the above errors, after a payout switch abnormality detection error 2, a payout case error or a prize ball REQ signal error occurs, the error release switch 375 is operated and an operation signal is output from the error release switch 375 (becomes turned on). The payout control means returns to the state before the error occurred.

  73 and 74 are flowcharts showing the error processing in step S757. In the error processing, the payout control CPU 371 checks the error flag, and the set bits are only payout switch abnormality detection error 2, payout case error and prize ball REQ signal error (any one of the three). It is confirmed whether it is only a bit, or only two bits out of three, or only those three bits (step S9001). If these are the only bits that are set, it is checked whether or not the operation signal is turned on from the error release switch 375 (step S9002). When the operation signal is turned on, the error recovery time is set in the pre-error recovery timer (step S9003). The error recovery time is the time from when the error release switch 375 is operated until the actual return from the error state to the normal state.

  If the operation signal from the error release switch 375 is not on, the value of the timer before error recovery is confirmed (step S9004). If the value of the timer before error recovery is 0, that is, if the timer before error recovery is not set, the process proceeds to step S9008. If the pre-error recovery timer is set, the value of the pre-error recovery timer is decremented by -1 (step S9005). If the pre-error recovery timer value becomes 0 (step S9006), the payout switch of the error flags is set. Bits of abnormality detection error 2, payout case error and prize ball REQ signal error are reset (step S9007), and the process proceeds to step S9008.

  When the processing of step S9007 is executed, there may be an error bit that is not set among the bits of the payout switch abnormality detection error 2, the payout case error, and the winning ball REQ signal error. There is no problem resetting error bits that are not in the state. As described above, in this embodiment, when an error (see FIG. 72) that causes the setting of the payout switch abnormality detection error 2, the payout case error, or the winning ball REQ signal error bit occurs, an error occurs. The error is released when the release switch 375 is pressed.

  When the processing of step S9007 is executed and the payout case error bit is reset, the payout control code is “2” (corresponding to the execution of the payout passing waiting process shown in FIGS. 69 to 71), and the prize ball When the value of the unpaid-out number counter or the value of the ball-lending unpaid-out number counter is not 0, a retry operation for game ball payout is started. That is, when the award ball lending control process of step S756 is executed next, when the payout passing waiting process of step S412 is executed, the repaid process is performed again. For example, if a prize ball payout process has been performed and the value of the prize ball unpaid number counter is not 0, the process proceeds from step S454 to step S459, and it is confirmed in step S459 that the error bit is in a reset state. Therefore, the process for starting the re-payout process after step S462 is executed again, and the re-payout process is executed. Regarding the payout case error bit reset by pressing the error release switch 375, when the bit is set (when step S472 is executed), the payout control timer has already expired. Accordingly, when the process of step S9007 is executed and the payout case error bit is reset, the payout control timer = 0 is determined in the determination of step S450 when the payout passage waiting process is executed next. Further, when the payout case error bit is set, the payout ball detection bit is 0 (since step S472 is not executed unless the payout ball detection bit is 0 according to the determination in step S461). Therefore, whenever it is confirmed in step S459 that the error bit is in the reset state, step S462 is executed. That is, the re-payout process is always executed.

  As described above, the payout control means is used to pay out a game ball when the payout number count switch 301 detects no game ball even though the ball payout device 97 pays out a game ball. After performing the correct payout control for causing the ball payout device 97 to execute the retry operation for a predetermined number of times (for example, twice) as a limit, the payout number count switch 301 has detected no game balls. When it is detected (see step S461 and thereafter in FIG. 70), the control state related to the payout is shifted to the error state, and the correction payout control is performed again on condition that the error release signal is output from the error release switch 375 in the error state. A correction payout control restart process for executing

  Further, even during re-payout processing in an error state (specifically, during re-payout processing before setting a payout case error and during re-payout processing after the error release switch 375 is pressed), steps S401 to S401 shown in FIG. The process of S404 is being executed. That is, even when an error relating to payout occurs, if the game ball passes the payout number count switch 301, the value of the award ball unpaid number counter or the ball lending unpaid number counter is subtracted. Therefore, the value of the award ball unpaid number counter or the ball lending unpaid number counter when returning from the error state is a value reflecting the number of game balls actually paid out. That is, even if an error related to payout occurs, the number of game balls actually paid out can be accurately managed.

  In the payout waiting process shown in FIGS. 69 to 71, the payout case error bit is not reset even when it is confirmed that the game ball has been paid out as a result of the re-payout process. The bit of the payout case error is reset only when the error release switch 375 is operated (specifically, when an error return time after operation has elapsed) (steps S9002, S9003, and S9007). That is, the payout case error (payout shortage error) state is not automatically canceled based on the fact that the game ball has passed the payout number count switch 301, etc., and the payout case must be processed without human operation. The error is not cleared. Therefore, the game store clerk and the like can surely recognize that a shortage of payout has occurred.

  In step S9008, the payout control CPU 371 checks the detection signal of the full switch 48. If the detection signal of the full tank switch 48 is output (if it is in the ON state), the full tank error bit in the error flag is set (step S9009). If the detection signal of the full tank switch 48 is OFF, the full tank error bit is reset (step S9010).

  Further, the payout control CPU 371 checks the detection signal of the ball break switch 187 (step S9011). If the detection signal of the ball break switch 187 is output (if it is on), the ball break error bit in the error flag is set (step S9012). If the detection signal of the ball break switch 187 is OFF, the ball break error bit is reset (step S9013).

  In the input determination process described later, the detection signal of the full switch 48 and the detection signal of the ball break switch 187 are also confirmed. In the error processing shown in FIGS. 73 and 74, the detection signal of the full switch 48 and the ball signal The detection signal of the cut switch 187 is confirmed, and control for displaying an error on the error display LED 374 by the 7 segment LED mounted on the payout control board 37 is performed. Specifically, if the detection signal of the full switch 48 is output, an error signal is output to the error display LED 374 by setting the full error bit (see step S9009) and error display is performed. become. If the detection signal of the ball break switch 187 is output, an error signal is output to the error display LED 374 by setting the ball break error bit (see step S9012) and error display is performed. On the other hand, in the input determination process described later, the detection signal of the full tank switch 48 and the detection signal of the ball short switch 187 are confirmed, and control for outputting a full tank signal and a ball short signal to the game control microcomputer 560 is performed. Do. Specifically, if the detection signal of the full tank switch 48 is output, the detection signal of the full tank switch 48 is output to the bit of the full tank signal of the output port 1 (see step S934), and the game control micro The full signal is output to the computer 560. If the detection signal of the ball break switch 187 is output, the detection signal of the ball break switch 187 is output to the bit of the ball break signal of the output port 1 (see step S932), and is sent to the game control microcomputer 560. The ball-out signal is output.

  In the input determination process described later, if the detection signal of the full tank switch 48 is output, an error signal is output to the error display LED 374 by setting the full tank error bit (see step S9009). And the detection signal of the full switch 48 is output to the bit of the full port signal of the output port 1 (see step S934), and the full tank signal is output to the game control microcomputer 560. You may control to be performed. In the input determination process, if the detection signal of the ball break switch 187 is output, an error signal is output to the error display LED 374 by setting the ball break error bit (see step S9012), and an error display is performed. And the detection signal of the ball break switch 187 is output to the bit of the ball break signal of the output port 1 (see step S932), and the ball break signal is output to the game control microcomputer 560. You may control as follows.

  The payout control CPU 371 confirms the value of the switch timer to which the state of the detection signal of the payout number count switch 301 is set, and if the value exceeds the maximum switch-on time (eg, “240”) (step S9018). ), The bit of the payout switch abnormality detection error 1 is set in the error flag (step S9019).

  The switch timer is a counter that is updated in the input determination process in step S752. If the value of the switch timer is equal to or shorter than the maximum switch-on time, the payout switch abnormality detection error 1 bit is reset (step S9020). It should be noted that the value of the switch timer is incremented by 1 when the state of the input port for inputting the detection signal of the payout number count switch 301 is switched on in the input determination process at step S752, and is cleared by 0 when it is off. . Accordingly, the fact that the value of the switch timer corresponding to the payout number count switch 301 exceeds the switch on maximum time means that the payout number count switch 301 is in the on state exceeding the switch on maximum time. Then, it is determined that the game ball is clogged at the disconnection of the payout number count switch 301 or at the portion of the payout number count switch 301.

  Also, the payout control CPU 371, when the value of the switch timer corresponding to the payout number count switch 301 becomes a switch-on determination value (for example, “2”) (step S9021), the ball lending operation flag and the winning ball operation If both the middle flags are in the reset state, the game ball passes through the payout number count switch 301 even though the payout operation is not in progress, and the bit of the payout switch abnormality detection error 2 is set in the error flag (steps S9022, S9023). . If the ball lending operation flag or the winning ball operation flag is set, the bit of the payout switch abnormality detection error 2 is reset (step S9024).

  Further, the payout control CPU 371 checks the input state of the VL signal from the card unit 50 (step S9025). If the VL signal is not input (if it is in the OFF state), the prepaid card unit not yet in the error flag is displayed. A connection error bit is set (step S9026). If the VL signal is input (if it is on), the prepaid card unit unconnected error bit is reset (step S9027).

  In this embodiment, the error display LED 374 mounted on the payout control board 37 installed on the back of the gaming machine is notified that an error relating to payout has occurred. It is notified by the lamp installed on the front side.

  FIG. 75 is a flowchart showing a process of a part of the input determination process in step S752 that transmits the input data of the input ports 0 and 1 (see FIG. 64) to the main board 31. In the input determination process, the payout control CPU 371 reads input data of the input port 0 (step S931). Then, the detection signal of the ball break switch 187 in the input data is output to the bit of the ball break signal of the output port 1 (see FIG. 63) (step S932). Further, input data of the input port 1 is read (step S933). Then, the detection signal of the full tank switch 48 in the input data is output to the bit of the full port signal of the output port 1 (step S934).

  Further, when the prize ball operating flag is set (step S935), the detection signal of the payout number count switch 301 in the input data is output to the bit of the prize ball count signal of the output port 1 (step S936). . If any of bits 0, 1, 2, 3, 6, and 7 of the error flag (see FIG. 72) is set, the bit of the payout error signal of the output port 1 is set to “1” ( Steps S937 and S938). If none of the error flag bits 0, 1, 2, 3, 6, and 7 is set, the bit of the payout error signal of the output port 1 is set to “0” (steps S937 and S939). Since the output port generally maintains the output until different data is output from the CPU side, the output state of the bits of the payout error signal after the process of step S938 is executed until the process of step S939 is executed. The output state of the payout error signal bit is maintained at “0” until the process at step S938 is executed after the process at step S939 is executed.

  That is, when the payout error signal is output (turned on), one of the errors corresponding to bits 0, 1, 2, 3, 6, and 7 of the error flag shown in FIG. 72 has occurred. Means.

Next, the operation of the effect control means will be described.
FIG. 76 is a flowchart showing a main process executed by the effect control microcomputer 100 (specifically, the effect control CPU 101) mounted on the effect control board 80. The effect control CPU 101 starts executing the main process when the power is turned on. In the main processing, first, initialization processing is performed for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval (for example, 2 ms) (step S701). .

  Then, the effect control CPU 101 proceeds to a loop process for monitoring the timer interrupt flag (step S702). When a timer interrupt occurs, the effect control CPU 101 sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the effect control CPU 101 clears the flag (step S703) and executes the effect control process.

  In the effect control process, the effect control CPU 101 first analyzes the received effect control command and executes a process of setting a flag according to the received effect control command (command analysis process: step S704). Next, the effect control CPU 101 executes effect control process processing (step S705). In the effect control process, the process corresponding to the current control state (effect control process flag) is selected from the processes corresponding to the control state, and display control of the variable display device 9 is executed. In addition, a random number update process for updating a counter value of a counter for generating a predetermined random number (for example, a random number for determining a stop symbol) is executed (step S706). Moreover, the notification control process process which performs notification using an effect device such as the variable display device 9 is executed (step S707). Furthermore, the serial input / output process which outputs the data set by the command analysis process, the effect control process process, and the notification control process process to the serial output circuit 353, and reads the data received from the input ICs 620 and 621 from the serial input circuit 354. Is executed (step S708). Thereafter, the process proceeds to step S702.

  FIG. 77 is an explanatory diagram showing a configuration example of a command reception buffer for storing effect control commands received from the game control microcomputer 560 of the main board 31. In this example, a command reception buffer of a ring buffer type capable of storing six 2-byte configuration effect control commands is used. Therefore, the command reception buffer is configured by a 12-byte area of reception command buffers 1 to 12. A command reception number counter indicating in which area the received command is stored is used. The command reception number counter takes a value from 0 to 11. The ring buffer format is not necessarily required.

  For example, when the serial input circuit 102 receives serial data corresponding to the number of stages (bits) of its own circuit, the serial input circuit 102 outputs a reception completion signal to the effect control CPU 101. The reception completion signal is input to the interrupt terminal of the CPU 101 for effect control, for example. The effect control CPU 101 inputs data from the serial input circuit 102 via the input port 103 in an interrupt process started based on the reception completion signal being input to the interrupt terminal. Then, the input data is stored in the reception command buffer indicated by the command reception number counter in the command reception buffer, and the value of the command reception number counter is incremented by one. In the command analysis process, it is analyzed which command (see FIG. 31) is the effect control command stored in the command reception buffer.

  78 to 81 are flowcharts showing specific examples of command analysis processing (step S704). The effect control command received from the main board 31 is stored in the reception command buffer, but in the command analysis process, the effect control CPU 101 confirms the content of the command stored in the command reception buffer.

  In the command analysis process, the effect control CPU 101 first checks whether or not a reception command is stored in the command reception buffer (step S601). Whether it is stored or not is determined by comparing the value of the command reception number counter with the read pointer. The case where both match is the case where the received command is not stored. When the reception command is stored in the command reception buffer, the effect control CPU 101 reads the reception command from the command reception buffer (step S602). When read, the value of the read pointer is incremented by +2 (step S603). The reason for +2 is that 2 bytes (1 command) are read at a time.

  On the condition that the random error check flag has not been set (step S610), the effect control CPU 101 has the received effect control command as an input port data specification command, and the random error specification bit in the EXT data is Whether it is “0” is checked (step S611). If it is “0”, that is, if a random error is detected (see FIG. 15), a random error flag is set (step S612). Further, a random error checked flag is set (step S613). Thereafter, the process proceeds to step S614. Whether or not the effect control command received by the processing of steps S610, S611, and S613 is an input port data specification command and the random number error specification bit in the EXT data is “0” is used for effect control. It is executed only once after the microcomputer 100 starts its operation. Also, the random number error flag is set only when the effect control command received first from the game control microcomputer 560 is the input port data designation command and the random number error designation bit in the EXT data is “0”. Is done.

  If the received effect control command is a variation pattern command in step S614, the effect control CPU 101 stores the variation pattern command in a variation pattern command storage area formed in the RAM (step S615). Then, a variation pattern command reception flag is set (step S616).

  If the received effect control command is a display result specifying command (step S617), the effect control CPU 101 stores the display result specifying command in a display result specifying command storage area formed in the RAM (step S618). . Then, a display result specifying command reception flag is set (step S619).

  If the received effect control command is a symbol confirmation designation command (step S621), the effect control CPU 101 sets a confirmed command reception flag (step S622).

  If the received effect control command is one of the jackpot start 1-4 designation commands (step S623), the effect control CPU 101 sets the jackpot start 1-4 designation command reception flag (step S624).

  If the received presentation control command is a power-on designation command (initialization designation command) (step S631), the presentation control CPU 101 displays an initial screen on the variable display device 9 indicating that the initialization process has been executed. Control is performed (step S632A). The initial screen includes an initial display of predetermined production symbols. In addition, an initial notification flag is set (step S632B) and a RAM clear flag is set (step S632C).

  If the received effect control command is a power failure recovery designation command (step S633), a predetermined power failure recovery screen (screen for displaying information notifying the player that the gaming state is continuing) is displayed. Control is performed for display on the variable display device 9 (step S634), and an initial notification flag is set (step S635).

  If the received effect control command is a jackpot end 1 designation command (step S641), the effect control CPU 101 sets a jackpot end 1 designation command reception flag (step S642). If the received effect control command is a jackpot end 2 designation command (step S643), the effect control CPU 101 sets a jackpot end 2 designation command reception flag (step S644).

  If the received effect control command is an abnormal prize notification designation command (step S645), the effect control CPU 101 sets an abnormal prize notification designation command reception flag (step S646).

  If the MODE data of the received effect control command is FF (H), that is, if the input port data designation command is received, the processes of steps S651 to S665 and S671 to S681 are performed (step S650).

  In step S651, if a door closed state flag (a flag indicating that the effect control CPU 101 recognizes that the game frame 11 is closed), which is an internal flag, is set, the process proceeds to step S655. If the door closed state flag is not set, the door open / close confirmation process is executed (step S652), and if the door closed state flag is set in the door open / close confirmation process, the door open error notification is requested to start. The door opening error notification flag is set in (Steps S653, S654).

  When the door closed state flag is set, after executing the door opening / closing confirmation process (step S655), when the door closed state flag is reset in the door opening / closing confirmation process, the door opening error notification flag is reset, An error notification release flag is set (steps S656 and S657).

  FIG. 82 is a flowchart showing door opening / closing confirmation processing. In the door opening / closing confirmation process, the effect control CPU 101 first confirms whether or not the door closed state flag is set (step S685). When the door closed state flag is not set, the door in the EXT data of the input port data designation command (stored in the command reception buffer but transferred to the register from the command reception buffer) When the opening error designation bit is “1” (corresponding to closing, see FIG. 15), the value of the door monitoring counter is incremented by 1 (steps S686 and S687). When the door opening error designation bit is “0” (corresponding to opening), the value of the door monitoring counter is set to 0 (steps S686 and S688).

  When the process of step S687 has been executed, it is confirmed whether or not the value of the door monitoring counter has reached a predetermined value (10 in this example) (step S689). When the value of the door monitoring counter reaches a predetermined value, the door closing state flag is set, and the value of the door monitoring counter is set to 0 (step S690).

  When the door closing state flag is set, when the door opening error specifying bit in the EXT data of the input port data specifying command is “0” (corresponding to opening), the value of the door monitoring counter is incremented by 1 (step) S691, S692). When the door opening error designation bit is “1” (corresponding to closing), the value of the door monitoring counter is set to 0 (steps S691 and S693).

  When the process of step S692 is executed, it is confirmed whether or not the value of the door monitoring counter has reached a predetermined value (10 in this example) (step S694). When the value of the door monitoring counter reaches a predetermined value, the door closing state flag is reset, and the value of the door monitoring counter is set to 0 (step S695).

  With the above processing, when the door closed state flag is set, if the input port data designation command with the door open error signal “0” is continuously received for a predetermined time, the door closed state flag is reset. . In addition, when the door closed state flag is not reset, if the input port data designation command whose door open error signal is “1” is continuously received for a predetermined time, the door closed state flag is set. When the door of the game frame 11 is opened and closed, the detection signal of the door opening sensor 155 causes chattering, but after the above processing stabilizes the state of the detection signal of the door opening sensor 155, the door closing state flag The set / reset state is changed. That is, the change of the door closing state flag set / reset state is prevented from being temporarily repeated, and as a result, the setting of the door open error notification flag is prevented from being temporarily changed. .

  Further, the production control CPU 101 checks whether or not the payout error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S658), and changes from “1” to “0”. If the change has occurred, that is, when cancellation of the payout error is detected (see FIG. 15), the payout error notification flag is reset, the error notification release flag is set (step S659), and the process proceeds to step S679. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the payout error bit has changed.

  Further, it is confirmed whether or not the payout error designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S660). Is detected, a payout error notification flag is set to request the start of payout error notification (step S661), and the process proceeds to step S679.

  Further, the effect control CPU 101 checks whether or not the ball break error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S662), and “1” to “0”. Is changed, that is, when cancellation of the ball-out error is detected (see FIG. 15), the ball-out error notification flag is reset, the error notification release flag is set (step S663), and the process proceeds to step S679. To do. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the ball break error bit has changed.

  Further, it is confirmed whether or not the ball break error designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S664). When a break error is detected, a ball break error notification flag is set to request the start of a ball break error notification (step S665), and the process proceeds to step S679.

  In addition, the production control CPU 101 checks whether or not the full error designation bit in the EXT data of the input port data designation command has changed from “1” to “0” (step S671), and changes from “1” to “0”. When the change has occurred, that is, when the release of the full tank error is detected (see FIG. 15), the full tank error notification flag is reset, the error notification release flag is set (step S672), and the process proceeds to step S679. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the full error bit has changed.

  Further, it is confirmed whether or not the full error specification bit in the EXT data of the input port data specification command has changed from “0” to “1” (step S673). Is detected, a full tank error notification flag is set to request the start of full tank error notification (step S674), and the process proceeds to step S679.

  In addition, the effect control CPU 101 checks whether or not a prize ball payout notification flag indicating that the prize ball payout notification is being executed is set (step S675). If the prize ball payout notification flag is not set, it is confirmed whether or not the prize ball count designation bit in the EXT data of the input port data designation command has changed from “0” to “1” (step S676). When it changes from “0” to “1”, that is, when the payout number count switch 301 is turned on, a prize ball payout notification flag is set to request the start of the prize ball payout notification (step S677). Then, a predetermined value (for example, a value corresponding to 1 second) is set in the prize ball count designation monitoring timer (step S678). The prize ball count designation monitoring timer is a timer for confirming whether or not the prize ball payout has ended. When the prize ball count designation monitoring timer times out, the prize ball payout notification is terminated. The effect control CPU 101 receives the EXT data of the received input port data designation command (stored in the command reception buffer, but when transferred from the command reception buffer to the register) and the EXT data storage area. Is compared with the EXT data of the input port data designation command stored in (the previously received EXT data of the input port data designation command) to determine whether or not the prize ball count designation bit has changed.

  When the prize ball payout notification flag is set, when the prize ball count designation bit in the EXT data of the input port data designation command changes from “0” to “1”, the prize ball count designation monitoring timer has a predetermined value. Is reset (steps S660 and S661). When the payout number count switch 301 is continuously turned on by the processing of steps S660 and S661, the prize ball count designation monitoring timer does not time out.

  In step S679, the EXT data of the received input port data designation command (FFYY (H)) (stored in the command reception buffer but transferred to the register from the command reception buffer) is stored in the next step. When the input port data designation command is received, the data is stored in the EXT data storage area of the RAM for use as the EXT data of the previously received input port data designation command. In the initialization process in step S701, the contents of the EXT data storage area are initialized to 20 (H). 20 (H) corresponds to the case where each error signal and the prize ball count signal are in an off state (see input port 0 in FIG. 15). Then, control goes to a step S661. If it is confirmed in step S645 that the MODE data of the effect control command is not FF (H), the effect control CPU 101 sets a flag corresponding to the received effect control command (step S666). Then, control goes to a step S611.

  FIG. 83 is a flowchart showing the effect control process (step S705) in the main process shown in FIG. In the effect control process, the effect control CPU 101 performs one of steps S800 to S806 according to the value of the effect control process flag. In each process, the following process is executed.

  Fluctuation pattern command reception waiting process (step S800): It is confirmed whether or not a variation pattern command has been received from the game control microcomputer 560. Specifically, it is confirmed whether or not the variation pattern command reception flag set in the command analysis process is set. If the variation pattern command has been received, the value of the effect control process flag is changed to a value corresponding to the decorative symbol variation start process (step S801).

  Decoration symbol variation start processing (step S801): Control is performed so that the variation of the ornament symbol is started. Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol changing process (step S802).

  Decoration symbol variation processing (step S802): Controls the switching timing of each variation state (variation speed) constituting the variation pattern and monitors the end of the variation time. When the variation time ends, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803).

  Decoration symbol variation stop process (step S803): Based on the reception of the effect control command (design determination designation command) for instructing all symbols to stop, the variation of the ornament symbol is stopped and the display result (stop symbol) is derived and displayed. Take control. Then, the value of the effect control process flag is updated to a value corresponding to the jackpot display process (step S804) or the variation pattern command reception waiting process (step S800).

  Big hit display processing (step S804): After the end of the variation time, control is performed to display a screen for notifying the variable display device 9 of the occurrence of the big hit. Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805).

  Big hit game processing (step S805): Control during big hit game is performed. For example, when a command for opening a special prize opening or a designation command after opening a special prize opening is received, display control of the number of rounds in the variable display device 9 is performed. Then, the value of the effect control process flag is updated to a value corresponding to the big hit end process (step S806).

  Big hit end processing (step S806): In the variable display device 9, display control is performed to notify the player that the big hit gaming state has ended. Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800).

  FIG. 84 is a flowchart showing the variation pattern command reception waiting process (step S800) in the effect control process shown in FIG. In the variation pattern command reception waiting process, the effect control CPU 101 confirms whether or not the variation pattern command reception flag is set (step S811). If the variation pattern command reception flag is set, the variation pattern command reception flag is reset (step S812). Then, the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation start process (step S801) (step S813).

  FIG. 85 is a flowchart showing a decorative symbol variation start process (step S801) in the effect control process shown in FIG. In the decorative symbol variation start process, the effect control CPU 101 reads data indicating the variation pattern command from the variation pattern command storage area (step S816).

  Next, it is confirmed whether or not the display result specifying command reception flag is set (step S817). If the display result specifying command reception flag is not set, the process proceeds to step S830. When the display result specifying command reception flag is set, the display result (stop symbol) of the decorative symbol is displayed according to the data stored in the display result specifying command storage area (that is, the received display result specifying command). Determination is made (step S818).

  FIG. 86 is an explanatory diagram showing an example of a decorative symbol stop pattern in the variable display device 9. In the example shown in FIG. 86, when the received display result specifying command indicates a normal jackpot (when the received display result specifying command is a display result 2 designation command), the effect control CPU 101 uses the stop design as a stop symbol. A combination of decorative symbols in which the left middle right symbol is an even symbol (usually a stop symbol reminiscent of the occurrence of a big hit) is determined. When the received display result specifying command indicates a probable big hit (when the received display result specifying command is a display result 4 designation command), the effect control CPU 101 uses the left middle right symbol as an odd symbol as an odd symbol. A combination of decorative symbols arranged in accordance with (a stop symbol reminiscent of occurrence of a probable big hit) is determined. When the received display result specifying command indicates a small hit or suddenly probable big hit (when the received display result specifying command is a display result 3 specifying command or a display result 5 specifying command), the presentation control CPU 101 A combination of “135” (a stop symbol reminiscent of the occurrence of a small hit or suddenly probable big hit) is determined as the left middle right decorative symbol as the stop symbol. In the case of a loss (when the received display result specifying command is a display result 1 designation command), a combination of decorative symbols other than the above is determined. However, when a reach effect is involved, a combination of decorative symbols with left and right aligned is determined. The combination of the left, middle and right decorative symbols derived and displayed on the variable display device 9 is the “stop symbol” of the decorative symbol.

  The effect control CPU 101 extracts, for example, a random number for determining the stop symbol, and uses the stop symbol determination table in which the data indicating the combination of the decorative symbol and the numerical value are associated with each other to generate the stop symbol of the decorative symbol. decide. That is, the stop symbol is determined by selecting data indicating a combination of decorative symbols corresponding to a numerical value that matches the extracted random number.

  As for the decorative symbol, a stop symbol that recalls a big hit is called a big hit symbol. In addition, a stop symbol reminiscent of a probable big hit is called a probable big hit symbol, and a stop symbol reminiscent of a normal big hit is called a normal big hit symbol. A stop symbol that suddenly recalls a probable big hit is called a sudden probable big hit symbol, and a stop symbol that recalls a small hit is called a small hit symbol. And a stop symbol that reminds of a loss is called a loss symbol.

  Further, the effect control CPU 101 resets the display result specifying command reception flag (step S819). Next, a process table corresponding to the variation pattern is selected (step S833). Then, the process timer in the process data 1 of the selected process table is started (step S834).

  FIG. 87 is an explanatory diagram of a configuration example of a process table. The process table is a table in which process data referred to when the effect control CPU 101 executes control of the effect device is set. That is, the effect control CPU 101 controls effect devices (effect components) such as the variable display device 9 in accordance with the data set in the process table. In this embodiment, an error notification process table (error notification process table) used when various types of error notification are performed is prepared in addition to the process table used for normal game effects shown in FIG. ing. Details of the error notification process table will be described later.

  The process table includes data in which a plurality of combinations of process timer set values, display control execution data, lamp control execution data, and sound number data are collected. The display control execution data includes data indicating each variation mode constituting the variation mode during the variable display time (variation time) of the variable display of the decorative symbols. Specifically, data relating to the change of the display screen of the variable display device 9 is described. The process timer set value is set with a change time in the form of the change. The effect control CPU 101 refers to the process table and performs control to display the decorative pattern in the variation mode set in the display control execution data for the time set in the process timer set value.

  The process table shown in FIG. 87 is stored in the ROM of the effect control board 80. A process table is prepared for each variation pattern.

  FIG. 88 is an explanatory diagram illustrating an example of lamp control contents executed in accordance with process data (including error notification process data) when each production control command is received. As shown in FIG. 88, for example, the effect control CPU 101 receives a jackpot end 1 designation command and sets the game state to the normal state, and the center decoration lamp LEDs 125a to 125f and the stage on the game board 6 are displayed. Control is performed so that only the LEDs 126a to 126f of the lamp are lit. Then, while the gaming state is the normal state, an effect is made such that only the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp on the gaming board 6 are lit.

  In addition, for example, when the game control CPU 101 receives a jackpot end 2 designation command and changes the gaming state to a probable change state, the center decoration lamp LEDs 125 a to 125 f and the stage lamp LEDs 126 a to 126 f on the gaming board 6. In addition to the lighting, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of each lamp (excluding the dish lamp) on the game frame 11 side are controlled to blink at a predetermined time interval (for example, 1 second). While the gaming state is in the probable state, in addition to the lighting of the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the gaming board 6, each lamp on the gaming frame 11 side (excluding the dish lamp) The LEDs 281a to 281l, 282a to 282f, and 283a to 283f are flashed at predetermined time intervals (for example, 1 second).

  Further, for example, when the big hit start designation command is received and the big hit is made, the effect control CPU 101 blinks the center decoration lamps 125a to 125f and the stage lamps LEDs 126a to 126f on the game board 6, The LEDs 281a to 281l, 282a to 282f, and 283a to 283f of the respective lamps on the game frame 11 side are blinked at a time interval (for example, 0.5 seconds) faster than the probability change state, and the upper plate LEDs 82a to 82f and the lower plate lamps An effect of turning on the LEDs 84a to 84f is performed. By performing such an effect, compared to when the gaming state is in the probable state, by flashing more lamps at a faster time interval than in the probable state, compared to when in the promising state when the big hit occurs Can produce a more flashy impression.

  Further, for example, when the CPU 101 for effect control receives an initialization designation command and performs initialization notification and RAM clear notification, the LEDs 281a to 281l of the respective lamps (excluding the dish lamp) on the game frame 11 side. , 282a to 282f and 283a to 283f are performed.

  In addition, for example, when receiving the abnormal winning notification designation command and performing the abnormal winning notification, the effect control CPU 101 blinks the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp. Produce.

  Further, for example, when the CPU 101 for effect control receives an input port data designation command and notifies a random number circuit error, the LEDs 281a to 281l, 282a to 282f, 283a to 283f of the respective lamps on the game frame 11 side and An effect is made to turn on the LEDs 82a to 82f of the upper plate lamp. Further, for example, when the CPU 101 for effect control receives an input port data designation command and performs full error notification, it performs an effect of blinking the LEDs 84a to 84f of the lower pan lamps. In addition, for example, when the effect control CPU 101 receives an input port data designation command and issues a door opening error notification, the LEDs 281a to 281l and 282a to 282f of the respective lamps (excluding the dish lamp) on the game frame 11 side. , 283a to 283f are flashed. In addition, for example, when receiving the input port data designation command and performing an out-of-ball error notification, the effect control CPU 101 causes the top frame lamp LEDs 281a to 281l on the game frame 11 side to blink and the top plate lamp to An effect of lighting the LEDs 82a to 82f is performed. For example, when receiving the input port data designation command and performing a payout error notification, the effect control CPU 101 causes the top frame lamp LEDs 281a to 281l on the game frame 11 side to blink and the upper plate lamp LED 82a. An effect is made to blink ~ 82f.

  In this embodiment, a case where an effect such as blinking the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp is described in the case of performing an abnormal winning notification. In the case of performing the operation or notifying the payout error, it is possible to perform such an effect that the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp are blinked.

  Then, the effect control CPU 101 indicates an abnormal notification flag indicating that an abnormal winning notification is being performed, and other error flags (a RAM clear notification flag, a random number circuit error notification flag, a full tank error notification flag, a door opening). On the condition that the error notification flag, the ball breakage error notification flag, and the payout error notification flag) are not set, the effect device (the effect) according to the contents of the process data 1 (display control execution data 1, sound number data 1) Control of the variable display device 9 as a component for use and the speaker 27 as a production component is executed (steps S835A and S835B). For example, in order to display an image corresponding to the variation pattern on the variable display device 9, a command is output to the VDP 109. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  In addition, the effect control CPU 101 executes serial setting processing in order to control various lamps as effect components in accordance with the lamp control execution data 1 (step S835C). For example, when the gaming state is the normal state, the effect control CPU 101 supplies lamp control signals for lighting only the center decoration lamps LEDs 125a to 125f and the stage lamp LEDs 126a to 126f to a predetermined data storage area. set. In addition, when the gaming state is a probable change state, the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp are turned on, and all the lamps provided on the gaming frame 11 side (the upper plate lamp and the lower lamp) Lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, and 283a to 283f (except for the dish lamp) are set in a predetermined data storage area. The lamp control signal set in step S835C is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  In this embodiment, the effect control CPU 101 performs control so that the decorative pattern is variably displayed by the change pattern corresponding to the change pattern command on a one-to-one basis, but the effect control CPU 101 controls the change pattern command. The variation pattern to be used may be selected from a plurality of types of variation patterns corresponding to.

  When the abnormality notification flag or other error flag is set, the rendering device is controlled according to the contents of the process data 1 excluding the lamp control execution data 1 (steps S835A and S835D). In other words, when the abnormality notification flag or other error flag is set, when the new variable display of the decorative design is started, the display effect by the lamp corresponding to the variable display is not executed. The display effect by the lamp according to the abnormal winning notification and various error notifications (RAM clear notification, random number circuit error notification, full tank error notification, door opening error notification, ball breakage error notification, payout error notification) is continued.

  In addition, when performing the process of step S835D, the CPU 101 for effect control does not simply output a command based on the display control execution data 1 to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. That is, the display on the variable display device 9 (for example, notification of a random number circuit error) and the image of the display effect of the variable display of the decorative design are displayed on the variable display device 9 at the same time. To control. That is, when various error flags are set, when a new variable display of a decorative design is started, not only a display effect corresponding to the variable display is executed, but according to various error notifications. Notification is continued.

  In this embodiment, as will be described later, for example, when the abnormality notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative symbols, and the upper plate. The abnormal winning notification for blinking the LEDs 82a, 82b, 82e, and 82f on the side surface of the lamp is continued.

  Further, for example, when the RAM clear notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative design and also displays all lamps (upper plate) on the game frame 11 side. The RAM clear notification is continued to turn on the LEDs 281a to 281l, 282a to 282f, and 283a to 283f (except for the lamp and the lower plate lamp) and output a predetermined error sound.

  Further, for example, when the door opening error notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative symbols, and all the lamps on the game frame 11 (upper LED doors 281a to 281l, 282a to 282f, 283a to 283f (except for the pan lamp and lower pan lamp) blink, and the door open error notification is output to output the sound that the door is open and a predetermined error sound. To do.

  Also, for example, when the ball break error notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative symbol and also displays the top frame lamp on the game frame 11 side. The LED 281a to 281l blinks, and the ball break error notification for lighting the upper plate lamp LEDs 82a to 82f is continued.

  Further, for example, when the full tank error notification flag is set, in step S835D, the production control CPU 101 starts a new variable display of the decorative symbols and lights the LEDs 84a to 84f of the lower pan lamps. Continue full error notification.

  Also, for example, if the payout error notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative symbol and also the LED 281a of the top frame lamp on the game frame 11 side. The payout error notification for blinking .about.281 l and blinking the LEDs 82a to 82f of the upper plate lamps is continued.

  Further, for example, when the random number circuit error notification flag is set, in step S835D, the effect control CPU 101 starts a new variable display of the decorative symbols, and displays all the lamps on the game frame 11 side and the upper side. The LED lamps 281a to 281l, 282a to 282f, and 283a to 283f of the dish lamps are lit, a predetermined error sound is output, and random number circuit error notification for displaying “error” on the variable display device 9 is continued.

  Then, a value corresponding to the variation time specified by the variation pattern command is set in the variation time timer (step S836), and the value of the effect control process flag is set to a value corresponding to the decorative symbol variation process (step S802). (Step S837).

  In step S830, it is confirmed whether or not a variation pattern command that can be used for both a normal big hit and a probable big hit is received. In this embodiment, as shown in FIG. 29, the fluctuation pattern commands of “reach C / shortening”, “reach C”, and “super reach A” are usually used for both big hits and probable big hits. This is a variable pattern command. Therefore, the CPU 101 for effect control receives the variation pattern command that can be used for both the normal big hit and the probable big hit when the data indicating those fluctuation pattern commands is stored in the fluctuation pattern command storage area. It is determined that When it is determined that the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the stop symbol as the normal big hit symbol (step S832). Also, if it is determined that a variation pattern command other than the variation pattern command that can be used for both a normal big hit and a probable big hit is received, the stop symbol is combined with a decorative symbol corresponding to the received variation pattern. (Step S831). In this embodiment, a variation pattern command other than the variation pattern command that can be used for both a normal jackpot and a probable variation jackpot is used at the time of losing or is used according to the type of jackpot ( (See FIG. 29). Therefore, when the variation control command 101 other than the variation pattern command that can be used for both the normal big hit and the probable big hit is received, the effect control CPU 101 determines the deviation based on the received variation pattern command. Whether or not a big hit (including a small hit) is determined, and if it is determined to be a big hit, the type of the big hit can be specified.

  In this way, the effect control microcomputer 100 receives the variation pattern command that can be used for both the normal big hit and the probable big hit, and when the display result specifying command cannot be received, Since the display result (stop symbol) is determined to be a normal jackpot symbol, it is possible to make the player recognize whether or not a specific gaming state occurs even if the display result specifying command cannot be received. In addition, by including information that can specify the decorative pattern display result in the variation pattern command, the effect control microcomputer 100 can display the display result identification command without using a command other than the variation pattern command and the display result identification command. Since the display result of the decorative design can be determined even if it cannot be received, the types of commands transmitted by the game control microcomputer 560 do not increase, and as a result, the control burden on the game control microcomputer 560 does not increase.

  FIG. 89 is a flowchart showing the decorative symbol variation process (step S802) in the effect control process. In the decorative symbol variation process, the effect control CPU 101 subtracts 1 from the value of the process timer (step S841) and subtracts 1 from the value of the variation time timer (step S842). When the process timer times out (step S843), the process data is switched. That is, the process timer setting value set next in the process table is set in the process timer (step S844).

  Also, an error notification flag and other error flags (RAM clear notification flag, random number circuit error notification flag, full tank error notification flag, door open error notification flag, ball breakage error notification flag, payout error notification flag ) Is not set, the control state for the rendering device is changed based on the display control execution data and sound number data set next (steps S845A and S845B).

  In step S845B, the effect control CPU 101 outputs a command to the VDP 109 in order to display an image corresponding to the variation pattern on the variable display device 9, for example. In addition, a control signal (sound number data) is output to the voice synthesizing IC 173 in order to perform voice output from the speaker 27.

  Further, the effect control CPU 101 executes serial setting processing in order to control various lamps as effect components according to the lamp control execution data (step S845C). For example, when the gaming state is the normal state, the effect control CPU 101 supplies lamp control signals for lighting only the center decoration lamps LEDs 125a to 125f and the stage lamp LEDs 126a to 126f to a predetermined data storage area. set. In addition, when the gaming state is a probable change state, the LED 125a to 125f of the center decoration lamp and the LEDs 126a to 126f of the stage lamp are turned on, and all the lamps provided on the gaming frame 11 side (the upper plate lamp and the lower lamp) Lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, and 283a to 283f (except for the dish lamp) are set in a predetermined data storage area. The lamp control signal set in step S845C is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  When the abnormality notification flag or other error flag is set, the rendering device is controlled according to the contents of process data i (i is any one of 2 to n) (however, lamp control execution data i is excluded). Execute (Steps S845A and S845D). Therefore, when the abnormality notification flag or other error flag is set, the display effect by the lamp according to the variable display of the decorative design is not executed as it is, but the abnormal winning notification and various error notifications (RAM) The display effect by the lamp corresponding to clear notification, random number circuit error notification, full tank error notification, door opening error notification, ball breakage error notification, payout error notification) is continued.

  Further, when the process of step S845D is performed, the presentation control CPU 101 does not simply output a command based on the display control execution data i to the VDP 109, but also outputs a command for performing “superimposed display” to the VDP 109. . Therefore, when the various error flags are set, not only the display effect according to the variable display of the decorative symbols is executed, but also the notification according to the various error notifications is continued.

  If the variation time timer has timed out (step S846), the value of the effect control process flag is updated to a value corresponding to the decorative symbol variation stop process (step S803) (step S848). Even if the variable time timer has not timed out, if the confirmation command reception flag indicating that the symbol confirmation designation command has been received is set (step S847), the process proceeds to step S848. Even if the fluctuation time timer has not timed out, if the design confirmation designation command is received, the control shifts to stopping the fluctuation. Even in such a case, the variation of the decorative symbol can be terminated when the regular variation time has elapsed (when the variation of the special symbol has ended).

  FIG. 90 is a flowchart showing a decorative symbol variation stop process (step S803) in the effect control process. In the decorative symbol variation stop process, the effect control CPU 101 confirms whether or not the confirmed command reception flag is set (step S851). If the confirmed command reception flag is set, the confirmed command reception flag is reset. Then, control is performed to derive and display the determined stop symbol (step S853). Then, the production control CPU 101 confirms whether or not it is determined to be a big hit (step S854). Whether or not it is determined to be a big hit is confirmed by, for example, a display result specifying command stored in the display result specifying command storage area. In this embodiment, it can be confirmed whether or not it is determined to be a big hit based on the determined stop symbol.

  When it is determined to be a big hit, the value of the effect control process flag is updated to a value corresponding to the big hit display process (step S804) (step S855).

  If it is determined not to win, the effect control CPU 101 checks whether or not the time reduction state flag is set (step S856). The short time state flag is set when the gaming state is a short time state (see step S886 described later). In this embodiment, when the gaming state is shifted to the short-time state, the short-time state is terminated when a big hit occurs, or the special symbol and the decorative symbol change display are executed a predetermined number of times (for example, 100 times). Even if a big hit does not occur, control is performed so as to end the time-saving state. For this reason, the effect control CPU 101 first increments the value of the hour / short variation counter when the hour / short state flag is set (step S857).

  Then, the production control CPU 101 confirms whether or not the value of the time-varying variation number counter is 100 (step S858). If the value of the hour / short fluctuation counter is 100, the hour / short state flag is reset (step S859). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S860).

  In this embodiment, the effect control microcomputer 100 ends the variation (variable display) of the decorative symbols on the condition that the symbol confirmation designation command has been received (see steps S851 and S853). However, if the variation time timer based on the received variation pattern command times out, the variation of the decorative symbol may be controlled to end without receiving the symbol determination designation command. In this case, the game control microcomputer 560 may not transmit the symbol confirmation designation command for designating the end of variable display.

  FIG. 91 is a flowchart showing the jackpot display process (step S804) in the effect control process. In the jackpot display process, the effect control CPU 101 checks whether or not the jackpot start 1-4 designation command reception flag indicating that any one of the jackpot start 1-4 designation commands has been received is set (step S871). If any one of the big hit start 1 to 4 designation command reception flags is set, control is performed to display a game start screen corresponding to the set flag on the variable display device 9 (step S872). Further, the set flag (one of the big hit start 1-4 designation command reception flags) is reset (step S873). Then, the value of the effect control process flag is updated to a value corresponding to the big hit game processing (step S805) (step S874).

  In step S872, when receiving the big hit start 2 designation command, the effect control CPU 101 performs control to display a screen for informing the start of the big hit game on the variable display device 9. Further, when the big hit start 4 designation command is received, the variable display device 9 is controlled to display a screen for informing the start of the sudden probability change big hit game. When the jackpot start 1 designation command or the jackpot start 3 designation command is received, a screen for informing the start of the jackpot game (a screen for informing the start of the jackpot game and a notice of the start of the sudden probability change jackpot game) The display is controlled on the variable display device 9.

  FIG. 92 is a flowchart showing the big hit end process (step S806) in the effect control process. In the jackpot end process, the effect control CPU 101 checks whether or not the jackpot end effect timer is set (step S880). If the big hit end effect timer is set, the process proceeds to step S885. If the jackpot end effect timer is not set, a jackpot end designation command reception flag (a jackpot end 1 designation command reception flag or a jackpot end 2 designation command reception flag) indicating that the jackpot termination designation command has been received is set. It is confirmed whether or not there is (step S881). When the jackpot end designation command reception flag is set, the jackpot end designation command reception flag is reset (step S882), and a value corresponding to the jackpot end display time is set in the jackpot end presentation timer (step S883). Then, the variable display device 9 is controlled to display a jackpot end screen (screen for informing the end of the jackpot game) (step S884). Specifically, an instruction to display the big hit end screen is given to the VDP 109.

  In this embodiment, even if the type of jackpot is different, the same jackpot end screen is displayed on the variable display device 9. For example, the big hit end display and the small hit end display are the same. However, the big hit end display (including the small hit end display) may be divided according to the type of the big hit.

  In step S885, 1 is subtracted from the value of the big hit end effect timer. Then, the effect control CPU 101 checks whether or not the value of the jackpot end effect timer is 0, that is, whether or not the jackpot end effect time has elapsed (step S886). If not, the process ends. If it has elapsed, the time reduction state flag is set (step S887), and the time reduction number counter is set to 0 (step S888). If the jackpot end 1 designation command is received, the probability variation state flag is reset (steps S889 and S891). When the jackpot end 1 designation command has not been received (when the jackpot end 2 designation command has been received), the probability variation state flag is set (steps S889, S890). Then, the value of the effect control process flag is updated to a value corresponding to the variation pattern command reception waiting process (step S800) (step S892).

  The probability change state flag and the time reduction state flag are used, for example, when the effect control CPU 101 notifies the probability change state and the time reduction state by the background or the decorative light emitter (lamp / LED) in the variable display device 9.

  FIG. 93 is an explanatory diagram showing an example of a notification screen displayed on the variable display device 9. FIG. 93A shows an example of an initial screen displayed on the variable display device 9 by the presentation control CPU 101 in response to reception of the initialization designation command. FIG. 93 (B) shows an example of a power failure recovery screen displayed on the variable display device 9 by the production control CPU 101 in response to reception of a power failure recovery designation command.

  Next, the notification control process process in step S707 will be described. First, various error notification modes executed in the notification control process will be described. FIG. 94 is an explanatory diagram showing an example of various error notification modes executed in the notification control process. As shown in FIG. 94, the RAM clear notification is executed for a predetermined period (for example, 31 seconds) after the gaming machine is turned on. When performing the RAM clear notification, the effect control CPU 101 lights the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side, and causes a predetermined error sound to the speaker 27. Control (for example, beep sound) is output.

  The door opening error notification is executed while the game frame 11 is opened (for example, while the detection signal of the door opening sensor 155 is input). When performing the door opening error notification, the effect control CPU 101 performs control to blink the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) on the game frame 11 side. In addition, control is performed so that a predetermined error sound (for example, a beep sound) is output to the speaker 27 together with a sound “door is open”.

  Further, the ball break error notification is executed from the occurrence of a ball break until the ball break state is canceled (for example, while a detection signal of a ball break switch is input). When performing the ball break error notification, the effect control CPU 101 performs control for blinking the LED 281a to 281l of the top frame lamp on the game frame 11 side and lighting the upper pan lamps 82a to 82f. The full tank error notification is executed from the occurrence of the full tank state of the lower pan until the full tank state is canceled (for example, while the detection signal of the full tank switch is input). The effect control CPU 101 performs control of blinking the LEDs 84a to 84f of the lower pan lamps when performing full tank error notification.

  Also, the payout error notification is executed from the occurrence of the prize ball abnormality until the prize ball abnormality state is canceled. When performing the payout error notification, the effect control CPU 101 performs control of blinking the LED 281a to 281l of the top frame lamp on the game frame 11 side and blinking the LEDs 82a to 82f of the upper plate lamp. Further, the random number circuit error notification is executed until the power is turned off after the random number circuit error is detected when the gaming machine is turned on. When performing the random number circuit error notification, the effect control CPU 101 lights all the LEDs 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82f of the game frame 11 side and the predetermined error sound. Control (for example, beep sound) is output. In addition, control is performed to display “error” on the variable display device 9. In this case, when display by a game effect (for example, variable display of decorative symbols) is performed on the variable display device 9, a character string “error” is superimposed on the variable display device 9.

  The abnormal winning error notification is executed for a predetermined period (for example, 30 seconds) from the occurrence of the abnormal winning. The effect control CPU 101 performs control of blinking the LEDs 82a, 82b, 82e, and 82f only on the side surface side of the upper plate lamp when the abnormal winning notification is performed.

  FIG. 95 is a flowchart showing the notification control process (step S707) in the main process shown in FIG. In the notification control process, the effect control CPU 101 performs one of steps S1900 and S1901 according to the value of the notification control process flag. In each process, the following process is executed.

  The notification start processing (step S1900) includes error flags (initial notification flag, random number circuit error flag, abnormal winning notification designation command reception flag, RAM clear flag, full error notification flag, payout error notification flag set in the command analysis processing. Is a process of starting error notification based on the ball break error notification flag. When the error notification is started, the value of the notification control process flag is changed to a value corresponding to the notification process (step S1901).

  The notifying process (step S1901) includes error flags (initial notifying flag, random number circuit error notifying flag, abnormality notifying flag, RAM clear notifying flag, full tank error notifying flag, payout error notifying flag, ball dead This is a process of continuing the error notification based on the error notification flag. Further, the error notification is terminated based on the fact that an error notification period (initial notification period, RAM clear notification period) has elapsed or an error notification release flag set in the command analysis process. When the error notification is finished, the value of the notification control process flag is changed to a value corresponding to the notification start process (step S1901).

  96 and 97 are flowcharts showing the notification start process (step S1900) in the notification control process shown in FIG. In the notification start process, the production control CPU 101 first checks whether or not the initial notification flag is set (step S1911). If set, the effect control CPU 101 sets a value corresponding to the initial notification period value in the period timer 1 (step S1912). The initial notification period is a period in which initialization notification is performed in response to reception of the initialization designation command. The effect control CPU 101 ends the initialization notification when the initial notification period elapses. The initial notification period is the same as the prohibition period set by the game control microcomputer 560 in step S45. Therefore, the abnormality notification designation command is not received when the initialization notification is performed.

  Next, the production control CPU 101 resets the initial notification flag and sets an initial notification flag indicating that the initial notification is being performed (step S1912A). Then, control goes to a step S1950.

  If the initial notification flag is not set, the effect control CPU 101 checks whether or not the door opening error notification flag is set (step S1913). If set, the effect control CPU 101 selects error process data corresponding to the door opening error (step S1914). In this embodiment, error process data (error process data) for controlling the speaker 27 and the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d when various errors are notified. Prepared in advance. Details of the error process data will be described later.

  Next, the production control CPU 101 starts an error process timer (step S1915) and controls the speaker 27 according to the content of the error process data 1 (step S1916). For example, the production control CPU 101 controls the speaker 27 so as to output a predetermined error sound (for example, a beep sound) together with a sound such as “the door is open”.

  Next, the production control CPU 101 sets a lamp control signal in a predetermined data storage area in order to control the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d (see FIG. 105). ) Is executed (step S1917). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1917 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604.

  Next, the production control CPU 101 resets the door opening error notification flag and sets a door opening error notification flag indicating that the door opening error notification is being performed (step S1917A). Then, control goes to a step S1950.

  In this embodiment, as will be described later, a case in which abnormal winning notification is performed without notice of an unauthorized person by blinking the LEDs 82a, 82b, 82e, and 82f only on the side of the upper plate lamp will be described. However, the door opening error notification effect may be performed by lighting or blinking the LEDs 82a, 82b, 82e, and 82f only on the side surface side of the upper plate lamp. In such a case, even when an irregularity action such as opening the door of the gaming machine 1 and performing some work on the inside is performed, fraud can be notified without being noticed by the fraudster.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether the random number circuit error flag is set (step S1918). If set, the effect control CPU 101 performs control to display a random number circuit error display screen indicating that it is a random number circuit error on the variable display device 9 (step S1919). Next, the effect control CPU 101 selects error process data corresponding to the random circuit error (step S1920). Next, the production control CPU 101 starts an error process timer (step S1921) and controls the speaker 27 according to the contents of the error process data 1 (step S1922). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82d ( Step S1923). For example, the effect control CPU 101 sends lamp control signals for blinking the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 in a predetermined data storage area. Set to. The lamp control signal set in step S1923 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to each frame side IC substrate 602 to 604.

  Next, the effect control CPU 101 resets the random number circuit error flag and sets a random number circuit error notification flag indicating that the random number circuit error notification is being performed (step S1923A). Then, control goes to a step S1950.

  If the random number circuit error flag is not set, the effect control CPU 101 confirms whether or not the abnormal winning notification designation command reception flag is set (step S1924). If set, the effect control CPU 101 selects error process data for performing lamp control in response to the abnormal winning notification (step S1925). Next, the effect control CPU 101 starts an error process timer (step S1926).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the LEDs 82a, 82b, 82e, and 82f on the side surface side of the upper plate lamp (step S1928). . For example, the effect control CPU 101 sets lamp control signals for blinking the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp in a predetermined data storage area. The lamp control signal set in step S1928 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to the frame side IC substrate 605A disposed on the back side of the hitting ball supply tray (upper plate) 3.

  If any game effect (for example, a big hit effect or a decorative pattern change display) is performed when the abnormal winning notification is given, the effect control CPU 101 determines that the effect control CPU 101 is on the side of the upper plate lamp in step S1928. A lamp control signal for controlling the LED of the lamp corresponding to the currently executed game effect is set in a predetermined data storage area together with a lamp control signal for controlling the LEDs 82a, 82b, 82e, and 82f. Therefore, for example, in a game effect, when the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of the top frame lamp, the left frame lamp, and the right frame lamp are flashing, the top frame lamp and the left frame lamp In addition, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of the right frame lamp continue to blink, and the LEDs 82a, 82b, 82e, and 82f on the side surface of the upper plate lamp are blinked. By doing so, the game effect continues from the front side of the gaming machine 1 in exactly the same manner before and after the start of the abnormal prize notification, and from the side of the gaming machine 1 the upper plate lamp By confirming the blinking state of the LEDs 82a, 82b, 82e, and 82f on the side surfaces, it is possible to confirm whether or not an abnormal winning has occurred. Therefore, without notice of a fraudulent person on the front side of the gaming machine 1, it is possible to notify the game store clerk or the like on the side surface of the gaming machine 1 of the occurrence of an abnormal winning and inform that the fraudulent act has been performed. be able to.

  Thereafter, sound output (output of an abnormal alarm sound) and lamp display (abnormal alarm flashing) corresponding to the abnormal winning notification are performed. Then, the production control CPU 101 resets the abnormal winning notification designation command reception flag and sets an abnormal notification flag indicating that abnormal notification is being performed (step S1929). Then, control goes to a step S1950.

  It should be noted that the confirmation of whether or not the abnormal winning notification designation command reception flag is set is made before confirming whether or not the random number circuit error flag is set, and the abnormal winning in steps S1924 to S1928 is performed. The notification start process may be executed in preference to the random number circuit error notification start process in steps S1918 to S1923A. By doing so, it is possible to notify the occurrence of an abnormal prize prior to the occurrence of a random circuit error. Therefore, it is possible to notify the game store clerk and the like by giving priority to the occurrence of an abnormal winning due to an illegal act, and more effectively notify the occurrence of the illegal act.

  If the abnormal winning notification designation command reception flag is not set, the effect control CPU 101 checks whether or not the RAM clear flag is set (step S1930). If set, the effect control CPU 101 selects error process data corresponding to the RAM clear notification (step S1931). The RAM clear notification is processing for notifying that the initialization process has been executed and the RAM has been cleared.

  Next, the production control CPU 101 starts an error process timer (step S1932) and controls the speaker 27 according to the content of the error process data 1 (step S1933). For example, the effect control CPU 101 controls the speaker 27 to output a predetermined error sound (for example, a beep sound). Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l, 282a to 282f, and 283a to 283f (step S1934). For example, the effect control CPU 101 outputs lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided in the game frame 11. Set to a predetermined data storage area. The lamp control signal set in step S1934 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602 to 604. Then, control goes to a step S1950.

  Next, the effect control CPU 101 sets a value corresponding to the RAM clear notification period value in the period timer 2 (step S1935). The RAM clear notification period is a period during which the RAM clear notification is being notified. When the RAM clear notification period elapses, the effect control CPU 101 ends the RAM clear notification. The initial notification period and the RAM clear notification period may be the same period.

  Next, the effect control CPU 101 resets the RAM clear flag and sets a RAM clear notification flag indicating that the RAM clear notification is being performed (step S1935A). Then, control goes to a step S1950.

  If the RAM clear flag is not set, the production control CPU 101 checks whether or not the full error notification flag is set (step S1936). If set, the effect control CPU 101 selects error process data for performing lamp control in response to a full tank error (step S1938). Next, the effect control CPU 101 starts an error process timer (step S1939).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control the lower pan lamps 84a to 84f (step S1941). For example, the effect control CPU 101 sets lamp control signals for blinking the LEDs 84 a to 84 f of the lower pan lamps provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1941 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606 and 607. Is output to the frame side IC substrate 605B.

  Next, the production control CPU 101 resets the full tank error notification flag and sets a full tank error notification flag indicating that a full tank error notification is being performed (step S1941A). Then, control goes to a step S1950.

  If the full tank error notification flag is not set, the effect control CPU 101 checks whether or not the payout error notification flag is set (step S1942). If set, the production control CPU 101 selects error process data corresponding to the payout error (step S1943) and starts an error process timer (step S1944).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l and 82a to 82f (step S1945). For example, the CPU 101 for effect control sets lamp control signals for blinking the LEDs 281a to 281l and 82a to 82f of the top frame lamp and the upper plate lamp provided in the game frame 11 in a predetermined data storage area. The lamp control signal set in step S1945 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the frame side IC substrates 602 and 605A.

  Next, the effect control CPU 101 resets the payout error notification flag and sets a payout error notification flag indicating that the payout error notification is being performed (step S1945A). Then, control goes to a step S1950.

  In this embodiment, when a payout error is notified, only the notification process using the lamp is performed and the sound notification process using the speaker 27 is not performed. However, the speaker 27 is used in addition to the lamp. You may make it perform notification which was.

  If the payout error notification flag is not set, the effect control CPU 101 checks whether or not the ball break error notification flag is set (step S1946). If set, the production control CPU 101 selects error process data corresponding to the ball break error (step S1947) and starts an error process timer (step S1948).

  Next, the effect control CPU 101 executes serial setting processing for setting the lamp control signal in a predetermined data storage area in order to control each of the lamps 281a to 281l and 82a to 82f (step S1949). For example, the production control CPU 101 blinks the LED 281a to 281l of the ceiling lamps provided in the game frame 11 and sets lamp control signals for lighting the LEDs 82a to 82f of the upper pan lamps in a predetermined data storage area. To do. The lamp control signal set in step S1949 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the frame side IC substrates 602 and 605A.

  Next, the production control CPU 101 resets the ball-out error notification flag and sets a ball-out error notification flag indicating that the ball-out error notification is being performed (step S1949A). Then, control goes to a step S1950.

  In this embodiment, a case where only a notification process using a lamp is performed and a notification process using a sound using the speaker 27 is not performed when a ball break error is notified will be described. The used notification may be performed.

  In step S1950, the effect control CPU 101 changes the value of the notification control process flag to a value corresponding to the processing during notification (step S1901), and ends the processing.

  FIGS. 98 to 100 are flowcharts showing the in-notification processing (step S1901) in the notification control process shown in FIG. In the notifying process, the production control CPU 101 first checks whether or not the initial notifying flag is set (step S1960). If the initial notification flag is not set, the process proceeds to step S1965. If the initial notification flag is set, the value of the timer 1 set in step S1912 is decremented by 1 (step S1961). When the value of the period timer 1 becomes 0, that is, when the initial notification period has elapsed, the initial notification flag is reset (steps S1962, S1963). If the value of the period timer 1 is not 0, the process is terminated as it is.

  Further, the effect control CPU 101 outputs to the VDP 109 a command for deleting the initial screen or the power failure recovery screen in the variable display device 9 (step S1964). The VDP 109 erases the initial screen or the power failure recovery screen from the variable display device 9 in response to the command. Then, the process proceeds to step S2010.

  If the initial notification flag is not set, the effect control CPU 101 checks whether or not the door opening error notification flag is set (step S1965). If not set, the process proceeds to step S1971. If set, the production control CPU 101 decrements the error process timer by 1 (step S1966), and when the error process timer times out (step S1967), switches the error notification process data. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the error process timer (step S1968).

  FIG. 101 is an explanatory diagram of a configuration example of an error notification process table. The error notification process table is a table in which process data to be referred to when the effect control CPU 101 performs control of the effect device and performs various error notifications is set. That is, the effect control CPU 101 performs error notification by controlling the speaker 27 and each lamp in accordance with data set in the error notification process table. The error notification process table includes data obtained by collecting a plurality of combinations of process timer set values, error lamp control execution data, and error sound number data. In the process timer set value, the duration in the sound output state and the lamp display state is set. The effect control CPU 101 refers to the error notification process table and controls the lighting / non-lighting state of each lamp in a manner set in the lamp display control execution data for the time set in the process timer set value. The sound output using the speaker 27 is controlled.

  The error notification process table shown in FIG. 101 is stored in the ROM of the effect control board 80. The error notification process table is prepared according to the error type (RAM clear notification, random number circuit error, full tank error, door opening error, ball breakage error, payout error). Further, in this embodiment, every time the error process timer times out, the lighting of the pattern A and the lighting of the pattern B are switched, and the lighting or blinking is controlled. In this embodiment, the production control CPU 101 controls the display state of each lamp and outputs an error notification by outputting a predetermined error sound from the speaker 27 (in this example, RAM clear notification, door opening). Error notification and random number circuit error notification), the error notification is performed using the error notification process table (see FIG. 101A) including the error sound number data in addition to the error lamp control execution data. . In addition, in the case where the effect control CPU 101 performs error notification by controlling only the display state of each lamp (in this example, abnormal winning error notification, out of ball error notification, full tank error notification, payout error notification) Error notification is performed using an error notification process table including only error lamp control execution data (see FIG. 101B).

  Next, the effect control CPU 101 controls the speaker 27 based on the error sound number data (step S1969). In step S1969, the production control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the production control CPU 101 causes the speaker 27 to output a sound “the door is open” and a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1970). For example, in step S1970, the effect control CPU 101 generates lamp control signals for blinking the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set to a predetermined data storage area. The lamp control signal set in step S1970 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the door opening error notification flag is not set, the effect control CPU 101 checks whether or not the random number circuit error notification flag is set (step S1971). If set, the production control CPU 101 decrements the error process timer by 1 (step S1972), and when the error process timer times out (step S1973), switches the error notification process data. That is, the process timer setting value set next in the error process table is set in the error process timer (step S1974).

  Next, the effect control CPU 101 controls the speaker 27 based on the error sound number data (step S1975). In step S1975, the effect control CPU 101 outputs sound data indicating sound output corresponding to the corresponding error notification to the speech synthesis IC 173. The voice synthesis IC 173 reads data corresponding to the input sound data from the voice data ROM 174 and outputs a voice signal to the speaker 27 side according to the read data. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1976). For example, in step S1976, the effect control CPU 101 outputs lamp control signals for lighting the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. Set to a predetermined data storage area. The lamp control signal set in step S1976 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 to 604.

  If the random circuit error notification flag is not set, the effect control CPU 101 checks whether the abnormality notification flag is set (step S1977). If not set, the process proceeds to step S1984. If set, the effect control CPU 101 decrements the error process timer (step S1979), and when the error process timer times out (step S1980), switches the error notification process data. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the error process timer (step S1981).

  Next, the effect control CPU 101 executes serial setting processing in order to control each lamp in accordance with the abnormal winning notification in accordance with the error lamp control execution data (step S1983). In step S1983, the effect control CPU 101 sets lamp control signals for blinking the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper pan lamp in a predetermined data storage area. The ramp control signal set in step S1983 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and the hit ball supply tray (upper Dish) 3 is output to each frame side IC substrate 605A arranged on the back side.

  If the abnormality notification flag is not set, the effect control CPU 101 checks whether or not the RAM clear notification flag is set (step S1984). If the RAM clear notification flag is not set, the process proceeds to step S1993. If the RAM clear notification flag is set, the process timer is decremented by -1 (step S1985), and the value of the timer 2 set in step S1935 is decremented by 1 (step S1986). When the process timer times out (step S1987), the error notification process data is switched. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the process timer (step S1988).

  Next, the production control CPU 101 controls the speaker 27 based on the error sound number data (step S1989). In step S1989, the production control CPU 101 outputs a control signal (sound number data) to the speech synthesis IC 173 to cause the speaker 27 to output a sound. For example, the effect control CPU 101 causes the speaker 27 to output a predetermined error sound (for example, a beep sound).

  Further, the effect control CPU 101 executes serial setting processing to control various lamps as effect components in accordance with the error lamp control execution data (step S1990). In step S1990, the effect control CPU 101 turns on the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side. A control signal is set in a predetermined data storage area. The lamp control signal set in step S1990 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to each frame side IC substrate 602 to 604.

  Next, the production control CPU 101 checks whether or not the value of the period timer 2 has become 0 (step S1991). When the value of the period timer 2 becomes 0, that is, when the RAM clear notification period has elapsed, the RAM clear notification flag is reset (step S1992), and the process proceeds to step S2010. If the value of the period timer 2 has not timed out, the processing is terminated as it is.

  If the RAM clear notification flag is not set, the effect control CPU 101 checks whether or not the full error notification flag is set (step S1993). If not set, the process proceeds to step S1999. If set, the production control CPU 101 decrements the error process timer by 1 (step S1994), and when the error process timer times out (step S1995), switches the error notification process data. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the error process timer (step S1996).

  Next, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S1998). For example, in step S1998, the effect control CPU 101 sets a lamp control signal for blinking the LEDs 84a to 84f of the lower pan lamps in a predetermined data storage area. The lamp control signal set in step S1998 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Is output to the frame side IC substrate 605B.

  If the full-tank error notification flag is not set, the production control CPU 101 checks whether or not the payout error notification flag is set (step S1999). If not set, the process proceeds to step S2005. If set, the production control CPU 101 decrements the error process timer by 1 (step S2000), and when the error process timer times out (step S2001), switches the error notification process data. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the error process timer (step S2002).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2003). For example, in step S2003, the effect control CPU 101 sets lamp control signals for blinking the top frame lamps and the upper pan lamp LEDs 281a to 281l and 82a to 82f provided on the game frame 11 side in a predetermined data storage area. To do. The lamp control signal set in step S2003 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the frame side IC substrates 602 and 605A.

  If the payout error notification flag is not set, the effect control CPU 101 checks whether or not the ball break error notification flag is set (step S2004). If not set, the process proceeds to step S2010. If set, the production control CPU 101 decrements the error process timer by 1 (step S2005), and when the error process timer times out (step S2006), switches the error notification process data. That is, the error notification process data set next in the error process table is set, and the process timer set value is set in the error process timer (step S2007).

  Further, the effect control CPU 101 executes serial setting processing to control each lamp according to the corresponding error notification in accordance with the error lamp control execution data (step S2008). For example, in step S2008, the production control CPU 101 blinks the LEDs 281a to 281l of the top frame lamps provided on the game frame 11 side, and sends a lamp control signal for lighting the LEDs 82a to 82f of the upper pan lamps to a predetermined level. Set in the data storage area. The lamp control signal set in step S2008 is output to the serial output circuit 353 in the serial input / output process (step S708) in the main process, converted into serial data by the serial output circuit 353, and relay boards 606, 607. Are output to the board side IC substrate 601 and the frame side IC substrates 602 and 605A.

  In this embodiment, as shown in FIG. 100, when a ball break error or payout error is notified, sound output from the speaker 27 is not performed, but when a ball break error or payout error is notified. Alternatively, sound output control using the speaker 27 may be performed.

  In step S2009, the production control CPU 101 checks whether or not an error notification release flag is set. If it is set, the process proceeds to step S2010. If it is not set, the process is terminated as it is. In step S2010, the production control CPU 101 changes the value of the notification control process flag to a value corresponding to the notification start process (step S1900), and ends the process.

  By executing the processing as described above, notification of various errors is executed. Further, the error notification is executed in the order of initial notification, door opening error notification, random number circuit error notification, abnormal winning notification, RAM clear notification, full tank error notification, payout error notification and ball runout error notification.

  The effect control CPU 101 determines Y in steps S1960, S1965, S1971, S1977, S1984, S1993, S1999, and S2004, then an initial notification flag, a door opening error notification flag, a random number circuit error notification flag, It may be determined whether any one or more of an abnormality notification flag, a RAM clear notification flag, a full tank error notification flag, a payout error notification flag, and a ball break error notification flag are set. Good. If it is set, the value of the notification control process flag may be changed to a value corresponding to the notification start process (step S1900), and the notification start process may be repeated.

  Next, a lamp control signal set in a predetermined data storage area according to the error lamp control execution data will be described. FIG. 102 is an explanatory diagram showing an example of a lamp control signal output as a serial data method in the notification control process. As shown in FIG. 102, in this embodiment, two patterns of error lamp control execution data (pattern A and pattern B) are used for each error type. In this embodiment, the blinking display of the lamp is controlled by switching and using the error lamp control execution data for the pattern A and the pattern B. The effect control microcomputer 100 stores the lamp control signal shown in FIG. 102 in a predetermined lamp control signal storage area provided in advance in the ROM in association with the error lamp control execution data. Then, the effect control CPU 101 extracts a lamp control signal from a predetermined lamp control signal storage area based on the error lamp control execution data, and outputs it to the serial output circuit 353.

  As shown in FIG. 102, each lamp control signal is stored in a predetermined lamp control signal storage area with the address of the output destination serial-parallel conversion ICs 610 to 615 added thereto. For example, since the address of the serial-parallel conversion IC 610 that supplies a control signal to some of the LEDs 281a to 281f among the ceiling lamps is “00”, the address “0000” is stored in the 8-digit data body for controlling the lamp. "Is added and stored. Further, since the address of the serial-parallel conversion IC 611 that supplies the control signal to the other part of the top lamps 281g to 281l is “01”, the address of the 8-digit data body for controlling the lamp is addressed. Stored with “0001” added. Since the address of the serial-parallel conversion IC 612 that supplies the control signal to the LEDs 283a to 283f of the right frame lamp is “02”, the address “0010” is added to the 8-digit data body for controlling the lamp. Stored in state. Further, since the address of the serial-parallel conversion IC 613 that supplies the control signal to the LEDs 282a to 282f of the left frame lamp is “03”, the address “0011” is added to the 8-digit data main body for controlling the lamp. Stored in state.

  In the case of RAM clear notification, as shown in FIG. 102, a lamp control signal whose control data body is “00111111” is transmitted to each of the serial-parallel conversion ICs 610 to 613 whose addresses are “00” to “03”. Is done. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281a of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side 281l, 282a to 282f, 283a to 283f are turned on. In addition, when the RAM clear notification is made, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B. Therefore, during the error notification, the game frame 11 side LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the upper plate lamp and the lower plate lamp) are continuously turned on.

  In the ramp control signal output to the serial-parallel conversion IC 610, the first bit is an input signal to the LED 281a, the second bit is an input signal to the LED 281b, the third bit is an input signal to the LED 281c, and the fourth bit is The input signal to the LED 281d corresponds to the input signal to the LED 281e, the fifth bit corresponds to the input signal to the LED 281f. In the ramp control signal output to the serial-parallel conversion IC 611, the first bit is an input signal to the LED 281g, the second bit is an input signal to the LED 281h, the third bit is an input signal to the LED 281i, and the fourth bit is The input signal to the LED 281j, the fifth bit corresponds to the input signal to the LED 281k, and the sixth bit corresponds to the input signal to the LED 281l. In the ramp control signal output to the serial-parallel conversion IC 612, the first bit is an input signal to the LED 283a, the second bit is an input signal to the LED 283b, the third bit is an input signal to the LED 283c, and the fourth bit is The input signal to the LED 283d corresponds to the input signal to the LED 283e, the fifth bit corresponds to the input signal to the LED 283f. In the ramp control signal output to the serial-parallel conversion IC 613, the first bit is an input signal to the LED 282a, the second bit is an input signal to the LED 282b, the third bit is an input signal to the LED 282c, and the fourth bit is The input signal to the LED 282d corresponds to the input signal to the LED 282e, the fifth bit corresponds to the input signal to the LED 282f.

  When notifying the door opening error, as shown in FIG. 102, first, based on the error lamp control execution data of pattern A, each serial-parallel conversion IC 610 having addresses from “00” to “03”. In 613, a lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281a of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side 281l, 282a to 282f, 283a to 283f are turned on. At the time of process data switching, the control data body is “00000000” in the serial-parallel conversion ICs 610 to 613 whose addresses are “00” to “03” based on the error lamp control execution data for pattern B. A lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 0 is output, and the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are turned off. Is done. When notifying the door opening error by repeating such control, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying a ball break error, as shown in FIG. 102, first, serial-parallel conversion ICs 610 and 611 having addresses “00” and “01” based on the error lamp control execution data of pattern A, respectively. In addition, a lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side are turned on. Further, at the time of process data switching, based on the error lamp control execution data of pattern B, the serial data to the serial-parallel conversion ICs 610 and 611 having addresses “00” and “01” and the lamp whose control data body is “00000000” are used. A control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 0 is output, and the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side are turned off. By repeating such control, when notifying a ball-out error, control is performed such that the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side blink at predetermined time intervals.

  Further, when notifying a ball break error, as shown in FIG. 102, a lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion IC 614 whose address is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 82a to 82f of the upper pan lamp are all 1 is output, and the LEDs 82a to 82f of the upper pan lamp are turned on. In addition, when a ball break error is notified, since the same lamp control signal is output to the serial-parallel conversion IC 614 when the error lamp control execution data is pattern A and pattern B, an error occurs. During the notification, the upper plate lamp LEDs 82a to 82f are continuously lit.

  In the lamp control signal output to the serial-parallel conversion IC 614, the first bit is an input signal to the LED 82a on the left side of the upper plate lamp, and the second bit is an input signal to the LED 82b on the left side of the upper plate lamp. The eye is the input signal to the LED 82c in front of the upper plate lamp, the fourth bit is the input signal to the LED 82d in front of the upper plate lamp, the fifth bit is the input signal to 82e on the right side of the upper plate lamp, and the sixth bit is the upper plate The input signal to 82f on the right side of the lamp and the seventh bit correspond to the input signal to the LED 83 of the operation button lamp.

  When notifying a full tank error, as shown in FIG. 102, first, based on the error lamp control execution data of pattern A, the control data body is “00111111” in the serial-parallel conversion IC 615 whose address is “05”. Lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 84a to 84f of the lower dish lamps are all 1 is output, and the LEDs 82a to 82d of the dish lamps are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 whose address is “05” based on the error lamp control execution data of pattern B. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the lower pan lamps are all 0 is output, and the LEDs 84a to 84f of the lower pan lamps are turned off. By repeating such control, when a full tank error is notified, control is performed such that only the LEDs 84a to 84f of the lower pan lamps blink at a predetermined time interval.

  In the lamp control signal output to the serial-parallel conversion IC 615, the first bit is an input signal to the LED 84a of the lower pan lamp, the second bit is an input signal to the LED 84b of the lower pan lamp, and the third bit is the lower pan. The input signal to the LED 84c of the lamp, the fourth bit is the input signal to the LED 84d of the lower pan lamp, the fifth bit is the input signal to the LED 84e of the lower pan lamp, and the sixth bit is the input signal to the LED 84f of the lower pan lamp It corresponds.

  When notifying the payout error, as shown in FIG. 102, first, control is performed on the serial-parallel conversion ICs 610 and 614 with addresses “00” and “04” based on the error lamp control execution data of pattern A. The lamp control signal whose data body is “00111111” is transmitted, and the lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 611 whose address is “01”. That is, a lamp control signal in which the logical values of all the bits corresponding to the LEDs of the ceiling lamp and the LEDs of the upper dish lamp are all 1 is output, and a part of the ceiling lamps provided on the game frame 11 side is output. The LEDs 281a to 281f and the upper plate lamp LEDs 82a to 82f are turned on. Further, when the process data is switched, the lamp control signal whose control data body is “00000000” is transferred to the serial-parallel conversion ICs 610 and 614 with addresses “00” and “04” based on the error lamp control execution data for pattern B. And a lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion IC 611 whose address is “01”. That is, a lamp control signal in which the logical values of all the bits corresponding to the other part of the ceiling lamps are all 1 is output, and the other part of the ceiling lamps 281g to 281g˜ Only 281l is lit. When notifying a payout error by repeating such control, the LED 281a to 281f and the LEDs 281g to 281l of the ceiling lamps provided on the game frame 11 side are alternately blinked at predetermined time intervals, and the upper plate Control is performed such that the lamps 82a to 82f blink at predetermined time intervals.

  When notifying the random circuit error, as shown in FIG. 102, the lamp control signal whose control data body is “00111111” is sent to each of the serial-parallel conversion ICs 610 to 614 whose addresses are “00” to “04”. Is sent. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LED 281a of the top frame lamp, the left frame lamp, the right frame lamp, and the upper plate lamp provided on the game frame 11 side. ˜281 l, 282 a to 282 f, 283 a to 283 f, and 82 a to 82 f are turned on. In addition, when a random number circuit error is notified, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B. The LED 281a to 281l, 282a to 282f, 283a to 283f, and 82a to 82f of the top frame lamp, the left frame lamp, the right frame lamp, and the upper plate lamp provided on the 11 side are continuously turned on.

  When notifying an abnormal winning error, as shown in FIG. 102, first, based on the error lamp control execution data of pattern A, the control data body is “00110011” in the serial-parallel conversion IC 614 whose address is “04”. Lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs on the left and right sides of the upper plate lamp are all 1 is output, and the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp are Illuminated. As described above, in the control signal output to the serial-parallel conversion IC 614, 1 of the first bit is an input signal to the LED 82a on the left side, and 1 of the second bit is an input signal to the LED 82b on the left side. The fifth bit 1 corresponds to the input signal to the right side LED 82e, and the sixth bit 1 corresponds to the input signal to the right side LED 82f.

  At the time of process data switching, based on the error lamp control execution data for pattern B, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 614 whose address is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the upper plate lamp are all 0 is output, and all the LEDs 82a to 82f of the upper plate lamp are turned off.

  When an abnormal winning error is notified by repeatedly performing the above-described control, the LED 82a, 82b, 82e, and 82f provided on the side surface of the upper lamp are blinked at predetermined time intervals.

  If any game effect (for example, a big hit effect or a decorative pattern change display) is performed when an abnormal winning notification is given, the LEDs 82a, 82b, 82e, and 82f provided on the side of the upper plate lamp Display control is performed, and display control of the top frame lamp, the left frame lamp, the right frame lamp, and the lower pan lamp is performed according to the game effect. In this case, a lamp control signal corresponding to the abnormal winning notification shown in FIG. A control signal is transmitted.

  It should be noted that not only abnormal winning notifications but also full tank error notifications, if any game effects (for example, big hit effects or decorative pattern fluctuation display) are being performed, the display of the LED 84a-84f of the lower plate lamps While the control is performed, display control of the top frame lamp, the left frame lamp, the right frame lamp, and the upper plate lamp may be performed according to the game effect. In this case, the lamp control signal corresponding to the full error notification shown in FIG. 102 is transmitted to the serial-parallel conversion IC 615, and at the same time, the lamp control signal corresponding to the game effect is also transmitted to each of the other serial-parallel conversion ICs 610 to 614. May be transmitted. Also, not only abnormal winning notifications and full tank error notifications, but also other error notifications (RAM clear notifications, door opening error notifications, ball runout error notifications, payout error notifications, random number circuit error notifications) (For example, when a big hit effect or a decorative symbol change display) is performed, display control of the top frame lamp, left frame lamp, right frame lamp, upper plate lamp, and lower plate lamp is performed according to the game effect. You may be made to be.

  In the example shown in FIG. 102, when performing error notification, the lamp control signal is also supplied to the serial-parallel conversion ICs 610 to 615 of lamps that are not subject to display control. For example, in the case of RAM clear notification, it is not necessary to control the lighting or blinking of the upper pan lamp and the lower pan lamp, but in the example shown in FIG. 102, serial-parallel with addresses “04” and “05”. A lamp control signal in which the logical values of the corresponding bits are all 0 is also output to the conversion ICs 614 and 615. By doing so, it is possible to make sure that the LED that is not the control target at the time of error notification is turned off.

  When performing error notification, lamp control signals may not be output (transmitted) to the serial-parallel conversion ICs 610 to 615 of lamps that are not subject to display control. FIG. 103 is an explanatory diagram showing another example of a lamp control signal output as a serial data method in the notification control process.

  When RAM clear notification or door opening error notification is performed, the upper pan lamp and the lower pan lamp are not subject to display control, and as shown in FIG. 103, serials with addresses “04” and “05”. -Do not output the lamp control signal to the parallel conversion ICs 614, 615. When the random number circuit error notification is performed, the lower pan lamp is not a display control target, and therefore, as shown in FIG. 103, a lamp control signal is output to the serial-parallel conversion IC 615 whose address is “05”. Do not. In addition, when performing ball break error notification or payout error notification, the left frame lamp and right frame lamp are not subject to display control in addition to the lower pan lamp, and as shown in FIG. 103, the address is “02”. ”,“ 03 ”, and“ 05 ”are not output to the serial-parallel conversion ICs 612, 613, and 615. Further, when performing full tank error notification, only the lower pan lamp is a display control target, and therefore, as shown in FIG. The lamp control signal is not output to. By doing so, it is possible to reduce lamp control signals output from the production control microcomputer 100 to the frame side IC substrates 602, 603, 604, 605A, and 605B.

  In the example shown in FIGS. 102 and 103, various error notifications are performed using only the LEDs 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, and 84a to 84f of the lamps provided on the game frame 11 side. Although cases have been described, in addition to these, various error notifications may be performed using center decoration lamps or stage lamp LEDs 125a to 125f and 126a to 126f provided on the game board 6 side.

  Next, motor control signals that are output when the movable members 151 and 152 are operated in a game effect will be described. FIG. 104 is an explanatory diagram showing an example of a motor control signal output as a serial data system in a game effect. The motor control signal shown in FIG. 104 is, for example, in the serial setting process in step S845C when variable display including a notice effect using the movable members 151 and 152 is executed in the decorative symbol changing process shown in FIG. It is set in a predetermined data storage area. The effect control microcomputer 100 stores the motor control signal shown in FIG. 104 in a predetermined motor control signal storage area provided in advance in the ROM in association with, for example, display control execution data. Then, the effect control CPU 101 extracts a motor control signal from a predetermined motor control signal storage area based on the display control execution data, and outputs the motor control signal to the serial output circuit 353.

  Also, as shown in FIG. 104, each motor control signal is stored in a predetermined lamp control signal storage area with the address of the output destination serial-parallel conversion IC 616 added thereto. In this embodiment, since the address of the serial-parallel conversion IC 616 that supplies a control signal to each of the motors 151a and 152a is “06”, the address “0110” is added to the 8-digit data body for controlling the motor. It is stored in the state that was done.

  When the trolley 151 is operated in the forward direction as a movable member, a motor control signal whose control data body is “00000001” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (first bit of the control data) corresponding to the forward operation of the motor 151a for driving the truck 151 is 1 is output, and the truck 151 is driven by driving the motor 151a. Is operated. When the operation of the truck 151 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal whose logical value of the bit corresponding to the forward operation of the motor 151a (the first bit of the control data) is 0 is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a. Is done. In this embodiment, when the trolley 151 is moved in the forward direction, the trolley 151 is detected by the position sensor 151b, and the driving time of the motor 151a has elapsed for a predetermined time (for example, 1 second). Then, the driving of the motor 151a is stopped.

  When the trolley 151 is operated in the reverse direction as a movable member, a motor control signal whose control data body is “00000010” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (second bit of the control data) corresponding to the reverse operation of the motor 151a for driving the trolley 151 is 1 is output, and the trolley 151 is driven by driving the motor 151a. Is operated. When the operation of the truck 151 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 151a (the second bit of the control data) is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a. Is done. In this embodiment, when the trolley 151 is operated in the reverse direction, the trolley 151 is not detected by the position sensor 151b, and the driving time of the motor 151a has elapsed for a predetermined time (for example, 1 second). As a result, the driving of the motor 151a is stopped.

  When the beam 152 is moved in the forward direction as a movable member, a motor control signal whose control data body is “00000100” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal in which the logical value of the bit (the third bit of the control data) corresponding to the forward operation of the motor 152a for driving the beam 152 is 1 is output, and the beam is driven by driving the motor 152a. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the positive direction operation of the motor 152a (the third bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is moved in the forward direction, the beam 152 is detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). The driving of the motor 152a is stopped.

  When the beam 152 is moved in the reverse direction as a movable member, a motor control signal whose control data body is “00001000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 1 corresponding to the reverse operation of the motor 152a for driving the beam 152 (the fourth bit of the control data) is output, and the motor 152a is driven to drive the beam 152. Is operated. When the operation of the beam 152 is stopped, a motor control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 616 whose address is “06”. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 152a (the fourth bit of the control data) is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a. Is done. In this embodiment, when the beam 152 is moved in the reverse direction, the beam 152 is not detected by the position sensor 152b, and the driving time of the motor 152a has elapsed for a predetermined time (for example, 1 second). As a result, the driving of the motor 152a is stopped.

  Next, the serial setting process will be described. FIG. 105 is a flowchart illustrating an example of the serial setting process. In the serial setting process, for example, when decorative display of a decorative design is performed in the effect control process process (see steps S835C and 845C) or various error notifications are performed (steps S1970, S1976, S1983, S1990, S1998, S2003, S2008). ) Is executed.

  In the serial setting process, the effect control CPU 101 first reads out lamp control execution data (such as lamp lighting pattern data accompanying the variation pattern, motor control data (step S835C only), etc.) from the ROM (step S950). In this case, for example, when performing the serial setting process during execution of the variable display of decorative symbols, the effect control CPU 101 reads the lamp control execution data in the process table shown in FIG. When serial setting processing is performed in the notification control process, error lamp control execution data in the error notification process table shown in FIG. 101 is read.

  Next, the effect control CPU 101 confirms whether or not there is a change in the display state of each lamp based on the read lamp control execution data (step S951). If the display state of each lamp is changed, the CPU 101 for effect control extracts the lamp control signal to which the address of the serial-parallel conversion IC of the lamp to be displayed is added from a predetermined lamp control signal storage area ( Step S952). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 21 are added to the extracted ramp control signal, and a predetermined data storage area provided in the RAM is set (step S953). Then, a lamp control signal output request flag is set (step S954).

  For example, when the serial setting process is executed in steps S907, S922, and S929 in the notification control process, one of the lamp control signals with an address shown in FIG. 102 is read in step S952, and the data is read in step S953. It will be set in the storage area.

  Next, the effect control CPU 101 reads display control execution data from the ROM (step S955). In this case, for example, when performing serial setting processing during execution of variable display of decorative symbols, the effect control CPU 101 reads display control execution data of the process table shown in FIG. On the other hand, when the serial setting process is performed in the notification control process, the error notification process table shown in FIG. 101 does not include display control execution data, so that it is determined as N in the next step S956. become.

  Next, the effect control CPU 101 checks whether or not any of the movable members 151 and 152 is included in the game effect based on the read display control execution data (step S956). When the movable members 151 and 152 are movable, the effect control CPU 101 adds a motor control signal to which the address (“06” in this example) of the serial-parallel conversion IC of the movable members 151 and 152 to be moved is added. Are extracted from a predetermined motor control signal storage area (step S957). Next, header data (1FFh), a mark bit, and an end bit shown in FIG. 21 are added to the extracted motor control signal and set in a predetermined data storage area provided in the RAM (step S958). Then, a motor control signal output request flag is set (step S959).

  For example, when a decorative display includes a notice effect or the like and one of the movable members 151 and 152 is movable, when the serial setting process is executed in steps S835C and S845C, the diagram is displayed in step S952. One of the motor control signals with an address shown in 104 is read out and set in the data storage area in step S953.

  FIG. 106 is an explanatory diagram showing a configuration example of a data storage area in which a lamp control signal and a motor control signal to be output are set. In this example, nine data storage areas for storing lamp control signals or motor control signals are prepared, and are output in the order in which they are output to the panel side IC substrate 601 and the frame side IC substrates 602, 603, 604, 605A, 605B. The lamp control signal and the motor control signal are sequentially stored in step S953.

  FIG. 107 is a flowchart illustrating a specific example of the serial input / output process (step S708). In the serial input / output process, the production control CPU 101 first checks whether the lamp control signal output request flag or the motor control signal output request flag is set (step S970). If set, the lamp control signal output request flag or the motor control signal output request flag is reset (step S971), and the lamp control signal and the motor control signal stored in the data storage area are transferred to the serial output circuit 353. Output (step S972). In this case, when a plurality of lamp control signals are set in the data storage area, the effect control CPU 101 sequentially reads each lamp control signal and outputs it to the serial output circuit 353 in step S972. The output lamp control signal and motor control signal are converted into serial data by the serial output circuit 353, and the board side IC board 601 and the frame side IC boards 602, 603, and 604 are connected via the relay boards 606 and 607. , 605A and 605B are output as a serial data system.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the board side IC substrate 601 via the relay substrates 606 and 607 (step S973). The input IC 621 mounted on the board-side IC board 601 latches the detection signals of the position sensors 151b and 152b based on the input input signal being input, and passes through the relay boards 606 and 607 as a serial data system. And output to the effect control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S974). In step S974, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying the time by which the serial input circuit 354 receives the input data from the input IC 621.

  Next, the effect control CPU 101 causes the input capture signal output unit 357 to output an input capture signal (latch signal) to the frame side IC substrate 605 via the relay substrate 607 (step S975). The input IC 620 mounted on the frame side IC board 605A latches the detection signals of the operation buttons 81a to 81e based on the input input signal being input, and produces the serial data system via the relay board 607. The data is output to the control board 80. Then, the effect control CPU 101 reads the input data from the serial input circuit 354 and stores it in a predetermined storage area of the RAM (step S976). In step S976, the effect control CPU 101 controls the serial input circuit 354 to read the input data from the serial input circuit 354 after delaying by the time for which the serial input circuit 354 receives the input data from the input IC 620.

  FIG. 108 and FIG. 109 are explanatory diagrams showing examples of display effects on the variable display device 9, sound effects by the speaker 27, and display effects by each lamp. FIG. 108 (A) shows an example when the decorative display is variably displayed on the variable display device 9.

  FIG. 108 (B) shows an example in which initialization notification is performed in the variable display device 9. As shown in FIG. 108 (B), when the initialization designation command is received and the initialization notification is performed in the variable display device 9, a predetermined period (for example, 31 seconds) after receiving the initialization designation command, The LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided in the game frame 11 are turned on, and a predetermined error sound is output from the speaker 27, and the RAM is cleared. Inform you.

  FIG. 108 (C) shows an example in which an abnormal winning notification is given in the variable display device 9 and an abnormal notification display (for example, blinking display) is performed by the LEDs 82a, 82b, 82e, and 82f on the side of the upper plate lamp. It is shown. When the production control microcomputer 100 receives the abnormal prize notification designation command from the game control microcomputer 560, it performs control to display the abnormality notification on the LEDs 82a, 82b, 82e, and 82f on the side of the upper plate lamp. Further, even if the decorative display variable display is started in response to the reception of the variation pattern command, the abnormality notification display of the LEDs 82a, 82b, 82e, and 82f on the side surface side of the upper plate lamp is continued. Further, even when the variable display of the decorative symbols is finished, the abnormality notification display of the LEDs 82a, 82b, 82e, and 82f on the side surface side of the upper plate lamp is continued.

  Since the production control microcomputer 100 does not execute the control for stopping the abnormality notification display, the abnormality notification display of the LEDs 82a, 82b, 82e, 82f on the side surface of the upper plate lamp is performed until the power supply to the gaming machine is stopped. continue. However, the production control microcomputer 100 may control the abnormality notification display to stop when a predetermined time (for example, 30 seconds) elapses after the abnormality notification display is started. Further, the production control microcomputer 100 may stop the abnormality notification display based on the fact that the input port data designation command transmitted when the port state changes does not indicate an error state. .

  Further, in this embodiment, the game control microcomputer 560 does not detect an abnormal prize and does not detect an abnormal prize for a predetermined period after the power supply to the game machine is started (a period during which the initialization notification is executed). The abnormal winning notification designating command is not transmitted from the microcomputer 560. However, the game control microcomputer 560 always detects an abnormal winning when the value of the special symbol process flag is less than a predetermined value (5 in this embodiment), so that the effect control microcomputer 100 performs the game control. If an abnormal winning notification designation command is received during a predetermined period after the power supply to the machine is started, the abnormal winning notification may not be performed.

  Also, in this embodiment, when the game control microcomputer 560 detects that one game ball has won a big winning opening when it is not in the big win game state, the abnormal control notification designation command is sent to the effect control microcomputer. When it is detected that a predetermined number (a plurality (for example, 5)) of game balls have been won in the big winning opening when it is not in the big hit gaming state, control is performed so as to send an abnormal winning notification designation command. Also good. Further, when it is not in the big hit gaming state, when it is detected that a predetermined number (a plurality of) gaming balls have won within a predetermined time, an abnormal winning notification designating command may be transmitted. In addition, when receiving the abnormal prize notification designation command, the production control microcomputer 100 performs the abnormality notification display as described above.

  Further, in this embodiment, the case where the gaming control microcomputer 560 transmits an abnormal winning notification designation command when the occurrence of abnormal winning is detected is shown, but a dedicated command for specifying abnormal winning notification is transmitted. Instead, it may be transmitted by adding to the input port data designation command (see FIG. 31) that the abnormal winning notification is designated. In this case, for example, an abnormal winning notification specifying bit for specifying abnormal winning notification is assigned to bit 6 (D6) of the EXT data of the input port data specifying command shown in FIG. Then, when the gaming control microcomputer 560 detects an abnormal winning, it may transmit an input port data designation command in which bit 6 (D6) of the EXT data is set to 1.

  FIG. 109 shows an example in which a full tank error notification is displayed (for example, blinking) by the LEDs 84a to 84f of the lower pan lamps. When the production control microcomputer 100 detects a full tank error based on the input port data designation command, the production control microcomputer 100 performs control to display a full tank error notification on the LEDs 84a to 84f of the lower pan lamps.

  As described above, according to this embodiment, the LED 82a, 82b, 82e, and 82f of the upper plate lamp are provided on the outer side surface of the ball supply plate (upper plate) 3, and the ball supply plate according to the game state. The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper lamp provided in the (upper plate) 3 is controlled. Therefore, by causing the LED lamps 82a, 82b, 82e, and 82f of the upper plate lamps provided on the outer side surface of the hitting ball supply tray (upper plate) 3 to emit light, it is possible to diversify the production mode in the game effect. The production effect can be improved. Further, since the upper plate lamp LEDs 82a, 82b, 82e, and 82f are provided on the outer side surface of the hitting ball supply tray (upper plate) 3, for example, a plurality of gaming machines are installed in one section of the game store. Even if the player is a player other than the player who is playing with the gaming machine (a player who is playing a game with the adjacent gaming machine or a player who is not yet playing a game in the game store) The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp of the gaming machine can be made visible. Therefore, it is possible to execute an effect that draws attention to a person other than the player who is playing the game on the gaming machine, thereby providing an effect.

  In this embodiment, the case where the notification is performed by blinking the LEDs 82a, 82b, 82e, and 82f on the side surface of the upper plate lamp is shown. However, the notification mode is limited to that shown in this embodiment. Absent. For example, when a multi-color LED is used as the LED of the upper plate lamp, the notification may be made by causing the multi-color LED to emit light with a color different from that of a normal effect. Further, for example, the LEDs 82a, 82b, 82e, and 82f on the side surface side of the back plate lamp may be blinked at a blinking speed different from the blinking speed of the LED in a normal effect. In addition, such a notification mode is not limited to an abnormal winning notification, but a full tank error notification and other error notifications (RAM clear notification, door opening error notification, ball break error notification, payout error notification, random circuit error notification, etc. ).

  Further, according to this embodiment, the production control microcomputer 100 executes abnormality notification when a predetermined abnormal state (for example, abnormal winning state) is detected. In addition, the production control microcomputer 100 performs abnormality notification by controlling the light emission state of the LEDs 82 a, 82 b, 82 e, and 82 f of the upper plate lamp provided on the outer side surface of the hitting ball supply tray (upper plate) 3. Therefore, by using the LED lamps 82a, 82b, 82e, and 82f on the outer side surface of the hitting ball supply tray (upper plate) 3, it is possible to perform abnormality notification in a manner that is not easily noticed by an unauthorized person. In addition, since the game shop clerk in the game store can see the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp on the outer side surface of the batting supply tray (upper plate) 3, it is easy for the game shop clerk to know abnormal conditions such as various errors and frauds. Can be recognized. Further, since the abnormality notification can be performed by using the LED 82a, 82b, 82e, 82f of the upper lamp of the hitting ball supply tray (upper plate) 3 used for normal game production, it is necessary to provide a special device for performing the abnormality notification. The cost for performing abnormality notification can be prevented.

  FIG. 110 is an explanatory diagram showing a state in which a plurality of gaming machines are installed in the gaming store. As shown in FIG. 110, in the gaming store, the gaming machines are installed side by side on the gaming machine installation island 500. Note that FIG. 110 corresponds to a view of the inside of the game store viewed from the passage on the side orthogonal to each gaming machine installation island 500.

  In general, a fraudster performs an operation such as creating a winning state of a game ball illegally while sitting in front of a gaming machine and playing a game, but when viewed from a fraudster sitting in front of a gaming machine, Only the front side of the plane is visible. Therefore, when viewed from the fraudster, as shown in FIG. 110, the LEDs 82a, 82b, 82e, and 82f provided on the side surface among the upper plate lamps provided on the hitting ball supply tray (upper plate) 3 of the gaming machine are Hard to see. Therefore, when an abnormal winning is detected, the abnormal notification is performed in such a manner that it is difficult for an unauthorized person to notice by performing the abnormal winning notification using only the LEDs 82a, 82b, 82e, 82f on the side of the upper plate lamp. Can be performed.

  In addition, game shop staff or the like usually look around the inside of a game shop from a passage orthogonal to each gaming machine installation island 500 from the viewpoint shown in FIG. Therefore, when viewed from a game clerk or the like, as shown in FIG. 110, the LEDs 82a, 82b, 82e, and 82f on the side surface of the upper plate lamp provided on the hitting ball supply tray (upper plate) 3 of the gaming machine can be seen well. Therefore, when an abnormal winning is detected, an abnormal state such as an abnormal winning is easily given to the game store clerk by notifying the abnormal winning using only the LEDs 82a, 82b, 82e, and 82f on the side of the upper plate lamp. Can be recognized.

  For example, some conventional gaming machines are configured to perform a game effect or an error notification using a lamp provided on the upper part of the gaming frame of the gaming machine (see, for example, JP-A-2001-96042). With such a configuration, an abnormal winning notification can be made using a lamp provided on the upper part of the game frame that is difficult for a player to see, so that it is difficult for a fraudster (actor sitting in front of a gaming machine) to be recognized to some extent. Abnormality notification can be performed in a manner. However, since the game clerk often overlooks the inside of the game store from the passage on the side orthogonal to each gaming machine installation island 500, the lamp provided at the upper part of the game frame is difficult to see even from the game store clerk. An abnormal state such as an abnormal prize cannot be easily recognized by a game store clerk.

  In addition, for example, in a conventional gaming machine, an ultrasonic signal is transmitted when the gaming machine detects an error, and is received by an ultrasonic receiver provided in the gaming store to recognize the error (for example, JP 2005-261647). With such a configuration, when an abnormal winning is detected, only an amusement store clerk can recognize the occurrence of an error such as an abnormal winning without being noticed by an unauthorized person. However, it is necessary to equip a gaming machine with an ultrasonic generator, and an amusement store with an ultrasonic receiver, which is expensive for abnormality notification.

  On the other hand, according to this embodiment, the abnormal winning notification is performed by using the LEDs 82a, 82b, 82e, and 82f on the side surface of the upper plate lamp provided on the side surface of the hitting ball supply tray (upper plate) 3. Thus, it is possible to make it possible for only a game shop clerk to recognize the occurrence of an error such as an abnormal winning prize without incurring a special cost for notifying an abnormality and without being noticed by an unauthorized person.

  In addition, according to this embodiment, in addition to when an abnormal winning is detected, each of the LEDs 82a to 82f of the upper plate lamp is lit or blinked when a random number circuit error, a ball running out error, or a payout error is detected. By checking the lighting or blinking state of the LEDs 82a, 82b, 82e, and 82f on the side surface of the upper plate lamp, a game clerk can easily recognize the occurrence of an error. In addition, since each LED 82a to 82f of the upper plate lamp is lit when the fanfare effect is executed, the game store clerk or the like can check the lighting state of the LEDs 82a, 82b, 82e, 82f on the side surface of the upper plate lamp. The gaming state of each gaming machine can be easily recognized.

  Note that the lighting or blinking control of the upper plate lamp in the game effect and the lighting or blinking control of the upper plate lamp at the time of each error notification are not limited to those shown in the present embodiment. For example, the production control microcomputer 100 may control the lighting or blinking state of each of the LEDs 82a to 82f of the upper plate lamp depending on whether or not the gaming state is a certain change state. In addition, for example, the production control microcomputer 100 controls the lighting or blinking state of the LEDs 82a to 82f of the upper plate lamp according to the game effect (for example, the effect during the round, the interval effect, and the ending effect) during the big hit. May be.

  Further, according to this embodiment, the game control microcomputer 560 determines that an abnormal winning has occurred based on the input of the detection signal from the count switch 23 in a game state other than the big hit game state. Further, the production control microcomputer 100 executes an abnormal winning notification based on the determination that an abnormal winning has occurred. In addition, the production control microcomputer 100 executes abnormal winning notification by controlling the light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp provided on the outer side surface of the hitting ball supply tray (upper plate) 3. . Therefore, it is possible to make the game store clerk recognize an illegal act in which a prize ball is paid out by winning a game ball at a big prize opening of a bag that is not originally open in a game state other than the big hit game state.

  Further, according to this embodiment, when it is determined that an abnormal winning has occurred, the game control microcomputer 560 prohibits execution of control for paying out game balls by prohibiting transmission of a prize ball number command. To do. For this reason, when there is a possibility that a detection signal is input from the count switch 23 due to a fraudulent act, it is possible to prevent the player from paying out a prize ball based on a winning, and a situation where a fraudulent person is profited by the fraudulent act. Can be prevented.

  Further, according to this embodiment, the game control microcomputer 560 determines whether or not the detection signal from the second start port switch 14a is input, and when the second start port 14 is in the closed state. Based on the input of the start detection signal from the second start port switch 14a, it is determined that an abnormal start winning has occurred. Further, the production control microcomputer 100 executes the abnormal start winning notification based on the determination that the abnormal start winning has occurred. Further, the production control microcomputer 100 executes an abnormal start winning notification by controlling the light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp provided on the outer side surface of the hitting ball supply plate (upper plate) 3. To do. Therefore, the game store clerk can be made aware of an illegal act of paying out a prize ball by winning a game medium in the second starting port 14 of the bag that is not originally open.

  In this embodiment, the case where the abnormal winning notification is performed in the same notification mode in the case where the abnormal winning in the big winning opening is detected and in the case where the abnormal winning in the second start winning opening 14a is detected has been described. The abnormal winning notification may be performed in different notification modes. For example, on the outer side surface of the hit ball supply tray (upper plate) 3 with different lighting or blinking patterns depending on whether an abnormal winning at the big winning opening is detected or an abnormal winning at the second starting winning opening 14a is detected. You may turn on or blink LED82a, 82b, 82e, 82f of the provided upper plate lamp.

  Further, according to this embodiment, the effect control command transmitted by the game control microcomputer 560 is a full tank state in which a predetermined amount or more of game balls are stored in the surplus ball tray (lower plate) 4. A command (input port data designation command) indicating that the surplus ball tray (lower pan) 4 is full is included. Further, the production control microcomputer 100 receives the command indicating that the surplus ball tray (lower plate) 4 is full from the game control microcomputer 560, so that the surplus ball tray (lower plate) ) By controlling the light emission state of the LEDs 84 a to 84 f of the lower pan lamps provided in 4, control for notifying the full tank state of the surplus ball pan (lower pan) 4 is executed. Therefore, the production control microcomputer 100 determines the light emission states of the LEDs 84a to 84f of the lower dish lamps provided in the surplus ball receiving tray (lower dish) 4 separately from the game presentation effect devices such as the variable display device 9 and the speaker 27. A full tank condition is notified by controlling. Therefore, the full tank state can be notified without interruption during the game effect (for example, the effect during the big hit). In addition, since the production control microcomputer 100 controls the light emission state of the LEDs 84a to 84f of the lower tray lamps provided in the surplus ball tray (lower tray) 4, the processing load of the game control microcomputer 560 is reduced. Can do. Moreover, since the full tank error notification can be performed by using the LEDs 84a to 84f of the lower lamps 4 of the extra ball tray (lower plate) 4 used for normal game effects, it is not necessary to provide a special device for performing the full tank error notification. Further, it is possible to prevent an increase in cost for performing full tank error notification.

  Further, according to this embodiment, the production control microcomputer 100 uses the LED 125a to 125f, 126a to 126f, 281a to 281l, and 282a to 282a of each lamp based on the production control command received from the game control microcomputer 560. Control signals for controlling 282f, 283a to 283f, 82a to 82f, 83, and 84a to 84f are output in a serial signal system. The serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B are one system. In addition to being connected through wiring, different address information is assigned in advance, and only the control signal with its own address information added is converted into a parallel signal system and output. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 616 to 618 provided in the game board 6, address information that can identify the serial-parallel conversion ICs 616 to 618 is provided. The added control signal is output by the serial signal system. In addition, when the production control microcomputer 100 outputs a control signal for controlling the serial-parallel conversion ICs 610 to 615 provided in the game frame 11, address information that can identify the serial-parallel conversion ICs 610 to 615 is provided. The added control signal is output by the serial signal system. Therefore, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In addition, according to this embodiment, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC board 601 and the serial-parallel mounted on each frame-side IC board 602 to 604 by the relay boards 606 and 607. The connection with the conversion ICs 610 to 615 is relayed. The relay board 607 relays the connection between the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602 to 604 and the effect control microcomputer 100. Therefore, the detachment work between the game frame 11 and the game board 6 can be easily performed only by performing the connection work and the removal work to the relay boards 606 and 607.

  Further, according to this embodiment, the frame side IC substrate 602 as a collective substrate on which the two serial-parallel conversions 610 and 611 are mounted is provided on the game frame 11 side. Further, a board side IC substrate 601 as a collective board on which four serial-parallel conversion ICs 616 to 618 are mounted is provided on the game board 6 side. Therefore, the boards on which the serial-parallel conversion ICs are mounted can be integrated, and the number of parts in the gaming machine can be reduced.

  In addition, according to this embodiment, the lower tray lamps 84 a to 84 f provided on the surplus ball receiving tray (lower tray) 4 are provided on the peripheral portion of the surplus ball receiving tray (lower tray) 4. Therefore, it is possible to make it easier for the player to recognize a notification state such as a full tank notification by causing the LEDs 84a to 84f of the lower tray lamps provided in a manner surrounding the surplus ball tray (lower tray) 4 to emit light. .

  Moreover, according to this embodiment, the production control microcomputer 100 is provided in a gaming machine including LEDs 84a to 84f of lower tray lamps provided in the surplus ball receiving tray (lower tray) 4 according to the gaming state. The light emission state of the LED of each lamp is controlled. Further, the game control microcomputer 100 has a surplus sphere tray in a light emission mode different from that when the light emission state of the LEDs 84a to 84f of the lower tray lamps provided in the surplus sphere tray (lower tray) 4 is controlled during the game. (Lower pan) The full state notification is executed by controlling the light emission state of the LEDs 84a to 84f of the lower pan lamps provided in the peripheral portion of the lower pan. Therefore, it is possible to eliminate the need to provide a special light emitter only for notifying the full tank state, and the cost for full tank notification can be reduced.

  Further, according to this embodiment, the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B. To 615 are connected to each other through one line of wiring using a connector. Therefore, the wiring work between the game frame 11 and the game board 6 can be performed simply by attaching and detaching the connector, and the game frame 11 and the game board 6 can be attached and detached more easily.

  Further, according to this embodiment, the game control microcomputer 560 transmits the effect control command to the effect control microcomputer 100 in the serial signal system using the serial output circuit 78. Therefore, the number of wires between the game control microcomputer 560 and the effect control microcomputer 100 can also be reduced.

  In addition, according to this embodiment, the production control microcomputer 100 is mounted on the serial-parallel conversion ICs 616 to 618 and the frame-side IC substrates 602, 603, 604, 605A, and 605B mounted on the board-side IC substrate 601. A clock signal used in common for the serial-parallel conversion ICs 610 to 615 and the input ICs 620 and 621 is output. Therefore, serial-parallel conversion ICs 616 to 618 mounted on the board-side IC substrate 601, serial-parallel conversion ICs 610 to 615 mounted on the frame-side IC substrates 602, 603, 604, 605 A, and 605 B, and input ICs 620 and 621, Can be easily synchronized, and the number of wiring lines for clock signals can be reduced.

  In this embodiment, the production control microcomputer 100 may store the device ID of the serial-parallel conversion ICs 610 to 618 as an address in a predetermined address storage area of the RAM in advance. If comprised in that way, each lamp | ramp 125a-125f, 126a-126f, 281a-281l, 282a-282f, 283a-283f, 82a- will utilize ID information peculiar to serial-parallel conversion IC610-618 as address information. 82f, 83, 84a to 84f can be controlled.

  Further, in this embodiment, since the initialization notification is given priority over the abnormality notification, it is possible to prevent a situation in which the initialization notification is difficult to recognize. That is, the initialization notification is performed prominently. The game control microcomputer 560 transmits an initialization designation command when a user reset that causes the program to start executing from the top address (for example, address 0000) occurs even when power supply to the game machine is started. As a cause of the occurrence of the user reset, for example, in the case where the watchdog timer is configured to be used, there is a case where the watchdog timer has timed out due to an illegal act that prevents the smooth progress of the program. Such fraudulent acts are configured to be controlled in a probabilistic state, particularly when a predetermined jackpot symbol (predetermined probability variation jackpot symbol or sudden probability variation jackpot symbol) is determined based on a random number for determining the jackpot symbol. It is likely to occur when it is. That is, the game control microcomputer 560 is initialized, and a counter for generating a jackpot symbol determining random number is initialized, and it is easy to receive an illegal act that makes it easy to grasp the count value of the counter. By making the initialization notice conspicuous as in this embodiment, it is possible to easily grasp from the outside of the gaming machine that the gaming control microcomputer 560 has been initialized. Is easily recognized.

  Further, according to this embodiment, a state detection signal corresponding to each of a plurality of types of information related to the state of the gaming machine is input to the input port unit that is accessible at a time on the main board 31. In addition, the game control microcomputer 560 determines whether one or more of the plurality of state detection signals input to the input port unit have changed, and determines whether the plurality of state detection signals are out of the plurality of state detection signals. When it is determined that any one or more states have changed, the states of a plurality of state detection signals input to the input port unit are collectively transmitted as a command (input port data designation command). Further, the production control microcomputer 100 determines which of a plurality of types of information related to the state of the gaming machine has changed based on the input port data designation command, and corresponds to the determined information related to the state of the gaming machine. The notification is performed on the electrical components (in this example, the lamps 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 84a to 84f). Therefore, it becomes possible to distinguish and notify each of a plurality of types of information related to the state of the gaming machine, and in such a case, it is possible to prevent an increase in the control burden of information determination of the gaming control microcomputer 560. . In addition, since the plurality of state detection signals are transmitted from the main board 31 on the condition that any one or more of the plurality of state detection signals input to the input port section have changed, the main board 31 It is difficult to grasp the control state of the game control microcomputer 560 based on the signal transmitted from the computer, and as a result, there is a high possibility that fraud can be prevented.

  In this embodiment, the production control board 80, the board side IC board 601, the frame side IC boards 602, 603, 604, 605A, 605B and the relay boards 606, 607 are connected as the production control board 80, The relay board 606 and the relay board 607 are connected to the bus type by one system wiring route, and the serial-parallel conversion ICs 610 to 618 mounted on the board side IC board 601 and the frame side IC boards 602 to 604 are one bus type. Although the case where they are connected by the wiring route of the system has been described, the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 are connected in series (hereinafter also referred to as daisy chain type connection), Serial-parallel conversion ICs 610 to 613 mounted on the side IC boards 602 to 604 are connected in series (daisy chain type). By connecting) may reduce the number of wires.

  FIG. 111 is a block diagram illustrating another configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, 605A, and 605B. In the example shown in FIG. 111, the effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. The relay board 606 further supplies the serial data and clock signal input from the production control microcomputer 100 to the frame side IC boards 604, 605A, and 605B via the relay board 607.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 616. As shown in FIG. 111, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC substrate 601 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 616 to the other serial-parallel conversion ICs 618 and 617 mounted on the board side IC substrate 601. For example, by configuring the output of the last bit of the shift register 652 shown in FIG. 20 to the data latch unit 651 of the next serial-parallel conversion IC, serial data is sequentially sent to the serial-parallel conversion ICs 616 to 618. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 618 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided in the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 618 and the input IC 621.

  The relay board 607 supplies serial data and a clock signal input from the effect control microcomputer 100 via the relay board 606 to the frame side IC board 604, the frame side IC board 605A, and the frame side IC board 605B. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 613. As shown in FIG. 111, the serial-parallel conversion ICs 610 to 613 mounted on the frame side IC substrates 602 to 604 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 613 to the other serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrates 602 and 603. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 20 is input to the data latch unit 651 of the next serial-parallel conversion IC, so that serial data is sequentially input to each serial-parallel conversion IC 610-613. What is necessary is just to forward. And each serial-parallel conversion IC610-613 converts the input serial data into parallel data, and supplies it to LED of each lamp | ramp provided in the game frame 11. FIG.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 604 and input to the serial-parallel conversion IC 613 and also input to the frame side IC substrate 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to the serial-parallel conversion ICs 610 and 611, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 612. The clock signal input to the frame side IC board 605A is branched on the frame side IC board 605A and input to the serial-parallel conversion IC 614 and the input IC 620. The clock signal input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615.

  Further, as the LED of the lamp provided in the game frame 11 or the game board 6, an LED that performs gradation control (for example, a multi-color LED) may be used so that the brightness can be controlled. FIG. 112 is an explanatory diagram illustrating an example of a pulse train supplied to an LED when gradation control of the LED is performed. FIG. 112 shows a pulse train in the case of gradation control of the LED in eight stages. That is, as shown in FIG. 112, the production control microcomputer 100 performs tone control of the LED by outputting a signal in which the number of pulses is changed according to the luminance. In this case, for example, the period of the clock signal is set as one time element, and one control unit time is constituted by seven time elements. Then, the brightness of the LED may be controlled depending on how many time elements for supplying the pulse current in one control unit time are included. For example, as shown in FIG. 112 (a), the brightness of the LED becomes the brightest when a pulse current is passed through the LED in all the time elements among the seven time elements in one control unit time. Further, as shown in FIG. 112 (g), the brightness of the LED becomes the darkest when the pulse current is passed through the LED for only one time element among the seven time elements in one control time. In addition, as the number of time elements for applying a pulse current to the LED decreases to 6, 5, 4, 3, and 2, the brightness of the LED gradually decreases (FIGS. 112 (b) to (f)). . As shown in FIG. 112 (h), when the pulse current is not allowed to flow through the LED in all seven time elements included in one control unit time, the LED is turned off.

  When the gradation control of the LED is performed, the effect control microcomputer 100 uses the serial output circuit 353 to transmit a control signal including information on the number of pulses corresponding to the luminance (for example, logical value 0 or 1). Output as serial data. The production control microcomputer 100 is not limited to the number of pulses, and may output a control signal including information on a pulse width corresponding to the luminance as a serial data system using the serial output circuit 353. .

  In addition, when controlling the brightness using the LED of the lamp that performs gradation control, a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that adjusts the brightness, and a control signal to the LED of the lamp that does not adjust the brightness You may make it differ from the serial-parallel conversion IC to output. FIG. 113 shows an effect control board 80, relay boards 606 and 607, board-side IC board 601, frame-side IC boards 602, 603, 604, and 605A in the case where brightness is controlled using the LED of a lamp that performs gradation control. It is a block diagram which shows the structural example of 605B.

  In the example shown in FIG. 113, serial-parallel conversion ICs 610a, 611a, 612a, and 613a that output a control signal to the LED of the lamp that does not adjust the brightness, and serial-parallel conversion that outputs a control signal to the LED of the lamp that adjusts the brightness. ICs 610b, 611b, 612b, and 613b are separately mounted on the frame side IC substrates 602, 603, and 604, respectively. Each serial-parallel conversion IC 610a, 611a, 612a, 613a converts serial data input from the production control microcomputer 100 via the relay boards 606, 607 into parallel data, and does not perform brightness adjustment. To the LED. Each serial-parallel conversion IC 610b, 611b, 612b, 613b converts serial data input from the production control microcomputer 100 via the relay boards 606, 607 into parallel data, and adjusts the brightness of each lamp. Supply to LED.

  In the example shown in FIG. 113, the case where tone control is performed by the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of each lamp mounted on the game frame 11 side is shown, but the lamp is mounted on the game board 6 side. You may make it perform gradation control with LED125a-125f of each lamp | ramp, 126a-126f. In this case, the panel-side IC board 601 also has a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that does not adjust the brightness, and a serial-parallel conversion IC that outputs a control signal to the LED of the lamp that adjusts the brightness. Will be installed separately.

  In the example shown in FIG. 112 and FIG. 113, the case where gradation control of the LED of each lamp is performed has been described. For example, a multicolor LED is mounted as the LED of each lamp, and the LED of each lamp is turned on. The color or blinking color may be controlled.

  As described above, in the example shown in FIG. 112 and FIG. 113, the production control microcomputer 100 uses a pulse according to the luminance when the lamp LED emits light as the control signal for controlling the light emission state of the lamp LED. Output a signal with the number changed. Therefore, it is possible to perform gradation control for adjusting the brightness of the LED of the lamp. In this embodiment, the gradation control is performed by outputting a signal with the number of pulses changed. However, other methods may be used as long as a signal with a changed pulse amount is output. Gradation control may be performed. For example, the production control microcomputer 100 may perform gradation control of the LED of the lamp by outputting a signal with a changed pulse width.

  Since the LED of the lamp that does not adjust the brightness has only the ON or OFF state during one control unit time, in the example shown in FIG. 113, the serial-parallel that outputs the control signal to the LED of the lamp that adjusts the brightness. By making the conversion IC different from the serial-parallel conversion IC that outputs a control signal to the LED of the lamp that does not adjust the brightness, the number of times of data transfer to the LED of the lamp that does not adjust the brightness can be reduced.

  In the above embodiment, the production control microcomputer 100 ends the initialization notification when a predetermined period has elapsed (see steps S901 to S905), but ends the initialization notification at another timing. May be. For example, the initialization notification is ended when the decorative symbol variable display is started for the first time after the initialization notification is started, or the abnormal winning notification designation command is received before the decorative symbol variable display is started. Sometimes the initialization notification may be terminated. Alternatively, the initialization notification may be terminated when the customer waiting demonstration designation command is received or when the first effect control command other than the customer waiting demonstration designation command is received after the initialization notification is started. That is, it is preferable that the initialization notification is continued only for a period sufficient for the game store clerk or the like to recognize the initialization notification.

  Further, in this embodiment, the effect control means receives the variation pattern command, but when the display result specifying command cannot be received, the variation pattern command that can be used for both the normal big hit and the probable big hit. If it is determined that a change pattern command other than the change pattern command that can be used for both the normal big hit and the probable big hit is received is determined. Since the stop symbol is determined to be a combination of decorative symbols corresponding to the received variation pattern, even if the display result specifying command cannot be received due to noise or the like, the variable display device 9 can notify that a big hit will occur. Furthermore, immediately after receiving the variation pattern command, when it is determined that an effect control command other than the display result specifying command has been received, the above control based on the received variation pattern command may be performed. In other words, the effect control means determines that the regular command has not been received (for example, the display result specifying command cannot be received) or determines that the non-normal command has been received (for example, the display result subsequent to the variation pattern command). When an effect control command other than the specific command is received), it is preferable to execute effect control (for example, determine a stop symbol of a decorative symbol) based on the received regular command. With such a configuration, it is possible to prevent a player from being disadvantaged due to non-reception of a regular command or reception of a non-regular command.

  The same control may be performed for other effect control commands. For example, when a jackpot start designation command that can identify the start of a specific gaming state is received, if it does not match the display result identification command that has already been received (for example, a display result 2 designation command indicating a normal jackpot is a display result identification When it is stored in the command storage area, when the jackpot start 3 designation command indicating the probability variation jackpot is received, the production control based on the jackpot start designation command (for example, the effect device notifies the probability variation jackpot) ) Or when a jackpot end designation command that can identify the end of a specific gaming state is received, if it does not match the jackpot start designation command that has already been received (for example, a jackpot start 1 designation command indicating a normal jackpot) After receiving a jackpot end designation 2 command indicating a probabilistic jackpot) Effect control (e.g., the background of the variable display device 9 on the background corresponding to the probability variation state) based on the de to run. In the case of such a configuration, it is possible to prevent the control of the effect control means from being confused as much as possible with the control of the game control means.

Embodiment 2. FIG.
In the first embodiment, the addressed lamp control signal is output to the serial-parallel conversion ICs 610 to 618, whereby the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the respective lamps. , 82a to 82f, 83, 84a to 84f have been described, but a plurality of serial-parallel conversion ICs are connected in series with the same system wiring, and all lamps connected with the same system wiring are connected. You may make it output the data of fixed length containing the lamp control signal for controlling. Hereinafter, by outputting data of a fixed length including a lamp control signal for controlling all the lamps connected by the same system wiring, the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a of each lamp are output. A second embodiment for controlling? 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f will be described.

  In the present embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from the first embodiment will be mainly described.

  FIG. 114 is a block diagram illustrating a circuit configuration example of the relay board 77 and the effect control board 80 in the second embodiment. In the example shown in FIG. 114, only the effect control board 80 is provided for effect control, but a lamp driver board and an audio output board may be provided. In this case, the lamp driver board and the sound output board are not equipped with a microcomputer, but may be equipped with a microcomputer.

  The effect control board 80 includes an effect control CPU 101, a RAM (not shown), a serial output circuit 353, a serial input circuit 354, a latch signal output unit 355, a clock signal output unit 356, and an input capture signal output unit 357. A control microcomputer 100 is mounted. The RAM may be externally attached. In the effect control board 80, the effect control CPU 101 operates in accordance with a program stored in a built-in or external ROM (not shown), and receives an effect control command via the serial input circuit 102 and the input port 103. In this case, the serial input circuit 102 converts the effect control command received as the serial data method into parallel data and outputs the parallel data. Further, the effect control CPU 101 causes the VDP (video display processor) 109 to perform display control of the variable display device 9 based on the effect control command.

  The effect control CPU 101 outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  In this embodiment, as will be described later, among the serial-parallel conversion ICs 610 to 613 provided on the game frame 11 side, four ICs 610 to 613 are connected in series by wires of the same system. When controlling the top frame lamp, the left frame lamp, and the right frame lamp, the effect control CPU 101 includes fixed lamp control signals for all the serial-parallel conversion ICs 610 to 613 connected by the same system wiring. The length data (control signal string) is output via the serial output circuit 353 as a serial data system. Then, when the production control CPU 101 finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 outputs a latch signal for causing the serial-parallel conversion ICs 610 to 613 to capture the lamp control signal. .

  In this embodiment, as will be described later, serial-parallel conversion ICs 616 to 618 provided on the game board 6 side are connected in series by wires of the same system. When controlling the center decoration lamp and the stage lamp, the effect control CPU 101 has fixed length data including lamp control signals for all the serial-parallel conversion ICs 616 to 618 connected by the same system wiring. (Control signal sequence) is output as a serial data system via the serial output circuit 353. Then, when the production control CPU 101 finishes outputting the fixed-length control signal sequence, it causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion ICs 616 to 618 to capture the lamp control signal. .

  Of the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side, the IC 614 and the IC 615 are connected by a single wiring. When controlling the pan lamp or the operation button lamp, the production control CPU 101 sends a lamp control signal for the serial-parallel conversion IC 614 connected by the single wiring to the serial data system via the serial output circuit 353. Output as. Then, when output of the lamp control signal is completed, the effect control CPU 101 causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 614 to capture the lamp control signal. When controlling the lower pan lamp, the effect control CPU 101 outputs a lamp control signal for the serial-parallel conversion IC 615 connected by the single wiring as a serial data system via the serial output circuit 353. To do. When the effect control CPU 101 finishes outputting the lamp control signal, it causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 615 to capture the lamp control signal.

  FIG. 115 is a block diagram illustrating a configuration example of the effect control board 80, the relay boards 606 and 607, the board-side IC board 601, and the frame-side IC boards 602, 603, 604, 605A, and 605B according to the second embodiment. . The effect control microcomputer 100 of the effect control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. In addition, the production control microcomputer 100 outputs a latch signal to the relay board 606 at the timing when the serial data has been output. The relay board 606 supplies serial data, a clock signal, and a latch signal input from the effect control microcomputer 100 to the board side IC board 601. The relay board 606 also supplies serial data, a clock signal, and a latch signal to the frame side IC boards 602, 603, 604, 605A, and 605B via the relay board 607.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 616. As shown in FIG. 115, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC board 601 are connected in series by the same system wiring. The connection by the same system wiring means that a plurality of serial-parallel conversion ICs are connected in series by a so-called bead connecting wiring. For example, each serial-parallel conversion IC 616 to 618 has serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 616 to the other serial-parallel conversion ICs 618 and 617 mounted on the board side IC substrate 601. In this embodiment, as will be described later, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC (see FIG. 116), serial data may be transferred to the serial-parallel conversion ICs 616 to 618 in order. The serial-parallel conversion ICs 616 to 618 latch the serial data at the timing when the latch signal is input, convert the latched serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. To do. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 618 and the input IC 621.

  The relay board 607 supplies serial data, a clock signal and a latch signal input from the effect control microcomputer 100 via the relay board 606 to the frame side IC board 604, the frame side IC board 605A and the frame side IC board 605B. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 613. As shown in FIG. 115, the serial-parallel conversion ICs 610 to 613 mounted on the frame side IC substrates 602 to 604 are connected in series by the same system wiring. For example, in each of the serial-parallel conversion ICs 610 to 613, serial data signal lines are connected in a daisy chain type (connected by so-called daisy-chain wiring). Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 613 to the other serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrates 602 and 603. In this embodiment, as will be described later, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC (see FIG. 116), serial data may be transferred to the serial-parallel conversion ICs 610 to 613 in order. Each of the serial-parallel conversion ICs 610 to 613 latches the serial data at the timing when the latch signal is inputted, converts the latched inputted serial data into parallel data, and LED of each lamp provided in the game frame 11 To supply.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 604 and input to the serial-parallel conversion IC 613 and also input to the frame side IC substrate 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to the serial-parallel conversion ICs 610 and 611, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 612.

  The serial data input to the frame side IC substrate 605A is input to the serial-parallel conversion IC 614. Each serial-parallel conversion IC 614 latches the serial data at the timing when the latch signal is input, converts the input serial data thus latched into parallel data, and provides an upper plate lamp and an operation button provided in the game frame 11. It supplies to LED82a-82f and 83 of a lamp | ramp. The clock signal input to the frame side IC substrate 605A is branched on the frame side IC substrate 605A and input to the serial-parallel conversion IC 614 and the input IC 620.

  The serial data input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615. Each serial-parallel conversion IC 615 latches the serial data at the timing when the latch signal is inputted, converts the latched inputted serial data into parallel data, and lower plate lamp LEDs 84 a to 84 provided in the game frame 11. 84f. The clock signal input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615.

  Next, the configuration of the serial-parallel conversion IC in this embodiment will be described. FIG. 116 is a block diagram showing a configuration of each serial-parallel conversion IC in the second embodiment. In addition, in FIG. 116, although the structure of each serial-parallel conversion IC610-613 provided in the game frame 11 side is shown as an example, each serial-parallel conversion IC616-618 provided in the game board 6 side, The configuration of another serial-parallel conversion IC 5615 provided on the game frame 11 side is also the same.

  As shown in FIG. 116, each serial-parallel conversion IC 610-613 includes a data latch unit 681, a shift register 682 and a data buffer 683. Also, as shown in FIG. 116, the serial-parallel conversion ICs 610 to 613 are connected in series with the same system wiring in the order of IC613, IC610, IC611, and IC612.

  The data latch unit 681 is configured by, for example, a latch circuit. When serial data is input, the data latch unit 681 latches the input data bit by bit at a predetermined cycle, for example, the rising timing of the clock signal pulse, and outputs the latched data to the shift register 682 . The shift register 682 sequentially stores unit data, for example, data input bit by bit from the data latch unit 681. The shift register 682 shifts the stored data bit by bit at the rising timing of the clock signal pulse. By shifting the stored data one bit at a time, the shift register 682 is in a state where data is stored in all 8 bits. Further, when input data and a clock signal are input, the data of the last bit of the shift register 682 is changed to a subsequent stage of the serial-parallel conversion IC (hereinafter referred to as the lower side (the input side of the serial-parallel conversion IC is referred to as the upper side). In this case, the data is input to the data latch unit 681 of the serial-parallel conversion IC. For example, in the example shown in FIG. 116, the last bit data of the shift register 682 of the IC 613 is input to the data latch unit 681 of the lower-order IC 610, and the last bit data of the shift register 682 of the IC 610 is changed to the lower-order IC 611. The data of the last bit of the shift register 682 of the IC 611 is input to the data latch unit 681 of the lower-order IC 612. By doing so, serial data output from the production control microcomputer 100 is transferred in the order of IC613, IC610, IC611, and IC612.

  In this embodiment, the production control microcomputer 100 outputs a control signal sequence including all lamp control signals for the four serial-parallel ICs 610 to 613 as a serial data system. In this case, the production control microcomputer 100 starts from the lamp control signal for the lower-order IC (that is, the lamp control signal for the IC 613, the lamp control signal for the IC 611, the lamp control signal for the IC 610, and the lamp for the IC 613). A control signal sequence including (in order of control signals) is output. As described above, when data is transferred in the order of IC 613, IC 610, IC 611, and IC 612, when the output of a series of control signal sequences is completed by the production control microcomputer 100, the shift register of the IC 612 The lamp control signal for IC612 is stored in 682, the lamp control signal for IC611 is stored in the shift register 682 of IC611, the lamp control signal for IC610 is stored in the shift register 682 of IC610, and the shift register 682 of IC613 is stored. The lamp control signal for the IC 613 is stored. Then, at the timing when the latch signal is output by the production control microcomputer 100, the data is taken in by each of the serial-parallel conversion ICs 610 to 613.

  The data buffer 683 is constituted by, for example, a latch register. When a latch signal from the effect control microcomputer 100 is input, the data buffer 683 takes in and latches data stored in the shift register 682. The data buffer 683 supplies the fetched data to the LEDs of the respective lamps as parallel data (Q0 to Q7). Note that the timing (predetermined timing) at which the latch signal is input is a timing at which the latch signal is shifted over a longer span than the time required to send data to the lower-level IC.

  Next, a control signal sequence including a lamp control signal set in a predetermined data storage area according to error lamp control execution data will be described. FIG. 117 is an explanatory diagram illustrating an example of a control signal sequence including a lamp control signal output as a serial data system in the notification control process according to the second embodiment. As shown in FIG. 117, in this embodiment, two patterns of error lamp control execution data (pattern A and pattern B) are used for each error type. In this embodiment, the blinking display of the lamp is controlled by switching and using the error lamp control execution data for the pattern A and the pattern B. Further, the production control microcomputer 100 associates a control signal sequence (or lamp control signal) including the lamp control signal shown in FIG. It is stored in the control signal storage area. Then, the effect control CPU 101 extracts a control signal sequence (or lamp control signal) including a lamp control signal from a predetermined lamp control signal storage area based on the error lamp control execution data, and outputs it to the serial output circuit 353. To do.

  In the case of RAM clear notification, as shown in FIG. 117, a control signal including a lamp control signal whose control data body corresponding to each serial-parallel conversion IC 610 to 613 provided on the game frame 11 side is “00111111”. A column is sent. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281a of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side 281l, 282a to 282f, 283a to 283f are turned on. In addition, when the RAM clear notification is made, a control signal sequence including the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B, so that error notification is being executed. The LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side are continuously turned on.

  When notifying the door opening error, as shown in FIG. 117, first, it corresponds to each serial-parallel conversion IC 610-613 provided on the game frame 11 side based on the error lamp control execution data of pattern A. A control signal sequence including a lamp control signal whose control data body is “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281l and 282a to 282f of all the lamps (excluding the dish lamp) provided on the game frame 11 side. , 283a to 283f are turned on. In addition, when the process data is switched, the lamp control whose control data body corresponding to each serial-parallel conversion IC 610 to 613 provided on the game frame 11 side is “00000000” based on the error lamp control execution data of pattern B A control signal sequence including the signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 0 is output, and the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are turned off. Is done. When notifying the door opening error by repeating such control, the LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps provided on the game frame 11 side are blinked at predetermined time intervals. Control is performed.

  When notifying a ball break error, as shown in FIG. 117, first, based on the error lamp control execution data of pattern A, the control data body corresponding to each serial-parallel conversion IC 610, 611 is “00111111”. A control signal sequence including the lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 1 is output, and the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side are turned on. At the time of process data switching, a control signal sequence including a lamp control signal whose control data body corresponding to each serial-parallel conversion IC 610, 611 is “00000000” is transmitted based on the error lamp control execution data of pattern B. Is done. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the ceiling lamp are all 0 is output, and the LEDs 281a to 281l of the ceiling lamps provided on the game frame 11 side are turned off. When such a control is repeatedly performed to notify a ball-out error, control is performed such that only the LEDs 281a to 281l of the top frame lamps provided on the game frame 11 side blink at predetermined time intervals.

  When notifying the ball break error, as shown in FIG. 117, a lamp control signal whose control data body is “00111111” is transmitted to the serial-parallel conversion IC 614 whose address is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 82a to 82f of the upper pan lamp are all 1 is output, and the LEDs 82a to 82f of the upper pan lamp are turned on. In addition, when a ball break error is notified, since the same lamp control signal is output to the serial-parallel conversion IC 614 when the error lamp control execution data is pattern A and pattern B, an error occurs. During the notification, the upper plate lamp LEDs 82a to 82f are continuously lit.

  When notifying of a full tank error, as shown in FIG. 117, first, based on the error lamp control execution data of pattern A, the serial-parallel conversion IC 615 sends a lamp control signal whose control data body is “00111111”. Is sent. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 84a to 84f of the lower pan lamps are all 1 is output, and the LEDs 84a to 84f of the lower pan lamps are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 615 based on the error lamp control execution data of pattern B. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the lower pan lamps are all 0 is output, and the LEDs 84a to 84f of the lower pan lamps are turned off. By repeating such control, when a full tank error is notified, control is performed such that only the LEDs 84a to 84f of the lower pan lamps blink at a predetermined time interval.

  When notifying the payout error, as shown in FIG. 117, first, the control data body corresponding to the serial-parallel conversion IC 610 is “00111111” based on the error lamp control execution data of pattern A. -A control signal sequence including a lamp control signal whose control data body corresponding to the parallel conversion IC 611 is "00000000" is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to some of the LEDs of the ceiling lamp are all 1 is output, and only some of the LEDs 281a to 281f of the ceiling lamp provided on the game frame 11 side are lit. Is done. At the time of process data switching, the control data body corresponding to the serial-parallel conversion IC 610 is “00000000” and the control data body corresponding to the serial-parallel conversion IC 611 is based on the error lamp control execution data of pattern B. A control signal sequence including a lamp control signal “00111111” is transmitted. That is, a lamp control signal in which the logical values of all the bits corresponding to the other part of the ceiling lamps are all 1 is output, and the other part of the ceiling lamps 281g to 281g˜ Only 281l is lit. When such a control is repeatedly performed and a payout error is notified, the LED 281a to 281f and the LEDs 281g to 281l of the top frame lamp provided on the game frame 11 side are alternately blinked at predetermined time intervals. Done.

  When notifying the payout error, as shown in FIG. 117, first, based on the error lamp control execution data for pattern A, the serial-parallel conversion IC 614 whose address is “04” contains the control data body. A lamp control signal “00111111” is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 82a to 82f of the upper pan lamp are all 1 is output, and the LEDs 82a to 82f of the upper pan lamp are turned on. At the time of process data switching, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 614 whose address is “04” based on the error lamp control execution data of pattern B. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs 82a to 82f of the upper pan lamp are all 0 is output, and the LEDs 82a to 82f of the upper pan lamp are turned off. By repeating such control, when notifying the payout error, control is performed such that the LEDs 82a to 82f of the upper plate lamp blink at predetermined time intervals.

  When notifying the random number circuit error, as shown in FIG. 117, the control data body corresponding to each of the serial-parallel conversion ICs 610 to 613 provided on the game frame 11 side includes the lamp control signal “00111111”. A control signal sequence is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the LEDs 281a to 281a of all the lamps (excluding the upper plate lamp and the lower plate lamp) provided on the game frame 11 side 281l, 282a to 282f, 283a to 283f are turned on. In addition, when a random number circuit error is notified, the same lamp control signal is output when the error lamp control execution data is pattern A and pattern B. The LEDs 281a to 281l, 282a to 282f, and 283a to 283f of all the lamps (excluding the dish lamp) provided on the 11 side are continuously turned on.

  When notifying a random circuit error, as shown in FIG. 117, a control signal including a lamp control signal whose control data body corresponding to each serial-parallel conversion IC 614 provided on the game frame 11 side is “00111111”. A column is sent. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of each lamp are all 1 is output, and the upper lamps LEDs 82a to 82f are turned on. In addition, when notifying the random number circuit error, since the same lamp control signal is output when the error lamp control execution data is pattern A and when pattern B is used, The LEDs 82a to 82f of the lamp are continuously turned on.

  When notifying an abnormal winning error, as shown in FIG. 117, first, based on the error lamp control execution data of pattern A, the control data body is “00110011” in the serial-parallel conversion IC 614 whose address is “04”. Lamp control signal is transmitted. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs on the left and right sides of the upper plate lamp are all 1 is output, and the LEDs 82a and 82b on the left side and the LEDs 82e and 82f on the right side of the upper plate lamp are Illuminated. As described above, in the control signal output to the serial-parallel conversion IC 614, 1 of the first bit is an input signal to the LED 82a on the left side, and 1 of the second bit is an input signal to the LED 82b on the left side. The fifth bit 1 corresponds to the input signal to the right side LED 82e, and the sixth bit 1 corresponds to the input signal to the right side LED 82f.

  At the time of process data switching, based on the error lamp control execution data for pattern B, a lamp control signal whose control data body is “00000000” is transmitted to the serial-parallel conversion IC 614 whose address is “04”. That is, a lamp control signal in which the logical values of the bits corresponding to the LEDs of the upper plate lamp are all 0 is output, and all the LEDs 82a to 82f of the upper plate lamp are turned off.

  When an abnormal winning error is notified by repeatedly performing the above-described control, the LED 82a, 82b, 82e, and 82f provided on the side surface of the upper lamp are blinked at predetermined time intervals.

  If any game effect (for example, a big hit effect or a decorative pattern change display) is performed when an abnormal winning notification is given, the top frame lamp, the left frame lamp, the right frame lamp, and the The display control of the lower pan lamp is performed. In this case, the lamp control signal corresponding to the abnormal winning notification shown in FIG. 117 is transmitted to the serial-parallel conversion IC 614, and at the same time, the other serial-parallel conversion ICs 610 to 613, 615 also have lamps corresponding to the game effects. A control signal is transmitted.

  Next, a control signal sequence including a motor control signal output when the movable members 151 and 152 are operated in the game effect will be described. FIG. 118 is an explanatory diagram showing an example of a control signal sequence including a motor control signal output as a serial data system in the game effect according to the second embodiment. The control signal sequence including the motor control signal shown in FIG. 118 is executed when, for example, variable display including a notice effect using the movable members 151 and 152 is executed in the decorative symbol variation processing shown in FIG. 89, step S845C. In the serial setting process, it is set in a predetermined data storage area. Further, the production control microcomputer 100 stores a control signal sequence including the motor control signal shown in FIG. 118 in a predetermined control signal storage area provided in advance in the ROM in association with, for example, display control execution data. ing. Then, the production control CPU 101 extracts a control signal sequence including a motor control signal from a predetermined motor control signal storage area based on the display control execution data, and outputs the control signal sequence to the serial output circuit 353.

  As shown in FIG. 118, the control signal sequence including the motor control signal includes each lamp control signal for controlling the center decoration lamp and the stage lamp in accordance with the game effect.

  When the trolley 151 is operated in the forward direction as a movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000001” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 151a for driving the truck 151 is output, and the truck 151 is operated by driving the motor 151a. When the operation of the truck 151 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal whose logical value of the bit corresponding to the forward operation of the motor 151a is 0 is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a.

  When the trolley 151 is operated in the reverse direction as a movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000010” is transmitted. That is, a motor control signal whose bit logical value is 1 corresponding to the reverse operation of the motor 151a for driving the trolley 151 is output, and the trolley 151 is operated by driving the motor 151a. When the operation of the truck 151 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 151a is output, and the operation of the truck 151 is stopped by stopping the driving of the motor 151a.

  When the beam 152 is moved in the forward direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000100” is transmitted. That is, a motor control signal having a logical value of 1 corresponding to the forward operation of the motor 152a for driving the beam 152 is output, and the beam 152 is operated by driving the motor 152a. When the operation of the beam 152 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal whose logical value of the bit corresponding to the forward operation of the motor 152a is 0 is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a.

  When the beam 152 is operated in the reverse direction as the movable member, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00001000” is transmitted. That is, a motor control signal whose bit logical value is 1 corresponding to the reverse operation of the motor 152a for driving the beam 152 is output, and the beam 152 is operated by driving the motor 152a. When the operation of the beam 152 is stopped, a control signal sequence including a motor control signal whose control data body corresponding to the serial-parallel conversion IC 616 is “00000000” is transmitted. That is, a motor control signal having a logical value of 0 corresponding to the reverse operation of the motor 152a is output, and the operation of the beam 152 is stopped by stopping the driving of the motor 152a.

  Next, the serial setting process will be described. FIG. 119 is a flowchart illustrating an example of serial setting processing according to the second embodiment. The serial setting process is performed, for example, when a decorative design is variably displayed in the effect control process (see steps S835C and 845C) or when various errors are notified (steps S632G, S645E, S647E, 651E, 655E, S659E, S663E). , S907, S922, S929).

  In FIG. 119, the processes in steps S950 and S951 are the same as those described in the first embodiment. If there is a change in the display state of each lamp in step S951, the CPU 101 for effect control converts a control signal sequence including a lamp control signal for the serial-parallel conversion IC of the lamp to be controlled for display into a predetermined lamp control signal storage area. (Step S952A). Next, the effect control CPU 101 sets a control signal sequence including the extracted lamp control signal in a predetermined data storage area provided in the RAM (step S953A). Then, a lamp control signal output request flag is set (step S954).

  In FIG. 119, the processes in steps S955 and S956 are the same as those described in the first embodiment. When the movable members 151 and 152 are movable in step S956, the effect control CPU 101 generates a control signal sequence including a motor control signal for the serial-parallel conversion IC of the movable members 151 and 152 to be moved, as a predetermined signal. Extracted from the control signal storage area (step S957A). Next, the effect control CPU 101 sets a control signal sequence including the extracted motor control signal in a predetermined data storage area provided in the RAM (step S958A). Then, a motor control signal output request flag is set (step S959).

  FIG. 120 is an explanatory diagram illustrating a configuration example of a data storage area in which a control signal sequence including a lamp control signal and a motor control signal to be output is set in the second embodiment. In this embodiment, four data storage areas each storing a control signal sequence including a lamp control signal and a motor control signal are prepared. That is, it is connected to the board side output data storage area for storing the control signal sequence output to each serial-parallel conversion IC 616 to 618 provided on the game board 6 side connected by the same system wiring by the same system wiring. A frame-side output data storage area for storing control signal sequences output to the serial-parallel conversion ICs 610 to 613 provided on the gaming frame 11 side, and a serial-parallel conversion IC 614 provided on the gaming frame 11 side. An upper plate side output data storage region for storing the output control signal sequence and a lower plate side output data storage region for storing the control signal sequence output to the serial-parallel conversion IC 615 provided on the game frame 11 side. Is provided.

  For example, when the CPU 101 for effect control notifies the RAM clear notification or the door opening error, the control signal including the lamp control signal corresponding to the RAM clear notification or the door opening error shown in FIG. 117 in step S952A of the serial setting process. Columns are extracted and stored in the frame side output data storage area shown in FIG. Further, for example, when the CPU 101 for effect control notifies a ball break error, a payout error, or a random number circuit error, in step S952A of the serial setting process, the lamp control corresponding to the RAM clear notification or the door opening error shown in FIG. 120 is extracted and stored in the frame side output data storage area shown in FIG. 120, and the lamp control signal corresponding to the serial-parallel conversion IC 614 shown in FIG. 117 is extracted, and the upper plate shown in FIG. Stored in the side output data storage area. Further, for example, when the full control error is notified, the effect control CPU 101 extracts the lamp control signal corresponding to the full error shown in FIG. 117 in step S952A of the serial setting process, and outputs the lower pan side output shown in FIG. Store in the data storage area. Further, for example, when the CPU 101 for effect control notifies the abnormal winning error, in step S952A of the serial setting process, the lamp control signal corresponding to the abnormal winning error shown in FIG. 117 is extracted, and the upper plate shown in FIG. Stored in the side output data storage area. Further, for example, when the movable members 151 and 152 are moved in the game effect, the effect control CPU 101 extracts a control signal sequence including any of the motor control signals shown in FIG. 118 in step S957A of the serial setting process. , And stored in the board output data storage area shown in FIG.

  FIG. 121 is a flowchart illustrating a specific example of the serial input / output process (step S708) according to the second embodiment. In FIG. 121, the processes in steps S970 and S971 are the same as those described in the first embodiment. When the lamp control signal output request flag or the motor control signal output request flag is reset, the presentation control CPU 101 outputs a control signal sequence including the lamp control signal and the motor control signal stored in the data storage area to the serial output circuit 353. (Step S972A). Then, the output control signal sequence including the lamp control signal and the motor control signal is converted into serial data by the serial output circuit 353, and the board side IC board 601 and each frame side IC board are connected via the relay boards 606 and 607. The data is output to 602, 603, 604, 605A and 605B as a serial data system. Next, the production control CPU 101 uses a serial data system for a predetermined time (after the control signal string is output to the serial output circuit 353, the board side IC board 601 and the frame side IC boards 602, 603, 604, 605A, 605B). After the elapse of the time required to complete the output, the latch signal output unit 355 is caused to output a latch signal to each of the frame side IC substrates 602, 603, 604, 605A, 605B (step S972B).

  If the control signal sequence is stored in any one of the four data storage areas shown in FIG. 120, the effect control CPU 101 repeatedly executes the processes of steps S972A and S972B a plurality of times. For example, if the control signal sequence is stored in all four data storage areas shown in FIG. 120, the presentation control CPU 101 first extracts the control signal sequence from the board-side output data storage area and outputs the serial signal. The data is output to the circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the board side IC substrate 601 (see step S972B). Next, the effect control CPU 101 extracts a control signal sequence from the frame-side output data storage area and outputs it to the serial output circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the frame side IC substrates 602 to 604 (see step S972B). Next, the effect control CPU 101 extracts the lamp control signal from the upper dish side output data storage area, and outputs it to the serial output circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the frame side IC substrate 605A (see step S972B). Next, the effect control CPU 101 extracts the lamp control signal from the lower dish side output data storage area and outputs it to the serial output circuit 353 (see step S972A). Then, after a predetermined time has elapsed, the latch signal output unit 355 is caused to output a latch signal to the frame side IC substrate 605B (see step S972B).

  Note that the processes in steps S973 to S976 are the same as those described in the first embodiment.

  As described above, according to this embodiment, similarly to the first embodiment, the LED 82a, 82b, 82e, and 82f of the upper plate lamp are provided on the outer side surface of the hitting ball supply plate (upper plate) 3, The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp provided on the hitting ball supply tray (upper plate) 3 is controlled according to the game state. Therefore, by causing the LED lamps 82a, 82b, 82e, and 82f of the upper plate lamps provided on the outer side surface of the hitting ball supply tray (upper plate) 3 to emit light, it is possible to diversify the production mode in the game effect. The production effect can be improved. Further, since the upper plate lamp LEDs 82a, 82b, 82e, and 82f are provided on the outer side surface of the hitting ball supply tray (upper plate) 3, for example, a plurality of gaming machines are installed in one section of the game store. Even if the player is a player other than the player who is playing with the gaming machine (a player who is playing a game with the adjacent gaming machine or a player who is not yet playing a game in the game store) The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp of the gaming machine can be made visible. Therefore, it is possible to execute an effect that draws attention to a person other than the player who is playing the game on the gaming machine, thereby providing an effect.

  Further, according to this embodiment, as in the first embodiment, the effect control command transmitted by the game control microcomputer 560 is sent to the surplus ball receiving tray (lower plate) 4 by a predetermined amount or more. A command (input port data designation command) indicating that the surplus ball tray (lower pan) 4 is in a full tank state based on the full tank state being stored is included. Further, the production control microcomputer 100 receives the command indicating that the surplus ball tray (lower plate) 4 is full from the game control microcomputer 560, so that the surplus ball tray (lower plate) ) By controlling the light emission state of the LEDs 84 a to 84 f of the lower pan lamps provided in 4, control for notifying the full tank state of the surplus ball pan (lower pan) 4 is executed. Therefore, the production control microcomputer 100 determines the light emission states of the LEDs 84a to 84f of the lower dish lamps provided in the surplus ball receiving tray (lower dish) 4 separately from the game presentation effect devices such as the variable display device 9 and the speaker 27. A full tank condition is notified by controlling. Therefore, the full tank state can be notified without interruption during the game effect (for example, the effect during the big hit). In addition, since the production control microcomputer 100 controls the light emission state of the LEDs 84a to 84f of the lower tray lamps provided in the surplus ball tray (lower tray) 4, the processing load of the game control microcomputer 560 is reduced. Can do.

  Further, according to this embodiment, similar to the first embodiment, the effect control microcomputer 100 is configured such that the LEDs 125a to 125f of the respective lamps are based on the effect control command received from the game control microcomputer 560. Control signals for controlling 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f are output in a serial signal system. The serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B are one system. Connected via wiring. Therefore, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In addition, according to this embodiment, the production control microcomputer 100 has a fixed length including control signal information of all production electrical parts (lamps and motors) connected in series to the same system wiring. This data is output by the serial signal method for each predetermined period of unit data. Therefore, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame-side IC substrates 602, 603, 604, 605A, and 605B are different from each other in advance. Can be eliminated.

  In this embodiment, the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 are connected by the same system wiring, and the serial-to-serial ICs 602 to 604 mounted on the frame side IC substrate 602 to 604 are connected. The case where the parallel conversion ICs 610 to 613 are connected by the same system wiring has been described. , 605B may be connected to all the serial-parallel conversion ICs 610 to 615 by the same system wiring.

  FIG. 122 is a block diagram illustrating another configuration example of the effect control board 80, the relay boards 606 and 607, the board side IC board 601, and the frame side IC boards 602, 603, 604, 605A, and 605B according to the second embodiment. It is. In FIG. 122, all of the serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, and 605B are all included. Are connected by wiring of the same system.

  In the example shown in FIG. 122, the serial data output from the production control microcomputer 100 is first input to the serial-parallel conversion IC 616 mounted on the board-side IC board 601 via the relay board 606. The input serial data is sequentially transferred from the serial-parallel conversion IC 616 to the other serial-parallel conversion ICs 618 and 617 mounted on the board side IC substrate 601.

  Further, the lowest-order serial-parallel conversion IC 617 mounted on the board-side IC board 601 further outputs serial data to the relay board 606. The serial data is input from the relay board 606 to the serial-parallel conversion IC 613 mounted on the frame side IC board 604 via the relay board 607. The input serial data is transferred from the serial-parallel conversion IC 613 to the other serial-parallel conversion ICs 610, 611, 612, 614, 615 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B. It is transferred in order.

Embodiment 3 FIG.
In the first embodiment, all effect means (variable display device 9, sound output device (speaker) 27 and LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, and 84a to 84f) have been described, but each effect means may be controlled using separate control boards. Hereinafter, a sound / lamp control board for controlling the sound output device 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f of each lamp, and variable A third embodiment including a symbol control board for controlling the display device 9 will be described.

  In the present embodiment, detailed description of the parts having the same configuration and processing as those of the first embodiment will be omitted, and parts different from the first embodiment will be mainly described.

  FIG. 123 is a block diagram illustrating a circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the third embodiment. In this embodiment, the sound / lamp control board 80b controls sound output of the sound output device 27, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f of each lamp. Display control of 83, 84a to 84f is performed. The symbol control board 80a performs display control of the variable display device 9. In this embodiment, “effect control” means display control of the variable display device 9, sound output control of the speaker 27, LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f of each lamp, By performing display control of 283a to 283f, 82a to 82f, 83, 84a to 84f, it means performing an effect such as a game effect. In this embodiment, the effect control means includes a symbol control microcomputer 100a that performs display control of the variable display device 9, sound output control of the speaker 27, and LEDs 125a to 125f, 126a to 126f, and 281a of each lamp. ˜281 l, 282 a to 282 f, 283 a to 283 f, 82 a to 82 f, 83, 84 a to 84 f are realized by the sound / lamp control microcomputer 100 b.

  The sound / lamp control board 80b includes a sound / lamp control microcomputer 100b including a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a clock signal output unit 356, and an input capture signal output unit 357. It is equipped with. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  Further, the sound / lamp control microcomputer 100 b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  Further, the clock signal output unit 356 outputs a clock signal to the relay board 606. The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 610 to 615 and the input IC 620 mounted on the frame side IC boards 602, 603, 604, 605A, and 605B via the relay boards 606 and 607. The The clock signal from the clock signal output unit 356 is supplied to the serial-parallel conversion ICs 616 to 618 and the input IC 621 mounted on the board side IC substrate 601 via the relay substrate 606. Therefore, in this embodiment, a common clock signal is supplied to each of the serial-parallel conversion ICs 610 to 618 and the input ICs 620 and 621.

  Also, the input capture signal output unit 357 receives input to the board side IC board 601 or the frame side IC boards 602, 603, 604, 605A, and 605B via the relay boards 606 and 607 in accordance with the instruction of the effect control CPU 101. Output a latch signal. The input IC 620 mounted on the frame side IC substrate 605 latches the detection signals of the operation buttons 81a to 81e when an input capture signal from the sound / lamp control microcomputer 100b is input, and relays the relay substrate 606 as a serial data system. , 607 to the sound / lamp control microcomputer 100b. Further, when the input IC 621 mounted on the board side IC board 601 receives an input input signal from the sound / lamp control microcomputer 100b, the input IC 621 latches the detection signals of the position sensors 151b and 152b, and uses the serial data method. The sound is output to the sound / lamp control microcomputer 100b via the relay board 606.

  Further, the sound / lamp control microcomputer 100b outputs sound number data to the speech synthesis IC 173. The voice synthesizing IC 173 generates a voice or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit 175. The amplifier circuit 175 outputs an audio signal obtained by amplifying the output level of the speech synthesis IC 173 to a level corresponding to the volume set by the volume 176 to the speaker 27. The voice data ROM 174 stores control data corresponding to the sound number data. The control data corresponding to the sound number data is a collection of data indicating the sound effect or sound output mode in a time series in a predetermined period (for example, a decorative symbol variation period).

  The signal for driving the lamp and the sound number data are transmitted bidirectionally (a response signal is transmitted from the signal receiving side to the transmitting side) between the sound / lamp controlling microcomputer 100b, the lamp driver 352, and the voice synthesis IC 173. Communication).

  The symbol control board 80a is equipped with a symbol control microcomputer 100a including a symbol control CPU 101a and RAM. The RAM may be externally attached. In the symbol control board 80a, the symbol control microcomputer 100a operates in accordance with a program stored in a built-in or external ROM (not shown). Further, the symbol control microcomputer 100a performs display control of the variable display device 9 using the LCD on the VDP (video display processor) 109 based on the effect control command received from the main board 31 via the relay board 77. Let it be done.

  The symbol control microcomputer 100a reads necessary data from a character ROM (not shown) in accordance with the effect control command received from the game control microcomputer 560. The character ROM stores character image data frequently used among images displayed on the variable display device 9, specifically, a person, a character, a figure, a symbol, or the like (including decorative designs) in advance. Is. The symbol control microcomputer 100 a outputs the data read from the character ROM to the VDP 109. The VDP 109 executes display control of the variable display device 9 based on data input from the symbol control microcomputer 100a.

  In this embodiment, the VDP 109 that performs display control of the variable display device 9 is mounted on the symbol control board 80a. The VDP 109 has an address space independent of the symbol control microcomputer 100a, and maps a VRAM therein. The VRAM is a buffer memory for expanding image data generated by the VDP. Then, the VDP 109 outputs the image data in the VRAM to the variable display device 9.

  As a signal direction regulating means, a signal inputted from the main board 31 is allowed to pass through the relay board 77 only in a direction toward the symbol control board 80a (a signal is not passed in the direction from the symbol control board 80a to the relay board 77). The unidirectional circuit is installed. For example, a diode or a transistor is used as the unidirectional circuit. FIG. 123 illustrates a diode.

  Further, the symbol control microcomputer 100 a transmits (transfers) an effect control command (a variation pattern command or a display result designation command) from the main board 31 to the sound / lamp control board 80 b via the input / output port 104.

  FIG. 124 shows the configuration of the symbol control board 80a, sound / lamp control board 80b, relay boards 606 and 607, board side IC board 601, frame side IC boards 602, 603, 604, 605A, and 605B in the third embodiment. It is a block diagram which shows an example. The sound / lamp control microcomputer 100b of the sound / lamp control board 80b (specifically, the sound / lamp control CPU 101b) outputs a clock signal to the relay board 606 together with serial data as a control signal. In addition, an input capture signal for causing the input ICs 620 and 621 to latch the input signal is output to the relay board 606.

  The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the serial-parallel conversion ICs 616 to 618 mounted on the board side IC board 601. The serial-parallel conversion ICs 616 to 618 convert the input serial data into parallel data, and the LEDs 125 a to 125 f and 126 a to 126 f of the lamps provided on the game board 6 and the motors 151 a and 151 b of the movable members. To supply.

  The serial data line 300 and the clock signal line 301 connected to each of the serial-parallel conversion ICs 616 to 618 are connected in a bus form on the board side IC substrate 601.

  In addition, an input IC 621 for inputting a detection signal of a position sensor of each movable member provided on the game board 6 is mounted on the board side IC board 601. In this embodiment, the input IC 621 and the sound / lamp control microcomputer 100b mounted on the board-side IC board 601 are connected to the input signal line, the clock signal line 301, and the input capture signal line 303 via the relay board 606. Are connected, and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 621 via the relay board 606 at a predetermined timing. Then, the input IC 621 latches the detection signal of each position sensor based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay board 606. In this case, the input IC 621 converts the detection signal input in parallel from each position sensor into serial data and outputs it.

  As shown in FIG. 124, serial data and clock signals input to the relay board 607 via the relay board 606 are converted into serial-parallel conversions mounted on the frame side IC boards 602, 603, 604, 605A, and 605B. Supplied to the ICs 610 to 615. And each serial-parallel conversion IC610-615 converts the input serial data into parallel data, LED281a-281l of each lamp provided in the game frame 11, 282a-282f, 283a-283f, 82a-82f, 83, 84a to 84f.

  The serial data lines and clock signal lines connected to the serial-parallel conversion ICs 610 to 613 are connected in a bus format on the frame side IC substrates 602 to 604. In this embodiment, as shown in FIG. 124, first, the serial-parallel conversion IC 613 of the frame-side IC board 604 is input, and the serial-parallel conversion IC 613 and the serial-parallel conversion IC 610 and the serial-parallel of the frame-side IC board 602 are input. The signals are input in the order of the parallel conversion IC 611, and further input from the serial-parallel conversion IC 611 to the serial-parallel conversion IC 612 of the frame side IC substrate 603. The serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion IC 614 are directly connected from the relay board 607. The serial data line 300 and the clock signal line 301 connected to the serial-parallel conversion IC 615 are directly connected from the relay substrate 607.

  In addition, an input IC 620 for inputting detection signals of the operation buttons 81a to 81e provided on the game frame 11 is mounted on the frame side IC board 605A. In this embodiment, the input IC 620 and the sound / lamp control microcomputer 100b mounted on the frame side IC substrate 605A are connected to the input signal line 302, the clock signal line 301, and the input capture signal line via the relay substrate 607. 303 is connected, and the sound / lamp control microcomputer 100b outputs an input capture signal to the input IC 620 via the relay boards 606 and 607 at a predetermined timing. In this case, the sound / lamp control microcomputer 100b outputs the input capture signal to the input IC 620 at a timing different from the timing of outputting the input capture signal to the input IC 621. Then, the input IC 620 latches the detection signals from the operation buttons 81a to 81e based on the input capture signal (latch signal), and outputs it to the sound / lamp control microcomputer 100b via the relay boards 606 and 607. In this case, the input IC 620 converts detection signals input in parallel from the operation buttons 81a to 81e into serial data and outputs the serial data.

  In this embodiment, each serial-parallel conversion IC 610 to 618 is assigned an address in advance, and the sound / lamp control microcomputer 100b receives the address when outputting the control signal converted into serial data. The added serial data is output. When serial data is input, each serial-parallel conversion IC 610-618 checks whether the address added to the input serial data matches its own address, and if it matches, converts it to parallel data. To the LED of each lamp. If the addresses do not match, the LED of each lamp is not supplied.

  Next, the operation of the symbol control microcomputer 100a will be described. FIG. 125 is a flowchart showing main processing executed by the symbol controlling microcomputer 100a according to the third embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the symbol controlling microcomputer 100a starts main processing. In the main process, the symbol control microcomputer 100a first performs an initialization process for clearing the RAM area, setting various initial values, and initializing a timer for determining the activation control activation interval ( Step S781). Thereafter, the symbol controlling microcomputer 100a shifts to a loop process for confirming monitoring of the timer interrupt flag (step S782). When a timer interrupt occurs, the symbol control microcomputer 100a sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the symbol control microcomputer 100a clears the flag (step S783) and executes the following symbol control process.

  A timer interrupt takes every 33 ms, for example. That is, the symbol control process is activated every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific symbol control process is executed in the main process. However, the symbol control process may be executed in the timer interrupt process.

  In the symbol control process, the symbol control microcomputer 100a first analyzes the received effect control command (command analysis process: step S784). In this case, the symbol control microcomputer 100a performs the same processing as the command analysis processing shown in the first embodiment (command analysis processing executed by the effect control microcomputer 100 shown in FIGS. 78 to 81). The effect control command is analyzed according to

  Next, the symbol control microcomputer 100a performs symbol control process processing (step S785). In this case, the symbol control microcomputer 100a performs processing according to processing similar to the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 83) ( However, only the part relating to the control of the variable display device 9 is executed.

  Then, the symbol controlling microcomputer 100a executes a process of updating the random number counter (step S786). Further, notification control process processing for performing notification using the variable display device 9 is executed (step S787). In this case, the symbol control microcomputer 100a executes the same processing as the notification processing using the variable display device 9 in the notification control process shown in the first embodiment.

  Further, the symbol control microcomputer 100a performs a process of sending (transferring) the effect control command received from the main board 31 to the sound / lamp control board 80b (command control process: step S788). Thereafter, the process returns to the process of checking the timer interrupt flag in step S782.

  In the command control process of step S788, the symbol control microcomputer 100a may transmit the effect control command received from the game control microcomputer 560 as it is to the sound / lamp control microcomputer 100b, or the received effect. The control command may be processed and transmitted to the sound / lamp control microcomputer 100b. For example, the symbol control microcomputer 100a may recreate the variation pattern command and the display result command into one effect control command, and transmit it to the sound / lamp control microcomputer 100b. In this case, the symbol control microcomputer 100a newly adds an effect control command that can specify only the type and effect time of the effect to be executed during the change of the decorative symbol, based on the change pattern command and the display result command, for example. It is generated and transmitted to the sound / lamp control microcomputer 100b. With this configuration, the number of commands transmitted from the symbol control microcomputer 100a to the sound / lamp control microcomputer 100b can be reduced.

  Next, the operation of the sound / lamp control microcomputer 100b will be described. FIG. 126 is a flowchart showing a main process executed by the sound / lamp control microcomputer 100b according to the third embodiment. When power supply to the gaming machine is started and the reset signal becomes high level, the sound / lamp control microcomputer 100b starts main processing. In the main process, the sound / lamp control microcomputer 100b first performs an initialization process for clearing the RAM area, setting various initial values, initializing a timer for determining the activation control activation interval, and the like. This is performed (step S881). Thereafter, the sound / lamp control microcomputer 100b proceeds to a loop process for monitoring the timer interrupt flag (step S882). When a timer interrupt occurs, the sound / lamp control microcomputer 100b sets a timer interrupt flag in the timer interrupt process. If the timer interrupt flag is set in the main process, the sound / lamp control microcomputer 100b clears the flag (step S883) and executes the following sound / lamp control process.

  A timer interrupt takes every 33 ms, for example. That is, the sound / lamp control process is activated every 33 ms, for example. In this embodiment, only the flag is set in the timer interrupt process, and the specific sound / lamp control process is executed in the main process, but the sound / lamp control process is executed in the timer interrupt process. Also good.

  In the sound / lamp control process, the sound / lamp control microcomputer 100b first analyzes the effect control command received from the symbol control microcomputer 100a (command analysis process: step S884). In this case, the sound / lamp control microcomputer 100b is the same as the command analysis process (command analysis process executed by the effect control microcomputer 100 shown in FIGS. 78 to 81) shown in the first embodiment. The effect control command is analyzed in accordance with the process.

  Next, the sound / lamp control microcomputer 100b performs a sound / lamp control process (step S885). In this case, the sound / lamp control microcomputer 100b follows the same process as the effect control process shown in the first embodiment (the effect control process executed by the effect control microcomputer 100 shown in FIG. 83). The processing (however, only the portion relating to the control of the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f of the lamps) is executed.

  Then, the sound / lamp control microcomputer 100b executes a process of updating the random number counter (step S886). Further, a notification control process for performing notification using the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f of the lamps is executed. (Step S887). In this case, the sound / lamp control microcomputer 100b includes the speaker 27 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f of the lamp in the notification control process shown in the first embodiment. The same processing as the notification processing using 283a to 283f, 82a to 82f, 83, 84a to 84f is executed. Further, the data set in the command analysis process, sound / lamp control process process, and notification control process process is output to the serial output circuit 353, or the data received from each input IC 620, 621 is read from the serial input circuit 354 Output processing is executed (step S888). Thereafter, the process proceeds to step S882.

  As described above, according to this embodiment, similarly to the first embodiment, the LED 82a, 82b, 82e, and 82f of the upper plate lamp are provided on the outer side surface of the hitting ball supply plate (upper plate) 3, The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp provided on the hitting ball supply tray (upper plate) 3 is controlled according to the game state. Therefore, by causing the LED lamps 82a, 82b, 82e, and 82f of the upper plate lamps provided on the outer side surface of the hitting ball supply tray (upper plate) 3 to emit light, it is possible to diversify the production mode in the game effect. The production effect can be improved. Further, since the upper plate lamp LEDs 82a, 82b, 82e, and 82f are provided on the outer side surface of the hitting ball supply tray (upper plate) 3, for example, a plurality of gaming machines are installed in one section of the game store. Even if the player is a player other than the player who is playing with the gaming machine (a player who is playing a game with the adjacent gaming machine or a player who is not yet playing a game in the game store) The light emission state of the LEDs 82a, 82b, 82e, and 82f of the upper plate lamp of the gaming machine can be made visible. Therefore, it is possible to execute an effect that draws attention to a person other than the player who is playing the game on the gaming machine, thereby providing an effect.

  Further, according to this embodiment, the effect control command transmitted by the game control microcomputer 560 is a full tank state in which a predetermined amount or more of game balls are stored in the surplus ball tray (lower plate) 4. A command (input port data designation command) indicating that the surplus ball tray (lower pan) 4 is full is included. Further, the sound / lamp control microcomputer 100b receives the surplus ball receiving tray (lower surplus tray) 4 based on the command indicating that the surplus ball receiving tray (lower tray) 4 is full. By controlling the light emission state of the LEDs 84 a to 84 f of the lower plate lamps provided in the lower plate 4, control for notifying the full tank state of the surplus ball receiving plate (lower plate) 4 is executed. Therefore, the sound / lamp control microcomputer 100b emits light from the LED lamps 84a to 84f of the lower dish lamps provided in the surplus ball tray (lower dish) 4 separately from the game effect production devices such as the variable display device 9 and the speaker 27. A full tank condition is reported by controlling the condition. Therefore, as in the first embodiment, a full tank state can be notified without interruption in the middle of a game effect (for example, a big hit effect). In addition, since the sound / lamp control microcomputer 100b controls the light emission state of the LEDs 84a to 84f of the lower tray lamps provided in the surplus ball tray (lower tray) 4, the processing load on the game control microcomputer 560 is reduced. can do.

  Further, according to this embodiment, the sound / lamp control microcomputer 100b uses the LED 125a to 125f, 126a to 126f, 281a to 281l of each lamp based on the effect control command transferred from the symbol control microcomputer 100a. , 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f, a control signal is output in a serial signal system. The serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B are one system. In addition to being connected through wiring, different address information is assigned in advance, and only the control signal with its own address information added is converted into a parallel signal system and output. Further, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 616 to 618 provided in the game board 6, an address that can identify the serial-parallel conversion ICs 616 to 618 is provided. A control signal with information added is output in a serial signal system. In addition, when the sound / lamp control microcomputer 100b outputs a control signal for controlling the serial-parallel conversion ICs 610 to 615 provided in the game frame 11, an address that can identify the serial-parallel conversion ICs 610 to 615. A control signal with information added is output in a serial signal system. Therefore, similarly to the first embodiment, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In this embodiment, the pattern control board 80a, the sound / lamp control board 80b, the board side IC board 601, the frame side IC boards 602, 603, 604, 605A, 605B, and the connection forms of the relay boards 606, 607 As an example, the case where the sound / lamp control board 80b, the relay board 606, and the relay board 607 are connected to each other via a single wiring route in the bus type has been described. However, each serial-parallel conversion IC 616 mounted on the board side IC board 601 is described. To 618 are connected in series (daisy chain type connection), or the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC boards 602, 603, 604, 605A, 605B are connected in series (daisy chain type connection). ), The number of wirings may be reduced.

  FIG. 127 shows the symbol control board 80a, sound / lamp control board 80b, relay boards 606 and 607, board side IC board 601, frame side IC boards 602, 603, 604, 605A, and 605B in the third embodiment. It is a block diagram which shows the example of a structure. In the example shown in FIG. 127, the sound / lamp control microcomputer 100b (specifically, the sound / lamp control CPU 101b) of the sound / lamp control board 80b transmits the clock signal together with the serial data as the control signal to the relay board. The data is output to 606, respectively. The relay board 606 supplies the serial data and the clock signal input from the sound / lamp control microcomputer 100 b to the relay board 607 and the board-side IC board 601.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 616. As shown in FIG. 127, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC substrate 601 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 616 to the other serial-parallel conversion ICs 618 and 617 mounted on the board side IC substrate 601. For example, by configuring the output of the last bit of the shift register 652 shown in FIG. 20 to the data latch unit 651 of the next serial-parallel conversion IC, serial data is sequentially sent to the serial-parallel conversion ICs 616 to 618. What is necessary is just to forward. The serial-parallel conversion ICs 616 to 618 convert the input serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided in the game board 6. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 618 and the input IC 621.

  The relay board 607 supplies the serial data and the clock signal input from the production control microcomputer 100 to the frame side IC board 604, the frame side IC board 605A, and the frame side IC board 605B. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 613. As shown in FIG. 127, the serial-parallel conversion ICs 610 to 613 mounted on the frame-side IC substrates 602 to 604 have serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 613 to the other serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrates 602 and 603. For example, the configuration is such that the output of the last bit of the shift register 652 shown in FIG. 20 is input to the data latch unit 651 of the next serial-parallel conversion IC, so that serial data is sequentially input to each serial-parallel conversion IC 610-613. What is necessary is just to forward. And each serial-parallel conversion IC610-613 converts the input serial data into parallel data, and supplies it to LED of each lamp | ramp provided in the game frame 11. FIG.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 604 and input to the serial-parallel conversion IC 613 and also input to the frame side IC substrate 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to the serial-parallel conversion ICs 610 and 611, and input to the frame side IC substrate 603. The clock signal input to the frame side IC substrate 603 is branched on the frame side IC substrate 603 and input to the serial-parallel conversion IC 612. The clock signal input to the frame side IC substrate 605A is branched on the frame side IC substrate 605 and input to the serial-parallel conversion IC 614 and the input IC 620. The clock signal input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615.

  Similarly to the example shown in FIGS. 112 and 113, the LED for gradation control (for example, multi-color LED) is used as the LED of the lamp provided in the game frame 11 or the game board 6 to control the brightness. You may be able to do it.

  In this embodiment, the lamp control signals with addresses are output to the serial-parallel conversion ICs 610 to 618, whereby the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, and 283a to 283f of the respective lamps. , 82a to 82f, 83, and 84a to 84f have been described. As in the second embodiment, a plurality of serial-parallel conversion ICs are connected in series with the same system wiring, and the same system Data of a fixed length including a lamp control signal for controlling all the lamps connected by this wiring may be output.

  FIG. 128 is a block diagram illustrating another circuit configuration example of the relay board 77, the sound / lamp control board 80b, and the symbol control board 80a according to the third embodiment. In the example shown in FIG. 87, the sound / lamp control board 80b includes a sound / lamp control CPU 101b, a RAM, a serial output circuit 353, a serial input circuit 354, a latch signal output unit 355, a clock signal output unit 356, and an input capture signal. A sound / lamp control microcomputer 100b including an output unit 357 is mounted. The RAM may be externally attached. In the sound / lamp control board 80b, the sound / lamp control microcomputer 100b operates in accordance with a program stored in a built-in or external ROM (not shown).

  The sound / lamp control CPU 101b outputs a signal for driving the lamp via the serial output circuit 353. The serial output circuit 353 converts the input signal (parallel data) for driving the LED of the lamp into serial data and outputs the serial data to the relay board 606.

  In the example shown in FIG. 128, as in the second embodiment, four ICs 610 to 613 out of the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side are connected in series with the same system wiring. Yes. When controlling the top frame lamp, the left frame lamp, and the right frame lamp, the sound / lamp control CPU 101b includes the lamp control signals of all the serial-parallel conversion ICs 610 to 613 connected by the same system wiring. Data of a fixed length (control signal string) is output via the serial output circuit 353 as a serial data system. When the sound / lamp control CPU 101b finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 provides a latch signal for causing the serial-parallel conversion ICs 610 to 613 to capture the lamp control signal. Output.

  In the example shown in FIG. 128, as in the second embodiment, serial-parallel conversion ICs 616 to 618 provided on the game board 6 side are connected in series by wires of the same system. When controlling the center decoration lamp and the stage lamp, the sound / lamp control CPU 101b has a fixed length including lamp control signals for all the serial-parallel conversion ICs 616 to 618 connected by the same system wiring. Data (control signal sequence) is output as a serial data system via the serial output circuit 353. When the sound / lamp control CPU 101b finishes outputting the fixed-length control signal sequence, the latch signal output unit 355 provides a latch signal for causing the serial-parallel conversion ICs 616 to 618 to capture the lamp control signal. Output.

  As in the second embodiment, among the serial-parallel conversion ICs 610 to 615 provided on the game frame 11 side, the ICs 614 and C615 are connected by a single wiring. When controlling the pan lamp or the operation button lamp, the sound / lamp control CPU 101b serially transmits a lamp control signal for the serial-parallel conversion IC 614 connected by the single wiring via the serial output circuit 353. Output as data format. When the sound / lamp control CPU 101b finishes outputting the lamp control signal, the sound / lamp control CPU 101b causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 614 to capture the lamp control signal. Further, when controlling the lower pan lamp, the sound / lamp control CPU 101b transmits the lamp control signal for the serial-parallel conversion IC 615 connected by the single wiring to the serial data system via the serial output circuit 353. Output as. When the sound / lamp control CPU 101b finishes outputting the lamp control signal, the sound / lamp control CPU 101b causes the latch signal output unit 355 to output a latch signal for causing the serial-parallel conversion IC 615 to capture the lamp control signal.

  FIG. 129 shows the symbol control board 80a, sound / lamp control board 80b, relay boards 606 and 607, board side IC board 601, frame side IC boards 602, 603, 604, 605A, and 605B in the third embodiment. It is a block diagram which shows the other structural example. The sound / lamp control microcomputer 100b of the sound / lamp control board 80 outputs a clock signal to the relay board 606 together with serial data as a control signal. The sound / lamp control microcomputer 100b outputs a latch signal to the relay board 606 at the timing when the serial data has been output. The relay board 606 supplies serial data, a clock signal, and a latch signal input from the sound / lamp control microcomputer 100 b to the board side IC board 601. The relay board 606 also supplies serial data, a clock signal, and a latch signal to the frame side IC boards 602, 603, 604, 605A, and 605B via the relay board 607.

  The serial data input to the board side IC substrate 601 is first input to the serial-parallel conversion IC 616. As shown in FIG. 129, the serial-parallel conversion ICs 616 to 618 mounted on the board-side IC substrate 601 are connected in series by the same system wiring. For example, each serial-parallel conversion IC 616 to 618 has serial data signal lines connected in a daisy chain type. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 616 to the other serial-parallel conversion ICs 618 and 617 mounted on the board side IC substrate 601. In the example shown in FIG. 129, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC, as in the second embodiment. With this configuration (see FIG. 116), serial data may be sequentially transferred to the serial-parallel conversion ICs 616 to 618. The serial-parallel conversion ICs 616 to 618 latch the serial data at the timing when the latch signal is input, convert the latched serial data into parallel data, and supply the parallel data to the LEDs of the lamps provided on the game board 6. To do. The clock signal input to the board-side IC board 601 is branched on the board-side IC board 601 and input to the serial-parallel conversion ICs 616 to 618 and the input IC 621.

  The relay board 607 supplies serial data, a clock signal, and a latch signal input from the sound / lamp control microcomputer 100b to the frame side IC board 604, the frame side IC board 605A, and the frame side IC board 605B. The serial data input to the frame side IC substrate 604 is first input to the serial-parallel conversion IC 613. As shown in FIG. 129, the serial-parallel conversion ICs 610 to 613 mounted on the frame side IC substrates 602 to 604 are connected in series by the same system wiring. For example, each serial-parallel conversion IC 610 to 613 has serial data signal lines connected in a daisy chain. Therefore, the input serial data is sequentially transferred from the serial-parallel conversion IC 613 to the other serial-parallel conversion ICs 610 to 612 mounted on the frame side IC substrates 602 and 603. In the example shown in FIG. 129, the output of the last bit of the shift register 682 mounted in each serial-parallel conversion IC is input to the data latch unit 681 of the next serial-parallel conversion IC, as in the second embodiment. With this configuration (see FIG. 116), serial data may be sequentially transferred to the serial-parallel conversion ICs 610 to 613. Each of the serial-parallel conversion ICs 610 to 613 latches the serial data at the timing when the latch signal is inputted, converts the latched inputted serial data into parallel data, and LED of each lamp provided in the game frame 11 To supply.

  The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 604 and input to the serial-parallel conversion IC 613 and also input to the frame side IC substrate 602. The clock signal input to the frame side IC substrate 602 is branched on the frame side IC substrate 602, input to the serial-parallel conversion ICs 610 and 611, and input to the frame side IC substrate 603.

  The serial data input to the frame side IC substrate 605A is input to the serial-parallel conversion IC 614. Then, the serial-parallel conversion IC 614 latches the serial data at the timing when the latch signal is input, converts the latched serial data into parallel data, and the LED 82a of the upper plate lamp and the operation button lamp provided in the game frame 11 To 82f and 83. The clock signal input to the frame side IC substrate 605A is branched on the frame side IC substrate 605A and input to the serial-parallel conversion IC 614 and the input IC 620.

  The serial data input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615. Then, the serial-parallel conversion IC 615 latches the serial data at the timing when the latch signal is input, converts the latched serial data into parallel data, and supplies the parallel data to the LEDs 84 a to 84 f of the lower pan lamps provided in the game frame 11. To do. The clock signal input to the frame side IC substrate 605B is input to the serial-parallel conversion IC 615.

  In the example shown in FIGS. 128 and 129, each serial-parallel conversion IC is configured similarly to the configuration shown in the second embodiment (see FIG. 116). In the examples shown in FIGS. 128 and 129, the control signal sequence (see FIGS. 117 and 118) including the lamp control signal and the motor control signal shown in the second embodiment is used. In the example shown in FIGS. 128 and 129, the sound / lamp control microcomputer 100b (specifically, the sound / lamp control CPU 101b) is the production control microcomputer 100 shown in the second embodiment. The serial setting process and the serial input / output process are executed in accordance with the same process (see FIGS. 119 to 121).

  If configured as shown in FIGS. 128 and 129, the sound / lamp control microcomputer 100b has the LEDs 125a to 125f, 126a to 126f, 126a to 126f of the respective lamps based on the presentation control commands transferred from the design control microcomputer 100a. Control signals for controlling 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f are output in a serial signal system. The serial-parallel conversion ICs 616 to 618 mounted on the board side IC substrate 601 and the serial-parallel conversion ICs 610 to 615 mounted on the frame side IC substrates 602, 603, 604, 605A, 605B are one system. Connected via wiring. Therefore, similarly to the second embodiment, the number of wirings between the game board 6 and the game frame 11 can be reduced. Therefore, in a gaming machine in which the game frame 11 and the game board 6 are configured to be detachable, it is possible to easily attach and detach the game frame 11 and the game board 6.

  In this embodiment, the symbol control microcomputer 100a mounted on the symbol control board 80a first receives an effect control command from the game control microcomputer 560 and then transfers it to the sound / lamp control microcomputer 100b. However, the sound / lamp control microcomputer 100b mounted on the sound / lamp control board 80b may receive the effect control command from the game control microcomputer 560. In this case, the sound / lamp control microcomputer 100b mounted on the sound / lamp control board 80b first receives an effect control command from the game control microcomputer 560. Then, the sound / lamp control microcomputer 100b outputs a control signal as a serial data system based on the received effect control command, whereby the LEDs 125a to 125f, 126a to 126f, 281a to 281l, and 282a to 282a to 280a. Controls 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f, and transfers (transmits) the received effect control command to the symbol control board 80a. Note that the sound / lamp control microcomputer 100b determines, for example, whether or not to execute the notice effect and the contents of the notice effect, and transmits a notice effect command that can specify the contents of the notice effect to the symbol control microcomputer 100a. You may do it. Further, the sound / lamp control microcomputer 100b processes the effect control command received from the game control microcomputer 560, and transmits a command capable of specifying the presence / absence of the notice effect to the symbol control microcomputer 100a. May be.

  In this embodiment, as an example of controlling each presentation means using separate control boards, a case has been described in which a gaming machine includes a symbol control board 80a and a sound / lamp control board 80b. A plurality of control boards may be provided. For example, the gaming machine includes a symbol / sound control board for controlling the variable display device 9 and the speaker 27, and LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f of each lamp. , 83, 84a to 84f may be provided. In this case, for example, the symbol / sound control microcomputer mounted on the symbol / sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the lamp control board. Then, the lamp control microcomputer mounted on the lamp control board outputs the control signal as a serial data system based on the transferred effect control command, thereby allowing the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f are controlled.

  Also, for example, the gaming machine controls the variable display device 9 and the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f of each lamp. / A lamp control board and a sound control board for controlling the speaker 27 may be provided. In this case, for example, the sound control microcomputer mounted on the sound control board first receives an effect control command from the game control microcomputer 560 and transfers (transmits) it to the symbol / lamp control board. Then, the symbol / lamp control microcomputer mounted on the symbol / lamp control board outputs a control signal as a serial data system based on the transferred presentation control command, thereby allowing the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f are controlled.

  In each of the embodiments described above, as shown in FIG. 130, a prize ball count signal output from the payout control board 37 to the main board 321 is branched at the main board 31 and input to the information terminal board 34. You may make it make it. A signal from the payout control board 37 including a prize ball count signal is input to the CPU 56 via the input port 571 in the I / O port unit 57 (see FIG. 10). Further, as shown in FIG. 130, the CPU 56 may output a door opening / closing signal to the information terminal board 34 via the output port 572 in the I / O port unit 57. When configured as shown in FIG. 130, no prize ball count signal and door open / close signal are output from the payout control board 37 to the information terminal board 34. Further, the door opening / closing signal may be branched at the main board 31 and input to the information terminal board 34. As shown in FIG. 11, in the dispensing control board 37, the door opening / closing signal (the detection signal of the door opening sensor 155) is not input to the dispensing control microcomputer 370 but is output to the main board 31. It is preferable. The prize ball count signal output from the payout control board 37 to the main board 321 may be a signal that is turned on once every time the detection signal of the payout number count switch 301 is output ten times. .

  In addition, the pachinko gaming machine of each of the above embodiments can be given a predetermined game value to a player mainly when the special symbol that is variably displayed on the variable display unit based on the start winning prize becomes the predetermined symbol. A pachinko machine that can be given a predetermined gaming value to a player when there is a prize in a predetermined area of an electric game that is released based on a start prize, or a start prize The present invention is applied even to a pachinko game machine in which a predetermined right is generated or continued when there is a prize for a predetermined electric combination that is released when the stop symbol of the symbol variably displayed becomes a predetermined symbol combination. it can. Furthermore, the present invention can be applied to a slot machine that inserts game medals and sets a bet number and plays a game, or a game machine that inserts game balls instead of game medals and sets a bet number and plays a game.

  Further, in the above-described embodiment, characteristic configurations of gaming machines as shown in the following (1) to (7) are also shown.

  (1) A gaming machine includes a game frame (for example, a game frame 11) installed to be openable and closable with respect to an outer frame, a predetermined plate-like body, and various components attached to the plate-like body. A game machine including a game board (for example, game board 6) including the game board, wherein the game board can be exchanged, and controls the progress of the game and transmits an effect control command for controlling electric parts for the effect. The control means (for example, the game control microcomputer 560) and the electric parts for the effect (for example, the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a of the lamps) according to the effect control command transmitted by the game control means. To 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f, motors 151a and 152a) (for example, an effect control machine) The game control means includes command transmission means (for example, a part for executing step S29 in the game control microcomputer 560) for sending the effect control command to the effect control means. Based on the effect control command received from the game control means, the control means outputs an output means (for example, step S708 in the effect control microcomputer 100 in the effect control microcomputer 100) that outputs a control signal for controlling the electric parts for effect in the serial signal system. A board-side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 616 to 618) provided in the game board and a frame-side serial-parallel conversion circuit (for example, serial) provided in the game frame. -Further comprising parallel conversion ICs 610-615) The board side serial-parallel conversion circuit converts the control signal input from the output means of the production control means from the serial signal system to the parallel signal system, and among the electrical parts for production, For example, the lamps 125a to 125f, 126a to 126f, and the motors 151a and 152a) output to the frame side serial-parallel conversion circuit. The frame side serial-parallel conversion circuit converts the control signal input from the output means of the effect control means from the serial signal system to the parallel signal system. And output to electric parts (for example, lamp LEDs 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f) among the electric parts for performance. Board side serial-parallel conversion circuit and frame side serial-parallel conversion circuit, or The effect control means and the frame side serial-parallel conversion circuit are connected via one line of wiring (for example, the relay boards 606 and 607 are connected to each other via a single line by connecting them in a bus type. Each serial-parallel conversion IC 610 to 618 is connected to one system by being connected in a bus form or daisy chain type), and relays the connection between the panel side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit The relay board (for example, the relay board 606, 607) or the relay board (for example, the relay board 607) that relays the connection between the frame side serial-parallel conversion circuit and the effect control means is provided. Also good. According to such a configuration, the effect control means includes an output means for outputting a control signal for controlling the electric parts for the effect in a serial signal system based on the effect control command received from the game control means, The board-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit, or the effect control means and the frame-side serial-parallel conversion circuit are configured to be connected through one line of wiring. And the number of wires between the game frames can be reduced. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board. Also provided is a relay board for relaying the connection between the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or a relay board for relaying the connection between the frame side serial-parallel conversion circuit and the effect control means. Therefore, the attachment / detachment work between the game frame and the game board can be easily performed only by performing the connection work to the relay board and the removal work.

  (2) In addition, the gaming machine is a game frame (for example, a game frame 11) installed so as to be openable and closable with respect to the outer frame, a predetermined plate-like body, and various types attached to the plate-like body. A game machine including a game board (for example, game board 6) including parts and capable of exchanging the game board, and transmitting an effect control command for controlling the progress of the game and controlling electric parts for the effect Game control means (for example, a game control microcomputer 560), and electrical components for effects (for example, the variable display device 9, LEDs 125a to 125f and 126a to 126a to 126a) in accordance with the effect control commands transmitted by the game control means. 126f, 281a-281l, 282a-282f, 283a-283f, 82a-82f, 83, 84a-84f, motor 151a, 152a) For example, the game board includes a symbol control microcomputer 100a and a sound / lamp control microcomputer 100b, and the effect control means includes at least one electric component (eg, the variable display device 9) of the effect electric components. ) For controlling the first effect control means (for example, the design controlling microcomputer 100a) and the electric parts other than the electric parts controlled by the first effect control means among the electric parts for effect (for example, each lamp Second effect control means (for example, sound / lamp) for controlling the LEDs 125a to 125f, 126a to 126f, 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f, motors 151a and 152a) The game control means includes a first microcomputer 100b). It includes first command transmission means (for example, a part for executing step S29 in the game control microcomputer 560) for transmitting a control command to the first effect control means, and the first effect control means includes the first effect control. Second command transmission means (for example, a symbol control microcomputer) for transmitting a second effect control command capable of specifying the contents of the first effect control command to the second effect control means based on the reception of the command. The second effect control means includes a part for executing step S788 in 100a), and the second effect control means controls to control the electric parts for effect based on the second effect control command received from the first effect control means. Output means for outputting the signal in a serial signal system (for example, the step in the sound / lamp control microcomputer 100b) A board-side serial-parallel conversion circuit (for example, serial-parallel conversion ICs 616 to 618) provided in the game board and a frame-side serial-parallel conversion circuit (for example, provided in the game frame). Serial-parallel conversion ICs 610 to 615), and the board-side serial-parallel conversion circuit converts the control signal input from the output means of the second effect control means from the serial signal system to the parallel signal system, Among the electrical parts for performance, the electrical parts provided on the game board (for example, lamps LED 125a to 125f, 126a to 126f, motors 151a and 152a) are output, and the frame side serial-parallel conversion circuit is the second effect. The control signal input from the output means of the control means is converted from the serial signal system to the parallel signal system. , Output to the electrical parts provided in the game frame among the electrical parts for production (for example, LEDs 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83a, 84a to 84f of lamps), The board-side serial-parallel conversion circuit and the frame-side serial-parallel conversion circuit, or the effect control means and the frame-side serial-parallel conversion circuit are connected via one system wiring (for example, the relay boards 606 and 607 are bus type). Are connected via one line of wiring. Each serial-parallel conversion IC 610 to 618 is connected to one system by being connected in a bus form or daisy chain type), and relays the connection between the panel side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit The relay board (for example, the relay board 606, 607) or the relay board (for example, the relay board 607) that relays the connection between the frame side serial-parallel conversion circuit and the effect control means is provided. Also good. According to such a configuration, the second effect control means outputs the control signal for controlling the electric parts for effect based on the second effect control command received from the first effect control means as a serial signal. Output means for outputting in a system, so that the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or the effect control means and the frame side serial-parallel conversion circuit are connected via one system wiring Thus, the number of wires between the game board and the game frame can be reduced. Therefore, in the gaming machine in which the game frame and the game board are detachable, it is possible to easily attach and detach the game frame and the game board. Also provided is a relay board for relaying the connection between the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit, or a relay board for relaying the connection between the frame side serial-parallel conversion circuit and the effect control means. Therefore, the attachment / detachment work between the game frame and the game board can be easily performed only by performing the connection work to the relay board and the removal work.

  (3) At least a part of the board side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit is connected in series with the same system wiring (for example, as shown in FIG. 115, each serial-parallel conversion IC 610 To 613 are connected in series with the same system wiring, serial-parallel conversion ICs 616 to 618 are connected in series with the same system wiring), and output means are all connected to the same system wiring The fixed-length data including information on the control signal of the electrical component for the production is output in units of unit data in a serial signal system at predetermined intervals (for example, the production control microcomputer 100 or the sound / lamp control microcomputer 100b). In step S972A, the serial output circuit 375 is used to control including the lamp control signal shown in FIG. 118 and the control signal sequence including the motor control signal shown in FIG. 118), the panel side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit connected to the same system wiring is the same system The control signal of the unit data output every predetermined cycle is sequentially transferred as it is to the board side serial-parallel conversion circuit or the frame side serial-parallel conversion circuit connected to the lower side of the wiring (for example, as shown in FIG. 116). In addition, in each of the serial-parallel conversion ICs 610 to 613 and 616 to 618, the last bit of the shift register 682 is inputted as it is to the lower data latch unit 681), and a control signal is sent based on the unit data at a predetermined timing. (For example, as shown in FIG. 116, each serial-parallel conversion IC 610-613, 6 6 to 618, the data buffer 683 latches and outputs the data stored in the shift register 682 at the timing when the latch signal from the effect control microcomputer 100 or the sound / lamp control microcomputer 100b is input). It may be configured. According to such a configuration, the output means converts the fixed-length data including the control signal information of all the electrical components for production connected to the same system wiring into serial signals for each predetermined period of unit data. Since it is configured to output in a system, it is possible to eliminate the need to assign different address information to the board side serial-parallel conversion circuit and the frame side serial-parallel conversion circuit in advance.

  (4) The game control means transmits serial data using the serial output circuit 78 in step S29 in the game control microcomputer 560, for transmitting the effect control command to the effect control means in the serial signal system. Part). According to such a configuration, since the game control means is configured to include the serial transmission means for transmitting the effect control command to the effect control means in a serial signal system, the game control means is arranged between the game control means and the effect control means. The number of wires can also be reduced.

  (5) The gaming machine has an input electric component (for example, operation buttons 81a to 81e, position sensors 151b and 152b) and a latch means for latching an input signal input from the electric component and outputting it in a parallel signal system. (For example, the D flip-flops 661 to 668 constituting the input ICs 620 and 621) and a parallel-serial conversion circuit (for example, the input ICs 620 and 621) that converts the input signal output from the latch means into a serial signal system and outputs the converted signal. And clock signal output means for outputting a clock signal used in common for the board side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit and the parallel-serial conversion circuit (for example, the production control microcomputer 100 or sound / lamp control) Clock signal output unit mounted on microcomputer 100b 56) and it may be configured to include. According to such a configuration, it is configured to include a clock signal output means for outputting a clock signal used in common for the panel side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit, and the parallel-serial conversion circuit. Therefore, the board side serial-parallel conversion circuit, the frame side serial-parallel conversion circuit, and the input parallel-serial conversion circuit can be easily synchronized, and the number of clock signal lines can be reduced.

  (6) The gaming machine includes light-emitting components (for example, LEDs 281a to 281l, 282a to 282f, 283a to 283f, 82a to 82f, 83, 84a to 84f of each lamp) as electrical parts for production, and the output means is As a control signal for controlling the light emitting state of the light emitting component, a signal in which the pulse amount is changed according to the luminance when the light emitting component emits light is output (for example, the production control microcomputer 100 has the luminance shown in FIG. 112). (A signal in which the number of pulses is changed in accordance with the above) may be output). According to such a configuration, the output means is configured to output a signal in which the pulse amount is changed according to the luminance when the light emitting component emits light as the control signal for controlling the light emitting state of the light emitting component. Therefore, gradation control for adjusting the luminance of the light emitting component can be performed.

  (7) The gaming machine can play a predetermined game using a game ball, and variably displays a plurality of types of identification information (for example, special symbols and decorative symbols) that can identify each of them. A variable display device (for example, a special symbol display 8 or a variable display device 9) for derivation display is provided, and a specific advantageous display for a player when a specific display result (for example, jackpot symbol) is derived and displayed on the variable display device A gaming machine that is transitioned to a gaming state (for example, a big hit gaming state), and is awarded to a variable winning ball device (for example, a special variable winning ball device 20) that can be changed to an open state in a specific gaming state, and a variable winning ball device. Detecting means (for example, a count switch 23) for detecting the played game ball and outputting a detection signal, and the game control means determines whether or not to shift to the specific gaming state before the display result is derived and displayed. Start of variable display of identification information and variable display on the variable display device based on the determination of the prior determination means (for example, the part for executing the processing of steps S62 and S63 in the game control microcomputer 560) and the determination of the prior determination means Variable display command transmission means for transmitting a variable display command (for example, variation pattern command) capable of specifying time (for example, a part for executing the processing of step S103 in the game control microcomputer 560), and from the detection means Winning determination means for determining whether or not a detection signal has been input (for example, a part for executing the processing of steps S341 to S348, S361 to S366, and S361 in the game control microcomputer 560. In particular, the count switch input bit determination value Using steps S365 and S36 And an abnormality notification command transmission for transmitting an abnormality notification command for instructing the execution of abnormality notification based on the fact that the winning determination means inputs a detection signal in a gaming state other than the specific gaming state) Means (for example, a part for executing the processing of steps S1585 and S1587 to S589 in the game control microcomputer 560), and the effect control means variably displays based on the variable display command transmitted by the variable display command transmission means. Variable display control means for starting the variable display of the identification information in the device and deriving and displaying the display result on the variable display device when the variable display time has elapsed (for example, the processing of steps S800 to S803 in the production control microcomputer 100) , The design control microcomputer 100a In step S800 to step S803, the abnormality notification means for executing abnormality notification by the effect device based on the abnormality notification command transmitted by the abnormality notification command transmission means (for example, the effect control micro) Part of the computer 100 for executing the processes of steps S1924 to S1929, S1977 to S1983, and part of the sound / lamp control microcomputer 100b for executing the processes similar to steps S1924-S1929 and S1977 to S1983). The abnormality notification means can execute abnormality notification even when the variable display control means is executing variable display of identification information in the variable display device (for example, the production control microcomputer 100 determines that Y in step S835A). At step S83 The sound / lamp control microcomputer 100b executes step S845D when Y is executed in step S845A, and executes the same processing as step S835D when Y is executed in the same processing as step S835A. When Y is the same process, the same process as step S845D is performed), and the output means performs an effect based on the abnormality notification command transmitted by the abnormality notification command transmission means when the abnormality notification is executed by the abnormality notification means. A control signal for controlling the electrical components is output in a serial signal system (for example, in the production control microcomputer 100, a part for executing step S708 based on the setting results of steps S1928 and S1983, a sound / lamp control micro In the computer 100b, the step S1928, S1983 and partial executes step S888 based on the setting result of the same process) may be configured so. According to such a configuration, the game control means transmits an abnormality notification command for instructing execution of abnormality notification based on the fact that the winning determination means inputs a detection signal in a gaming state other than the specific gaming state. Including an anomaly notification command transmitting means, wherein the effect control means includes an anomaly notifying means for executing anomaly notification by the effecting device based on the anomaly notification command transmitted by the anomaly notification command transmitting means, and the anomaly notifying means is a variable display control. Since the abnormality notification can be executed even when the means is performing variable display of the identification information on the variable display device, it is possible to notify that an abnormal winning has occurred and to continue the game. Thus, the player can be prevented from suffering a disadvantage.

  The present invention allows a player to play a predetermined game using a game medium, a game frame installed to be openable and closable with respect to an outer frame, a predetermined plate-like body attached to the game frame, The present invention is applied to a gaming machine such as a pachinko gaming machine provided with a gaming board including various parts attached to a plate-like body.

DESCRIPTION OF SYMBOLS 1 Pachinko machine 8 Special symbol display 9 Variable display device 13 1st start winning opening 14 2nd starting winning opening 20 Special variable winning ball apparatus 31 Game control board (main board)
56 CPU
560 Microcomputer for game control 78 Serial output circuit 80 Production control board 81 Operation buttons 82a to 82f Upper plate lamp (LED)
83 Operation button lamp (LED)
84a-84f Lower pan lamp (LED)
100 effect control microcomputer 101 effect control CPU
109 VDP
125a-125f Center decoration lamp (LED)
126a-126f Stage lamp (LED)
151,152 Movable member (cart, beam)
151a, 152a Movable motor 151b, 152b Position sensor 281a-281l Top frame lamp (LED)
282a-282f Left frame lamp (LED)
283a-283f Right frame lamp (LED)
353 Serial output circuit 354 Serial input circuit 601 Board side IC board 602, 603, 604, 605A, 605B Frame side IC board 606,607 Relay board 610-618 Serial-parallel conversion IC
620,621 Input IC

Claims (1)

A game frame installed to be openable and closable with respect to the outer frame attached to the game frame, and a game board including various components that are attached to predetermined plate-like body and the plate-like body, replacing the game board A possible gaming machine,
Is disposed in front of the gaming machine, a reservoir capable of storing the Yu technique medium together a predetermined light emitters are provided,
Game control means for controlling the progress of the game and transmitting an effect control command for controlling the electric parts for the effect,
In accordance with the effect control command transmitted by the game control means, the effect control means for controlling the electric parts for effect including the light emitter provided in the storage unit,
The game control means and the effect control means are mounted on the game board,
The game control means includes command transmission means for transmitting the effect control command to the effect control means,
The presentation control means, based on the effect control command received from the previous SL game control means includes an output means for outputting a control signal for controlling an electrical component for the effect the serial signaling,
A board-side serial-parallel conversion circuit provided in the game board and a plurality of frame-side serial-parallel conversion circuits provided in the game frame;
The board-side serial-parallel conversion circuit converts the control signal input from the output means of the performance control means from a serial signal system to a parallel signal system, and is provided in the game board among the electrical components for the performance. Output to the electrical component
The plurality of frame side serial-parallel conversion circuits convert the control signal input from the output means of the effect control means from a serial signal method to a parallel signal method, and the game frame of the effect electric parts. and transmits them to the electrical components provided in,
The board-side serial-parallel conversion circuit and the plurality of frame-side serial-parallel conversion circuits, or the effect control means and the plurality of frame-side serial-parallel conversion circuits are connected via one system wiring,
Furthermore, at least a part of the panel side serial-parallel conversion circuit or the plurality of frame side serial-parallel conversion circuits are connected in series with the same system wiring,
The output means outputs data of a fixed length including information on control signals of all the production electrical components connected to the same system wiring in a serial signal system for each predetermined period of unit data,
The panel-side serial-parallel conversion circuit or the plurality of frame-side serial-parallel conversion circuits connected to the same system wiring is connected to the panel-side serial-parallel connected to the lower side of the same system wiring. The control signal of the unit data output at every predetermined cycle is sequentially transferred as it is to either the conversion circuit or the plurality of frame side serial-parallel conversion circuits, and the control signal based on the unit data at a predetermined timing Is a game machine characterized by outputting .

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