JP5026025B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor equipment provided with a through electrode.

  In recent years, electronic devices such as mobile phones have been improved in functionality, and in electronic devices such as ICs and LSIs and optical devices such as OEICs and optical pickups used in these devices, the devices themselves have been reduced in size and functionality. Development for planning is underway at various locations. For example, a technique of stacking such devices has been proposed. Specifically, a substrate on which one functional element is provided on one surface is provided from one surface of the substrate to the other surface. A technique using a penetrating electrode that penetrates may be mentioned.

  In addition, copper, silver, and the like are expected as next-generation materials as wiring materials for these substrates. In particular, copper is most expected and used as a wiring material because of its low specific resistance, high electromigration resistance compared to aluminum alloys, and low cost compared to silver.

FIG. 4 is a partial cross-sectional view schematically illustrating an example of a semiconductor device using a conventional through electrode.
In the semiconductor device shown in FIG. 4, a substrate 101 made of a hard material such as ceramics or silicon, a through hole 102 provided through both surfaces of the substrate 101, and an inner surface of the through hole 102, are made of a copper material. A conductive portion 103 made of the like, and an electrode 104 disposed on one surface of the semiconductor device 100 so as to be exposed in the through hole 102 are roughly configured.
In the semiconductor device 100, both surfaces of the substrate can be electrically connected via the conductive portion 103 electrically connected to the electrode 104.

As a method of forming such a through electrode, a technology of an ultra-advanced electronic technology development organization (ASET) is cited as a conventional technology (see Non-Patent Document 1). This is an example in which a Cu film is uniformly formed by electrolytic plating in the through hole as a through electrode. However, the problem with this technology is that the Cu film is thick, and is caused by expansion and contraction due to heat, etc. Therefore, it is very difficult to ensure the electrical reliability because the stress to be generated is large, causing the destruction of the conductive portion and the damage such as the disconnection. In addition, uniform plating in the holes is technically difficult and time-consuming (particularly, in the case of fine holes having a high aspect ratio, plating is difficult).
http://www.aset.or.jp/press_release/si_20040218/si_20040218.html

The present invention has been devised in view of such a conventional situation, and reduces stress applied to the conductive portion due to thermal change or the like, prevents damage to the conductive portion or breakage, and the like in the through electrode. A first object is to provide a semiconductor device with improved electrical connection reliability.
In addition, a second object of the present invention is to provide a method for manufacturing a semiconductor device in which a conductive portion can be formed thinly and uniformly on a side surface in a through hole by a simple method.

According to a first aspect of the present invention, in the semiconductor device, the first conductive portion disposed on one surface of the substrate and at least a part of the first conductive portion are exposed from the other surface of the substrate. And covering the through hole provided in the substrate, the side surface in the through hole and the exposed first conductive portion, and extending so as to cover the other surface of the substrate, A second conductive part electrically connected to the first conductive part, and a third conductive part disposed on and electrically connected to the second conductive part only on the other surface of the substrate A thickness of the second conductive portion is smaller than a thickness of the third conductive portion, and the second conductive portion is covered in the through hole. A sealing resin is arranged as described above .
A semiconductor device according to a second aspect of the present invention is the semiconductor device according to the first aspect, wherein the sealing resin is disposed along the side surface in the through hole and has a space communicating with the outside of the semiconductor device. And

In the present invention, the third conductive portion is disposed on the second conductive portion on the other surface of the substrate, thereby reducing the thickness of the second conductive portion formed on the side surface portion in the through hole. can do. Thereby, the stress concerning a 2nd electroconductive part by a heat change etc. can be reduced. As a result, it is possible to provide a semiconductor device in which the electrical connection reliability in the through electrode is improved by preventing the second conductive portion from being broken and thus being damaged .

  Hereinafter, an embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.

FIG. 1 is a cross-sectional view showing an example of a semiconductor device of the present invention.
In the semiconductor device 1, at least a part of the electrode portion 3 is exposed from the first conductive portion (electrode portion) 3 disposed on one surface 2 a of the substrate 2 and the other surface 2 b of the substrate 2. In addition, the through hole 4 provided in the substrate 2, the insulating layer 5 disposed at least around the inner side surface and the opening of the through hole 4, the side surface in the through hole 4 and the exposed electrode part 3, and a second conductive portion 6 that extends and covers the other surface 2 b of the substrate 2 and is electrically connected to the electrode portion 3, and the other surface 2 b of the substrate 2. And a third conductive portion 8 disposed on and electrically connected to the second conductive portion 6.
A through hole 4 is formed from one surface 2 a of the semiconductor substrate 2 toward the other surface 2 b, and a second conductive portion 6 is formed in the through hole 4, thereby forming a through electrode 7.

In the semiconductor device 1 of the present invention, the third conductive portion 8 is disposed on the second conductive portion 6 on the other surface of the substrate 2. Thereby, the 2nd electroconductive part 6 formed in the side part in the through-hole 4 can be thinned.
In the present invention, the stress applied to the second conductive portion 6 due to expansion and contraction due to heat or the like can be reduced by making the second conductive portion 6 thin. As a result, it is possible to prevent breakage of the second conductive portion 6 and thus damage such as disconnection, and improve electrical connection reliability in the through electrode 7.

Since the third conductive portion 8 is laminated on the second conductive portion 6 on the other surface of the substrate 2, the third conductive portion is not affected by the step of the wiring. It is possible to suppress damage such as disconnection 8.
Moreover, it is preferable that the thickness of the second conductive portion 6 is thinner than the thickness of the third conductive portion 8 on the other surface of the substrate 2. Specifically, the thickness of the third conductive portion 8 is preferably 10 times or more the thickness of the second conductive portion 6. Thereby, the stress applied to the second conductive portion 6 due to expansion and contraction due to heat or the like is more effectively reduced, and damage such as breakage of the second conductive portion 6 and breakage is more reliably suppressed. Can do.

A sealing resin layer 9 is disposed in the through hole 4 and on the other surface 2 b of the substrate 2 so as to cover the second conductive portion 6 and the third conductive portion 8. By disposing the sealing resin, the stress applied to the second conductive part 6 and the third conductive part 8 due to expansion and contraction due to heat or the like can be reduced more effectively, and the conductive part can be destroyed. Damage such as disconnection can be more reliably suppressed.
The sealing resin layer 9 is preferably arranged along the side surface in the through hole 4. Since the sealing resin disposed on the side surface portion in the through hole 4 can be thinned, the influence of the thermal stress on the second conductive portion 6 can be further less affected.

The substrate 2 is made of an insulating hard material such as a semiconductor base made of silicon (Si), a glass base, a ceramic base, or the like.
The thickness of the substrate 2 is, for example, about several hundred μm.
In the example shown in FIG. 1, the substrate 2 is made of a semiconductor base material such as Si, the insulating layer 5 is disposed between the through hole 4 and the second conductive portion 6, and the substrate 2 and the second conductive portion 6 are arranged. And are electrically insulated. Further, when the substrate 2 is formed of a semiconductor base material, the surface layer portion on the side surface of the through hole 4 may form an insulated region in addition to the one surface 2a and the other surface 2b of the substrate 2. Good.

As shown in FIG. 1, the through-hole 4 is formed so that a first conductive portion (electrode portion) 3, which will be described later, disposed from the other surface 2 b to the one surface 2 a in the substrate 2 is exposed in the hole. It is opened in the substrate 2.
The diameter of the through hole 4 is, for example, about several tens of μm.
Further, the number of through holes 4 provided on the substrate 2 is not particularly limited.

The first conductive portion (electrode portion) 3 is provided on one surface 2 a of the substrate 2, and is provided so that the exposed portion is exposed from one opening portion of the through hole 4 into the hole.
The first conductive portion 3 is electrically connected to a later-described functional element (not shown) in the one surface 2a via a wiring portion (resin omitted) provided on the one surface 2a. Yes.
Examples of the material of the first conductive portion 3 include conductivity such as aluminum (Al), copper (Cu), aluminum-silicon (Al-Si) alloy, aluminum-silicon-copper (Al-Si-Cu) alloy, and the like. An excellent material is preferably used.

In the present embodiment, the functional element (not shown) is an optical element such as an IC chip or a CCD element.
Other examples of functional elements include micro relays, micro switches, pressure sensors, acceleration sensors, high frequency filters, micro mirrors, micro reactors, μ-TDS, DNA chips, MEMS devices, micro fuel cells, and the like. .

The second conductive portion 6 works effectively as a conductor by being disposed on at least a part of the side surface in the through hole 4.
In the example shown in the cross-sectional view of FIG. 1, the second conductive portion 6 is disposed so as to cover the entire side surface, but is not limited thereto. For example, the 2nd electroconductive part 6 is good also as a structure distribute | arranged to a part of side surface between one surface 2a of the board | substrate 2, and the other surface 2b.

  As the material of the second conductive portion 6 and the third conductive portion 8, it is preferable to use a material having excellent conductivity. The second conductive portion 6 and the third conductive portion 8 are excellent in adhesion to the first conductive portion (electrode portion) 3 and constitute the second conductive portion 6 and the third conductive portion 8. It is more preferable to use a material that does not diffuse into the electrode part or the substrate 2. For example, use of a metal material such as Al, Cu, Ni, or Au is preferable in terms of conductivity and adhesion to the electrode portion.

  The sealing resin layer 9 is made of, for example, polyimide resin, epoxy resin, silicone resin, etc., and the thickness thereof is, for example, 1 to 50 μm. The sealing resin layer 9 is provided with an opening 9a for outputting a terminal to the outside. Furthermore, a structure such as an output terminal to the outside such as the bump 10 can be added on the sealing resin layer 9.

Next, a method for manufacturing the semiconductor device 1 as described above will be described with reference to FIGS.
In the method for manufacturing a semiconductor device of the present invention, at least a part of the first conductive portion 3 is exposed from the other surface 2b of the substrate 2 on which the first conductive portion (electrode portion) 3 is arranged on one surface. As described above, the step of forming the through hole 4 in the substrate 2, the side surface in the through hole 4 and the exposed first conductive portion 3 are covered, and the other surface of the substrate 2 is covered. A step of forming a second conductive portion 6 that extends and is electrically connected to the first conductive portion 3, and a plating resist is formed so as to cover the second conductive portion 6. And a step of forming, on the other surface of the substrate 2, a third conductive portion 8 disposed on the second conductive portion 6 and electrically connected thereto by plating. And

In this invention, the method of not intentionally plating the inside of the through-hole 4 is employ | adopted. However, since solder (SnAgCu or the like) generally used as a bump material is very easily diffused into Cu, the Cu film in contact with the solder bump needs to have a certain thickness. In order to form a Cu film having a certain thickness or more, a technique such as plating is also suitable.
Therefore, in the present invention, the second conductive portion 6 is formed by a method other than plating, and the third conductive portion 8 is formed by selective plating.

  In the present invention, since it is not necessary to plate the inside of the through-hole 4, there is no need for special pretreatment, process conditions or materials such as a special plating solution or additive, and the conventional plating technique can be applied as it is, which is convenient. is there. Therefore, the present method can be applied without any problem even in a fine hole having a high aspect ratio, which is difficult to form wiring by plating.

As a specific embodiment, an example of forming a through electrode in a wafer level package is shown.
First, a substrate 2 is prepared, and a first conductive portion (electrode portion) 3 (I / O pad) is formed on one surface 2a thereof.
The substrate 2 may be a semiconductor wafer such as a silicon wafer, or may be a semiconductor chip obtained by cutting (dicing) the semiconductor wafer into chip dimensions. When the substrate 2 is a semiconductor chip, first, a plurality of sets of various semiconductor elements, ICs, functional elements, etc. are formed on a semiconductor wafer and then cut into chip dimensions to obtain a plurality of semiconductor chips. it can.
As the first conductive portion (electrode portion) 3, for example, an Al pad is used.

Next, the through hole 4 is formed in the substrate 2 (see FIG. 2A).
The through hole 4 is formed so that the first conductive portion 3 is exposed from the other surface 2 b side of the substrate 2. The vertical cross-sectional shape of the hole is ideally 90 ° (perpendicular) with respect to the surface of the substrate 2, but may be about 80 to 100 °.
The through hole 4 can be formed by a method that can form the hole vertically, such as dry etching, DRIE (Deep-RIE), laser processing, and PAECE.
Since the through hole 4 is formed perpendicular to the substrate 2, the insulating layer 5 formed on the side surface is not etched when the insulating layer 5 formed on the bottom surface of the hole is etched in the process described later. Insulation between the electrode and the substrate 2 can be ensured.

Next, an insulating layer 5 is formed at least on the inner side surface of the through hole 4 and around the opening.
As this insulating layer 5, for example, SiO ₂ is formed by plasma CVD or the like.
Next, a portion of the insulating layer 5 that covers the bottom surface of the through hole 4 is removed (see FIG. 2B).
When the insulating layer 5 is formed, the insulating layer 5 is also formed on the bottom of the hole, and is removed by anisotropic etching using dry etching.
Etching of the insulating layer 5 at the bottom of the hole is generally performed by reactive ion etching (RIE) with high ionicity, but methods such as ion milling and reverse sputtering that physically irradiate ions can also be used. It is.
Since the through hole 4 is formed substantially perpendicular to the substrate 2, the through hole 4 is formed on the side surface in the anisotropic etching of the dry process performed when the insulating layer 5 formed on the bottom surface of the hole is removed. The insulating layer 5 is not etched because it is difficult (not) to receive ion irradiation. Thereby, the insulation between the through electrode 7 and the substrate 2 can be surely taken.

Next, as shown in FIG. 2C, a second conductive portion 6 is formed in the through hole 4 so as to cover the insulating layer 5, and the second conductive portion 6 is connected to the first conductive portion 6. It is electrically connected to the conductive part 3.
That is, a thin (second conductive portion 6) for electrolytic plating is formed at least on the inner surface of the through hole 4 and the periphery of the opening by sputtering or the like. The seed layer is a laminated body made of, for example, Cr / Cu, TiN / Cu, TiW / Cu, or the like formed by a sputtering method. Further, it may be an electroless Cu plating layer, a metal thin film layer formed by a vapor deposition method, a coating method, a chemical vapor deposition method (CVD), or the like, or a combination of the above metal layer forming methods. Good.
In the through electrode 7, since this thin film becomes the wiring (second conductive portion 6) as it is, the formation film thickness is determined in consideration of wiring resistance and the like. The thickness of the second conductive portion 6 is usually around Cr 500 nm and Cu 500 nm, but can be changed depending on the situation.

Next, a resist film 20 for electrolytic plating is formed on the second conductive portion 6 and on the wiring unnecessary portion and the upper portion of the through hole 4 (see FIG. 2D). The resist film is provided with an opening 20a in a region where the third conductive portion 8 is to be formed, and the second conductive portion 6 is exposed in the opening 20a. The resist film 20 can be formed, for example, by patterning using a photolithography technique, a method of laminating a film resist, a method of spin-coating a liquid resist, or the like.
For forming the resist on the structure having the through-holes 4, when a varnish is used, it is difficult to form a film on the hole, and thus a dry film type resist is suitable. At this time, since it is not necessary to perform plating into the through-hole 4, no special pretreatment or the like is necessary, and plating can be performed by a semi-additive method as in the case of a normal wafer level package.

  Then, a third conductive portion 8 made of Cu or the like is formed on the second conductive portion 6 exposed using the resist film 20 as a mask by an electrolytic plating method or the like (see FIG. 3A). The third conductive portion 8 is usually formed with a thickness of about 10 μm. As described above, after the third conductive portion 8 is formed in a desired region, only the through electrode portion or the through electrode portion and the third conductive portion 8 are protected with a resist so that an unnecessary resist film or second conductive portion 8 is protected. Only the conductive layer and the like are removed by etching (see FIG. 3B).

Then, an insulating sealing resin layer 9 having an opening 9 a for outputting a terminal to the outside is formed on the third conductive portion 8 so as to cover the through electrode 7. The thickness is, for example, 1 to 50 μm.
Such a sealing resin layer 9 can form the sealing resin layer 9 having the opening 9a at a desired position by patterning a photosensitive resin such as a photosensitive polyimide resin by a photolithography technique, for example. it can. In addition, the formation method of the sealing resin layer 9 is not limited to this method, For example, you may protect with thin films, such as a silicon nitride.
Next, after a solder paste is placed on the opening 9a by a ball mounting method or a printing method, a reflow process is performed to form solder bumps 10 (see FIG. 3C).
Thereby, the configuration shown in FIG. 3C, that is, the configuration in which the sealing resin layer 9 fills the through-hole 4 and covers the substrate 2 flatly on the third conductive portion 8 side. A semiconductor device comprising:
Thereafter, in the sealing resin layer 9, the sealing resin disposed in the through hole 4 is thinned along the side surface of the through hole 4 (see FIG. 3D). By reducing the thickness of the sealing resin layer formed on the side surface portion in the through hole 4, it is possible to further reduce the influence of thermal stress on the second conductive portion 6.
Therefore, according to the present invention, the configuration shown in FIG. 3D, that is, the configuration in which the sealing resin layer 9 is disposed along the side surface in the through hole 4 and has a space communicating with the outside of the semiconductor device. It is possible to provide a semiconductor device comprising:

As described above, in the method of manufacturing a semiconductor device according to the present invention, at least a part of the first conductive portion is exposed from the other surface of the substrate on which the first conductive portion is disposed on one surface. A step of forming a through hole in the substrate, a side surface in the through hole and the exposed first conductive portion, and extending so as to cover the other surface of the substrate, Forming a second conductive part electrically connected to the first conductive part, forming a plating resist so as to cover the second conductive part, and on the other surface of the substrate And a step of forming, by plating, a third conductive portion that is disposed on and electrically connected to the second conductive portion.
In the present invention, a second conductive portion is formed so as to cover the side surface in the through hole and the other surface of the substrate, and the third conductive portion is placed on the second conductive portion on the other surface of the substrate. By forming by plating, it is possible to provide a method of manufacturing a semiconductor device capable of forming the conductive portion (second conductive portion) thinly and uniformly at the side surface portion in the through hole.
In the semiconductor device 1 manufactured in this way, the second conductive portion 6 disposed on the side surface portion of the through hole 4 can be made as thin as possible. Thereby, the stress concerning the 2nd electroconductive part 6 resulting from expansion / contraction by heat etc. can be reduced. As a result, it is possible to prevent damage to the second conductive portion and thus damage such as disconnection, and improve electrical connection reliability in the through wiring 7.

  Although the semiconductor device of the present invention has been described above, the present invention is not limited to the above example, and can be appropriately changed as necessary.

  For example, the present invention is applicable to a bonded substrate or the like regardless of the presence or absence of a functional element. This method can also be applied to a substrate without bonding.

  The present invention is widely applicable to a semiconductor device having a through electrode and a method for manufacturing the same.

It is sectional drawing which shows an example of the semiconductor device which concerns on this invention. FIG. 7 is a cross-sectional view showing an example of a manufacturing process of the semiconductor device shown in FIG. 1. FIG. 3 is a cross-sectional view showing an example of a manufacturing process following the process shown in FIG. 2. It is sectional drawing which shows an example of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device, 2 board | substrate, 3 1st electroconductive part (electrode part), 4 through-hole, 5 insulating layer, 6 2nd electroconductive part, 7 through electrode, 8 3rd electroconductive part, 9 sealing resin layer, 10 Solder bump.

Claims (2)

A first conductive portion disposed on one side of the substrate;
A through-hole provided in the substrate such that at least a part of the first conductive portion is exposed from the other surface of the substrate;
Covering the side surface in the through hole and the exposed first conductive part, and extending so as to cover the other surface of the substrate, the first conductive part is electrically connected to the first conductive part Two conductive parts;
A third conductive portion disposed on and electrically connected to the second conductive portion only on the other surface of the substrate, and a semiconductor device comprising:
The thickness of the second conductive part is thinner than the thickness of the third conductive part,
In the through hole, a sealing resin is disposed so as to cover the second conductive portion .
A semiconductor device.   2. The semiconductor device according to claim 1, wherein the sealing resin is disposed along a side surface in the through hole and has a space communicating with the outside of the semiconductor device.

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