JP5025331B2 - PWM control method and power converter using the same - Google Patents

Description

  The present invention relates to a PWM control method and a power converter using the PWM control method, and more particularly to an improved PWM control method that secures a minimum on-pulse width and obtains linearity of a line voltage and a power converter using the same. About.

  A power converter that obtains an output pulse from a voltage reference using pulse width modulation control (PWM control) usually has a main circuit composed of self-extinguishing switching elements (for example, IGBT), and switches for a predetermined time every modulation period. When the element is turned on and off, a pulsed voltage is output and the average voltage is controlled. In this case, in order to prevent element damage due to surge voltage generated when the switching element is turned off, a capacitor of the snubber circuit is connected in parallel with the switching element, and the surge voltage is suppressed by absorbing the surge voltage in this capacitor. Yes. In order to initialize the voltage of the capacitor, when the switching element is turned on, the capacitor is discharged by maintaining the on state for a certain period of time (this is called the minimum on-pulse width). In addition, the knowledge about the power converter represented by an inverter is widely known, and the description using a chart is abbreviate | omitted here.

  In general, in a power conversion device using PWM control, a gate pulse is generated by comparing a triangular wave carrier with a voltage reference. At this time, if the voltage reference intersects at the tip of the carrier, a gate pulse narrower than the minimum on-pulse width of the switching element may be generated.

As a countermeasure above, a proposal has been made to correct the voltage command while adding a DC bias voltage to the voltage reference of each phase and keeping the line voltage at the command value so that a gate pulse less than the minimum on-pulse width is not created. (For example, refer to Patent Document 1).
JP-A-9-74767 (page 3-5, FIG. 1)

  According to the method disclosed in Patent Document 1, the voltage reference is corrected in a state in which the line voltage is maintained at the original voltage reference. Therefore, if the carrier frequency is somewhat high, the voltage reference fundamental wave component is affected. It is possible to perform correction without giving Further, although depending on the PWM modulation method, the correction of the voltage reference is mainly performed when the voltage reference is close to the zero level, so that the influence of the disturbance due to the correction is small.

  However, PWM is achieved by having a plurality of carriers vertically, such as a power converter configured by connecting unit inverters in series for each phase, or a multi-level power converter configured by dividing the voltage of the same DC power supply. When the control is realized, there are a plurality of tip portions of the carrier, so that even if the voltage is at a normal level, the correction points are increased, so that the correction control becomes complicated, and the voltage correction more than necessary is required. Doing so may disturb the output.

  The present invention has been made in view of the above, and an object of the present invention is to improve the PWM control method so as to ensure the minimum on-pulse width and obtain the linearity of the line voltage by relatively simple and reliable correction. And it is providing the power converter device using the same.

In order to achieve the above object, a PMW control method and a power conversion apparatus using the same according to the present invention perform power conversion by PWM-modulating each of three-phase voltage references with a plurality of longitudinally shifted triangular wave carriers. In the carrier vertical shift type PWM control method for obtaining the gate signal of the device, a forbidden band is provided for controlling the voltage reference not to enter the leading end portion of the carrier, and all the three-phase voltage references are When the forbidden band is not entered, normal PWM control is performed, and when one new phase of the three-phase voltage reference crosses the forbidden band, the new one-phase voltage reference is either above or below the forbidden band. with Kano shift correction so that the boundary line, so that the absolute value of the original three-phase voltage reference selects the upper and lower one of the boundary lines of the forbidden band so that the voltage of the phase decreases the maximum And it is characterized in that the correction of the shift corrected the same amount as performed for the other two phases.

  According to the present invention, there is provided a PWM control method improved to ensure a minimum on-pulse width by relatively simple and reliable correction and to obtain linearity of a line voltage, and a power converter using the PWM control method. It becomes possible.

  Embodiments of the present invention will be described below with reference to the drawings.

Hereinafter, a PWM control method and a power converter using the PWM control method according to Embodiment 1 of the present invention will be described with reference to FIGS.
FIG. 1 is a block diagram showing a PWM controller of a power converter according to the present invention.

  In FIG. 1, for example, three-phase voltage references (Vu *, Vv *, Vw *) output from, for example, a vector control block of the inverter device are input to the forbidden band check processing circuits 11U, 11V, and 11W, respectively. Check whether the exists in the forbidden band area. The check result is given to the voltage reference shift amount calculation circuit 12. Here, in order to define the forbidden band region, a carrier signal obtained from the vertical shift carrier generating circuit 13 is input to the forbidden band check processing circuits 11U, 11V, and 11W.

  In the voltage reference shift amount calculation circuit 12, when the three-phase voltage reference is not within the forbidden band region, the correction amount Vsft, which is the output of the voltage reference shift amount calculation circuit 12, is set to 0 and supplied to the adders 14U, 14V, and 14W, respectively. . In the adders 14U, 14V and 14W, a new three-phase voltage reference (Vu, Vv, Vw) is obtained by adding 0 to each of the original three-phase voltage references (Vu *, Vv *, Vw *). The signal is input to the carrier comparator 15, and the carrier comparator 15 generates a gate signal for each phase. Here, the carrier comparator 15 generates a gate signal of each phase from the carrier signal obtained from the vertical shift carrier generation circuit 13 and a new three-phase voltage reference (Vu, Vv, Vw).

  Further, in the voltage reference shift amount calculation circuit 12, when the original voltage reference is in the forbidden band region even in one phase, a correction amount Vsft is output so that all three phases are outside the forbidden band region, and the adder 14U , 14V and 14W respectively. In the adders 14U, 14V, and 14W, the correction amount Vsft is added to each of the original three-phase voltage references (Vu *, Vv *, Vw *) to obtain a new three-phase voltage reference (Vu, Vv, Vw). These new three-phase voltage references (Vu, Vv, Vw) are input to the carrier comparator 15, and the carrier comparator 15 generates a gate signal for each phase.

FIG. 2 is a circuit configuration diagram showing an example of a power conversion device in which the PWM controller shown in FIG. 1 is used. AC is supplied from the AC power source 1 to the input transformer 2. The input transformer 2 is a transformer in which the secondary winding is multiplexed, and the AC output of this secondary winding is supplied to the unit inverters 3U1, 3U2, 3U3, 3V1, 3V2, 3V3, 3W1, 3W2, and 3W3, respectively. Is done. The AC outputs of the unit inverters 3U1, 3U2, and 3U3 are connected in series, and one end of the series circuit is connected to the neutral point N, and the other end is connected to the U phase of the AC motor 4. Similarly, the AC outputs of the unit inverters 3V1, 3V2 and 3V3 and the unit inverters 3W1, 3W2 and 3W3 form a series circuit, each having one end at the neutral point N and the other end at the V phase of the AC motor 4. Each is connected to the W phase.

  The unit inverters 3U1, 3U2 and 3U3 are given a U-phase gate signal from the PWM controller 10, the unit inverters 3V1, 3V2 and 3V3 and the unit inverters 3W1, 3W2 and 3W3 are supplied with a V-phase gate signal, W Each phase gate signal is provided.

  Here, the U-phase gate signal given to the unit inverters 3U1, 3U2 and 3U3 is obtained from the vertical shift carrier formed by shifting the basic carrier vertically to form three stages and the U-phase corrected voltage reference Vu. The second and third stage carriers become gate pulses that are pulse width modulated by the voltage reference Vu.

  Hereinafter, with reference to FIGS. 3 and 4, the operation in the configuration of the first embodiment shown in FIGS. 1 and 2 will be described. FIG. 3 is an operation flowchart when the PWM controller 10 corrects the voltage reference, and FIG. 4 shows an operation waveform of each part at the time of correction. FIG. 4 shows a case of a vertical shift carrier in which the basic carrier is vertically shifted and configured in six stages.

  As shown in step ST-1 of FIG. 3, first, it is checked whether any phase of the three-phase voltage reference (Vu *, Vv *, Vw *) has entered the prohibited band region. As shown in FIG. 4, the forbidden band region is a region provided in the amplitude direction at the tip of the triangular wave of the six-stage vertical shift carrier, and is formed in a band shape in the middle part of each stage. . Then, if any phase of the original three-phase voltage reference (Vu *, Vv *, Vw *) is not within the forbidden band region, the correction is not performed and the process proceeds to the next sampling.

  When the voltage reference of any phase enters the forbidden band region, correction is made so that the voltage reference of the phase entering the forbidden band region is on the boundary line of the forbidden band region (ST-2). This will be explained with reference to FIG. 4. Although no phase is in the forbidden band region until time t = T1, the boundary line on the negative side (lower part) of the forbidden band 3 is V-phase voltage reference at time t = T1. Across. At time t = T2, the area is within the area of the forbidden band 3 until it crosses the boundary on the positive side (upper side) of the forbidden band 3. At this time, the original voltage reference Vu * is shift-corrected so that the new voltage reference Vu is on the lower boundary line of the forbidden band 3 between T1 and T2 as shown in FIG.

  At the same time that the correction in step 2 is performed, a shift correction having the same value as the correction amount is also performed for the other two phases U and W (ST-3).

  Similarly, in FIG. 4, since no phase is in the forbidden band region in the section from T2 to T3, no correction is made. However, at time t = T3, the W-phase voltage reference indicates the upper boundary line of the forbidden band 1. Cross. Then, it remains within the area of the forbidden band 1 until it crosses the lower boundary line of the forbidden band 1 at time t = T4. At this time, during the period from T3 to T4, the original voltage reference Vw * is shift-corrected so that the new W-phase voltage reference Vw is on the upper boundary line of the forbidden band 1.

When the shift correction as described above is performed,
Vu = Vu * + Vsft
Vv = Vv * + Vsft
Vw = Vw * + Vsft
Therefore, for example, the line voltage between the U phase and the V phase is
Vv−Vu = Vv * + Vsft− (Vu * + Vsft) = Vv * −Vu *
Thus, it can be seen that the influence of the correction amount by the forbidden band limit control does not appear in the line voltage.

  Further, when a voltage reference of another phase newly enters the forbidden band region during the shift correction in the above steps ST-2 and ST-3, paying attention to the new phase, the step ST- Shift correction may be performed in step 2.

  As described above, if the forbidden band width and the control sampling period are appropriately selected with respect to the minimum on-pulse width, the first embodiment ensures the minimum on-pulse width with a relatively simple circuit configuration, and PWM control capable of obtaining the linearity of the line voltage can be realized. If the control sampling period is sufficiently short, the boundary line of the forbidden band cut at the leading end of the carrier may be set to the substantially minimum on-pulse width.

Hereinafter, the power converter concerning Example 2 of the present invention is explained with reference to FIG.5 and FIG.6.
FIG. 5 is an operation flowchart when the PWM controller 10 corrects the voltage reference, and FIG. 6 shows an operation waveform of each part at the time of correction. 5 that are the same as those in the operation flowchart when the PWM controller 10 of the power conversion device according to the first embodiment of the present invention in FIG. 3 corrects the voltage reference. The description is omitted. The difference between the second embodiment and the first embodiment is that after confirming that the voltage reference has entered the forbidden band area in step ST-2, the original voltage reference in the forbidden band area is set to the center of the forbidden band. The point at which step ST-1A for checking whether crossing has been inserted is inserted, and if step ST-1A is YES, step ST-1B for vertically inverting the boundary line of the prohibited band to be corrected and shifted is provided.

  The operation of the second embodiment will be described with reference to operation waveforms of the respective parts at the time of correction in FIG. In FIG. 6, the correction shift operation performed at time t = T1 is the same as the operation in the first embodiment shown in FIG. Since the original V-phase voltage reference Vv * crosses the center of the forbidden band 3 at time t = T5, the voltage reference Vv corrected in step ST-1B is changed from the lower boundary line of the forbidden band 3 to the upper boundary. Move to line.

  The above-described operations specific to the second embodiment are also performed at time t = T5. Here, since the original W-phase voltage reference Vw * crosses the center of the forbidden band 1, the voltage reference Vw corrected in step ST-1B described above is shifted from the upper boundary line to the lower boundary line of the forbidden band 1. ing.

  As described above, according to the second embodiment, the shift correction is performed so that the difference between the original three-phase voltage reference and the three-phase voltage reference after the shift correction is minimized. It is possible to minimize the influence of the disturbance caused by.

Hereinafter, the power converter concerning Example 3 of the present invention is explained with reference to FIG.7 and FIG.8.
FIG. 7 shows an operation flowchart when the PWM controller 10 corrects the voltage reference, and FIG. 8 shows an operation waveform of each part at the time of correction. 7, the same parts as those in the operation flowchart when the PWM controller 10 of the power conversion device according to the first embodiment of the present invention in FIG. 3 corrects the voltage reference are denoted by the same reference numerals. The description is omitted. The difference between the third embodiment and the first embodiment is that the phase having the maximum absolute value when the normal shift correction is performed after confirming that the voltage reference has entered the forbidden band region in step ST-2. Point ST-1C for checking whether or not the voltage reference increases is inserted, and if step ST-1C is YES, step ST-1B is provided for vertically inverting the boundary line of the prohibited band to be corrected and shifted. It is.

  The operation of the third embodiment will be described with reference to the operation waveforms of the respective parts at the time of correction in FIG. In FIG. 8, the correction shift operation performed at time t = T1 is the same as the operation in the first embodiment shown in FIG. This is because the normal shift correction direction of the V-phase voltage reference is a correction in the direction of decreasing the U-phase voltage reference having the maximum absolute value at the time point T1. However, in the correction at time t = T3, if the normal correction shown in FIG. 4 of the first embodiment is performed, the correction will be in the direction of increasing the U-phase voltage reference having the maximum absolute value. Therefore, the voltage reference Vw corrected in step ST-1B is shifted from the upper boundary line of the forbidden band 3 to the lower boundary line. In this way, as shown in FIG. 8, by the shift correction at time t = T3, the U-phase voltage reference having the maximum absolute value at the time t = T3 can be corrected in the direction of decreasing. .

  As described above, according to the third embodiment, the shift correction is performed in such a direction that the voltage of the phase having the maximum absolute value of the original three-phase voltage reference is reduced. It is possible to realize efficient PWM control that does not require extra.

The block block diagram which shows the PWM controller of the power converter device by this invention. The circuit block diagram which shows an example of the power converter device in which the PWM controller shown in FIG. 1 is used. The operation | movement flowchart when the PWM controller which concerns on Example 1 of this invention correct | amends a voltage reference. Operation waveforms of each part at the time of voltage reference correction according to the first embodiment of the present invention. The operation flowchart when the PWM controller which concerns on Example 2 of this invention correct | amends a voltage reference. The operation waveform of each part at the time of the voltage reference correction | amendment of Example 2 of this invention. The operation | movement flowchart when the PWM controller which concerns on Example 3 of this invention correct | amends a voltage reference. The operation waveform of each part at the time of the voltage reference correction | amendment of Example 3 of this invention.

Explanation of symbols

1 AC power source 2 Input transformer 3U1, 3U2, 3U3, 3V1, 3V2, 3V3, 3W1, 3W2, 3W3 Unit inverter 4 AC motor

10 PWM controller 11U, 11V, 11W Forbidden band check processing circuit 12 Voltage reference shift amount calculation circuit 13 Vertical shift carrier generator 14U, 14V, 14W Adder 15 Carrier comparator

Claims (5)

In the carrier longitudinal shift type PWM control method, wherein each of the three-phase voltage references is PWM-modulated by a plurality of longitudinally shifted triangular wave carriers to obtain the gate signal of the power converter,
Providing a forbidden band for controlling the voltage reference not to enter the tip of the carrier,
When all the three-phase voltage references do not enter the forbidden band, normal PWM control is performed,
Wherein when a new one phase of the three-phase voltage reference has crossed the forbidden band, the voltage reference of the new one phase shifts corrected so that the upper or lower boundary lines of the forbidden band, the original Selecting either above or below the boundary line of the forbidden band so that the voltage of the phase having the maximum absolute value of the three-phase voltage reference of
A PWM control method characterized in that the same amount of correction as the amount of shift correction is performed on the other two phases. 2. The PWM control method according to claim 1, wherein the width of the forbidden band is selected so that the gate signal can secure a minimum on-pulse width. The power converter is
An input transformer having a plurality of secondary windings;
A plurality of unit inverters connected to the secondary windings and outputting a single-phase AC voltage having a desired frequency,
The plurality of unit inverters are divided into three groups for each phase, the outputs are connected in series for each group, one end thereof is connected to each other as a neutral point, and a three-phase AC output is obtained from the other end. The PWM control method according to claim 1, wherein the PWM control method is a power conversion device. A power conversion device having a carrier vertical shift type PWM control unit that obtains a gate signal by PWM-modulating each of three-phase voltage references with a plurality of vertically shifted triangular wave carriers,
The PWM control unit
Having a forbidden band for controlling the voltage reference not to enter the tip of the carrier,
When all the three-phase voltage standards do not enter the prohibited band, normal PWM control is performed.
When a new phase of the three-phase voltage reference crosses the forbidden band, shift correction is performed so that the new one-phase voltage reference is on a boundary line above and below the forbidden band. Selecting either above or below the boundary line of the forbidden band so that the voltage of the phase having the maximum absolute value of the three-phase voltage reference of
A power conversion apparatus characterized in that the same amount of correction as the shift correction is performed on the other two phases. The power converter is
An input transformer having a plurality of secondary windings;
A plurality of unit inverters connected to the secondary windings and outputting a single-phase AC voltage having a desired frequency,
The plurality of unit inverters are divided into three groups for each phase, the outputs are connected in series for each group, one end thereof is connected to each other as a neutral point, and a three-phase AC output is obtained from the other end. The power conversion device according to claim 4.

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