JP2007097394A - Electric power transformer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the electric power transformer which can make a current pulse width in a DC side to the width or more with a current detectable to convert electric power by pulse width modulation without generating mutual intervention of switching. <P>SOLUTION: The electric power transformer for variably speed controlling an electric motor comprises a current detection part detecting a current in a DC side of the electric power transformer to detect this detected current and an AC current of three phase part flowing in an electric motor from a gate signal, a motor control part outputting an AC voltage command signal of three phase part based on the detected AC current signal of three phase part and on a speed command signal given from outside, a voltage command correction part correcting the AC voltage command signal of three phase part with a pulse width of the current in the DC side as made in a width or more with a current detectable in a period with an interphase voltage of the AC current signal of three phase part smaller than a prescribed value, and a PWM control part outputting the gate signal by pulse width modulation based on the AC voltage command signal of three phase part corrected in the voltage command correction part. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power converter that performs power conversion by pulse width modulation.

In a power converter that converts direct current into alternating current by pulse width modulation, there is a method described in Non-Patent Document 1 as a method of detecting an alternating current from a direct current. As pulse width modulation methods suitable for this current detection method, there are methods described in Patent Document 1 and Patent Document 2. Details of the PWM control unit and the current detection unit are described in Patent Document 3, for example.

JP 2001-327173 A JP 2002-119062 JP JP 2002-95263 A Derivation of motor line-current waveforms from the DC-link current of an inverter ”IEE PROCEEDING, Vol.136, Pt.B, JULY 1989, pp.196-204

In Non-Patent Document 1, when the AC voltage is low, the current pulse width on the DC side is small, so that it is difficult to stably detect the current on the DC side. On the other hand, in Patent Document 1, in the first half of one cycle of the pulse width modulation carrier wave, correction is made so that the current pulse width on the DC side is sufficient to stably detect the current, and in the latter half, the AC side voltage is corrected. Is corrected to a desired voltage.
For this reason, in the latter half, the pulse width necessary for current detection is not ensured, and it is necessary to calculate the modulated wave with a period that is half the period of the carrier wave, and a high-performance microcomputer is required for the calculation. . Also in Patent Document 1, the current pulse width necessary for detecting the current may not be ensured.

Further, in the methods described in Patent Document 1 and Patent Document 2, there is a case where switching of a certain phase and switching of another phase are performed in a short time, and normal switching cannot be performed due to mutual interference occurring at this time. Cannot be prevented.

As described above, when detecting the output current of the power converter from the DC current Idc in the conventional power converter using pulse width modulation for converting DC to AC, if the voltage command signal between the phases is small, the DC current The pulse width of Idc becomes narrow and detection is difficult.

The object of the present invention is to make the current pulse width on the DC side equal to or greater than the width capable of current detection,
An object of the present invention is to provide a power converter that performs power conversion by pulse width modulation that does not cause mutual interference of switching.

  The present invention converts a DC voltage connected to a DC power source into a three-phase variable frequency variable voltage by turning on and off a plurality of switching elements with a gate signal generated by a pulse width modulation means, and outputs it to a motor. In the power converter that controls the electric motor at a variable speed, a current detection unit that detects a current on the DC side of the power converter and detects an AC current corresponding to three phases flowing to the motor from the detected current and the gate signal; A motor control unit that outputs an AC voltage command signal for three phases based on the detected AC current signal for three phases and a speed command signal given from the outside, and an interphase voltage of the AC current signal for three phases from a predetermined value A voltage command correction unit that corrects the AC voltage command signal for the three phases so that the pulse width of the current on the DC side is equal to or larger than the current detectable width in a small period, and the three phases corrected by the voltage command correction unit Exchange of minutes Characterized by comprising a PWM control section and pulse-width modulation based on the voltage command signal and outputs the gate signal.

  According to the present invention, by correcting the AC voltage command for performing the pulse width modulation for correcting the AC voltage command signal for the three phases so that the current pulse width on the DC side is equal to or larger than the current detection width, Since the motor current for three phases can always be detected, the motor control by the power converter based on the current can be stabilized. In addition, since the interval at which the pulse changes is secured, the mutual interference of switching can be suppressed.

Example 1
FIG. 1 is a configuration diagram showing an example of a power converter using the pulse width modulation method of the present invention. In FIG. 1, a rectifier circuit 2, a smoothing capacitor 3, a current detector 5, a current detector 7, a motor controller 8 for outputting a first AC voltage command signal based on a speed command given from the outside, a first AC voltage A voltage command correction unit 9 that corrects the second AC voltage command signal based on the command signal, a PWM control unit 6 that performs pulse width modulation based on the second AC voltage command signal and outputs a gate signal, and a DC voltage based on the gate signal A power converter 10 that converts a DC voltage having switching elements Qu, Qv, Qw, Qx, Qy, and Qz, which convert the AC voltage into an AC voltage, an AC power supply 1, and a motor 4 It is.

The voltage supplied from the AC power source 1 is rectified by the rectifier circuit 2, further smoothed by the smoothing capacitor 3, and converted into a DC voltage. Converted DC voltage into switching elements Qu, Qv, Qw, Qx, Qy,
And the voltage of U phase, V phase, and W phase connected to the motor 4 is controlled by switching Qz.

The current detector 5 detects the DC current Idc flowing through the smoothing capacitor 3 from the switching elements Qx, Qy, and Qz, and the current detection unit 7 detects the detected DC current Idc and the gate signals Gu, Gv output from the PWM control unit 6. , Gw, Gx, Gy, and Gz, a U-phase motor current Iu, a V-phase motor current Iv, and a W-phase motor current Iw flowing to the motor 4 are detected. Based on the detected motor currents Iu, Iv, and Iw and the speed command Fr * given from the outside, the motor control unit 8 performs the first U-phase AC voltage command signal Eu.
The first V-phase AC voltage command signal Ev and the first W-phase AC voltage command signal Ew are output.

The voltage command correction unit 9 corrects the first AC voltage command signals Eu, Ev, and Ew, thereby correcting the second U-phase AC voltage command signal Eu ′, the second V-phase AC voltage command signal Ev ′, and The second W-phase AC voltage command signal Ew ′ is output, and the PWM controller 6 outputs the second AC voltage command signals Eu ′, Ev ′, and Ew ′.
Based on the above, pulse width modulation is performed, and gate signals Gu, Gv, Gw, Gx, Gy, and Gz that respectively command switching of the switching elements Qu, Qv, Qw, Qx, Qy, and Qz are output.

In this embodiment, a DC voltage is generated from the AC power source 1 from the rectifier circuit 2 and the smoothing capacitor 3. However, when this is replaced with a DC power source, the rectifier circuit 2 and the smoothing capacitor 3 are unnecessary.

In the voltage command correction unit 9, any two of the second AC voltage command signals Eu ′, Ev ′, and Ew ′ are selected.
The difference between the two AC voltage command signals is equal to or greater than a predetermined value, and the first AC voltage command signals Eu, Ev, and Ew and the second AC voltage command signals Eu ′, Ev ′, and Ew ′ The second AC voltage command signals Eu ′, Ev ′, and Ew ′ are calculated so that the absolute values of the error integrated values dEu, dEv, and dEw obtained by integrating the respective differences are not more than a certain value.

Specifically, the voltage command correction unit 9 accumulates the differences between the first AC voltage command signals Eu, Ev, and Ew and the second AC voltage command signals Eu ′, Ev ′, and Ew ′. Error accumulated value dEu, dEv,
And dEw, and the error integrated values dEu, dEv, and dEw and the first AC voltage command signals Eu, Ev, and Ew
Are processed so that the difference between any two AC voltage command signals of the second AC voltage command signals Eu ′, Ev ′, and Ew ′ becomes equal to or greater than a predetermined value based on the value obtained by adding .

The voltage command correction unit 9 will be described in more detail with reference to FIGS. FIG. 2 is a diagram illustrating the timing at which the voltage command correction unit 9 updates the second AC voltage command signals Eu ′, Ev ′, and Ew ′ that are outputs. In FIG. 2, 201 is a carrier wave used for pulse width modulation of the PWM control unit 6, and 202 to 208 are timings at which the voltage command correction unit 9 updates the output. The voltage command correction unit 9 performs processing to be described later for each half cycle of the carrier wave 201 to generate a second AC voltage command signal Eu ′.
, Ev ′, and Ew ′. The process shown in FIGS. 3 and 4 is the main process, and the process shown in FIG. 5 is a subroutine.

FIG. 3 is a diagram showing a flow of performing the main processing of the voltage command correction unit. The voltage command correction unit 9 first executes the process 300. In the process 300, the addition result of the U-phase AC voltage command signal Eu and the U-phase error integrated value dEu is added to the third U-phase AC voltage command signal Eu0, and the V-phase AC voltage command signal Ev and the V-phase error integrated value dEv are added. The result is assigned to the third V-phase AC voltage command signal Ev0, and the addition result of the W-phase AC voltage command signal Ew and the W- phase error integrated value dEw is assigned to the third W-phase AC voltage command signal Ew0. The process 301 is executed.

In the process 301, the third U-phase AC voltage command signal Eu0 and the third V-phase AC voltage command signal Ev0 are compared. If Eu0 is equal to or greater than Ev0, the process 302 is executed, and Eu0 is less than Ev0. If
Next, the process 401 of FIG. 4 is performed.

In process 302, the third V-phase AC voltage command signal Ev0 is compared with the third W-phase AC voltage command signal Ew0. If Ev0 is equal to or greater than Ew0, process 303 is executed, and Ev0 is less than Ew0. If
Processing 306 is executed.

In the process 303, the third U-phase AC voltage command signal Eu0 is set to the first maximum voltage Ea, the third V-phase AC voltage command signal Ev0 is set to the first intermediate voltage Eb, and the third W-phase AC voltage command is set. The process 304 is executed by substituting the signal Ew0 for the first minimum voltage Ec. Details of the correction process of the process 304 will be described later.

After the process 304, the process 305 is executed, the second maximum voltage Ea ′ is set to the second U-phase AC voltage command signal Eu ′, and the second intermediate voltage Eb ′ is set to the second V-phase AC voltage command signal Ev. 'To the second minimum voltage Ec'
Are substituted for the second W-phase AC voltage command signal Ew ′, respectively, and then processing 313 is executed.

In process 313, the third U-phase AC voltage command signal Eu0 to the second U-phase AC voltage command signal Eu ′.
Is the value obtained by subtracting the second V-phase AC voltage command signal Ev 'from the third V-phase AC voltage command signal Ev0, and the V-phase error integrated value dEv is The W-phase error integrated value dEw is updated with the value obtained by subtracting the second W-phase AC voltage command signal Ew ′ from the third W-phase AC voltage command signal Ew0, and the processing of the voltage command correction unit 9 is finished. .

When the process 306 is executed after the process 302, the process 306 compares the third U-phase AC voltage command signal Eu0 with the third W-phase AC voltage command signal Ew0, and Eu0 is equal to or greater than Ew0. Is
Next, the process 307 is executed. If Eu0 is less than Ew0, the process 310 is executed.

When the process 307 is executed after the process 306, in the process 307, the third U-phase AC voltage command signal Eu0 is set to the first maximum voltage Ea, and the third W-phase AC voltage command signal Ew0 is set to the first intermediate voltage. The third V-phase AC voltage command signal Ev0 is substituted for the first minimum voltage Ec for the voltage Eb, and the processing 308 is executed. Details of the correction processing of processing 308 will be described later.

After the process 308, the process 309 is executed, the second maximum voltage Ea ′ is set to the second U-phase AC voltage command signal Eu ′, and the second intermediate voltage Eb ′ is set to the second W-phase AC voltage command signal Ew. 'To the second minimum voltage Ec'
Is substituted for the second V-phase AC voltage command signal Ev ′, the process 313 is executed, and the process of the voltage command correction unit 9 is terminated.

When the process 310 is executed after the process 306, in the process 310, the third W-phase AC voltage command signal Ew0 is set to the first maximum voltage Ea, and the third U-phase AC voltage command signal Eu0 is set to the first intermediate voltage. The third V-phase AC voltage command signal Ev0 is substituted for the first minimum voltage Ec for the voltage Eb, and the processing 311 is executed. Details of the correction processing of processing 311 will be described later.

After the process 311, the process 312 is executed, and the second maximum voltage Ea ′ is used as the second W-phase AC voltage command signal Ew ′, and the second intermediate voltage Eb ′ is used as the second U-phase AC voltage command signal Eu. 'To the second minimum voltage Ec'
Is substituted for the second V-phase AC voltage command signal Ev ′, the process 313 is executed, and the process of the voltage command correction unit 9 is terminated.

FIG. 4 is a diagram showing another part of the flow for performing the main processing of the voltage command correction unit 9 of FIG. If Eu0 is less than Ev0 in process 301 in FIG. 4, process 401 is executed. In the process 401, the third U-phase AC voltage command signal Eu0 is compared with the third W-phase AC voltage command signal Ew0. If Eu0 is equal to or higher than Ew0, the process 402 is executed next, and Eu0 is less than Ew0. If so, the process 405 is executed.

In process 402, the third V-phase AC voltage command signal Ev0 is set to the first maximum voltage Ea, the third U-phase AC voltage command signal Eu0 is set to the first intermediate voltage Eb, and the third W-phase AC voltage command is set. The process E403 is executed by substituting the signal Ew0 for the first minimum voltage Ec.

After the process 403, the process 404 is executed, the second maximum voltage Ea ′ is set to the second V-phase AC voltage command signal Ev ′, and the second intermediate voltage Eb ′ is set to the second U-phase AC voltage command signal Eu. 'To the second minimum voltage Ec'
Are substituted into the second W-phase AC voltage command signal Ew ′, and the process 313 is executed to finish the process of the voltage command correction unit 9.

In process 405, the third V-phase AC voltage command signal Ev0 is compared with the third W-phase AC voltage command signal Ew0. If Ev0 is equal to or greater than Ew0, process 406 is executed and Ev0 is less than Ew0. If
Next, processing 409 is executed.

In process 406, the third V-phase AC voltage command signal Ev0 is set to the first maximum voltage Ea, the third W-phase AC voltage command signal Ew0 is set to the first intermediate voltage Eb, and the third U-phase AC voltage command is set. The signal Eu0 is substituted for the first minimum voltage Ec, and the process 407 is executed.

After the process 407, the process 408 is executed, the second maximum voltage Ea ′ is set to the second V-phase AC voltage command signal Ev ′, and the second intermediate voltage Eb ′ is set to the second W-phase AC voltage command signal Ew. 'To the second minimum voltage Ec'
Are substituted into the second U-phase AC voltage command signal Eu ′, respectively, processing 313 is executed, and the processing of the voltage command correction unit 9 is terminated.

In process 409, the third W-phase AC voltage command signal Ew0 is set to the first maximum voltage Ea, the third V-phase AC voltage command signal Ev0 is set to the first intermediate voltage Eb, and the third U-phase AC voltage command is set. The process 410 is executed by substituting the signal Eu0 for the first minimum voltage Ec.

After the process 410, the process 411 is executed, and the second maximum voltage Ea ′ is used as the second W-phase AC voltage command signal Ew ′, and the second intermediate voltage Eb ′ is used as the second V-phase AC voltage command signal Ev. 'To the second minimum voltage Ec'
Are substituted into the second U-phase AC voltage command signal Eu ′, respectively, processing 313 is executed, and the processing of the voltage command correction unit 9 is terminated.

With the above processing, the maximum value of the third AC voltage command signals Eu0, Ev0, and Ew0 is set to the first value.
Then, the middle value is substituted for the first intermediate voltage Eb, the minimum value is substituted for the first minimum voltage Ec, and the correction processing is executed. The second maximum voltage Ea ′, which is the execution result of the correction process, the second
Intermediate voltage Eb ′ and second minimum voltage Ec ′ to second AC voltage command signals Eu ′, Ev ′, and Ew ′ according to the magnitude relationship of third AC voltage command signals Eu0, Ev0, and Ew0. substitute. Further, the first AC voltage command signals Eu, Ev, and Ew and the second AC voltage command signal Eu ′,
The errors from Ev 'and Ew' are managed by error accumulated values dEu, dEv, and dEw, and error accumulated values dEu, dEv
, And the third AC voltage command signals Eu0, Ev0, and Ew0 obtained by adding dEw, the calculation including the error up to the previous time is performed, and the error integrated value does not continue to increase.

FIG. 5 is a diagram showing the flow of correction processing executed in the processing 304, processing 308, and processing 311 in FIG. 3 and the processing 403, processing 407, and processing 410 in FIG. In the correction process, the difference between the maximum voltage and the intermediate voltage that determines the pulse width of the DC current, and the difference between the minimum voltage and the intermediate voltage are equal to or greater than the minimum voltage Emin corresponding to the pulse width necessary to detect the DC current. Make corrections.

In the correction process, in the first process 501, the difference between the first maximum voltage Ea and the first intermediate voltage Eb is compared with the minimum voltage Emin. If the difference between Ea and Eb is equal to or greater than Emin, then the process 502 is performed. Run and Ea
If the difference in Eb is less than Emin, the process 503 is executed next. In the process 502, since correction is not necessary, the first maximum voltage Ea is directly substituted for the second maximum voltage Ea ′, and the process 504 is executed.

In the process 503, since correction is necessary, a value obtained by adding the minimum voltage Emin to the first intermediate voltage Eb is substituted into the second maximum voltage Ea ′, and the process 504 is executed. As a result, the second maximum voltage
The difference between Ea and the first intermediate voltage Eb (same as the second intermediate voltage Eb) is the minimum voltage Emin, and the magnitude relationship does not change.

In the process 504, the difference between the first intermediate voltage Eb and the first minimum voltage Ec is compared with the minimum voltage Emin.
If the difference between Eb and Ec is equal to or greater than Emin, process 505 is executed. If the difference between Eb and Ec is less than Emin, process 506 is executed next.

In the process 505, since correction is not necessary, the first minimum voltage Ec is directly substituted for the second minimum voltage Ec ′, and the process 507 is executed.

In the process 506, since correction is necessary, a value obtained by subtracting the minimum voltage Emin from the first intermediate voltage Eb is substituted for the second minimum voltage Eb ′, and the process 507 is executed. Thus, the difference between the second minimum voltage Ec and the first intermediate voltage Eb (same as the second intermediate voltage Eb) becomes the minimum voltage Emin, and the magnitude relationship does not change. In process 507, the first intermediate voltage Eb is substituted into the second intermediate voltage Eb ′.

By the correction processing described above, the difference between the second maximum voltage Ea ′ and the second intermediate voltage Eb ′ and the difference between the second intermediate voltage Eb ′ and the second minimum voltage Ec ′ become equal to or greater than the minimum voltage Emin. Since the magnitude relationship does not change before and after the correction, the second maximum voltage Ea ′ ≧ the second intermediate voltage Eb ′ ≧ the second minimum voltage.
Ec '. Note that the minimum voltage Emin is used as the value added to the first intermediate voltage Eb in the process 503 and the value subtracted from Eb in the process 506, but a value larger than the minimum voltage Emin is used instead of the minimum voltage Emin. However, the purpose of correction can be achieved. However, since the correction amount becomes large at this time, the voltage error before and after the correction becomes large.

Also, the difference between the maximum value (Ea) and the intermediate value (Eb) is not less than a certain value (Emin), and the difference between the intermediate value (Eb) and the minimum value (Ec) is not less than a certain value (Emin). The difference between Ea) and the minimum value (Ec) is not less than a certain value (Emin), and in this embodiment, each of the three command signal differences in the first AC voltage command signal is not less than a predetermined value.

FIG. 6 is a circuit diagram showing a configuration of the PWM control unit 6. Carrier wave generation unit 601 and U phase comparison unit 602
, V phase comparison unit 603, W phase comparison unit 604 and inversion units 605, 606, 607. Carrier wave generator 601
Outputs a carrier wave C that is a triangular wave of frequency Fc based on the carrier frequency command Fc. The U-phase comparison unit 602 that outputs the gate signal Gu compares the U-phase AC voltage command signal Eu with the carrier C,
When the phase AC voltage command signal Eu is large, the H level is output, and when it is small, the L level is output. The inversion unit 605 that outputs the gate signal Gx outputs the H level when the gate signal Gu is at the L level, and outputs the L level when the gate signal Gu is at the H level.

Similarly, the V-phase comparison unit 603 that outputs the gate signal Gv receives the V-phase AC voltage command signal Ev and the carrier wave C.
The W-phase comparison unit 604 that outputs the gate signal Gw compares the W-phase AC voltage command signal Ew with the carrier C and outputs the same as the U-phase comparison unit 602. Further, the inverting unit 606 that outputs the gate signal Gy and the inverting unit 607 that outputs the gate signal Gz output the same as the gate signal Gx.

FIG. 7 is a diagram for explaining a specific operation of the present embodiment. In the graph shown in FIG. 7, the horizontal axis represents time, and the vertical axis represents the first AC voltage command signals Eu, Ev, and Ew, and the second AC voltage command signals Eu ′ and Ev ′, respectively.
Ew ′, pulse width modulation carrier wave C, error integrated values dEu, dEv and dEw, gate signals Gu, Gv and Gw, and DC current Idc.

The first AC voltage command signals Eu, Ev, and Ew are input signals of the voltage command correction unit 6 shown in FIG. 1, and their values are 0.3, −0.1, and −0.3, respectively. Second AC voltage command signal Eu ′,
Ev ′ and Ew ′ are obtained by correcting each difference to a predetermined value (0.3) or more based on the first AC voltage command signals Eu, Ev, and Ew. Both are changing sequentially.

The error integrated values dEu, dEv, and dEw are integrated values of differences between the first AC voltage command signals Eu, Ev, and Ew and the second AC voltage command signals Eu ′, Ev ′, and Ew ′. The values are 0.0, 0.0,
And 0.1. The minimum voltage Emin is 0.3, and the error integrated values dEu, dEv
And the absolute value of dEw are both equal to or greater than a predetermined value.

As an example, the operation of the voltage command correction unit 9 at time T1 is as follows. In the process 300 of FIG. 3, the third AC voltage command signals Eu0, Ev0, and Ew0 are 0.3, −0.1,
Substitute -0.2. At this time, since Eu0>Ev0> Ew0, the process 303 is executed through the process 301 and the process 302 in FIG. In the process 303, 0.3 is substituted for the first maximum voltage Ea, -0.1 is substituted for the first intermediate voltage Eb, and -0.2 is substituted for the first minimum voltage Ec. Next, the correction process 304 in FIG.
That is, the correction process shown in FIG. 5 is executed.

In the correction process 304, Ea-Eb = 0.4 is compared with the minimum voltage Emin = 0.3 in the process 501 of FIG. Since Ea-Eb is equal to or higher than Emin, the process 502 is executed, and the second maximum voltage Ea ′ is set to 0.3.
Is assigned. In the next process 504, Eb-Ec = 0.1 is compared with the minimum voltage Emin = 0.3.
Since it is less than Emin, processing 506 is executed. In process 506, the second minimum voltage Ec ′ is set.
Substitute -0.4. In process 507, -0.1 is substituted for the second intermediate voltage Eb ', and the correction process ends.

Next, the process 305 in FIG. 3 is executed, and 0.3, −0.1, and −0.4 are assigned to the second AC voltage command signals Eu ′, Ev ′, and Ew ′, respectively. In the next process 313, the error integrated values dEu, dEv, and dEw are updated to 0.0, 0.0, and -0.2, respectively.

Based on the second AC voltage command signals Eu ′, Ev ′ and Ew ′ output from the voltage command correction unit 9 described above and the carrier wave C, the PWM control unit 6 performs pulse width modulation. The PWM control unit 6 compares the magnitudes of the carrier wave C and the second AC voltage command signals Eu ′, Ev ′, and Ew ′ that are the modulated waves, respectively. If the modulated wave is larger, the corresponding gate signal is set to H. If the level is small, the L level is output.

Therefore, during the period from time T1 to time T2, the U-phase gate signal Gu first changes to the H level from the state where the gate signals Gu, Gv and Gw are all at the L level, and the second U-phase AC voltage command signal Eu ′.
And the V-phase gate signal Gv changes to the H level with a delay corresponding to the difference between the second V-phase AC current command Ev ′ and the second V-phase AC current command Ev ′. Thereafter, the W-phase gate signal Gw changes to the H level with a delay corresponding to the difference between the second V-phase AC voltage command signal Ev ′ and the second W-phase AC current command Ew ′. Therefore, since the difference between the second AC voltage command signals Eu ′, Ev ′, and Ew ′ is equal to or higher than the minimum voltage Emin, after any gate signal changes, until another gate signal changes. At least the lowest voltage
Time corresponding to Emin is secured.

Next, the relationship between the direct current Idc and the gate signal in the period from time T1 to T2 will be described. FIG. 7 shows a case where the U-phase motor current Iu and the V-phase motor current Iv are positive and the W-phase motor current Iw is negative. When the gate signals Gu, Gv, and Gw are all at the L level, the gate signals Gx, Gy,
All Gz are H. At this time, since the switching elements Qu, Qv, and Qw are in the OFF state and the switching elements Qx, Qy, and Qz are in the ON state, the current is supplied from the switching elements Qx and Qy to the motor 4.
, Flows from the motor 4 to the switching element Qz, and returns to the switching elements Qu and Qy again. For this reason, no current flows on the DC side, and the DC current Idc is zero.

Next, when the U-phase gate signal Gu changes to the H level, the X-phase gate signal Gx changes to the L level, the switching element Qu is turned on, and the switching element Qx is turned off. At this time, current flows from the positive electrode of the smoothing capacitor 3 to the motor 4 through the switching element Qu, and the motor 4
To the negative electrode of the smoothing capacitor 3 through the switching elements Qy and Qz. Therefore, direct current
The same current as U-phase motor current Iu flows through Idc. Therefore, if the DC current is detected during this period, the U-phase motor current Iu can be detected.

Next, when the V-phase gate signal Gv changes to the H level, the Y-phase gate signal Gy changes to the L level, the switching element Qv is turned on, and the switching element Qy is turned off. At this time, the current flows from the positive electrode of the smoothing capacitor 3 to the motor 4 through the switching elements Qu and Qv, and flows from the motor 4 to the negative electrode of the smoothing capacitor 3 through the switching element Qz. Therefore, direct current
A current having the same magnitude and reverse polarity as the W-phase motor current Iw flows through Idc. Therefore, if a direct current is detected during this period, the W-phase motor current Iw can be detected.

Next, when the W-phase gate signal Gw changes to the H level, the Z-phase gate signal Gz changes to the L level, the switching element Qw is turned on, and the switching element Qz is turned off. At this time,
The DC current Idc is 0 as in the case where the gate signals Gu, Gv, and Gw are all at the L level.

Therefore, after the gate signal Gu changes from the L level to the H level, the period from when the gate signal Gv changes from the L level to the H level and after the gate signal Gv changes from the L level to the H level, The period until Gw changes from the L level to the H level needs to be secured for a sufficient time to detect the DC current Idc. During this period, the difference between the second U-phase AC voltage command signal Eu ′ and the second V-phase AC voltage command signal Ev ′ and the second V-phase AC voltage command signal Ev ′ and the second W-phase AC voltage command Since it is determined by the difference in signal Ew ', when these differences are corrected to be equal to or higher than the minimum voltage Emin, the minimum voltage Emin is set to a value corresponding to a time sufficient to detect the DC current Idc. A period for detecting the DC current Idc can be secured.

In addition, the averages of the second AC voltage command signals Eu ′, Ev ′, and Ew ′ during the period of time T1 to T8 are 0.33, −0.10, and −0.29, respectively, and the first AC voltage command signals Eu, Ev , Almost equal to Ew. Further, the average of the second AC voltage command signals Eu ′, Ev ′, and Ew ′ and the first AC voltage command signal Eu.
, Ev, Ew are managed by the fact that the W-phase error integrated value dEu is 0.1 and the U-phase error integrated value dEu at time T7 to T8 is 0.2.

Further, as is clear from FIG. 7, the absolute values of the error integrated values dEu, dEv, and dEw are less than a certain value.

In this embodiment, the error integrated value is used to suppress the voltage error due to correction. However, in applications where the requirement for the voltage error is not strict, the process related to the error integrated value can be omitted. Specifically, the error integrated values dEu, dEv, and dEw in the process 300 of FIG. 3 are set to 0, and the first AC voltage command signals Eu, Ev, and E3 are set as third AC voltage command signals Eu0, Ev0, and Ew0. This is realized by using Ew and omitting the processing 313. Thereby, processing can be reduced. In this case, in the voltage command correction unit 9, any two alternating currents among the second alternating voltage command signals Eu ′, Ev ′, and Ew ′ are based on the first alternating voltage command signals Eu, Ev, and Ew. Processing is performed so that the difference between the voltage command signals is equal to or greater than a predetermined value.

According to the present embodiment, the pulse width of the direct current Idc is always secured so that a current can be detected, and a necessary period is ensured between the arbitrary switching and the switching, so that no mutual interference occurs. In this embodiment, the CT of the motor current of the small capacity inverter
This makes it possible to achieve high performance, versatility, and protection of switching elements with a large capacity, and to stably detect current at low speed.

Furthermore, in the present embodiment, a direct current can be sampled and held even with a low voltage and a high carrier, and narrow recovery associated with other phase switching can be prevented.

In addition, according to the present embodiment, the difference between any two-phase modulated waves can be made the minimum value or more, and therefore, in the pulse output as a result of pulse width modulation, the interval at which any two pulses change can be set. Can be more than the time corresponding to the minimum value. Further, by applying this pulse width modulation method to the power converter, the pulse width of the direct current becomes longer than the time corresponding to the minimum value, so that the direct current can be detected.

Furthermore, since the current pulse width of the direct current is always ensured to be greater than the width that allows current detection,
Even if the update of the correction result is an integral multiple of the half cycle of the carrier wave, current detection will not be hindered, so the calculation cycle can be increased, the amount of calculation per unit time of the pulse width modulation method can be reduced, In addition, since the interval at which the pulses change is secured, pulse width modulation that does not cause mutual interference of switching can be obtained.

(Example 2)
FIG. 8 is a diagram illustrating an example in which the timing at which the voltage command correction unit updates the second AC voltage command signals Eu ′, Ev ′, and Ew ′ that are outputs is changed. In FIG. 8, reference numeral 201 denotes a PWM control unit 6.
801 to 804 are timings when the voltage command correction unit 9 updates the output. The voltage command correction unit 9 generates a second AC voltage command signal for each cycle of the carrier wave 201.
Eu ', Ev', and Ew 'are output. In this embodiment, since the pulse width of the direct current Idc is always ensured, current detection can always be performed in a half cycle of the carrier wave. For this reason, there is no problem in current detection even when the output timing is once in one cycle as shown in FIG. Further, the output timing cycle can be extended by an integral multiple of the half cycle of the carrier wave as long as the update cycle of the voltage command signal does not become a problem. As a result, the calculation cycle of the voltage command correction unit 9 can be lengthened, and the amount of calculation per unit time can be reduced. Other effects similar to those of the first embodiment can be obtained.

The block diagram of the pulse width modulation apparatus of this invention. The figure which shows the timing which updates the 2nd alternating voltage command signal of a voltage command correction | amendment part. The flowchart which shows the process sequence of a voltage command correction | amendment part. The flowchart which shows the process sequence of a voltage command correction | amendment part. The flowchart which shows the process sequence of the correction | amendment process part of FIG.3 and FIG.4. The circuit diagram which shows the structure of the PWM control part which concerns on this invention. The figure which shows the operation example of the pulse width modulation method of this invention. The figure which shows the timing which updates the 2nd alternating voltage command signal of a voltage command correction | amendment part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... AC power source, 2 ... Rectifier circuit, 3 ... Smoothing capacitor, 4 ... Motor, 5 ... Current detector, 6
DESCRIPTION OF SYMBOLS ... PWM control part, 7 ... Current detection part, 8 ... Motor control part, 9 ... Voltage command correction part, 10 ... Power converter, Qu, Qv, Qw, Qx, Qy, and Qz ... Switching element.

Claims (1)

A plurality of switching elements are turned on / off by a gate signal generated by a pulse width modulation means to convert a DC voltage connected to a DC power source into a three-phase variable frequency variable voltage, which is output to an electric motor to enable the electric motor. In a power converter that performs shift control,
A current detection unit for detecting a current on a DC side of the power converter, and detecting an AC current corresponding to three phases flowing from the detected current and the gate signal to the motor;
A motor control unit that outputs an AC voltage command signal for three phases based on the detected AC current signal for three phases and a speed command signal given from the outside;
Voltage for correcting the AC voltage command signal for the three phases so that the pulse width of the DC current is equal to or greater than the current detectable width during a period when the interphase voltage of the AC current signal for the three phases is smaller than a predetermined value. A command correction unit;
A PWM control unit that performs pulse width modulation based on the AC voltage command signal for three phases corrected by the voltage command correction unit and outputs the gate signal;
A power converter comprising:

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