JP4915234B2 - Light emitting diode manufacturing method and functional device manufacturing method - Google Patents

Description

  The present invention relates to a method for manufacturing a light emitting diode and a method for manufacturing a functional element, and is suitable for application to the manufacture of a light emitting diode using a nitride-based III-V group compound semiconductor, for example.

  For example, when manufacturing a vertical current injection type GaN-based light emitting diode, a GaN-based semiconductor layer is grown on a sapphire substrate to form a light-emitting diode structure, one electrode is formed thereon, and then the GaN-based light-emitting diode is formed. It is necessary to peel the sapphire substrate from the semiconductor layer and form the other electrode on the back surface. Conventionally, after a GaN-based semiconductor layer is grown on a sapphire substrate, a technique for peeling the sapphire substrate from the GaN-based semiconductor layer is as follows. A technique of irradiating and thermally decomposing a GaN-based semiconductor layer at the interface portion is used (see, for example, Non-Patent Document 1). Recently, as another technique, after a metal buffer layer is grown on a sapphire substrate, a GaN-based semiconductor layer is grown thereon, and then the sapphire substrate is removed by removing the metal buffer layer by chemical etching. Has been proposed (see, for example, Non-Patent Document 2). As another technology, after growing a GaN-based semiconductor layer on a sapphire substrate, the temperature is raised and lowered to apply a thermal cycle, thereby causing a strain due to the difference in thermal expansion coefficient between the two to peel off the sapphire substrate. Proposed.

Appl.Phys.Lett.72,599 (1998) [Search June 7, 2006], Internet <URL: http://www.cir.tohoku.ac.jp/j/3activity/seika/seika04/yao.html>

  After the GaN-based semiconductor layer is grown on the sapphire substrate, a pulsed laser beam is irradiated to the GaN-based semiconductor layer in the vicinity of the interface with the sapphire substrate in order to peel the sapphire substrate from the GaN-based semiconductor layer. The above-described conventional technology for thermal decomposition not only requires expensive equipment, but the peeled surface of the GaN-based semiconductor layer is physically damaged or roughened, so the peeled surface needs to be processed by etching or the like. It is unproductive. Moreover, in the technology for removing the sapphire substrate by removing the metal buffer layer by chemical etching, it is necessary to side-etch the metal buffer layer sandwiched between the sapphire substrate and the GaN-based semiconductor layer. Since it is not easy to continuously supply the etching solution to the gap between the GaN-based semiconductor layer without causing stagnation in the middle, etching becomes uneven or etching takes a long time. There are problems in many ways. Furthermore, in the technique of peeling the sapphire substrate by applying a cooling and heating cycle, a large load is applied to the GaN-based semiconductor layer, so that a large physical damage occurs, and in some cases, a crack breakage may occur.

Accordingly, the problem to be solved by the present invention is to grow a nitride-based III-V compound semiconductor layer forming a light-emitting diode structure on a substrate, and then to form the nitride-based III-V compound semiconductor layer on the substrate. It is an object of the present invention to provide a method for manufacturing a light emitting diode that can be easily peeled off at low cost without causing any physical damage to the light emitting diode and can easily manufacture a vertical current injection type light emitting diode.
Another problem to be solved by the present invention is that the light emission efficiency is extremely high due to the significant improvement in crystallinity of the nitride-based III-V compound semiconductor layer forming the light emitting diode structure, and at the same time, the epitaxial growth is performed at a low cost. It is an object of the present invention to provide a method for manufacturing a light emitting diode that can be manufactured and that can be easily processed for unevenness on a substrate.
Still another problem to be solved by the present invention is that a nitride-based III-V group compound semiconductor layer and other layers forming an element structure of various functional elements including a light emitting diode, a semiconductor laser, a transistor, etc. are formed on a substrate. After growth, the substrate can be easily peeled off at low cost with little physical damage to these layers, and a functional device such as a vertical current injection type light emitting diode can be easily manufactured. It is to provide a method for manufacturing a functional element.
Still another problem to be solved by the present invention is that the performance of the device such as luminous efficiency is extremely high due to the significant improvement in crystallinity of the nitride III-V compound semiconductor layer and other layers forming the device structure, Moreover, it is an object of the present invention to provide a method of manufacturing a functional element that can be manufactured at a low cost by one epitaxial growth and that can be easily processed for unevenness of a substrate.
The above and other problems will become apparent from the description of this specification with reference to the accompanying drawings.

In order to solve the above problem, the first invention is:
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as the base Growing a first nitride-based III-V compound semiconductor layer via
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
By applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion, the substrate is made to be the first nitride-based III-V compound semiconductor layer and the second nitride-based III. And a step of peeling from the -V group compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. This is a method for manufacturing a light emitting diode.

When the convex portion of the substrate is composed of a magnetostrictive material, as this magnetostrictive material, a conventionally known ferromagnetic material such as pure Ni, Fe—Ni alloy, Fe—Co alloy, soft ferrite can be used. It is preferable to use a giant magnetostrictive material capable of generating a large magnetostriction (magnetostriction) by applying a magnetic field. Such a giant magnetostrictive material includes a Tb—Dy—Fe alloy (Tb _0.27 Dy _0.73 Fe _1.9 ), a lanthanoid element R having a large magnetic moment, and an iron group element T (Fe, Ni, Co, etc.). Laves type cubic crystal material (RT ₂ ) or the like is used, but it is not limited to this. As the magnetostrictive material, a ferromagnetic shape memory alloy is also preferable because large magnetostriction can be obtained. In particular, an alloy containing at least Fe, specifically, an Fe—Pd alloy (for example, Fe-31.2 atomic%) is preferable. Pd alloy), Fe—Pt alloy (for example, Fe ₃ Pt alloy, etc.) and the like are exemplified, but not limited thereto, and Ti—Ni—Cu based alloy and the like are also exemplified. In particular, a giant magnetostriction of up to about 3% can be generated with an Fe-31.2 atomic% Pd alloy, and up to about 2.3% with an Fe ₃ Pt alloy. The generation of magnetostriction in the ferromagnetic shape memory alloy is due to martensitic transformation. More specifically, while the magnetic moment is oriented in the easy axis direction in the ferromagnetic crystal, the ferromagnetic shape memory alloy is composed of several regions with different crystallographic orientations (variants). In each case, the magnetic moment in each variant is in the direction of the easy axis of the variant. When a magnetic field is applied from the outside, the magnetic moment rotates in the direction of the magnetic field so as to reduce the magnetostatic energy. At that time, the variant whose magnetic moment is different from the easy axis direction becomes unstable under the magnetic field. On the other hand, the variant in which the magnetic moment is directed to the magnetic field direction is stable even under the magnetic field. Thus, if the interface between variants can be easily moved, this unstable variant is converted to an adjacent stable variant. Along with this variant conversion, a large magnetostriction appears. If necessary, the convex portion may be composed of two or more kinds of magnetostrictive materials, and the convex portion may contain a material other than the magnetostrictive material.

When the convex portion of the substrate is made of an electrostrictive material, a conventionally known material can be used as the electrostrictive material, and specifically, barium titanate (BaTiO ₃ ), Ba (Ti, Zr) O. ₃ , Pb (Zr, Ti) O ₃ (PZT) solid solution, Pb (Mg _1/3 Nb _2/3 ) O ₃ —PbTiO ₃ (PMN-PT) solid solution, Pb (Ni _1/3 Nb _2/3 ) O Examples thereof include, but are not limited to, _3- PbTiO (PNN-PT) solid solution. If necessary, the convex portion may be composed of two or more types of electrostrictive materials, and the convex portion may include a material other than the electrostrictive material.

The magnetostrictive material or electrostrictive material constituting the convex portion is preferably arranged so that the direction in which the largest magnetostriction or electrostriction is generated is perpendicular to one main surface of the substrate, but is not limited thereto. It is not something.
The magnetic field or electric field applied to the magnetostrictive material or electrostrictive material constituting the convex portion may be a DC magnetic field or a DC electric field, or may be an AC magnetic field or an AC electric field, and is selected as necessary.

  When a magnetic field or an electric field is applied to the magnetostrictive material or electrostrictive material constituting the convex portion to generate magnetostriction or electrostriction in the convex portion, the thickness of the convex portion increases. Between the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer Force in the direction of separating them from each other, whereby the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above A force in the direction of separating the first nitride III-V compound semiconductor layer substrate integrated with the fourth nitride III-V compound semiconductor layer and the substrate also acts. At the same time, a force is exerted between the convex portion and the substrate in a direction to separate them from each other. As a result, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, The fourth nitride group III-V compound semiconductor layer can be peeled off. At this time, the convex portion may be left on the substrate or the convex portion may be destroyed. The substrate may be partially peeled as well as the case where all of the substrate is peeled off. For example, only a portion of the substrate that is coupled to the convex portion may be peeled off.

The conductivity type of the first nitride III-V compound semiconductor layer and the second nitride III-V compound semiconductor layer may be any of p-type, n-type, and i-type, The conductivity types may or may not be the same conductivity type, and the conductivity types may be within the first nitride III-V compound semiconductor layer or the second nitride III-V compound semiconductor layer. Two or more different parts may be mixed.
Typically, when the first nitride-based III-V compound semiconductor layer is grown, dislocations are generated in a direction perpendicular to the principal surface of the substrate from the interface with the bottom surface of the recess of the substrate. When the dislocation reaches the slope of the first nitride-based III-V compound semiconductor layer in the state of having a triangular cross-sectional shape or the vicinity thereof, a triangular portion is formed in a direction parallel to the one principal surface. Bend away from the camera. Here, the triangular cross-sectional shape or the triangular shape in the triangular portion means not only an accurate triangle, but also includes what can be regarded as an approximate triangle, such as a rounded top (for example) ( The same applies below). Preferably, in the initial stage of growth of the first nitride-based III-V group compound semiconductor layer, a plurality of micronuclei are formed on the bottom surface of the concave portion of the substrate, and these micronuclei grow and coalesce. Thus, dislocations generated from the interface with the bottom surface of the concave portion of the substrate in a direction perpendicular to one main surface of the substrate are repeatedly bent in a direction parallel to the one main surface. By doing so, dislocations that escape to the top during the growth of the first nitride-based III-V compound semiconductor layer can be reduced.

Typically, convex portions and concave portions are alternately and periodically formed on one main surface of the substrate. In this case, although the period of a convex part and a recessed part is 3-5 micrometers suitably, it is not limited to this. Further, the ratio of the length of the bottom of the convex portion to the length of the bottom of the concave portion is preferably 0.5 to 3, and most preferably around 0.5, but is not limited thereto. . The height of the convex portion as viewed from one main surface of the substrate is preferably 0.3 μm or more, more preferably 1 μm or more, but is not limited thereto. The convex portion preferably has a side surface inclined with respect to one main surface of the substrate (for example, a side surface in contact with one main surface of the substrate), and an angle between the side surface and one main surface of the substrate is θ. Then, from the viewpoint of improving the light extraction efficiency, for example, preferably 100 ° <θ <160 °, more preferably 132 ° <θ <139 ° or 147 ° <θ <154 °, which is most preferable. However, it is not limited to 135 ° or 152 °. The cross-sectional shape of the convex portion may be various shapes, and the side surface may be a curved surface as well as a flat surface. For example, an n-gon (where n is an integer of 3 or more), specifically Triangular, quadrangular, pentagonal, hexagonal, etc., or those with their corners cut off, rounded corners, circular, oval, etc. Of these, the highest position when viewed from one main surface of the board Those having one apex are desirable, and in particular, a triangle or a shape obtained by cutting off the apex or a rounded apex is most desirable. Although the cross-sectional shape of the recess may be various shapes, for example, an n-gon (where n is an integer of 3 or more), specifically, a triangle, a quadrangle, a pentagon, a hexagon, or the like, or these corners are cut off. Or rounded, oval, etc. From the viewpoint of improving the light extraction efficiency, preferably, the cross-sectional shape of the recess is an inverted trapezoid. Here, the inverted trapezoidal shape means not only an accurate inverted trapezoid but also includes an object that can be approximately regarded as an inverted trapezoid (the same applies hereinafter). In this case, from the viewpoint of minimizing the dislocation density of the second nitride-based III-V compound semiconductor layer, it is preferable that the depth of the concave portion (same as the height of the convex portion) be d and the width of the bottom surface of the concave portion. when a you a W _g, the angle between the inclined surface and the main surface of the substrate of the first nitride III-V compound semiconductor layer in a state where a triangular cross-sectional shape is alpha, the 2d ≧ W _g tan [alpha D, W _g , and α are determined so as to hold. Since α is normally constant, d and W _g are determined so that this equation is satisfied. If d is too large, the source gas is not sufficiently supplied to the inside of the recess, which hinders the growth of the first nitride-based III-V compound semiconductor layer from the bottom of the recess, and conversely if d is too small. The first nitride-based III-V compound semiconductor layer grows not only on the concave portion of the substrate but also on the convex portions on both sides thereof. From the viewpoint of preventing these, generally, 0.5 μm <d It is selected within the range of <5 μm and typically selected within the range of 1.0 ± 0.2 μm, but is not limited thereto. W _g is generally 0.5 to 5 μm and is typically selected within the range of 2 ± 0.5 μm, but is not limited thereto. Further, the width W _t of the top surface of the convex portion is 0 when the cross-sectional shape of the convex portion is triangular, but when the cross-sectional shape of the convex portion is trapezoidal, this convex portion is the second nitride system. Since it is a region used for the lateral growth of the III-V compound semiconductor layer, the longer the area, the larger the area of the portion having a lower dislocation density. When the cross-sectional shape of the convex portion is trapezoidal, W _t is generally in the range of 1 to 1000 μm, for example, 4 ± 2 μm, but is not limited thereto.

  For example, the convex portion or the concave portion may extend in a stripe shape in one direction on the substrate, or may extend in a stripe shape in at least a first direction and a second direction intersecting each other. As a result, the convex portion is an n-gon (where n is an integer of 3 or more), specifically, a triangle, a quadrangle, a pentagon, a hexagon, or the like, or those with the corners cut off, rounded, or circular Alternatively, it may be a two-dimensional pattern such as an ellipse or a dot. In a preferred example, the convex portions have a hexagonal planar shape, the convex portions are two-dimensionally arranged in a honeycomb shape, and concave portions are formed so as to surround the convex portions. By doing so, light emitted from the active layer can be efficiently extracted in all directions of 360 °. Alternatively, the recess may have a hexagonal planar shape, the recesses may be two-dimensionally arranged in a honeycomb shape, and a protrusion may be formed so as to surround the recess. When the concave portion of the substrate has a stripe shape, the concave portion extends, for example, in the <1-100> direction of the first nitride-based III-V compound semiconductor layer, or a sapphire substrate is used as the substrate, for example. In some cases, the sapphire substrate may extend in the <11-20> direction. The convex portion is, for example, an n-pyramid (where n is an integer of 3 or more), specifically, a triangular pyramid, a quadrangular pyramid, a pentagonal pyramid, a hexagonal pyramid, etc., or a cut or rounded corner. Things, cones, elliptical cones, etc.

From the viewpoint of growing the first nitride-based III-V compound semiconductor layer only in the concave portion of the substrate, for example, at least the surface of the convex portion may be formed of an amorphous layer. This amorphous layer serves as a growth mask. This utilizes the fact that nucleation hardly occurs during growth on an amorphous layer. This amorphous layer may be formed on the substrate by various film forming methods, or may be formed by forming a convex portion with metal or the like and oxidizing the surface of the convex portion. This amorphous layer is, for example, a SiO _x film (SiO ₂ film or the like), a SiN _x film, an amorphous Si (a-Si) film, an amorphous CrN film, or a laminate film of two or more of these. In general, it is an insulating film.
In the third nitride-based III-V compound semiconductor layer, an electrode on the first conductivity type side is formed in a state of being electrically connected thereto. Similarly, an electrode on the second conductivity type side is formed on the fourth nitride-based III-V compound semiconductor layer in a state of being electrically connected thereto.

  As described above, the number of dislocations that escape to the top during the growth of the first nitride-based III-V compound semiconductor layer can be reduced, but the dislocations that escape to the top are the second nitride-based III-V in the upper layer. It propagates to the group compound semiconductor layer, the third nitride-based III-V group compound semiconductor layer, the active layer, and the fourth nitride-based group III-V compound semiconductor layer to form threading dislocations. This threading dislocation includes a first nitride-based III-V compound semiconductor layer, a second nitride-based III-V compound semiconductor layer, a third nitride-based III-V compound semiconductor layer, an active layer, and The fourth nitride-based III-V group compound semiconductor layer concentrates on a portion corresponding to the recess (portion above the recess). The threading dislocations and the vicinity thereof have poor crystallinity and a large number of non-emissive centers exist, so that the luminous efficiency is lowered. In particular, the non-radiative centers present in the active layer have a great adverse effect on the luminous efficiency. Therefore, the first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth A portion of the nitride-based III-V compound semiconductor layer that corresponds to the recess is at least a third nitride-based III- in the depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer. If the groove is formed by removing the V group compound semiconductor layer until it is exposed, at least the active layer and those generated in the upper layer of the threading dislocations can be removed, so that the non-luminescent center is greatly reduced. be able to. The width of the portion to be removed may be, for example, a width capable of removing all or most of the threading dislocations, and may be the same as the width of the recess, smaller than the width of the recess, or larger than the width of the recess. . This removal can be performed by various methods such as a reactive ion etching (RIE) method, a powder blast method, and a sand blast method. On the other hand, when the second nitride-based III-V compound semiconductor layer is grown in the lateral direction, threading dislocations are present at the association portion of the second nitride-based III-V compound semiconductor layer above the convex portion. The threading dislocations of the second nitride-based III-V compound semiconductor layer are concentrated, and the third nitride-based III-V compound semiconductor layer, the active layer, and the fourth nitride-based III-V group of the upper layer are concentrated. Propagates to the compound semiconductor layer. This threading dislocation is caused by the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. It concentrates on the part corresponding to the center part between the mutually adjacent recessed parts (part on the center part between recessed parts). Therefore, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer are mutually connected. At least a third nitride-based III-V compound semiconductor layer is formed in the depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer at a portion corresponding to the central portion between adjacent recesses. When the groove is formed by removing it until it is exposed, at least the active layer of the threading dislocations and those generated in the upper layer can be removed, so that the non-luminescent center can be greatly reduced. The width of the part to be removed may be a width that can remove all or most of the threading dislocations, for example. This removal can also be performed by various methods such as RIE, powder blasting, and sand blasting.

  As described above, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, and After forming a groove in a portion corresponding to the central portion between the recesses and / or the recesses adjacent to each other in the fourth nitride-based III-V group compound semiconductor layer, the light of the emission wavelength from the active layer The groove may be filled with a transparent dielectric, and the surface of the dielectric may have recesses and / or protrusions and / or the dielectric may contain light scattering particles. This dielectric is preferably a first nitride-based III-V compound semiconductor layer, a second nitride-based III-V compound semiconductor layer, and a third nitride-based III-V compound semiconductor layer. The refractive index is smaller than that of the active layer and the fourth nitride-based III-V compound semiconductor layer, but is not limited thereto. After that, typically, an electrode on the second conductivity type side is formed on the fourth nitride-based III-V compound semiconductor layer so as to cover the surface of the dielectric filling the groove. On the surface of the dielectric, a reflection film made of a highly reflective material having a high reflectance of light having an emission wavelength from the active layer is formed as necessary. As the material of the electrode on the second conductivity type side, a highly reflective material having a high reflectance of light having an emission wavelength from the active layer is preferably used.

When the surface of the dielectric filling the groove has a recess and / or a protrusion, the recess at the interface between the electrode on the second conductivity type side and the dielectric filling the groove out of the light generated from the active layer And / or the light incident on the convex part is reflected by the surface of the concave part and / or the convex part. Here, assuming that the angle between the normal of the main surface of the substrate passing through the incident point of the light and the incident light is θ ₁ , and the angle between the normal and the reflected light is θ ₂ , θ ₁ > θ ₂ It is desirable to select the inclination angle of the concave and / or convex surfaces so that the amount of light to be as large as possible. No recesses and / or protrusions are formed, the surface of the fourth nitride III-V compound semiconductor layer is flat, and the substrate and the fourth nitride III-V compound semiconductor layer are parallel to each other In some cases, when light generated from the active layer is incident on the interface between the fourth nitride-based III-V compound semiconductor layer and the second conductivity type electrode formed thereon at a large incident angle. In this interface, the light is reflected at a reflection angle substantially equal to the incident angle and is directed toward the substrate side. When the incident angle of light with respect to the main surface of the substrate is larger than the critical angle, total reflection is performed on the main surface of the substrate, The reflection is repeated inside the fourth nitride-based III-V compound semiconductor layer and the active layer, and is absorbed by the active layer in the process and gradually attenuates. Invitation to fill the ditch while the amount is less If the surface of the body has a recess and / or projections, by which may be θ _1> θ ₂ as described above, eliminates this problem, the final amount of the light can be taken out to the outside Can do a lot. The dielectric that fills the groove may be an inorganic material or an organic material, and an optimum material is appropriately used according to the temperature of the process after filling the groove. Specifically, the dielectric is, for example, silicon dioxide (SiO ₂ ), polyimide, or water glass that is solidified into glass, but is not limited thereto. In addition, in order to fill the groove with a dielectric and form a concave portion and / or a convex portion on the surface thereof, for example, when SiO ₂ is used as the dielectric, the _{first step} is performed using a vacuum process such as vacuum deposition or sputtering. After depositing SiO ₂ on the nitride-based group III-V compound semiconductor layer 4 to fill the groove, the dielectric is patterned using a lithography technique and an etching technique. Alternatively, when polyimide is used as the dielectric, for example, a hydrophilic photoresist film made of polyethylene glycol dimethacrylate or the like is formed on the fourth nitride-based III-V group compound semiconductor layer other than the groove. After that, a hydrophobic polyimide precursor solution is formed by spin coating or the like to fill the groove, and after removing the photoresist film, firing is performed to solidify the film made of this polyimide precursor solution to form the groove. The surface of the polyimide to be filled can be made convex.

On the other hand, when the dielectric filling the grooves contains light scattering particles, light generated from the active layer is scattered when incident on the light scattering particles, so that the amount of light satisfying θ ₁ > θ ₂ is reduced. Become more. The size (particle size), material, and the like of the light scattering particles are selected so that light having an emission wavelength from the active layer can be efficiently scattered. Specifically, the light scattering particles can be formed of, for example, aluminum oxide, titanium oxide, zirconium oxide, silicon nitride, boron nitride, barium titanate, silicon carbide, and the like, but are not limited thereto. Absent. The particle diameter of the light scattering particles is generally selected to be equal to or less than the wavelength of light from the active layer (emission wavelength) in order to reduce light absorption loss due to the light scattering particles. Specifically, it is selected to be 20 to 1000 nm, for example. In order to fill the groove with a dielectric containing the light scattering particles, for example, a water glass or polyimide precursor solution in which the light scattering particles are dispersed is formed by spin coating or the like to fill the groove and perform firing. Use glass or polyimide.
Preferably, the surface of the dielectric filling the groove has a concave portion and / or a convex portion, and the dielectric includes light scattering particles. By doing so, the amount of light satisfying θ ₁ > θ ₂ is further increased.

  The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth Of the nitride-based III-V group compound semiconductor layer, a portion corresponding to the central portion between the recesses and / or the recesses adjacent to each other is deepened from the surface of the fourth nitride-based III-V group compound semiconductor layer. By forming the groove by removing in the direction until the substrate is exposed, almost all threading dislocations can be removed.

Various substrates can be used as the substrate. Specifically, the substrate made of a material different from the nitride III-V compound semiconductor includes, for example, sapphire (including a c-plane, a-plane, r-plane, etc., and a plane off from these planes). ), SiC (including 6H, 4H, 3C), Si, ZnS, ZnO, LiMgO, GaAs, spinel (MgAl ₂ O ₄ , ScAlMgO ₄ ), garnet, CrN (for example, CrN (111)), etc. Preferably, a hexagonal or cubic substrate made of these materials, more preferably a hexagonal substrate is used. As the substrate, a substrate made of a nitride III-V group compound semiconductor (GaN, AlGaInN, AlN, GaInN, etc.) may be used. Alternatively, a nitride III-V compound semiconductor layer is grown as a substrate on a substrate made of a material different from the nitride III-V compound semiconductor, and the nitride III-V compound semiconductor layer is formed on the nitride III-V compound semiconductor layer. What formed the convex part may be sufficient.
For example, when a substrate such as a nitride III-V group compound semiconductor layer grown on a substrate is used as the substrate, the material of the convex portion is different from that of the layer immediately below the convex portion. It is done.

The first to fourth nitride III-V compound semiconductor layer and the nitride constituting the active layer based III-V compound semiconductor layer, most _{commonly, Al X B y Ga 1-} xyz In z As _u N _1-uv P _v (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ u ≦ 1, 0 ≦ v ≦ 1, 0 ≦ x + y + z <1, 0 ≦ u + v <consists 1), more _{specifically, Al X B y Ga 1-} xyz in z N ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ x + y + z <1) Typically, it consists of Al _x Ga _{1 -xz} In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). Specific examples are GaN, InN, AlN, AlGaN, InGaN. And AlGaInN. The nitride III-V compound semiconductor layer constituting the first to fourth nitride III-V compound semiconductor layers and the active layer promotes the bending of dislocations when, for example, B or Cr is contained in GaN. Therefore, it may be made of BGaN, GaN: B doped GaN: B, GaN: Cr doped GaN: Cr, or the like. Particularly first first nitride III-V compound semiconductor layer grown on the recessed portions of the substrate, _{preferably, GaN, In X Ga 1-} x N (0 <x <0.5), Al X A material consisting of Ga _1-x N (0 <x <0.5) and Al _x In _y Ga _1-xy N (0 <x <0.5, 0 <y <0.2) is used. The first conductivity type may be n-type or p-type, and the second conductivity type is p-type or n-type accordingly. In addition, as a so-called low-temperature buffer layer that is first grown on the substrate, a GaN buffer layer, an AlN buffer layer, an AlGaN buffer layer, etc. are generally used, and those doped with Cr or CrN buffer layers are used. Also good.

The thickness of the second nitride-based III-V compound semiconductor layer is selected as necessary, and is typically about several μm or less, but is thicker depending on the application, for example, about several tens to 300 μm. It may be.
Examples of a method for growing the nitride III-V compound semiconductor layers constituting the first to fourth nitride III-V compound semiconductor layers and the active layer include, for example, metal organic chemical vapor deposition (MOCVD), Various epitaxial growth methods such as hydride vapor phase epitaxial growth, halide vapor phase epitaxial growth (HVPE), and molecular beam epitaxy (MBE) can be used, but are not limited thereto.

The second invention is
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a hydrogen storage alloy, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as a base, and is formed in a first shape. Growing a single nitride-based III-V compound semiconductor layer;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above Forming a groove by removing a portion of the fourth nitride-based III-V group compound semiconductor layer above the convex portion, and exposing the convex portion inside the groove;
By bringing hydrogen gas into contact with the convex portion through the groove, the convex portion is made to absorb hydrogen and expand, thereby expanding the substrate to the first nitride-based III-V group compound semiconductor layer, the second nitridation layer. And a step of peeling from the compound III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. This is a method for manufacturing a light-emitting diode.

Examples of the hydrogen storage alloy constituting the convex portion include AB ₂ type alloy, AB ₅ type alloy, Ti—Fe alloy, V alloy, Mg alloy, Pd alloy, and Ca alloy. AB ₂ type alloys, which are based on alloys of transition elements such as titanium, manganese, zirconium, and nickel, have a hexagonal crystal structure called a Laves phase, and can provide a high hydrogen density. The AB ₅ type alloy is based on an alloy containing a transition element 5 such as nickel or aluminum having a catalytic effect on a rare earth element, niobium or zirconium 1, and LaNi ₅ is a representative example. The Ti-Fe alloy is based on a body-centered cubic intermetallic compound having a relatively large number of voids. The V-based alloy is a body-centered cubic alloy having a relatively large number of voids based on V (vanadium), which is known to react efficiently with hydrogen. The Mg alloy is based on Mg (magnesium) capable of occluding 7.6% by weight of hydrogen. A Pd-based alloy is an alloy that can occlude a large amount of hydrogen as much as 935 times its own volume. The Ca-based alloy is mainly an alloy of Ca (calcium) having a strong affinity for hydrogen and a transition element such as nickel.

In the second invention, a first nitride III-V compound semiconductor layer, a second nitride III-V compound semiconductor layer, a third nitride III-V compound semiconductor layer, When hydrogen is stored in this convex portion by bringing hydrogen gas into contact with the convex portion made of a hydrogen storage alloy through a groove formed in the active layer and the fourth nitride-based III-V group compound semiconductor layer, The gas is pressurized above a certain pressure, which is a conventionally known technique. When hydrogen is occluded and expanded in this manner, the thickness of the projection increases as in the first invention, and the substrate above and below the projection and the second nitride III- A force in a direction to separate them from each other between the group V compound semiconductor layer, the third nitride group III-V compound semiconductor layer, the active layer, and the fourth nitride group III-V compound semiconductor layer works, Thereby, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer, A force in the direction of separating these also acts between the integrated first nitride-based III-V compound semiconductor layer and the substrate. At the same time, a force is exerted between the convex portion and the substrate in a direction to separate them from each other. As a result, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, The fourth nitride group III-V compound semiconductor layer can be peeled off.
In the second invention and the third to tenth inventions to be described later, the matters described above in relation to the first invention are valid unless otherwise contrary to the nature.

The third invention is
A substrate having a plurality of protrusions on one main surface, the protrusions being made of a material that can be oxidized, nitrided, sulfided, or lithiated, with the bottom surface of the recess in the substrate. Growing a first nitride-based III-V compound semiconductor layer through a state having a triangular cross-sectional shape;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above Forming a groove by removing a portion of the fourth nitride-based III-V group compound semiconductor layer above the convex portion, and exposing the convex portion inside the groove;
The protrusion is oxidized, nitrided, sulfided or lithiated through the groove to expand the substrate, whereby the first nitride III-V compound semiconductor layer and the second nitride III-V compound are formed. And a step of peeling from the semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. It is a manufacturing method.

  As a material that can be oxidized, nitrided, sulfided, or lithiated to constitute the convex portion, examples of the material that can be oxidized include a semiconductor, a metal, an alloy, and the like. Examples of the semiconductor include silicon (Si) (amorphous Si, polycrystalline Si, single crystal Si), and examples of the metal include titanium (Ti), tungsten (W), molybdenum (Mo), zirconium (Zr), and chromium. (Cr) etc. are mentioned.

  In this third invention, a first nitride-based III-V compound semiconductor layer, a second nitride-based III-V compound semiconductor layer, a third nitride-based III-V compound semiconductor layer, Oxidizing species, nitrided species, sulfided species or lithium are formed on the protrusions made of a material that can be oxidized, nitrided, sulfided or lithiated through grooves formed in the active layer and the fourth nitride-based III-V compound semiconductor layer. When this convex portion is oxidized, nitrided, sulfided or lithiated by contacting the chemical species, this convex portion expands and the thickness increases accordingly, and the substrate above and below the convex portion and the second nitridation The group III-V compound semiconductor layer, the third nitride group III-V compound semiconductor layer, the active layer, and the fourth nitride group III-V compound semiconductor layer are separated from each other. The force works, and this And the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. Further, a force in the direction of separating these also acts between the first nitride-based III-V compound semiconductor layer substrate and the substrate. At the same time, a force is exerted between the convex portion and the substrate in a direction to separate them from each other. As a result, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, The fourth nitride group III-V compound semiconductor layer can be peeled off.

The fourth invention is:
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material that absorbs light, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as a base. A step of growing a first nitride-based III-V compound semiconductor layer via,
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The substrate is made to expand or melt by irradiating light onto the convex portion, thereby making the substrate into the first nitride-based III-V group compound semiconductor layer, the second nitride-based group III-V compound semiconductor layer, the first And a step of peeling from the nitride-based III-V compound semiconductor layer, the active layer, and the fourth nitride-based III-V compound semiconductor layer. .

  In the fourth aspect of the invention, various materials can be used as the light-absorbing material constituting the convex portion. Specifically, for example, silicon (Si) (amorphous Si, polycrystalline Si, single Crystal Si), but is not limited to this. When the light is applied to the convex portion through the substrate, the light having a wavelength that passes through the substrate is used, and the first nitride-based III-V compound semiconductor layer and the second nitride-based III-V are used. When the projection is irradiated through the group compound semiconductor layer, the third nitride group III-V group compound semiconductor layer, the active layer, and the fourth nitride group III-V group compound semiconductor layer, A transmission wavelength is used. As this light, laser light from various laser light sources is preferably used, but is not limited to this, and light from a light emitting diode, light from various lamp light sources, or the like can also be used.

  In the fourth invention, when the projection is irradiated with light from the outside and absorbed, the projection is heated and expanded or melted. As a result, the thickness of the projection increases, and the projections above and below the projection Between the substrate and the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. A force in a direction separating them from each other acts, whereby the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, and the fourth nitride A force in the direction of separating the first nitride III-V compound semiconductor layer substrate and the substrate integrated with the physical III-V compound semiconductor layer also acts. At the same time, a force is exerted between the convex portion and the substrate in a direction to separate them. As a result, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, The fourth nitride group III-V compound semiconductor layer can be peeled off.

The fifth invention is:
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material different from that of the substrate, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as a base. A step of growing a first nitride-based III-V compound semiconductor layer via,
A second nitride III-V compound semiconductor layer is laterally grown on the substrate from the first nitride III-V compound semiconductor layer, and the second nitride III-V compound compound is grown. Ending growth before the semiconductor layers are fully associated;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The substrate includes the first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, and the activity. And a step of peeling from the fourth nitride-based III-V group compound semiconductor layer.

  In the fifth aspect of the present invention, the convex portion is removed by etching through the gap between the second nitride-based III-V compound semiconductor layers, and then the second nitride-based III-V compound semiconductor layer is formed on the second nitride-based III-V compound semiconductor layer. The first conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride III-V compound semiconductor layer may be grown sequentially. Good. This etching is typically wet etching, but dry etching such as plasma etching may be used. Thereafter, the substrate is first irradiated by irradiating the first nitride-based III-V group compound semiconductor layer at the interface with the substrate through the substrate, for example, in the same manner as a conventionally known laser peeling method. Nitride-based III-V compound semiconductor layer, second nitride-based III-V compound semiconductor layer, third nitride-based III-V compound semiconductor layer, active layer, and fourth nitride-based III It can peel from a -V group compound semiconductor layer. Alternatively, the protrusion is etched away through the gap between the second nitride-based III-V compound semiconductor layers, and the gap is filled with a material different from that of the second nitride-based III-V compound semiconductor layer. The third nitride III-V compound semiconductor layer of the first conductivity type, the active layer, and the fourth nitride of the second conductivity type are formed on the second nitride III-V compound semiconductor layer. The physical group III-V compound semiconductor layer may be grown sequentially, and then the substrate may be peeled off. Alternatively, the protrusions are etched away through the gaps between the second nitride-based III-V compound semiconductor layers, and the spaces where the protrusions are etched away are filled with a material that absorbs light. After filling the second nitride III-V compound semiconductor layer with a material different from that of the second nitride III-V compound semiconductor layer, the third nitride III-V of the first conductivity type is formed on the second nitride III-V compound semiconductor layer. The group compound semiconductor layer, the active layer, and the fourth conductivity type fourth nitride III-V group compound semiconductor layer may be grown sequentially, and then the substrate may be peeled off. In this case, as in the case of the fourth invention, when the material embedded in the space (cavity) from which the convex portion is removed by etching is irradiated with light from the outside and absorbed, the material is heated and expands or melts. The thickness of the material increases, the upper and lower substrates of the material, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth Force in the direction of separating them from each other between the second nitride-based III-V compound semiconductor layer and the second nitride-based III-V compound semiconductor layer, the third nitride-based compound semiconductor layer. Also between the substrate and the substrate of the first nitride III-V compound semiconductor layer integrated with the III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. The force in the direction of separating them works. At the same time, a force is exerted between the material and the substrate to separate them from each other. As a result, the first nitride-based III-V compound semiconductor layer, the second nitride-based III-V compound semiconductor layer, the third nitride-based III-V compound semiconductor layer, the active layer, The fourth nitride group III-V compound semiconductor layer can be peeled off.

In the fifth invention, the material of the convex portion may be various, and may or may not be conductive. For example, a dielectric such as an oxide, nitride or carbide, a metal or an alloy, etc. It is a conductor (including a transparent conductor) and the like, and the material constituting the convex portion in the first to fourth inventions is also included. As the oxide, for example, silicon oxide (SiO _x ), titanium oxide (TiO _x ), tantalum oxide (TaO _x ), or the like can be used. A mixture of two or more of these or in the form of a laminated film It can also be used. As the nitride, for example, silicon nitride (SiN _x ), TiN, WN, SiON, CrN, CrNO or the like can be used, and two or more of these can be mixed or used in the form of a laminated film. . As the carbide, SiC, HfC, ZrC, or the like can be used, and two or more of these can be mixed or used in the form of a laminated film. Examples of metals or alloys include B, Al, Ga, In, W, Ni, Co, Pd, Pt, Ag, Hf, Zr, Au, Cu, Ru, Ir, AgNi, AgPd, AuNi, AuPd, AlCu, AlSi, AlSiCu or the like can be used, and two or more of these can be mixed or used in the form of a laminated film. As the transparent conductor, ITO (indium-tin composite oxide), IZO (indium-zinc composite oxide), ZO (zinc oxide), FTO (fluorine-doped tin oxide), tin oxide, and the like can be used. Two or more of these may be mixed or used in the form of a laminated film.

  The light-emitting diode manufactured by the method for manufacturing a light-emitting diode according to the first to fifth inventions can be used for various apparatuses or devices. Specifically, for example, a light source cell unit in which a plurality of red light emitting diodes, green light emitting diodes, and blue light emitting diodes are arranged on various substrates such as a wiring board, a light emitting diode backlight, and light emission In a diode lighting device, a light emitting diode display, and the like, the light emitting diode can be used as at least one of a red light emitting diode, a green light emitting diode, and a blue light emitting diode.

The sixth invention is:
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as the base Growing the first layer via
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer on the second layer;
Separating the substrate from the first layer, the second layer, and the third layer by applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion. It is a manufacturing method of the functional element characterized by having.

The seventh invention
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a hydrogen storage alloy, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as a base, and is formed in a first shape. Growing a layer of one;
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer on the second layer;
Forming a groove by removing a portion of the first layer, the second layer, and the third layer above the convex portion, and exposing the convex portion inside the groove; ,
The substrate is peeled off from the first layer, the second layer, and the third layer by bringing hydrogen gas into contact with the convex portion through the groove to cause hydrogen to occlude and expand the convex portion. And a process for producing a functional element.

The eighth invention
A substrate having a plurality of protrusions on one main surface, the protrusions being made of a material that can be oxidized, nitrided, sulfided, or lithiated, with the bottom surface of the recess in the substrate. Growing the first layer via a triangular cross-sectional shape;
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer on the second layer;
Forming a groove by removing a portion of the first layer, the second layer, and the third layer above the convex portion, and exposing the convex portion inside the groove; ,
Separating the substrate from the first layer, the second layer, and the third layer by expanding the convex portion through oxidation, nitridation, sulfurization, or lithiation through the groove. This is a method for manufacturing a functional element.

The ninth invention
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material that absorbs light, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as a base. Through which a first layer is grown;
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer on the second layer;
A step of peeling the substrate from the first layer, the second layer, and the third layer by irradiating the convex portion with light to expand or melt the functional portion. It is a manufacturing method.

The tenth invention is
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material different from that of the substrate, and the concave portion of the substrate has a triangular cross-sectional shape whose bottom is the bottom. Through which a first layer is grown;
Laterally growing a second layer on the substrate from the first layer and terminating the growth before the second layer is fully associated;
Growing a third layer on the second layer;
And a step of peeling the substrate from the first layer, the second layer, and the third layer.

The eleventh invention is
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and a fourth layer is grown on the substrate without forming a void in the concave portion of the substrate. A process of
And a step of peeling the substrate from the fourth layer by applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion. is there.

The twelfth invention
Using a substrate having a plurality of protrusions on one principal surface, wherein the protrusions are made of a hydrogen storage alloy, and growing a fourth layer on the substrate without forming voids in the recesses of the substrate; ,
Forming a groove by removing a portion of the fourth layer above the convex portion, and exposing the convex portion inside the groove;
A step of peeling the substrate from the fourth layer by causing hydrogen to come into contact with the convex portion through the groove and causing the convex portion to absorb and expand hydrogen. It is a manufacturing method.

The thirteenth invention
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material that can be oxidized, nitrided, sulfided, or lithiated, and the substrate is formed without forming voids in the concave portions of the substrate. Growing a fourth layer thereon;
And a step of peeling the substrate from the fourth layer by expanding the convex portion by oxidizing, nitriding, sulfidizing or lithiating the convex portion.

The fourteenth invention is
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material that absorbs light, and a fourth layer is grown on the substrate without forming a void in the concave portion of the substrate. Process,
And a step of peeling the substrate from the fourth layer by irradiating the convex portion with light to expand or melt the convex portion.

The fifteenth invention
A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a material different from that of the substrate, and a fifth layer is grown on the substrate without forming a gap in the concave portion of the substrate. Stopping the growth before the fifth layer fully associates;
Growing a sixth layer on the fifth layer;
And a step of peeling the substrate from the fifth layer and the sixth layer.

  In the sixth to fifteenth inventions, the first to sixth layers have a wurtzit structure, more generally a hexagonal crystal structure, in addition to a nitride III-V compound semiconductor. Other semiconductors such as ZnO, α-ZnS, α-CdS, α-CdSe, and further various semiconductors having other crystal structures such as CrN (111) may be used. The semiconductor elements using these semiconductors include general light emitting diodes, intersubband transition light emitting (quantum cascade) light emitting diodes, ordinary semiconductor lasers, and intersubband transition light emitting (quantum cascade) semiconductor lasers. In addition to such light emitting elements, light receiving elements such as photodiodes or sensors, solar cells, and field effect transistors (FET) such as high electron mobility transistors and transistors such as bipolar transistors such as heterojunction bipolar transistors (HBT) The electronic travel element represented by is included.

Functional elements include piezoelectric elements, pyroelectric elements, optical elements (second harmonic generation elements using nonlinear optical crystals, etc.), dielectrics, in addition to the above semiconductor elements (light emitting elements, light receiving elements, electron transit elements, etc.). Also included are body elements (including ferroelectric elements), superconducting elements, and the like. In this case, as the material of the first to sixth layers, various semiconductors as described above can be used in the semiconductor element, and in the piezoelectric element, pyroelectric element, optical element, dielectric element, superconducting element, etc. Various materials such as an oxide having a hexagonal crystal structure can be used.
By using a device including a light emitting diode or a semiconductor laser as a functional element, a light emitting diode backlight, a light emitting diode illumination device, a light emitting diode display, etc., a projector or a rear projection television set using a light emitting diode or a semiconductor laser as a light source, a grating light Electronic devices such as valves can be configured.

  In the first to fourth inventions configured as described above, the convex portion can be extended in a direction perpendicular to the main surface of the substrate by an external operation such as application of a magnetic field. Nitride-based III-V compound semiconductor layer, second nitride-based III-V compound semiconductor layer, third nitride-based III-V compound semiconductor layer, active layer, and fourth nitride-based III- It can be easily peeled off from the group V compound semiconductor layer. At the time of this peeling, it is possible to hardly cause physical damage to these nitride III-V compound semiconductor layers.

  In the first to fifth aspects of the invention, the growth of the first nitride-based III-V compound semiconductor layer is started from the bottom surface of the concave portion of the substrate, and the triangular cross-sectional shape having the bottom surface as the base in the middle. By growing the first nitride-based III-V compound semiconductor layer through this state, the recess can be filled without a gap. Then, a second nitride III-V compound semiconductor layer is laterally grown from the first nitride III-V compound semiconductor layer thus grown. At this time, in the first nitride-based III-V group compound semiconductor layer, dislocations are generated in a direction perpendicular to the main surface of the substrate from the interface with the bottom surface of the recess of the substrate. The dislocation reaches a slope of the compound III-V compound semiconductor layer or the vicinity thereof, and with the growth of the second nitride III-V compound semiconductor layer, this dislocation is parallel to one main surface of the substrate. Bend to. When the second nitride-based III-V compound semiconductor layer is grown sufficiently thick, the portion above the dislocation parallel to one main surface of the substrate becomes a region having a very low dislocation density. In this method, the first to fourth nitride-based III-V group compound semiconductor layers and the active layer can be grown by one epitaxial growth. Furthermore, forming a convex portion made of a material different from that of the substrate on the substrate is much simpler than processing the substrate directly by dry etching or the like to form irregularities, and the processing accuracy is generally high.

In the sixth to ninth inventions configured as described above, the convex portion can be extended in a direction perpendicular to the main surface of the substrate by an external operation such as application of a magnetic field. It can be easily peeled off from the layer, the second layer and the third layer. During the peeling, almost no physical damage can be caused to these layers.
In the sixth to tenth inventions, the growth of the first layer is started from the bottom surface of the concave portion of the substrate, and the first layer passes through a state in which it has a triangular cross-sectional shape with the bottom surface as the bottom. This recess can be filled without any gaps. Then, the second layer is laterally grown from the first layer thus grown. At this time, in the first layer, a dislocation occurs in a direction perpendicular to the main surface of the substrate from the interface with the bottom surface of the concave portion of the substrate, and the dislocation reaches the slope of the first layer or the vicinity thereof, As the second layer grows, the dislocations bend therefrom in a direction parallel to one major surface of the substrate. When the second layer is grown sufficiently thick, the portion above the dislocation parallel to one main surface of the substrate becomes a region having a very low dislocation density. In this method, the first to third layers can be grown by one epitaxial growth. Furthermore, forming a convex portion made of a material different from that of the substrate on the substrate is much simpler than processing the substrate directly by dry etching or the like to form irregularities, and the processing accuracy is generally high.

In the 11th to 14th inventions configured as described above, the convex portion can be extended in a direction perpendicular to the main surface of the substrate by an external operation such as application of a magnetic field. It can be easily peeled from the layer or the fifth layer and the sixth layer. During the peeling, almost no physical damage can be caused to these layers.
Further, in the 11th to 15th inventions, it is much easier to form a convex portion made of a material different from that of the substrate on the substrate as compared to forming the irregularities by directly processing the substrate by dry etching or the like. The processing accuracy is generally high.

According to the present invention, after the nitride-based III-V compound semiconductor layer forming the light-emitting diode structure is grown on the substrate, the substrate is hardly physically damaged in the nitride-based III-V compound semiconductor layer. It can be easily peeled off at low cost without giving, and a vertical current injection type light emitting diode can be easily manufactured. Further, since the crystallinity of the second nitride-based III-V compound semiconductor layer is improved, the third nitride-based III-V compound semiconductor layer, the active layer, and the fourth nitride that are grown on the second nitride-based III-V compound semiconductor layer. Since the crystallinity of the physical group III-V compound semiconductor layer is also greatly improved, a light emitting diode with extremely high luminous efficiency can be obtained. Moreover, since the light emitting diode can be manufactured by one epitaxial growth, the cost is low. Furthermore, the uneven processing of the substrate is easy and the processing accuracy is high. And using this light emitting diode with high luminous efficiency, for example, high performance light source cell unit, light emitting diode backlight, light emitting diode illumination device, light emitting diode display, light emitting diode optical communication device, optical space transmission device, various electronic Equipment can be realized.
In addition, after the layers forming the element structures of various functional elements are grown on the substrate, the substrate can be easily peeled off at low cost with almost no physical damage to these layers. A functional element such as an injection type light emitting diode can be easily manufactured. In addition, the device performance such as light emission efficiency is extremely high due to the significant improvement in crystallinity of the layer forming the device structure, and it can be manufactured at a low cost by one epitaxial growth, and the uneven processing of the substrate is easy. Various high-performance electronic devices can be realized using this high-performance functional element.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts are denoted by the same reference numerals.
First, a growth method used for growing a nitride III-V compound semiconductor layer forming a light emitting diode structure in the following embodiment will be described.
1 to 3 show this growth method in the order of steps.

  As shown in FIG. 1A, first, a substrate 11 having a flat main surface and made of a material different from that of a nitride III-V compound semiconductor is prepared, and the cross-sectional shape is an isosceles triangle on the substrate 11. Are formed periodically in a predetermined planar shape. A concave portion 13 having an inverted trapezoidal cross-sectional shape is formed between the convex portions 12. As this substrate 11, for example, those already described can be used. Specifically, for example, a sapphire substrate is used, and its main surface is, for example, a c-plane. The planar shape of the convex portion 12 and the concave portion 13 can be the various planar shapes already described. For example, as shown in FIG. 4, both the convex portion 12 and the concave portion 13 have a stripe shape extending in one direction. In other cases, as shown in FIG. 5, the convex portion 12 has a hexagonal planar shape and is two-dimensionally arranged in a honeycomb shape. Typically, the direction of the dotted line in FIG. 4 (direction perpendicular to the stripe) is parallel to the a-axis of the nitride III-V compound semiconductor layer 15 described later, and the direction of the dotted line in FIG. The direction connecting the portions 12) is made parallel to the m-axis of the nitride III-V compound semiconductor layer 15 described later. For example, when the substrate 11 is a sapphire substrate, the extending direction of the stripe-shaped convex portion 12 and the concave portion 13 in FIG. 4 is the <1-100> direction of the sapphire substrate, and the extending direction of the concave portion 13 in FIG. Similarly, it is the <1-100> direction of the sapphire substrate. These extending directions may be the <11-20> direction of the sapphire substrate.

  In order to form the convex part 12 having a cross-sectional shape of an isosceles triangle on the substrate 11, a conventionally known method can be used. For example, a film serving as the material of the convex portion 12 is formed on the entire surface of the substrate 11 by CVD, vacuum vapor deposition, sputtering, or the like. Next, a resist pattern having a predetermined shape is formed on the film by lithography. Next, this film is etched using the resist pattern as a mask under conditions where taper etching is performed by a reactive ion etching (RIE) method or the like, thereby forming a convex portion 12 having an isosceles triangular cross section. The

  Next, after the surfaces of the substrate 11 and the convex portion 12 are cleaned by performing thermal cleaning or the like, for example, a GaN buffer layer, an AlN buffer, or the like is grown on the substrate 11 at a growth temperature of, for example, about 550 ° C. A layer, a CrN buffer layer, a Cr-doped GaN buffer layer, or a Cr-doped AlN buffer layer (not shown) is grown. Next, epitaxial growth of a nitride III-V compound semiconductor is performed by, for example, MOCVD. This nitride-based III-V group compound semiconductor is, for example, GaN. At this time, as shown in FIG. 1B, growth is first started from the bottom surface of the recess 13 to generate a plurality of micronuclei 14 made of a nitride III-V compound semiconductor. Next, as shown in FIG. 1C, an isosceles triangular shape having a bottom surface of the recess 13 as a bottom and a facet inclined with respect to the main surface of the substrate 11 on the inclined surface through the growth and coalescence process of the micronuclei 14. The nitride III-V compound semiconductor layer 15 is grown so as to have a cross-sectional shape. In this example, the height of the nitride-based III-V group compound semiconductor layer 15 having an isosceles triangular cross-sectional shape is larger than the height of the convex portion 12. For example, the extending direction of the nitride III-V compound semiconductor layer 15 is the <1-100> direction, and the facet of the inclined surface is the (1-101) plane. The nitride III-V compound semiconductor layer 15 may be undoped or doped with n-type impurities or p-type impurities. The growth conditions for the nitride III-V compound semiconductor layer 15 will be described later. The extending direction of the nitride-based III-V compound semiconductor layer 15 may be the <11-20> direction.

Subsequently, by performing growth of the nitride III-V compound semiconductor layer 15 while maintaining the facet plane orientation of the inclined surface, as shown in FIG. 2A, the nitride III-V compound semiconductor layer 15 Both end portions grow to the lower portion of the side surface of the convex portion 12 and the cross-sectional shape becomes a pentagonal shape.
Next, when the growth condition is set to a condition in which the lateral growth is dominant, and the growth is continued, as shown in FIG. It grows in the direction and spreads on the convex portion 12 in a state where the cross-sectional shape becomes a hexagonal shape. In FIG. 2B, a dotted line indicates a growth interface during the growth (the same applies hereinafter).
When the lateral growth is further continued, as shown in FIG. 2C, the nitride-based III-V compound semiconductor layer 15 grows while increasing its thickness, and finally the nitride-based III-III grown from the adjacent recess 13. The group V compound semiconductor layers 15 come into contact with each other on the convex portion 12 and are associated with each other.
Subsequently, as shown in FIG. 2C, the nitride-based III-V compound semiconductor layer 15 is grown laterally until the surface thereof becomes a flat surface parallel to the main surface of the substrate 11. The nitride-based III-V group compound semiconductor layer 15 thus grown has a very low dislocation density in the portion above the recess 13.
In some cases, the state shown in FIG. 1C can be shifted directly to the state shown in FIG. 2B without going through the state shown in FIG. 2A.

  Next, as shown in FIG. 3, the n-type nitride III-V compound semiconductor layer 16 and the nitride III-V group semiconductor layer 16 are formed on the nitride III-V compound semiconductor layer 15 by MOCVD, for example. An active layer 17 using a compound semiconductor and a p-type nitride-based III-V group compound semiconductor layer 18 are sequentially epitaxially grown. In this case, it is assumed that the nitride III-V compound semiconductor layer 15 is n-type.

The growth source of the above-mentioned nitride III-V compound semiconductor layer is, for example, triethylgallium ((C ₂ H ₅ ) ₃ Ga, TEG) or trimethyl gallium ((CH ₃ ) ₃ Ga, TMG as a Ga source. ), Trimethylaluminum ((CH ₃ ) ₃ Al, TMA) as a raw material of Al, triethylindium ((C ₂ H ₅ ) ₃ In, TEI) or trimethylindium ((CH ₃ ) ₃ In, TMI), and ammonia (NH ₃ ) is used as a raw material for N. As for the dopant, for example, silane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as the n-type dopant, and bis (methylcyclopentadienyl) magnesium ((CH ₃ C ₅ H ₄ ) ₂ is used as the p-type dopant. Mg), bis (ethylcyclopentadienyl) magnesium ((C ₂ H ₅ C ₅ H ₄ ) ₂ Mg) or bis (cyclopentadienyl) magnesium ((C ₅ H ₅ ) ₂ Mg) is used. For the carrier gas atmosphere during the growth of the nitride-based III-V compound semiconductor layer, eg, H ₂ gas is used.

Here, in order to minimize the threading dislocation density of the nitride-based III-V compound semiconductor layer 15, the width W _g of the bottom surface of the concave portion 13, the depth of the concave portion 13, that is, the height d of the convex portion 12, and The angle α formed between the slope of the nitride III-V compound semiconductor layer 15 in the state shown in FIG. 1C and the main surface of the substrate 11 is determined so as to satisfy the following equation (see FIG. 6).
2d ≧ W _g tan α
For example, when W _g = 2.1 μm and α = 59 °, d ≧ 1.75 μm, W _g = 2 μm, and when α = 59 °, d ≧ 1.66 μm, W _g = 1.5 μm, α When d = 59 °, d ≧ 1.245 μm, W _g = 1.2 μm, and when α = 59 °, d ≧ 0.966 μm. However, in any case, it is desirable that d <5 μm.

During the growth of the nitride-based III-V group compound semiconductor layer 15 in the steps shown in FIGS. 1B and 1C and FIG. 2A, it is preferable to set the growth temperature low so as to increase the V / III ratio of the growth material. Specifically, when the growth of the nitride III-V compound semiconductor layer 15 is performed under a pressure condition of 1 atm, the V / III ratio of the growth material is in the range of, for example, 13000 ± 2000, and the growth temperature is, for example, 1100. It is preferable to set in the range of ± 50 ° C. Regarding the V / III ratio of the growth raw material, when the growth of the nitride-based III-V compound semiconductor layer 15 is performed under a pressure condition of x atmospheric pressure, the pressure is determined from Bernoulli's law that defines the relationship between the flow velocity and the pressure. It is preferable to set the V / III ratio corresponding to the square of the amount of change, specifically (13000 ± 2000) × x ² . For example, when the growth is performed at 0.92 atmospheres (700 Torr), the V / III ratio of the growth raw material is preferably set to a range of 11000 ± 1700 (for example, 10530). x is generally from 0.01 to 2 atmospheres. When the growth is performed under a pressure condition of 1 atm or less, the lateral growth of the nitride-based III-V compound semiconductor layer 15 is suppressed, and the nitride-based III-V compound semiconductor in the recess 13 is suppressed. In order to facilitate the selective growth of the layer 15, it is preferable to set it to a lower growth temperature. For example, when growth is performed at 0.92 atmospheres (700 Torr), the growth temperature is preferably set in a range of 1050 ± 50 ° C. (for example, 1050 ° C.). By doing so, the nitride III-V compound semiconductor layer 15 grows as shown in FIGS. 1B and 1C and FIG. 2A. At this time, the nitride-based III-V compound semiconductor layer 15 does not start to grow from above the convex portion 12. The growth rate is generally 0.5 to 5.0 μm / h, preferably about 3.0 μm / h. When the nitride III-V compound semiconductor layer 15 is a GaN layer, for example, the flow rate of the source gas is, for example, 20 SCCM for TMG and 20 SLM for NH ₃ . On the other hand, the growth (lateral growth) of the nitride-based III-V compound semiconductor layer 15 in the steps shown in FIGS. 2B and 2C is performed by setting the growth temperature high while lowering the V / III ratio of the growth material. Specifically, when the growth of the nitride-based III-V compound semiconductor layer 15 is performed under a pressure condition of 1 atm, the V / III ratio of the growth material is in the range of 5000 ± 2000, for example, and the growth temperature is, for example, 1200. Set in the range of ± 50 ° C. Regarding the V / III ratio of the growth raw material, when the growth of the nitride-based III-V compound semiconductor layer 15 is performed under a pressure condition of x atmospheric pressure, the pressure is determined from Bernoulli's law that defines the relationship between the flow velocity and the pressure. It is preferable to set the V / III ratio corresponding to the square of the amount of change, specifically (5000 ± 2000) × x ² . For example, when the growth is performed at 0.92 atmospheres (700 Torr), the V / III ratio of the growth material is preferably set in the range of 4200 ± 1700 (for example, 4232). As for the growth temperature, when growth is performed under a pressure condition of 1 atm or less, the surface of the nitride III-V compound semiconductor layer 15 is prevented from being roughened, and the lateral growth is favorably performed. It is preferable to set the temperature. For example, when growth is performed at 0.92 atmospheres (700 Torr), the growth temperature is preferably set in the range of 1150 ± 50 ° C. (eg, 1110 ° C.). When the nitride-based III-V group compound semiconductor layer 15 is, for example, a GaN layer, the flow rate of the source gas is, for example, 40 SCCM for TMG and 20 SLM for NH ₃ . By doing so, as shown in FIGS. 2B and 2C, the nitride-based III-V compound semiconductor layer 15 grows laterally.

FIG. 7 schematically shows the flow of the source gas during the growth of the GaN layer and the state of diffusion on the substrate 11 as an example of the nitride-based III-V group compound semiconductor layer 15. The most important point in this growth is that GaN does not grow on the convex portion 12 of the substrate 11 and growth of GaN starts in the concave portion 13 in the early stage of growth. In FIG. 7, the cross-sectional shape of the convex portion 12 is a triangular shape, but GaN does not grow on the convex portion 12 even if the cross-sectional shape of the convex portion 12 is trapezoidal. In general, GaN is grown by using TMG as a Ga raw material and NH ₃ as an N raw material. Ga (CH ₃ ) ₃ (g) + 3 / 2H ₂ (g) → Ga (g) + 3CH ₄ ( g)
NH ₃ (g) → (1-α) NH ₃ (g) + α / 2N ₂ (g) + 3α / 2H ₂ (g)
Ga (g) + NH ₃ (g) = GaN (s) + 3 / 2H ₂ (g)
As represented by the following reaction formula, this occurs when NH ₃ and Ga react directly. At this time, H ₂ gas is generated, and this H ₂ gas has an action opposite to crystal growth, that is, an etching action. In the steps shown in FIGS. 1B and 1C and FIG. 2A, by using conditions that are not performed in the conventional GaN growth on a flat substrate, that is, conditions that increase the etching action and are difficult to grow (increase the V / III ratio). The growth at the convex portion 12 is suppressed. On the other hand, since the etching action is weakened inside the recess 13, crystal growth occurs. Further, conventionally, in order to improve the flatness of the growth crystal surface, the growth is performed under the condition that the degree of lateral growth is increased (higher temperature), but here, the threading dislocation is bent in a direction parallel to the main surface of the substrate 11. For the purpose of reducing the thickness of the recess 13 or filling the inside of the recess 13 with the nitride-based III-V group compound semiconductor layer 15 at an earlier stage, as already described, at a lower temperature (for example, 1050 ± 50 ° C.) than before. Grow.

FIG. 8 schematically shows the results of examining the crystal defect distribution of the nitride-based III-V compound semiconductor layer 15 using a transmission electron microscope (TEM). However, the surface of the convex portion 12 was covered with a SiO ₂ film having a thickness of about 10 nm. In FIG. 8, the code | symbol 19 shows a threading dislocation. As can be seen from FIG. 8, although the dislocation density is high in the vicinity of the central portion of the convex portion 12, that is, at the meeting portion between the nitride-based III-V compound semiconductor layers 15 grown from the adjacent concave portions 13, the concave portion The dislocation density is low in other parts including the part above 13. For example, when the depth d of the recess 13 is 1 μm and the width W _{g of} the bottom surface is 2 μm, the dislocation density of the low dislocation density portion is 6 × 10 ⁷ / cm ² , and the substrate 11 subjected to the uneven processing is used. The dislocation density is reduced by 1 to 2 digits as compared with the case of no. It can also be seen that there is no occurrence of dislocation in the vertical direction with respect to the side wall of the recess 13.
In FIG. 8, the average thickness of the high dislocation density and poor crystallinity of the nitride-based III-V compound semiconductor layer 15 in contact with the substrate 11 in the recess 13 is the nitride in contact with the substrate 11 in the protrusion 12. It is about 1.5 times the average thickness of the region having poor dislocation and high dislocation density of the III-V compound semiconductor layer 15. This is a result reflecting the fact that the nitride-based III-V group compound semiconductor layer 15 grows laterally on the convex portion 12.
FIG. 9 shows the distribution of threading dislocations 19 when the convex portion 12 has the planar shape shown in FIG. FIG. 10 shows the distribution of threading dislocations 19 when the convex portion 12 has the planar shape shown in FIG.

Next, the growth mode of the nitride-based III-V group compound semiconductor layer 15 from the initial stage of growth and the state of dislocation propagation will be described with reference to FIG.
When the growth is started, as shown in FIG. 11A, first, a plurality of micronuclei 14 made of a nitride III-V group compound semiconductor are generated on the bottom surface of the recess 13. In these micronuclei 14, dislocations (shown by dotted lines) propagate in the vertical direction from the interface with the substrate 11, and the dislocations escape from the side surfaces of the micronuclei 14. If the growth is continued, as shown in FIGS. 11B and 11C, the nitride-based III-V group compound semiconductor layer 15 grows through the process of growth and coalescence of the micronuclei 14. In the process of growth and coalescence of these micronuclei 14, dislocation bending occurs in a direction parallel to the main surface of the substrate 11. As the growth continues further, as shown in FIG. 11D, the nitride-based III-V compound semiconductor layer 15 has an isosceles triangular cross-sectional shape with the bottom surface of the recess 13 as a base. At this point, the dislocations that escape from the nitride-based III-V compound semiconductor layer 15 to the upper part are greatly reduced. Next, as shown in FIG. 11E, a nitride-based III-V compound semiconductor layer 15 is grown in the lateral direction. In this process, the dislocations that have escaped to the side surface of the nitride-based III-V compound semiconductor layer 15 having an isosceles triangular cross-section with the bottom surface of the concave portion 13 as the base are located at a position lower than the convex portion 12. The nitride system III that has been stretched parallel to the main surface of the substrate 11 and disappeared while continuing to extend to the side surface of the convex portion 12 and that is located higher than the convex portion 12 extends parallel to the main surface of the substrate 11 and laterally grown. -It escapes to the side surface of the group V compound semiconductor layer 15. When the lateral growth of the nitride-based III-V compound semiconductor layer 15 is further continued, as shown in FIG. 11F, the nitride-based III-V group compound semiconductor layers 15 grown on both sides of the convex portion 12 are formed. Eventually, the surface of the nitride III-V compound semiconductor layer 15 becomes a flat surface parallel to the main surface of the substrate 11. The dislocations in the nitride-based III-V compound semiconductor layer 15 are bent upward (in the direction perpendicular to the main surface of the substrate 11) when meeting on the convex portion 12, and become threading dislocations.

With reference to FIGS. 12A and 12B, the behavior of the dislocation from the generation of the micronucleus 14 to after the lateral growth of the nitride-based III-V compound semiconductor layer 15 will be described again. As shown in FIGS. 12A and 12B, dislocations generated from the interface with the substrate 11 during the formation, growth, and coalescence of the micronuclei 14 are repeatedly bent in the horizontal direction and bundled (dislocation (1)). In addition, the dislocations bent in the horizontal direction extend to the side surface of the convex portion 12 and disappear (dislocation (2)). Furthermore, dislocations generated from the interface with the substrate 11 are bent only once and escape to the surface of the nitride III-V compound semiconductor layer 15 (dislocation (3)). Nitride system III with fewer threading dislocations compared to the case where the above-mentioned dislocations are bundled and the dislocations bent in the horizontal direction extend to the side surfaces of the protrusions 12 and disappear, so that the micronucleus 14 is not generated. The −V group compound semiconductor layer 15 can be obtained.
11A to C show cross-sectional TEM photographs in a state where the micronuclei 14 are generated on the bottom surface of the recess 13 as shown in FIG. 11A. 13B and 13C are cross-sectional TEM photographs in which a portion surrounded by an ellipse in FIG. 13A is enlarged. 13A to 13C clearly show that the micronuclei 14 are generated in the early stage of growth.

Next, how the behavior of dislocations generated in the nitride-based III-V compound semiconductor layer 15 differs depending on whether or not the micronucleus 14 is generated at the initial stage of growth will be described.
FIGS. 14A to 14C show states corresponding to FIGS. 11D to 11F in the case where the micronuclei 14 are not generated at the initial stage of growth of the nitride-based III-V compound semiconductor layer 15. As shown in FIG. 14A, when the micronuclei 14 are not generated at the initial stage of growth, the nitride III-V compound semiconductor layer 15 has an isosceles triangular cross-sectional shape with the bottom surface of the recess 13 as a base. At the time of growth, only dislocations extending upward from the interface with the bottom surface of the recess 13 exist, but this dislocation density is generally larger than that in FIG. 11D. When the growth is continued, as shown in FIG. 14B, the dislocations that have escaped to the side surface of the nitride-based III-V compound semiconductor layer 15 having an isosceles triangular cross-section with the bottom surface of the recess 13 as a base are convex portions. Those lower than 12 continue to extend to the side surface of the convex portion 12 in parallel to the main surface of the substrate 11 and disappear, and those higher than the convex portion 12 extend in parallel to the main surface of the substrate 11. The nitride-based group III-V compound semiconductor layer 15 grown in the lateral direction passes through the side surface. When the lateral growth of the nitride-based III-V compound semiconductor layer 15 is further continued, as shown in FIG. 14C, the nitride-based III-V group compound semiconductor layers 15 grown on both sides of the convex portion 12 are formed. As a result, the surface of the nitride III-V compound semiconductor layer 15 becomes a flat surface parallel to the main surface of the substrate 11. The dislocations in the nitride-based III-V compound semiconductor layer 15 are bent upward when meeting on the convex portion 12 to become threading dislocations 19. Although the density of the threading dislocations 19 is sufficiently low, it is higher than that in the case where the micronuclei 14 are generated on the bottom surface of the recess 13 in the early stage of growth. As shown in FIGS. 15A and 15B, when the micronucleus 14 is not generated, the dislocation generated from the interface with the substrate 11 reaches the slope of the isosceles triangular portion with the bottom surface of the recess 13 as the bottom. This is because it bends in the horizontal direction only once. That is, in this case, the effect of bundling dislocations in the process of generating, growing and coalescing the micronuclei 14 cannot be obtained.

  When the nitride-based III-V compound semiconductor layer 15 is grown so as to have an isosceles triangular cross-sectional shape with the bottom surface of the recess 13 as a base, the height of the nitride-based III-V compound semiconductor layer 15 is increased. The height of the convex portion 12 can also be selected so that the height is equal to or less than the height of the convex portion 12. As an example, FIGS. 16A and 16B show a case where the height of the nitride-based III-V compound semiconductor layer 15 is equal to the height of the convex portion 12. By doing so, dislocations generated from the interface with the substrate 11 and dislodging to the side surface of the nitride-based III-V group compound semiconductor layer 15 having an isosceles triangular cross-section with the bottom surface of the recess 13 as a base. Are all extended to the side surface of the convex portion 12 in parallel with the main surface of the substrate 11 and disappear, so that the threading dislocations 19 passing through the surface of the nitride-based III-V compound semiconductor layer 15 are drastically reduced. The threading dislocation density can be made zero.

The above is a case where the cross-sectional shape of the convex portion 12 is an isosceles triangle, but as shown in FIG. 17A, the convex portion 12 having a trapezoidal cross-sectional shape is periodically formed in a predetermined planar shape on the substrate 11. You may make it do. Also in this case, a recess 13 having an inverted trapezoidal cross-sectional shape is formed between the protrusions 12.
Then, a nitride III-V compound semiconductor layer 15 is grown on the substrate 11 in the same manner as described above. Specifically, a nitride having an isosceles triangular cross-section with the bottom surface of the recess 13 as the bottom, as shown in FIG. 17B, through the process of generation, growth and coalescence of the micronucleus 14 on the bottom surface of the recess 13. As shown in FIG. 17C, a III-V group compound semiconductor layer 15 having a flat surface and a low threading dislocation density is grown through lateral growth. Grow. Then, as shown in FIG. 18, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 are grown.
FIG. 19 schematically shows the results of examining the crystal defect distribution of the nitride-based III-V compound semiconductor layer 15 by TEM. Also in this case, although the dislocation density is high in the vicinity of the central portion of the convex portion 12, that is, at the meeting portion between the nitride-based III-V group compound semiconductor layers 15 growing from the adjacent concave portions 13, In other parts including this part, the dislocation density is low. It can also be seen that there is no occurrence of dislocation in the vertical direction with respect to the side wall of the recess 13.

Based on the above, a method for manufacturing a light emitting diode according to the first embodiment of the present invention will be described.
In the first embodiment, first, as shown in FIGS. 17 and 18, for example, a nitride-based III is formed on a substrate 11 on which a convex portion 12 having a trapezoidal cross-sectional shape made of the magnetostrictive material described above is formed. A -V group compound semiconductor layer 15, an n-type nitride-based III-V group compound semiconductor layer 16, an active layer 17, and a p-type nitride-based III-V group compound semiconductor layer 18 are grown.
Next, the substrate 11 on which the nitride-based III-V compound semiconductor layer is grown in this way is taken out from the MOCVD apparatus.
Next, as shown in FIG. 20, the p-side electrode 20 is formed on the p-type nitride III-V compound semiconductor layer 18. The p-side electrode 20 may be formed after peeling off the substrate 11 as will be described later.

Thereafter, in order to activate the p-type impurity of the p-type nitride III-V compound semiconductor layer 18, for example, a mixed gas of N ₂ and O ₂ (composition is, for example, 99% N ₂ and O ₂ In a 1% atmosphere, heat treatment is performed at a temperature of 550 to 750 ° C. (for example, 650 ° C.) or 580 to 620 ° C. (for example, 600 ° C.). Here, for example, activation is easily caused by mixing O ₂ with N ₂ . Further, for example, nitrogen halide (NF ₃ , NCl _3, etc.) is mixed in a mixed gas atmosphere of N ₂ or N ₂ and O ₂ as a raw material such as F and Cl having high electronegativity as in O and N. You may do it. The time for this heat treatment is, for example, 5 minutes to 2 hours or 40 minutes to 2 hours, generally about 10 to 60 minutes. The reason why the temperature of the heat treatment is relatively low is to prevent the active layer 16 and the like from being deteriorated during the heat treatment. This heat treatment may be performed after the p-type nitride-based III-V group compound semiconductor layer 18 is epitaxially grown and before the p-side electrode 20 is formed.

Next, as shown in FIG. 21, magnetostriction is generated in the convex portion 12 by applying a DC or AC magnetic field H in a direction perpendicular to the main surface of the substrate 11 from the outside. For example, when a cubic structure Fe ₃ Pt is used as the magnetostrictive material constituting the convex portion 12 and the [001] direction is perpendicular to the main surface of the substrate 11, a magnetic field of 1 Tesla (T) is used. Can be applied to generate a very large magnetostriction of about 2.3% (0.023) in the [001] direction, that is, in the direction perpendicular to the main surface of the substrate 1. The convex portion 12 extends in a direction perpendicular to the main surface of the substrate 11. In FIG. 21, the extended convex part 12 is shown with a dashed-dotted line. Therefore, the substrate 11 above and below the convex portion 12, the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V. A force in the direction of separating them from each other acts between the group compound semiconductor layers 18. At the same time, a force is exerted between the convex portion 12 and the substrate 11 in a direction to separate them from each other. As a result, as shown in FIG. 22, the substrate 11 is made of a nitride III-V compound semiconductor layer 15, an n-type nitride III-V compound semiconductor layer 16, an active layer 17, and a p-type nitride III- It can be peeled from the group V compound semiconductor layer 18. At this time, the convex portion 12 may be left on the substrate 11 or the convex portion 12 may be destroyed.
Thereafter, if necessary, the protrusion 12 on the back surface of the n-type nitride III-V compound semiconductor layer 15 thus exposed is removed by etching, and the protrusion 12 is again formed with another material, for example, SiO ₂ or SiN. May be formed.

Next, as shown in FIG. 23, the n-side electrode 21 is formed on the back surface of the n-type nitride III-V compound semiconductor layer 15 exposed by peeling off the substrate 11.
Here, the light extraction direction can be selected by using the p-side electrode 20 and the n-side electrode 21 as a highly reflective electrode or a transparent electrode.
Further, since the entire thickness of the light emitting diode becomes extremely small by removing the substrate 11, in order to improve the mechanical strength, as shown in FIG. 24, a support substrate 22 is placed on the p-side electrode 20 thereon. You may affix and join via the metal electrode 23. FIG. The support substrate 22 may be either conductive or non-conductive, and it is sufficient that the support substrate 22 has a structure that allows current to flow to the light emitting diode through the metal electrode 23.
Thus, the target light emitting diode is manufactured.

A specific structural example of the light emitting diode will be described. That is, for example, the nitride III-V compound semiconductor layer 15 is an n-type GaN layer, the n-type nitride III-V compound semiconductor layer 16 is an n-type GaN layer and an n-type GaInN layer in order from the bottom, The p-type nitride III-V compound semiconductor layer 18 is a p-type AlInN layer, a p-type GaN layer, and a p-type GaInN layer in order from the bottom. The active layer 17 has, for example, a GaInN-based multiple quantum well (MQW) structure (for example, one in which a GaInN quantum well layer and a GaN barrier layer are alternately stacked). It is selected according to the wavelength. For example, it is ˜11% at an emission wavelength of 405 nm, ˜18% at 450 nm, and ˜24% at 520 nm. As a material of the p-side electrode 20, for example, Ag, Pd / Ag, or the like is used, or a barrier metal made of Ti, W, Cr, WN, CrN, or the like is used in addition to this, if necessary. As the n-side electrode 21, for example, a Ti / Pt / Au structure is used.
In the light-emitting diode thus obtained, light is emitted by applying a forward voltage between the p-side electrode 20 and the n-side electrode 21 to flow current, and light is extracted outside. By selecting the In composition of the active layer 17, red to ultraviolet light emission, particularly blue light emission, green light emission, or red light emission can be obtained.

  As described above, according to the first embodiment, the nitride III-V compound semiconductor layer forming the light emitting diode structure grown on the substrate 11 can be formed without using an expensive device. The nitride-based III-V group compound semiconductor layer can be easily separated from the substrate 11 with almost no physical damage, so that a current flows between the p-side electrode 20 and the n-side electrode 21 facing each other. Can be manufactured at low cost. Further, since the substrate 11 can be recycled through surface treatment such as surface polishing as necessary, resources can be effectively used and the manufacturing cost of the light emitting diode can be reduced.

Further, the threading dislocations in the nitride III-V compound semiconductor layer 15 are concentrated near the center of the convex portion 12 of the substrate 11, and the dislocation density in other portions is, for example, about 6 × 10 ⁷ / cm ² . Since it is greatly reduced as compared with the case of using the concavo-convex processed substrate, the nitride III-V compound semiconductor layer such as the nitride III-V compound semiconductor layer 15 and the active layer 17 grown thereon is used. The crystallinity of this material is greatly improved, and the non-luminescent center and the like are also greatly reduced. As a result, a nitride III-V compound semiconductor light emitting diode with extremely high luminous efficiency can be obtained.

  Furthermore, the epitaxial growth necessary for manufacturing the nitride III-V compound semiconductor light emitting diode is only required once, and not only a growth mask is unnecessary, but also the protrusion 12 on the substrate 11 is formed on the substrate 11. Since a film that forms the material of the convex portion 12 can be formed and processed by etching, powder blasting, sand blasting, or the like, processing of the substrate 11 such as a sapphire substrate that is difficult to perform uneven processing is unnecessary. Therefore, the manufacturing process is simple, and a nitride III-V compound semiconductor light emitting diode can be manufactured at low cost.

Next explained is a manufacturing method of the light emitting diode according to the second embodiment of the invention.
In the second embodiment, as the material of the convex portion 12, for example, the electrostrictive material described above is used.
Then, after the process is advanced to the p-side electrode 20 in the same manner as in the first embodiment, as shown in FIG. 25, for example, a DC or AC electric field E perpendicular to the main surface of the substrate 11 from the outside. Is applied to generate electrostriction in the convex portion 12. For example, when BaTiO ₃ to which a small amount of Fe is added is used as the electrostrictive material constituting the convex portion 12 and the c-axis direction is perpendicular to the main surface of the substrate 11, an electric field of 200 V / mm is applied. As a result, an extremely large electrostriction of about 0.75% (0.0075) in the c-axis direction, that is, the direction perpendicular to the main surface of the substrate 11 can be generated. 12 extends in a direction perpendicular to the main surface of the substrate 11. In FIG. 25, the extended convex portion 12 is indicated by a one-dot chain line. Therefore, the substrate 11 above and below the convex portion 12, the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V. A force in the direction of separating them from each other acts between the group compound semiconductor layers 18. At the same time, a force is exerted between the convex portion 12 and the substrate 11 in a direction to separate them from each other. As a result, as shown in FIG. 22, the substrate 11 is made of the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III. It can be peeled from the group V compound semiconductor layer 18.
Other than the above are the same as in the first embodiment.
According to the second embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is a manufacturing method of the light emitting diode according to the third embodiment of the invention.
In the third embodiment, the hydrogen storage alloy already described is used as the material of the convex portion 12, and specifically, for example, a Pd-based alloy or the like is used.
Then, the process proceeds in the same manner as in the first embodiment to finish the growth of the p-type nitride III-V compound semiconductor layer 18, and then lithography is performed on the p-type nitride III-V compound semiconductor layer 18. Thus, a resist pattern (not shown) having a predetermined shape with an opening corresponding to the predetermined portion including the threading dislocation 19 above the convex portion 12 is formed, and using this resist pattern as a mask, for example, p-type by RIE method. The nitride-based III-V compound semiconductor layer 18, the active layer 17, the n-type nitride-based III-V compound semiconductor layer 16 and the nitride-based III-V compound semiconductor layer 15 are sequentially etched, so that FIG. As shown in FIG. 4, a groove 24 is formed, and the convex portion 12 is exposed inside the groove 24. By forming the groove 24 in this way, the threading dislocation 19 in the groove 24 is removed. If necessary, a groove 24 may be formed also in the upper part of the recess 13 and the threading dislocation 19 in the part of the groove 24 may be removed.

Next, the substrate 11 in which the grooves 24 are formed in the nitride III-V compound semiconductor layer thus forming the light emitting diode structure is placed in a processing container (not shown), and hydrogen gas is introduced into the processing container to obtain a predetermined value. A hydrogen gas atmosphere at a pressure of 1 mm is formed, and hydrogen is occluded and expanded by the hydrogen occlusion alloy constituting the convex portion 12 through the groove 24. As a result, the convex portion 12 extends in a direction perpendicular to the main surface of the substrate 11. Therefore, the substrate 11 above and below the convex portion 12, the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V. A force in the direction of separating them from each other acts between the group compound semiconductor layers 18. At the same time, a force is exerted between the convex portion 12 and the substrate 11 in a direction to separate them from each other. As a result, as shown in FIG. 27, the substrate 11 is made of a nitride III-V compound semiconductor layer 15, an n-type nitride III-V compound semiconductor layer 16, an active layer 17, and a p-type nitride III- It can be peeled from the group V compound semiconductor layer 18.
Next, the inside of the trench 24 is filled with an insulating material (not shown) such as SiO ₂ to planarize the entire surface of the p-type nitride III-V compound semiconductor layer 18.
Next, the p-side electrode 20 is formed on the p-type nitride III-V compound semiconductor layer 18.
Other than the above are the same as in the first embodiment.
According to the third embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is a manufacturing method of the light emitting diode according to the fourth embodiment of the invention.
In the fourth embodiment, the material that can be oxidized, nitrided, sulfided, or lithiated as described above is used as the material of the convex portion 12.
Then, the process proceeds in the same manner as in the first embodiment and is completed until the growth of the p-type nitride-based III-V compound semiconductor layer 18, and then, as in the third embodiment, as shown in FIG. Then, a groove 24 is formed in the portion above the convex portion 12, and the threading dislocation 19 in the groove 24 portion is removed. As shown in FIG. 28, a groove 24 may be formed in the upper part of the recess 13 and the threading dislocation 19 in the groove 24 part may be removed.

Next, the substrate 11 in which the grooves 24 are formed in the nitride-based III-V compound semiconductor layer forming the light emitting diode structure is placed in a processing container (not shown), and the convex portion 12 is formed in the gas phase or liquid in the processing container. It expands by oxidizing, nitriding, sulfiding or lithiating in the phase. For example, when amorphous Si is used as the material of the convex portion 12, the amorphous Si is oxidized by exposing it to an oxidizing atmosphere such as oxygen or nitriding by exposing it to a nitriding atmosphere such as ammonia or nitrogen. ₂ or SiN. For example, when amorphous Si or Mo is used as the material of the convex portion 12, the amorphous Si or Mo is changed to SiS ₂ or MoS ₂ by sulfidation. As shown in FIG. 29, at least a part of the projection 12 is oxidized, nitrided, sulfided or lithiated to form a reaction layer 25 composed of an oxide layer, nitride layer, sulfide layer or lithiated layer. The portion 12 expands as a whole, and the convex portion 12 extends in a direction perpendicular to the main surface of the substrate 11. Therefore, the substrate 11 above and below the convex portion 12, the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V. A force in the direction of separating them from each other acts between the group compound semiconductor layers 18. At the same time, a force is exerted between the convex portion 12 and the substrate 11 in a direction to separate them from each other. As a result, the substrate 11 is separated from the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18. Can be peeled off.

After performing the oxidation, nitridation, sulfidation or lithiation of the convex portion 12 as described above, as shown in FIG. 30, the substrate 11 is transmitted from the back side of the substrate 11 and is projected by the convex portion 12. By irradiation (laser ablation) with a laser beam 26 having an absorbed wavelength, the portion of the convex portion 12 that has not been oxidized, nitrided, sulfided, or lithiated is heated to expand or dissolve, thereby peeling the substrate 11. You may do it. As this laser beam 26, for example, an ultraviolet laser beam by an excimer laser can be used.
Next, the inside of the groove 24 is filled with an insulating material such as SiO _2, and the entire surface of the p-type nitride III-V compound semiconductor layer 18 is planarized.
Next, the p-side electrode 20 is formed on the p-type nitride III-V compound semiconductor layer 18.
Other than the above are the same as in the first embodiment.
According to the fourth embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is a manufacturing method of the light emitting diode according to the fifth embodiment of the invention.
In the fifth embodiment, a material that absorbs light is used as the material of the convex portion 12, and specifically, for example, Si is used.
And after advancing a process similarly to 1st Embodiment and complete | finishing to formation of the p side electrode 20, as shown in FIG. 31, it permeate | transmits the board | substrate 11 from the back surface side of the board | substrate 11, and is the convex part 12. The laser beam 26 having a wavelength that is absorbed by the laser beam 26 is irradiated and absorbed by the convex portion 12. For example, when Si is used as the material of the convex portion 12, for example, an ultraviolet laser beam by an excimer laser can be used as the laser beam 26. Thus, the convex portion 12 irradiated with the laser beam 26 is heated to expand or melt, and extends in a direction perpendicular to the main surface of the substrate 11. In FIG. 31, the convex part 12 after extending | stretching is shown with a dashed-dotted line. Accordingly, the substrate 11 above and below the protrusion 12 and the nitride-based III-V compound semiconductor layer 15, the n-type nitride-based III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride-based III-V group. A large force is applied to the compound semiconductor layer 18 in the direction of separating them. By such a large force acting, the nitride III-V compound semiconductor layer 15 peels from the bottom surface of the recess 13 of the substrate 11, and the bottom surface of the projection 13 also peels from the substrate 11. Thus, as shown in FIG. 22, the substrate 11 is made of the nitride-based III-V compound semiconductor layer 15, the n-type nitride-based III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride-based III- It can be peeled from the group V compound semiconductor layer 18.
Other than the above are the same as in the first embodiment.
According to the fifth embodiment, advantages similar to those of the first embodiment can be obtained.

Next explained is the sixth embodiment of the invention.
In the sixth embodiment, the nitride-based III-V compound semiconductor layer 15 is laterally grown in the same manner as in the first embodiment. However, as shown in FIG. The nitride-based III-V group compound semiconductor layers 15 contact each other on the projections 12 and finish the growth before associating.
Next, as shown in FIG. 32B, the protrusions 12 are etched away by wet etching or the like through the gaps between the nitride-based III-V compound semiconductor layers 15 grown from the adjacent recesses 13. Thus, a cavity 27 is formed in the portion where the convex portion 12 is removed.
Next, as shown in FIG. 33A, as in the first embodiment, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 are used. Grow sequentially.
Next, as shown in FIG. 33B, laser light 26 having a wavelength that passes through the substrate 11 is irradiated from the back surface side of the substrate 11, and the vicinity of the interface between the substrate 11 and the nitride III-V compound semiconductor layer 15 is observed. Heat. As this laser beam 26, for example, an ultraviolet laser beam by an excimer laser can be used. Thereby, as shown in FIG. 33B, the substrate 11 can be peeled from the nitride-based III-V compound semiconductor layer 15.
Other than the above are the same as in the first embodiment.
According to the sixth embodiment, the same advantages as those of the first embodiment can be obtained.
33A and 33B show a structure in which there is a complete gap between the nitride-based III-V group compound semiconductor layers 15 until they are peeled off. After passing through the form shown, the nitride group III-V compound semiconductor layer 15 is associated by lateral growth, and the cavity 27 is completely isolated by the nitride group III-V compound semiconductor layer 15 and the substrate 11. Alternatively, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 may be sequentially grown.

Next explained is the seventh embodiment of the invention.
In the seventh embodiment, the nitride-based III-V group compound grown from the adjacent concave portion 13 as shown in FIG. 34A after finishing the removal of the convex portion 12 in the same manner as in the sixth embodiment. The gap between the semiconductor layers 15 is filled with an insulator 28 and covered. As the insulator 28, for example, a coating type insulating film such as SOG (Spin on Glass) can be used, but is not limited thereto.
Next, as shown in FIG. 34B, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 are the same as in the first embodiment. Grow sequentially.
Next, as shown in FIG. 35, a laser beam 26 having a wavelength that passes through the substrate 11 is irradiated from the back surface side of the substrate 11, and the vicinity of the interface between the substrate 11 and the nitride III-V compound semiconductor layer 15 is observed. By heating, expanding or melting, the substrate 11 is nitrided III-V compound semiconductor layer 15, n-type nitride III-V compound semiconductor layer 16, active layer 17 and p-type nitride III- Peel from the group V compound semiconductor layer 18. As the laser beam 26, for example, an ultraviolet laser beam using an excimer laser can be used.
Other than the above are the same as in the first embodiment.
According to the seventh embodiment, the same advantages as those of the first embodiment can be obtained.

Next, an eighth embodiment of the invention will be described.
In the eighth embodiment, after the removal of the convex portion 12 is completed in the same manner as in the sixth embodiment, light is absorbed in the cavity 27 formed by the removal of the convex portion 12 as shown in FIG. 36A. A material 29 is embedded, and a gap between the nitride-based III-V compound semiconductor layers 15 grown from the adjacent recesses 13 is embedded with an insulator 28 and covered. As the light absorbing material 29, for example, a Si-based material can be used.
Next, as shown in FIG. 36B, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 are the same as in the first embodiment. Grow sequentially.
Next, as shown in FIG. 37, from the back surface side of the substrate 11, the laser light 26 having a wavelength that is transmitted through the substrate 11 and absorbed by the light absorbing material 29 is irradiated, the light absorbing material 29 is heated, expanded, By dissolving the substrate 11, the nitride III-V compound semiconductor layer 15, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer are formed. Peel from 18. As the laser beam 26, for example, an ultraviolet laser beam using an excimer laser can be used.
Other than the above are the same as in the first embodiment.
According to the eighth embodiment, the same advantages as those of the first embodiment can be obtained.

Next, a ninth embodiment of the invention will be described.
In the ninth embodiment, after the formation of the p-side electrode 20 is completed as in the seventh embodiment, as shown in FIG. 38, the p-side electrode 20, the p-type nitride III-V The group compound semiconductor layer 18 and the active layer 17 are sequentially etched by the RIE method or the like to form an opening 30, and the n-type nitride III-V group compound semiconductor layer 16 is exposed in the opening 30. Next, an insulating film 31 such as a SiO ₂ film is formed so as to fill the opening 30 and cover the p-side electrode 20. Next, a contact hole 32 is formed by selectively etching a portion of the opening 30 in the insulating film 31, and the n-type nitride III-V compound semiconductor layer 16 is exposed in the contact hole 32. Let Further, a contact hole 33 is formed by selectively etching a predetermined portion of the insulating film 31 on the p-side electrode 20, and the p-side electrode 20 is exposed in the contact hole 33. Next, the n-side electrode 21 is formed on the n-type nitride III-V compound semiconductor layer 16 through the contact hole 32, and the electrode 34 is formed on the p-side electrode 20 through the contact hole 33.

  Next, electrodes 35a and 35b were formed on positions corresponding to the n-side electrode 21 and the electrode 34 of the light emitting diode on one main surface of the wiring substrate 35 such as a printed wiring board on which the light emitting diode driving circuit and the like were formed. Separately, the electrodes 35a and 35b of the wiring substrate 35 are made to face the n-side electrode 21 and the electrode 34, respectively, and these are crimped and joined as shown in FIG. Thus, a light emitting diode integrated with the wiring board 35 is obtained.

Next explained is the tenth embodiment of the invention.
In the tenth embodiment, the substrate 11 is made of a nitride III-V compound semiconductor layer 15, an n-type nitride III-V compound semiconductor layer 16, and an active layer 17 as in the seventh embodiment. Then, after peeling from the p-type nitride III-V compound semiconductor layer 18, as shown in FIG. 39, the n-side electrode 21 is embedded in the concave portion (the portion from which the convex portion 12 is removed) of the peeling surface.
Next, an electrode having electrodes 35a and 35b formed on one main surface of a wiring board 35 such as a printed wiring board on which a light emitting diode driving circuit is formed is prepared separately, and corresponds to the p-side electrode 20 of the light emitting diode. The electrode 35b of the wiring board 35 is made to face the position, and these are crimped and joined as shown in FIG. Wire bonding is performed between the electrode 35a and the n-side electrode 21. Thus, a light emitting diode integrated with the wiring board 35 is obtained.

Next, an eleventh embodiment of the present invention will be described.
In the eleventh embodiment, the process is completed until the growth of the p-type nitride III-V compound semiconductor layer 18 in the same manner as in any of the first to fifth embodiments.
Next, as shown in FIG. 40A, the surface texture 51 for scattering the light from the active layer 17 on the surface of the p-type nitride III-V compound semiconductor layer 18 and improving the light extraction efficiency is formed. At the same time, the p-side electrode 20 is formed on the p-type nitride-based III-V compound semiconductor layer 18 in the portion above the recess 13. The surface texture 51 is, for example, an uneven structure formed by processing the surface of the p-type nitride III-V compound semiconductor layer 18 or a dielectric on the p-type nitride III-V compound semiconductor layer 18. The concavo-convex structure is formed by forming a body film or the like and patterning it, but is not limited thereto.
Next, as shown in FIG. 40B, the substrate 11 is processed by polishing or the like from the back side, and the thickness of the substrate 11 is set to λ / 4n (λ is the emission wavelength of the light-emitting diode, n is the refractive index of the substrate 11) or its Integer multiple.

Next, as in any of the first to fifth embodiments, the substrate 11 is peeled off by causing the protrusion 12 to elongate, expand, melt, etc. In this case, as shown in FIG. 41A, The substrate 11 is partially peeled only at the portion corresponding to the convex portion 12, and the other portion remains bonded to the nitride-based III-V compound semiconductor layer 15. The convex portion 12 may be peeled together when the substrate 11 is partially peeled, or may remain without being peeled off. However, if the convex portion 12 remains, the convex portion 12 is removed by etching or the like. Remove.
Next, as shown in FIG. 41B, a metal for forming an n-side electrode is deposited on the entire surface from the back surface side of the substrate 11 by a vacuum evaporation method, a sputtering method, or the like, so that the portion where the substrate 11 is removed is embedded. An n-side electrode 21 is formed.
Thus, a light emitting diode is manufactured.
Next, as shown in FIG. 42, a support substrate 22 is attached to and bonded to the n-side electrode 21 of the light emitting diode via a metal electrode 23 thereon. In this case, a structure in which the n-side electrode 21 and the metal electrode 23 are joined, that is, a structure in which a metal and a metal are joined is obtained. The support substrate 22 is preferably one having good heat dissipation.
According to the eleventh embodiment, as shown in FIG. 42, the light from the active layer 17 enters the n-side electrode 21 through the remaining substrate 11 without being peeled off, and is reflected by the surface thereof. Thus, since the n-side electrode 21 functions as a so-called ODR electrode, it is efficiently taken out from the surface of the p-type nitride III-V compound semiconductor layer 18 together with the surface texture 51. For this reason, the light extraction efficiency of the light emitting diode can be greatly improved. Further, the p-side electrode 20 is formed at a position shifted in the horizontal direction by a distance that is half the pitch of the convex portion with respect to the convex portion of the n-side electrode 21 embedded in the portion where the convex portion 12 is removed. Therefore, the current flowing between the p-side electrode 20 and the n-side electrode 21 during the operation of the light emitting diode spreads in the horizontal direction as shown in FIG. 42, so that a so-called current crowding phenomenon occurs. Can be prevented. In addition, the same advantages as those of the first embodiment can be obtained.

Next, a twelfth embodiment of the invention is described.
In the twelfth embodiment, the process proceeds to the step of forming the n-side electrode 21 as in the tenth embodiment. In this case, as shown in FIG. 43A, the n-side electrode 21 is removed by the substrate 11. It differs from the tenth embodiment in that it is formed so as to embed only the portion that has been made. The n-side electrode 21 and the surface exposed to the outside of the substrate 11 are on the same plane, or at least the n-side electrode 21 protrudes to the outside as compared with the substrate 11.
Then, as shown in FIG. 43B, a support substrate 22 is attached to and bonded to the n-side electrode 21 of the light-emitting diode via a metal electrode 23 thereon. In this case, the structure includes a structure in which the n-side electrode 21 and the substrate 11 and the metal electrode 23 are bonded, that is, a structure including a portion in which the metal and the metal are bonded and a portion in which the metal and the dielectric are bonded.
According to the twelfth embodiment, the same advantages as those of the eleventh embodiment can be obtained, and the following advantages can be obtained. That is, in this case, since the n-side electrode 21 and the metal electrode 23 are not joined over the entire surface, heat is applied between the n-side electrode 21 and the metal electrode 23 during bonding or during operation of the light emitting diode. As a result, problems such as interdiffusion of metals due to the above and the deterioration of the reflectance of the n-side electrode 21 are eliminated or greatly improved.

Next, a thirteenth embodiment of the invention is described.
In the thirteenth embodiment, in addition to the blue light emitting diode and the green light emitting diode obtained by the method according to the first embodiment, a separately prepared red light emitting diode (for example, an AlGaInP light emitting diode) is provided. A case where a light-emitting diode backlight is manufactured using the same will be described.
A blue light emitting diode is obtained in the form of a flip chip by the method according to the first embodiment. Similarly, a green light emitting diode is obtained in the form of a flip chip. On the other hand, as a red light emitting diode, an AlGaInP light emitting diode is formed by stacking an AlGaInP semiconductor layer on an n-type GaAs substrate to form a diode structure and forming a p-side electrode thereon. It shall be used in the form.

As shown in FIG. 44, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 as described above are formed as one unit (cell) on the wiring board 61. Are arranged in a predetermined pattern as necessary. Next, after potting the transparent resin so as to cover this one unit, the transparent resin is cured. By this curing process, the transparent resin is solidified and is slightly reduced accordingly. Thus, as shown in FIG. 45, the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 as a unit are sealed with the transparent resin 68, and the wiring board 61 is sealed. A light-emitting diode backlight arranged in an array is obtained.
This light emitting diode backlight is suitable for use in a backlight of a liquid crystal panel, for example.

Next, a fourteenth embodiment of the invention is described.
In the fourteenth embodiment, as in the thirteenth embodiment, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 are placed on a wiring board 61 in a predetermined manner. After the necessary number of patterns are arranged, as shown in FIG. 46, a transparent resin 69 suitable for the light emitting diode chip 63 is potted so as to cover the red light emitting diode chip 63, and the green light emitting diode chip 64 is formed. The transparent resin 70 suitable for the light emitting diode chip 64 is potted so as to cover the light emitting diode chip 64, and the transparent resin 71 suitable for the light emitting diode chip 65 is potted so as to cover the blue light emitting diode chip 65. Thereafter, the curing treatment of the transparent resins 69 to 71 is performed. By this curing process, the transparent resins 69 to 71 are solidified and are slightly reduced accordingly. In this way, a light emitting diode backlight in which the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 as a unit are arranged in an array on the wiring board 61 is obtained. .
This light emitting diode backlight is suitable for use in a backlight of a liquid crystal panel, for example.

Next, a fifteenth embodiment of the invention is described.
In the fifteenth embodiment, a light source cell unit is manufactured by using a separately prepared red light emitting diode in addition to a blue light emitting diode and a green light emitting diode obtained by the method according to the first embodiment. The case will be described.
As shown in FIG. 47A, in the fifteenth embodiment, as in the thirteenth embodiment, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 are provided. A required number of cells 75 each including at least one and arranged in a predetermined pattern are arranged on the printed wiring board 76 in a predetermined pattern. In this example, each cell 75 includes a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65, which are arranged at the apexes of an equilateral triangle. FIG. 47B shows the cell 75 in an enlarged manner. The interval a between the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 in each cell 75 is, for example, 4 mm, but is not limited thereto. The interval b of the cells 75 is, for example, 30 mm, but is not limited to this. As the printed wiring board 76, for example, an FR4 (abbreviation of Flame Retardant Type 4) board, a metal core board, a flexible wiring board, or the like can be used, but any other printed wiring board having heat dissipation can be used. However, it is not limited to these. As in the thirteenth embodiment, the transparent resin 68 is potted so as to cover each cell 76, or the transparent resin is covered so as to cover the red light emitting diode chip 63 as in the fourteenth embodiment. 69, potting of the transparent resin 70 is performed so as to cover the green light emitting diode chip 64, and potting of the transparent resin 71 is performed so as to cover the blue light emitting diode chip 65. In this way, a light source cell unit is obtained in which the cells 75 including the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 are arranged on the printed wiring board 76.

Although the specific example of arrangement | positioning of the cell 75 on the printed wiring board 76 is shown in FIG. 48 and FIG. 49, it is not limited to these. The example shown in FIG. 48 has cells 75 arranged in a 4 × 3 two-dimensional array, and the example shown in FIG. 49 has cells 75 arranged in a 6 × 2 two-dimensional array.
FIG. 50 shows another configuration example of the cell 75. In this example, the cell 75 includes one red light emitting diode chip 63, two green light emitting diode chips 64, and one blue light emitting diode chip 65, which are arranged at the apex of a square, for example. Has been. Two green light emitting diode chips 64 are arranged at the vertices of one end of one diagonal of the square, and a red light emitting light emitting diode chip 63 and a blue light emitting light emitting diode chip 65 are disposed at both ends of the other diagonal of the square. It is placed at the vertex.
By arranging one or a plurality of the light source cell units, a light emitting diode backlight suitable for use in a backlight of a liquid crystal panel, for example, can be obtained.

Next, a sixteenth embodiment of the invention is described.
In the sixteenth embodiment, instead of the wiring board 35, the wiring board 61, and the printed wiring board 76, they are electrically insulated from each other having a wiring pattern equivalent to the printed wiring board 76, as shown in FIG. One electrode side of the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 is directly applied to a predetermined portion of a thin conductive substrate 91a, 91b, 91c (for example, a lead frame). After mounting and wire bonding to the other electrode by the wire 67, respectively, for example, it may be molded with transparent resins 69 to 71 by an integral molding technique using a mold. Here, the light emitting diode chips 63, 64, 65 are vertical current injection type like the light emitting diode according to the first embodiment, for example. The light-emitting diode chips 63, 64, and 65 are preferably mounted in a desired arrangement and arrangement optimally designed for the purpose of early color mixing (whitening and uniformization). The light emitting diode chips 63, 64 and 65 may be integrally molded with a transparent resin 68. Of the conductive substrates 91a, 91b, 91c, the portion for mounting the light emitting diode chips 63, 64, 65 may be formed in a cup shape having an inclined surface, whereby the light extraction amount is reduced by reflection from the inclined surface. Can be increased. Further, when light is finally extracted from the light emitting diode chips 63, 64, and 65 on the conductive substrates 91a, 91b, and 91c, the light emitting diode chips 63, 64, and 65 are finally removed for the purpose of improving heat dissipation performance. Only the transparent resin 69 to 71 or the transparent resin 68 is molded so that heat is directly radiated from the conductive substrate 91 exposed to the outside on the side opposite to the light emitting diode chips 63, 64, 65. Is desirable. When the conductive substrates 91a, 91b, and 91c are, for example, lead frames, as a method for forming the heat dissipation structure using the lead frames, for example, a forming method in which only the light emitting diode side (one side) is resin-molded at the time of mold molding is used. Alternatively, a method may be used in which both sides of the light emitting diode are resin-molded and then removed so as to leave the mold resin on one side. The light emitting diode chips 63, 64, and 65 have various forms such as flip chip (without wire bonding) and face up (with wire bonding), and the light extraction side is also light emitting diode chip 63, 64, 65 side, light emission. Since there is a side opposite to the diode chips 63, 64, 65, etc., it goes without saying that the mold side and the heat dissipation side may be reversed depending on these forms.
51 is a cross-sectional view and is not shown. For example, the package of the red, green, and blue light emitting diode chips 63, 64, and 65 on the lead frame at the time of integral molding has, for example, at least the minimum unit. 47B or 50 as shown in FIG. 50, and may be in the form of a mold package having three pairs of external lead terminals (anode / cathode pair).

As mentioned above, although embodiment of this invention was described concretely, this invention is not limited to the above-mentioned embodiment, The various deformation | transformation based on the technical idea of this invention is possible.
For example, the numerical values, materials, structures, shapes, substrates, raw materials, processes, orientations of the convex portions 12 and the concave portions 13 and the like given in the first to sixteenth embodiments are merely examples, and if necessary, Different numerical values, materials, structures, shapes, substrates, raw materials, processes, orientations of the convex portions 12 and the concave portions 13 may be used.
Specifically, for example, in the first to sixteenth embodiments described above, the conductivity types of the p-type layer and the n-type layer may be reversed.
In the first to sixteenth embodiments, the case where the cross-sectional shape of the convex portion 12 on the substrate 11 is trapezoidal has been described. However, the cross-sectional shape of the convex portion 12 is not only an isosceles triangle but also other cross-sectional shapes. It may be.
In addition, for the purpose of facilitating peeling, the convex lamination may be repeated so that the layers are doubled and tripled to form a desired substrate peeling pattern, or the shape of the convex layer and the number of laminations are partially formed. By changing the (repetition number), the convex density is changed one-dimensionally, two-dimensionally, and three-dimensionally, and the desired final peeling form (for example, strain generated by external action is partially controlled on the substrate). A peeling pattern) may be obtained.
Moreover, you may combine 2 or more of the above-mentioned 1st-16th embodiment as needed.

It is sectional drawing for demonstrating the method used for the growth of the nitride type III-V compound semiconductor layer which forms a light emitting diode structure in embodiment of this invention. It is sectional drawing for demonstrating the method used for the growth of the nitride type III-V compound semiconductor layer which forms a light emitting diode structure in embodiment of this invention. It is sectional drawing for demonstrating the method used for the growth of the nitride type III-V compound semiconductor layer which forms a light emitting diode structure in embodiment of this invention. FIG. 4 is a plan view showing an example of a planar shape of a convex portion formed on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. FIG. 4 is a plan view showing an example of a planar shape of a convex portion formed on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. It is a basic diagram which shows the board | substrate used in the growth method of the nitride type III-V compound semiconductor layer shown in FIGS. FIG. 4 is a schematic diagram for explaining a state of growth of a nitride III-V compound semiconductor layer on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. The behavior of dislocations obtained by TEM observation of the nitride III-V compound semiconductor layer grown on the substrate in the method of growing a nitride III-V compound semiconductor layer shown in FIGS. FIG. FIG. 4 is a schematic diagram showing an example of a distribution of threading dislocations in a nitride III-V compound semiconductor layer grown on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. is there. FIG. 4 is a schematic diagram showing an example of a distribution of threading dislocations in a nitride III-V compound semiconductor layer grown on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. is there. FIG. 4 is a schematic diagram showing a growth state of a nitride III-V compound semiconductor layer grown on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. FIG. 4 is a schematic diagram for explaining dislocation behavior of a nitride III-V compound semiconductor layer grown on a substrate in the method for growing a nitride III-V compound semiconductor layer shown in FIGS. . FIG. 4 is a drawing-substituting photograph showing an initial growth state of a nitride III-V compound semiconductor layer grown on a substrate in the method of growing a nitride III-V compound semiconductor layer shown in FIGS. In the growth method of the nitride-based III-V compound semiconductor layer shown in FIGS. 1 to 3, the growth of the nitride-based III-V compound semiconductor layer grown on the substrate is not accompanied by the generation of micronuclei at the initial growth stage. It is a basic diagram which shows the mode of. In the growth method of the nitride-based III-V compound semiconductor layer shown in FIGS. 1 to 3, the growth of the nitride-based III-V compound semiconductor layer grown on the substrate is not accompanied by the generation of micronuclei at the initial growth stage. It is a basic diagram which shows the mode of. FIG. 4 is a cross-sectional view for explaining a growth method different from the growth method of the nitride-based III-V compound semiconductor layer shown in FIGS. FIG. 4 is a cross-sectional view for explaining a growth method different from the growth method of the nitride-based III-V compound semiconductor layer shown in FIGS. FIG. 4 is a cross-sectional view for explaining a growth method different from the growth method of the nitride-based III-V compound semiconductor layer shown in FIGS. The behavior of dislocations obtained by TEM observation of the nitride III-V compound semiconductor layer grown on the substrate in the method of growing a nitride III-V compound semiconductor layer shown in FIGS. 17 and 18 will be described. FIG. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 5th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 6th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 7th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 7th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 8th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 8th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 9th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 9th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 10th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 10th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 11th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 11th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 11th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 12th Embodiment of this invention. It is a perspective view for demonstrating the manufacturing method of the light emitting diode backlight by 13th Embodiment of this invention. It is a perspective view for demonstrating the manufacturing method of the light emitting diode backlight by 13th Embodiment of this invention. It is a perspective view for demonstrating the manufacturing method of the light emitting diode backlight by 14th Embodiment of this invention. It is the top view which shows the light source cell unit by 15th Embodiment of this invention, and the enlarged view of the cell of this light source cell unit. It is a top view which shows one specific example of the light source cell unit by 15th Embodiment of this invention. It is a top view which shows the other specific example of the light source cell unit by 15th Embodiment of this invention. It is a top view which shows the other structural example of the cell of the light source cell unit by 15th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 16th Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Board | substrate, 12 ... Convex part, 13 ... Recessed part, 14 ... Micro nucleus, 15 ... Nitride type III-V group compound semiconductor layer, 16 ... N-type nitride type III-V group compound semiconductor layer, 17 ... Active layer 18 ... p-type nitride III-V compound semiconductor layer, 19 ... threading dislocation, 20 ... p-side electrode, 21 ... n-side electrode, 24 ... groove, 25 ... reaction layer, 26 ... laser light, 27 ... cavity 28 ... Insulator, 29 ... Light absorbing material, 32, 33 ... Contact hole, 35 ... Wiring substrate, 51 ... Surface texture, 63-65 ... Light emitting diode chip, 68-71 ... Transparent resin, 75 ... Cell, 76 ... Printed circuit board, 91a, 91b, 91c ... conductive substrate

Claims (3)

A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as the base Growing a first nitride-based III-V compound semiconductor layer via
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
By applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion, the substrate is made to be the first nitride-based III-V compound semiconductor layer and the second nitride-based III. -V compound semiconductor layer, that having a the step of peeling from the third nitride III-V compound semiconductor layer, the active layer and the fourth nitride III-V compound semiconductor layer emitting Photodiode manufacturing method. A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as the base Growing the first layer via
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer on the second layer;
Peeling the substrate from the first layer, the second layer, and the third layer by applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion. A method for manufacturing a functional element. A substrate having a plurality of convex portions on one main surface, wherein the convex portions are made of a magnetostrictive material or an electrostrictive material, and a fourth layer is grown on the substrate without forming a void in the concave portion of the substrate. A process of
And a step of peeling the substrate from the fourth layer by applying a magnetic field or an electric field to the convex portion to generate magnetostriction or electrostriction in the convex portion.

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