CN116154069A - Epitaxial wafer for Micro-LED, preparation method of epitaxial wafer and Micro-LED - Google Patents
Epitaxial wafer for Micro-LED, preparation method of epitaxial wafer and Micro-LED Download PDFInfo
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Abstract
The invention discloses an epitaxial wafer for a Micro-LED, a preparation method thereof and the Micro-LED, and relates to the field of semiconductor photoelectric devices. The epitaxial wafer for the Micro-LED comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-GaN layer, a V-shaped pit opening layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially arranged on the substrate; the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-shaped pit opening extension layers; siO (SiO) 2 The island layer comprises multiple SiO arrays distributed on the N-GaN layer 2 An island; siO (SiO) 2 The island filling layer comprises an AlN layer; the V-shaped pit opening extension layer is a periodic structure formed by alternately growing an InGaN layer and a first AlGaN layer. By implementing the invention, the luminous efficiency of the light-emitting diode can be improved, the antistatic capability is improved, and the luminous wavelength and the luminous brightness are both improvedUniformity.
Description
Technical Field
The invention relates to the field of semiconductor photoelectric devices, in particular to an epitaxial wafer for a Micro-LED, a preparation method of the epitaxial wafer and the Micro-LED.
Background
Currently, gaN-based light emitting diodes have been widely used in the field of solid state lighting as well as in the field of display, attracting more and more attention. Micro-LEDs are expected to promote the development of display screens to be light and thin, miniaturized, low in power consumption and high in brightness, and are known as the technology of the next-generation Micro-displays. Under the condition of the same epitaxial structure and the same chip structure, the Micro-LED can bring the reduction of antistatic capability and single-core brightness due to the reduction of the size and the surface area, and therefore, the requirements on the luminous efficiency are higher. In addition, micro-LEDs cannot use conventional LED chip pick and sort techniques, and thus, micro-LED epitaxial wafers require higher wavelength uniformity and brightness uniformity.
The current stage adopts V-shaped pit technology to improve the luminous efficiency of epitaxial wafer, and the existing V-shaped pit layer is a superlattice structure of repeated lamination of InGaN/GaN grown at low temperature, and the side wall of the V-shaped pit is in V-shaped and penetrates through the whole active region, so that holes are easily injected into deeper luminous quantum wells through the V-shaped side wall due to the special geometric structure, the working voltage can be reduced, the uneven distribution of electrons and holes in space can be improved, and the luminous efficiency can be increased. However, the V-shaped pit layer has the following problems: the V-shaped pit is generated along the linear dislocation of the bottom layer, is a natural leakage channel and can influence the antistatic capability of the light-emitting diode; in the growth process of the V-shaped pit, a plurality of defects are easy to introduce, and the V-shaped pit becomes a non-radiative recombination center to capture carriers, so that the internal quantum efficiency is influenced, and the luminous efficiency is reduced; the V-shaped pit grows too fast, the opening size is inconsistent, the distribution is uneven, and the light-emitting wavelength and the light-emitting brightness are unevenly distributed. Especially for Micro-LEDs of smaller size, wavelength uniformity and brightness uniformity need to be further improved.
Disclosure of Invention
The invention aims to solve the technical problem of providing an epitaxial wafer for Micro-LEDs and a preparation method thereof, which can improve the luminous efficiency of the LEDs, the antistatic capability and the luminous wavelength and the luminous brightness uniformity.
The invention also solves the technical problem of providing the Micro-LED which has high luminous efficiency, good luminous brightness uniformity and strong antistatic capability.
In order to solve the problems, the invention discloses an epitaxial wafer for a Micro-LED, which comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-GaN layer, a V-shaped pit opening layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially arranged on the substrate; the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-shaped pit opening extension layers;
the SiO is 2 The island layer comprises a plurality of SiO arrays distributed on the N-GaN layer 2 An island;
the SiO is 2 The island filling layer comprises an AlN layer;
the V-shaped pit opening extension layer is a periodic structure formed by alternately growing an InGaN layer and a first AlGaN layer.
As an improvement of the technical proposal, the SiO 2 The island layer is SiO 2 The film layer is obtained by ICP etching, wherein the SiO is prepared by etching 2 The thickness of the thin film layer is 10nm-100nm.
As an improvement of the technical proposal, the SiO 2 The island has a diameter of 100nm-500nm and a distribution density of 1×10 6 Individual/cm 2 -1×10 8 Individual/cm 2 。
As an improvement of the technical proposal, the SiO 2 The island fill-in layer has a thickness of 20nm to 130nm so that the SiO is 2 The islands are filled and submerged, and the Al component in the AlN layer has a ratio of 0.4-0.6.
As an improvement of the technical scheme, the period number of the V-shaped pit opening extension layer is 3-10, wherein the proportion of an In component In the InGaN layer is 0.05-0.3, the thickness of a single InGaN layer is 1nm-3nm, the proportion of an Al component In the first AlGaN layer is 0.1-0.4, and the thickness of a single first AlGaN layer is 5nm-10nm.
As an improvement of the technical proposal, the SiO 2 The island filling layer is a periodic structure formed by alternately growing an AlN layer and a second AlGaN layer, the period number is 3-10, and the thickness of a single AlN layer is 5-10 nm; the ratio of Al components in the second AlGaN layer is 0.1-0.3, and the thickness of each second AlGaN layer is 2-3 nm.
Correspondingly, the invention also discloses a preparation method of the epitaxial wafer for the Micro-LED, which is used for preparing the epitaxial wafer for the Micro-LED and comprises the following steps:
providing a substrate, and sequentially growing a nucleation layer, an intrinsic GaN layer, an N-GaN layer, a V-shaped pit opening layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer on the substrate; the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-shaped pit opening extension layers;
the SiO is 2 The island layer comprises a plurality of SiO arrays distributed on the N-GaN layer 2 An island;
the SiO is 2 The island filling layer comprises an AlN layer;
the V-shaped pit opening extension layer is a periodic structure formed by alternately growing an InGaN layer and a first AlGaN layer.
As an improvement of the technical proposal, siO is deposited in the PECVD reaction chamber 2 A thin film layer, wherein the SiO 2 The deposition temperature of the film is 250-300 ℃;
by then passing through the SiO 2 The SiO is obtained by etching a film layer through ICP 2 The island layer is etched for 10min-20min, and the gas used in etching is Cl 2 And BCl 3 Wherein, cl 2 And BCl 3 The volume ratio of (2) is 10: (1-2);
the SiO is 2 The growth temperature of the island filling layer is 1000-1100 ℃, and the growth pressure is 100-500 torr;
the growth temperature of the V-shaped pit opening extension layer is 850-950 ℃ and the growth pressure is 100-500 torr.
As an improvement of the technical proposal, the SiO 2 The island filling layer is a periodic structure formed by alternately growing an AlN layer and a second AlGaN layer,the SiO is 2 The growth temperature of the island filling layer is 1000-1100 ℃, and the growth pressure is 100-500 torr.
Correspondingly, the invention also discloses a Micro-LED, which comprises the epitaxial wafer for the Micro-LED.
The implementation of the invention has the following beneficial effects:
1. in the epitaxial wafer for Micro-LEDs of the invention, the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-pit opening extension layers.
First, siO of the present invention 2 The island can reduce total internal reflection of light emitted by the multi-quantum well active region, is arranged at the position closest to the active region, can increase diffuse reflection, improves light-emitting brightness, and meets the requirement of Micro-LEDs on high light-emitting intensity of the light-emitting diodes; and SiO is adopted 2 The island is used as a guiding V-shaped pit, the uniformly distributed V-shaped pit plays a role in guiding the carrier to expand uniformly, and the antistatic capability of the light-emitting diode is improved.
Next, the present invention uses AlN layer as SiO 2 Island filling layer, because Al atoms are very small, can form a compact structure, so that SiO 2 The island has high flatness, good lattice quality and high AlN material energy level during filling, has the function of electron blocking, can prevent electrons from overflowing, improves the recombination of electron hole pairs and improves the luminous efficiency; in SiO 2 After the island filling layer is grown, each SiO 2 Edge dislocation defects generated during filling are formed at the island tips and extend vertically upward due to SiO 2 The islands are uniformly distributed, so that the edge dislocation defects are also uniformly distributed, which is beneficial to forming V-shaped pits with uniform size and uniform distribution, improves the uniformity of the luminous brightness of a luminous area, improves the wavelength uniformity and meets the requirements of Micro-LEDs on the light emitting diodes.
And the periodic structure formed by repeatedly stacking and growing the InGaN layer and the first AlGaN layer is used as the V-shaped pit opening extension layer, so that the V-shaped pit opening can be enlarged, the lattice matching of the V-shaped pit opening layer and the multiple quantum well layer is increased, the polarization effect of the multiple quantum well layer is reduced, and the luminous efficiency is improved; and, compared with the conventional periodic structure of InGaN/GaN repeated lamination, the first AlGaN layer has higher lattice quality and fewer defects are generated in the V-shaped pit extending process.
2. In the epitaxial wafer for Micro-LED of the invention, siO 2 The island filling layer is a periodic structure formed by alternately growing an AlN layer and a second AlGaN layer, and on one hand, the AlN layer with small Al atoms is utilized to form a compact structure, so that SiO 2 The island has high flatness during filling, and on the other hand, the second AlGaN layer is utilized to avoid cracking of the AlN layer with high Al component.
Drawings
FIG. 1 is a schematic diagram of an epitaxial wafer for Micro-LEDs according to an embodiment of the present invention;
FIG. 2 is a schematic view showing the structure of a V-shaped pit opening layer according to an embodiment of the present invention;
FIG. 3 is a schematic view of a V-shaped pit opening extension layer according to an embodiment of the present invention;
FIG. 4 is a diagram of SiO according to an embodiment of the present invention 2 Schematic structure of island filling layer;
fig. 5 is a flowchart of a method for preparing an epitaxial wafer for Micro-LEDs according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
Referring to fig. 1-3, the invention discloses an epitaxial wafer for Micro-LEDs, comprising a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-GaN layer 4, a V-shaped pit opening layer 5, a multiple quantum well layer 6, an electron blocking layer 7 and a P-GaN layer 8 which are sequentially arranged on the substrate 1; the V-shaped pit opening layer 5 includes sequentially stacked SiO 2 Island layer 51, siO 2 Island fill layer 52 and V-shaped pit opening extension layer 53.
SiO of the present invention 2 The island can reduce total internal reflection of light emitted by the multi-quantum well active region, is arranged at the position closest to the active region, can increase diffuse reflection, improves light-emitting brightness, and meets the requirement of Micro-LEDs on high light-emitting intensity of the light-emitting diodes; and SiO is adopted 2 Island as guiding V-shaped pitThe uniformly distributed V-shaped pits well play a role in guiding the carrier to expand uniformly, and improve the antistatic capability of the light-emitting diode.
Wherein SiO is 2 Island layer 51 is SiO 2 The thin film layer is obtained by ICP etching or RIE etching, preferably ICP etching. SiO (SiO) 2 The thickness of the film layer is 10nm-100nm, and if the thickness is more than 100nm, the difficulty of the etching process is increased; if the thickness is less than 10nm, it is difficult to obtain SiO with good uniformity 2 Islands.
Specifically, a plurality of SiO distributed in an array are formed on the N-GaN layer 4 by etching 2 The island has a rectangular, triangular, circular or semicircular cross section, but is not limited thereto. Preferably, in one embodiment of the invention, siO 2 The island has a semicircular cross section, a diameter of 90nm-550nm, and SiO 2 The island diameter is in this range, can be used well as a pilot V-pit, and effectively increases diffuse reflection. Preferably, siO 2 The islands have a diameter of 100nm to 500nm, and are exemplified by 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm, or 500nm, but are not limited thereto.
Specifically, siO 2 The island distribution density was 5×10 5 Individual/cm 2 -5×10 8 Individual/cm 2 ，SiO 2 The island distribution density is in this range, can be used well as a pilot V-pit, and effectively increases diffuse reflection. Preferably, siO 2 The island distribution density was 1×10 6 Individual/cm 2 -1×10 8 Individual/cm 2 Exemplary is 2X 10 6 Individual/cm 2 、4×10 6 Individual/cm 2 、6×10 6 Individual/cm 2 、8×10 6 Individual/cm 2 、1×10 7 Individual/cm 2 、2×10 7 Individual/cm 2 、4×10 7 Individual/cm 2 、6×10 7 Individual/cm 2 Or 8X 10 7 Individual/cm 2 But is not limited thereto.
Wherein SiO is 2 The island fill-up layer 52 includes an AlN layer, which is used as SiO 2 Island fill-up layer 52, since Al atoms are small, can form a dense structure such that SiO 2 Island at fillingThe flatness is high, the lattice quality is good, the AlN material energy level is high, the electron blocking effect is achieved, the electron overflow can be prevented, the recombination of electron hole pairs is improved, and the luminous efficiency is improved; in SiO 2 After the island fill-up layer 52 is grown, each SiO 2 Edge dislocation defects generated during filling are formed at the island tips and extend vertically upward due to SiO 2 The islands are uniformly distributed, so that the edge dislocation defects are also uniformly distributed, which is beneficial to forming V-shaped pits with uniform size and uniform distribution, improves the uniformity of the luminous brightness of a luminous area, improves the wavelength uniformity and meets the requirements of Micro-LEDs on the light emitting diodes.
Specifically, siO 2 The island fill layer 52 has a thickness of 20nm to 150nm such that SiO 2 The island is filled and submerged. Preferably, siO 2 The island fill layer 52 has a thickness of 20nm to 130nm, and is exemplified by 40nm, 60nm, 80nm, 100nm, or 120nm, but is not limited thereto.
Specifically, the Al component in the AlN layer has a ratio of 0.3 to 0.7. If the proportion of the Al component is less than 0.3, the density of the AlN layer is insufficient; if the Al component is more than 0.7, cracks are likely to occur. Preferably, the Al component of the AlN layer has a ratio of 0.4 to 0.6, and exemplary ones are 0.42, 0.44, 0.46, 0.48, 0.5, 0.52, 0.54, 0.56 or 0.58, but not limited thereto.
Preferably, in one embodiment of the present invention, referring to FIG. 4, siO 2 The island filling layer 52 is a periodic structure formed by alternately growing an AlN layer 521 and a second AlGaN layer 522, and on the one hand, a dense structure is formed by using the AlN layer 521 with small Al atoms, so that SiO 2 The island has high flatness at the time of filling up, and on the other hand, cracking of the AlN layer 521 of high Al composition is avoided by the second AlGaN layer 522.
Specifically, siO 2 The number of cycles of island fill level 52 is 3-10.
Specifically, the thickness of the single AlN layer 521 is 5nm to 10nm. If the thickness is more than 10nm, cracks are easy to generate; if the thickness is less than 5nm, it is difficult to achieve good flatness. The thickness of the single AlN layer 521 is, but not limited to, 6nm, 7nm, 8nm, or 9nm, for example.
Specifically, the second AlGaN layer 522 has an Al composition of 0.1 to 0.3. If the ratio of the Al component is more than 0.3, the mobility of carriers is affected; if the Al component is less than 0.1, it is difficult to perform an effective buffering function. Illustratively, the Al component has a duty cycle of 0.12, 0.14, 0.16, 0.18, 0.2, 0.22, 0.24, 0.26, or 0.28, but is not limited thereto.
The thickness of the single second AlGaN layer 522 is 2nm to 3nm. If the thickness is more than 3nm, the mobility of carriers is affected, and the luminous efficiency is reduced; if the thickness is less than 2nm, an effective buffer effect is difficult to achieve. Illustratively, the thickness of the single second AlGaN layer 522 is 2.2nm, 2.4nm, 2.6nm, or 2.8nm, but is not limited thereto.
The V-shaped pit opening extension layer 53 is a periodic structure formed by alternately growing the InGaN layer 531 and the first AlGaN layer 532. The structure not only can enlarge the V-shaped pit opening, but also increases the lattice matching of the V-shaped pit opening layer 5 and the multiple quantum well layer 6, reduces the polarization effect of the multiple quantum well layer 6 and improves the luminous efficiency; and, the first AlGaN layer 532 has a higher lattice quality than the conventional periodic structure in which InGaN/GaN is repeatedly stacked, and few defects are generated during V-pit extension.
Specifically, the number of cycles of the V-shaped pit opening extension layer 53 is 3 to 12, preferably 3 to 10.
Specifically, the In component of the InGaN layer 531 has a ratio of 0.05 to 0.35. If the In component is more than 0.35, the lattice quality is drastically reduced; if the In component is less than 0.05, the V-shaped pit opening is not enlarged. Preferably, the In composition of the InGaN layer 531 has a ratio of 0.05 to 0.3, and exemplary is 0.1, 0.15, 0.18, 0.2, 0.22, 0.24, 0.26 or 0.28, but is not limited thereto.
The thickness of the single InGaN layer 531 is 0.8nm-3.5nm. If the thickness is more than 3.5nm, excessive defects can be caused; if the thickness is less than 0.8nm, the V-shaped pit opening function is not realized. Preferably, the thickness of the single InGaN layer 531 is 1nm to 3nm, and exemplary is 1.2nm, 1.4nm, 1.6nm, 1.8nm, 2nm, 2.2nm, 2.4nm, 2.6nm, or 2.8nm, but is not limited thereto.
The Al composition of the first AlGaN layer 532 has a ratio of 0.08 to 0.45. If the ratio of the Al component is more than 0.45, uneven distribution of Al atoms can be caused to influence the consistency of the size of the V-shaped pits; if the Al component has a ratio of less than 0.08, the defect of the InGaN layer 531 is not repaired. Preferably, the first AlGaN layer 532 has an Al composition of 0.1 to 0.4, and exemplary is 0.13, 0.16, 0.19, 0.22, 0.25, 0.28, 0.31, 0.34, or 0.37, but is not limited thereto.
The thickness of the single first AlGaN layer 532 is 4nm to 12nm. If the thickness is more than 12nm, the mobility of carriers is affected; if the thickness is less than 4nm, the defect of the InGaN layer 531 cannot be repaired. Preferably, the thickness of the single first AlGaN layer 532 is 5nm to 10nm, and exemplary is 6nm, 7nm, 8nm or 9nm, but is not limited thereto.
Among them, the substrate 1 may be a sapphire substrate, a silicon carbide substrate, but is not limited thereto.
The nucleation layer 2 may be an AlN layer and/or an AlGaN layer, but is not limited thereto. The thickness of the nucleation layer 2 is 20nm to 100nm, and is exemplified by 30nm, 40nm, 50nm, 60nm, 70nm, 80nm or 90nm, but not limited thereto.
Among them, the intrinsic GaN layer 3 has a thickness of 300nm to 800nm, and exemplary are 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, or 750nm, but not limited thereto.
Wherein the doping element of the N-GaN layer 4 is Si, but is not limited thereto. The doping concentration of the N-GaN layer 4 was 5×10 18 cm -3 -1×10 19 cm -3 The thickness is 1 μm-3 μm.
The multiple quantum well layer 6 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, and the stacking period number is 3-15. The thickness of the single InGaN quantum well layer is 3nm-7nm, and the thickness of the single GaN quantum barrier layer is 6nm-15nm.
Wherein the electron blocking layer 7 is Al a Ga 1-a N layer and In b Ga 1-b The periodic structure of the N layers alternately grows, and the period number is 3-15; wherein a is 0.05-0.2, and b is 0.1-0.5. The thickness of the electron blocking layer 7 is 20nm to 100nm.
Wherein the doping element in the P-GaN layer 8 is Mg, but is not limited thereto. The doping concentration of Mg in the P-GaN layer 8 was 5×10 17 cm -3 -1×10 20 cm -3 . The thickness of the P-GaN layer 8 is 200nm to 300nm.
Correspondingly, referring to fig. 5, the invention also discloses a preparation method of the epitaxial wafer for the Micro-LED, which is used for preparing the epitaxial wafer for the Micro-LED, and comprises the following steps:
s100: providing a substrate;
specifically, the substrate is a sapphire substrate, a silicon carbide substrate, but is not limited thereto. A sapphire substrate is preferred.
Preferably, in one embodiment of the present invention, the substrate is loaded into MOCVD and annealed at 1000-1200 deg.C, 200-600 torr, hydrogen atmosphere for 5-8 min to remove impurities such as particles, oxides, etc. on the substrate surface.
S200: growing a nucleation layer on the substrate;
specifically, the MOCVD grown AlGaN layer may be used as the nucleation layer, or the PVD grown AlN layer may be used as the nucleation layer, but is not limited thereto. Preferably, the AlGaN layer is grown by MOCVD, the growth temperature is 500-700 ℃, and the growth pressure is 200-400 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As an N source; by H 2 And N 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas.
S300: growing an intrinsic GaN layer on the nucleation layer;
specifically, the intrinsic GaN layer is grown in MOCVD at 1100-1150 deg.c and 100-500 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As an N source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
S400: growing an N-GaN layer on the intrinsic GaN layer;
specifically, an N-GaN layer is grown in MOCVD at 1100-1150 deg.C under 100-500 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, siH is introduced 4 As an N-type doping source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
S500: growing a V-shaped pit opening layer on the N-GaN layer;
specifically, in one embodiment of the present invention, S500 includes:
s510: growth of SiO on N-GaN layer 2 An island layer;
specifically, siO is deposited in the PECVD reaction chamber 2 A thin film layer, but is not limited thereto. Specifically, siO 2 The growth temperature of the film is 250-300 ℃, and SiH is used during growth 4 As Si source, with N 2 O is O source, N 2 Is a carrier gas.
For SiO 2 Etching the film layer to obtain SiO 2 Island layers. Specifically, but not limited to, ICP or RIE is used for etching, preferably, ICP is used for etching for 10min-20min, and the gas used for etching is Cl 2 And BCl 3 Wherein, cl 2 And BCl 3 The volume ratio of (2) is 10: (1-2).
S520: in SiO 2 Growth of SiO on island layer 2 Island filling layer;
specifically, in one embodiment of the present invention, the AlN layer and the second AlGaN layer are grown periodically in MOCVD to form SiO 2 Island fill-in layers. SiO (SiO) 2 The growth temperature of the island filling layer is 1000-1100 ℃, and the growth pressure is 100-500 torr. Wherein, when growing AlN layer, NH is introduced into MOCVD reaction chamber 3 As N source, TMAL is introduced as Al source, H is used 2 And N 2 As a carrier gas. Wherein, when the second AlGaN layer is grown, NH is introduced into the MOCVD reaction chamber 3 Introducing TMAL as Al source, introducing TEGa as Ga source, and taking H as N source 2 And N 2 As a carrier gas. The layer uses higher growth temperature, is favorable for improving the density and reducing the defects.
S530: in SiO 2 Growing a V-shaped pit opening extension layer on the island filling layer;
specifically, an InGaN layer and a first AlGaN layer are periodically grown in MOCVD to form a V-shaped pit opening extension layer. The growth temperature of the V-shaped pit opening extension layer is 850-950 ℃ and the growth pressure is 100-500 torr. Wherein, when InGaN layer is grown, NH is introduced into MOCVD reaction chamber 3 As N source, take NH 3 And N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein, when the first AlGaN layer is grown, the MOCVD is reversedNH is introduced into the reaction chamber 3 Introducing TMAL as Al source, introducing TEGa as Ga source, and NH 3 And N 2 As a carrier gas. The layer uses lower growth temperature, which is beneficial to enlarging the V-shaped pit opening.
S600: growing a multi-quantum well layer on the V-shaped pit opening layer;
specifically, an InGaN quantum well layer and a GaN quantum barrier layer are periodically grown in MOCVD to form a multi-quantum well layer. Wherein the growth temperature of the InGaN quantum well layer is 700-800 ℃, the growth pressure is 100-500 torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein the growth temperature of the GaN quantum barrier layer is 800-900 ℃, the growth pressure is 100-500 torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with H 2 And N 2 As carrier gas, TEGa was introduced as a Ga source.
S700: growing an electron blocking layer on the multiple quantum well layer;
specifically, periodically growing Al in MOCVD a Ga 1-a N layer and In b Ga 1-b And an N layer serving as an electron blocking layer. Wherein Al is a Ga 1-a The growth temperature of the N layer is 900-1000 ℃, and the growth pressure is 100-500 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas. In (In) b Ga 1-b The growth temperature of the N layer is 900-1000 ℃, and the growth pressure is 100-500 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 As a carrier gas, TMIn was introduced as an In source, and TMGa was introduced as a Ga source.
S800: growing a P-GaN layer on the electron blocking layer;
specifically, the P-GaN layer is grown in MOCVD at 800-1000 deg.C and 100-300 torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, cp is introduced 2 Mg is used as a P-type doping source; by H 2 And N 2 As a carrier gas, a gas such as hydrogen,TMGa is introduced as Ga source.
The invention is further illustrated by the following examples:
example 1
The present embodiment provides an epitaxial wafer for Micro-LEDs, referring to fig. 1 to 3, which includes a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-GaN layer 4, a V-shaped pit opening layer 5, a multiple quantum well layer 6, an electron blocking layer 7, and a P-GaN layer 8 sequentially provided on the substrate 1.
Wherein the substrate 1 is a sapphire substrate; the nucleation layer 2 is an AlGaN layer, and the thickness of the AlGaN layer is 30nm; the thickness of the intrinsic GaN layer 3 is 400nm; the doping concentration of Si in the N-GaN layer 4 was 7×10 18 cm -3 The thickness thereof was 2. Mu.m.
Wherein the V-shaped pit opening layer 5 comprises sequentially laminated SiO 2 Island layer 51, siO 2 Island fill layer 52 and V-shaped pit opening extension layer 53. Wherein SiO is 2 Island layer 51 is SiO 2 The film layer is obtained by ICP etching, siO 2 The thickness of the film layer is 50nm, and SiO obtained by etching 2 Island diameter 300nm, siO 2 The island distribution density was 1×10 7 Individual/cm 2 . Wherein SiO is 2 Island fill-up layer 52 is an AlN layer, siO 2 The island-filling layer 52 had a thickness of 60nm and the Al component in the AlN layer had a ratio of 0.5. The V-shaped pit opening extension layer 53 is a periodic structure formed by alternately growing the InGaN layer 531 and the first AlGaN layer 532, the period number is 6, the ratio of the In component In the InGaN layer 531 is 0.2, the thickness of the single InGaN layer 531 is 2nm, the ratio of the Al component In the first AlGaN layer 532 is 0.3, and the thickness of the single first AlGaN layer 532 is 7nm.
The multiple quantum well layer 6 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm. Wherein the electron blocking layer 7 is Al a Ga 1-a N layers (a=0.12) and In b Ga 1-b Periodic structure with N layers (b=0.3) alternately grown, with a period of 8, single Al a Ga 1-a The thickness of the N layer is 6nm, single In b Ga 1-b The thickness of the N layer was 6nm. The doping element of the P-GaN layer 8 is Mg, and the doping concentration is 3.5×10 19 cm -3 The thickness was 250nm.
The preparation method of the epitaxial wafer for the Micro-LED in the embodiment comprises the following steps:
(1) Providing a substrate; the substrate was loaded into MOCVD and annealed at 1120℃under a 400torr atmosphere of hydrogen for 6min.
(2) Growing a nucleation layer on the substrate;
specifically, MOCVD is adopted to grow the AlGaN layer, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As an N source; by H 2 And N 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas.
(3) Growing an intrinsic GaN layer on the nucleation layer;
specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, and NH is introduced into an MOCVD reaction chamber during growth 3 As an N source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
(4) Growing an N-GaN layer on the intrinsic GaN layer;
specifically, MOCVD is adopted to grow an N-GaN layer, the growth temperature is 1120 ℃, and the growth pressure is 150torr; during growth, NH is introduced into the MOCVD reaction chamber 3 As N source, siH is introduced 4 As an N-type doping source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
(5) Growing a V-shaped pit opening layer on the N-GaN layer;
specifically, the preparation method of the V-shaped pit opening layer comprises the following steps:
growth of SiO on N-GaN layer 2 An island layer;
specifically, siO is deposited in the PECVD reaction chamber 2 Thin film layer, siO 2 The growth temperature of the film is 280 ℃, and SiH is used during growth 4 As Si source, with N 2 O is O source, N 2 Is a carrier gas.
For SiO 2 Performing ICP etching on the film layer to obtain SiO 2 Island layers. Etching time is 15min, and gas used in etching is Cl 2 And BCl 3 Wherein, cl 2 And BCl 3 The volume ratio of (2) is 10:1.
(II) at SiO 2 Growth of SiO on island layer 2 Island filling layer;
specifically, an AlN layer is grown as SiO in MOCVD 2 Island fill-in layers. SiO (SiO) 2 The island fill level layer was grown at 1050 c and at a pressure of 300torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, TMAL is introduced as Al source, H is used 2 And N 2 As a carrier gas.
(III) at SiO 2 Growing a V-shaped pit opening extension layer on the island filling layer;
specifically, an InGaN layer and a first AlGaN layer are periodically grown in MOCVD to form a V-shaped pit opening extension layer. The growth temperature of the V-shaped pit opening extension layer is 900 ℃ and the growth pressure is 300torr. Wherein, when InGaN layer is grown, NH is introduced into MOCVD reaction chamber 3 As N source, take NH 3 And N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein, when the first AlGaN layer is grown, NH is introduced into the MOCVD reaction chamber 3 Introducing TMAL as Al source, introducing TEGa as Ga source, and NH 3 And N 2 As a carrier gas.
(6) Growing a multi-quantum well layer on the V-shaped pit opening layer;
specifically, an InGaN quantum well layer and a GaN quantum barrier layer are periodically grown in MOCVD to form a multi-quantum well layer. Wherein the growth temperature of the InGaN quantum well layer is 750 ℃, the growth pressure is 300torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein, the growth temperature of the GaN quantum barrier layer is 850 ℃, the growth pressure is 300torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with H 2 And N 2 As carrier gas, TEGa was introduced as a Ga source.
(7) Growing an electron blocking layer on the multiple quantum well layer;
specifically, periodically growing Al in MOCVD a Ga 1-a N layer and In b Ga 1-b And an N layer serving as an electron blocking layer. Wherein Al is a Ga 1-a The growth temperature of the N layer is 950 ℃ and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas. In (In) b Ga 1-b The growth temperature of the N layer is 950 ℃ and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 As a carrier gas, TMIn was introduced as an In source, and TMGa was introduced as a Ga source.
(8) Growing a P-GaN layer on the electron blocking layer;
specifically, the P-GaN layer is grown in MOCVD at 900 ℃ under a growth pressure of 200torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, cp is introduced 2 Mg is used as a P-type doping source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
Example 2
The present embodiment provides an epitaxial wafer for Micro-LEDs, referring to fig. 1 to 4, which includes a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-GaN layer 4, a V-shaped pit opening layer 5, a multiple quantum well layer 6, an electron blocking layer 7, and a P-GaN layer 8 sequentially provided on the substrate 1.
Wherein the substrate 1 is a sapphire substrate; the nucleation layer 2 is an AlGaN layer, and the thickness of the AlGaN layer is 30nm; the thickness of the intrinsic GaN layer 3 is 400nm; the doping concentration of Si in the N-GaN layer 4 was 7×10 18 cm -3 The thickness thereof was 2. Mu.m.
Wherein the V-shaped pit opening layer 5 comprises sequentially laminated SiO 2 Island layer 51, siO 2 Island fill layer 52 and V-shaped pit opening extension layer 53. Wherein SiO is 2 Island layer 51 is SiO 2 The film layer is obtained by ICP etching, siO 2 The thickness of the film layer is 50nm, and SiO obtained by etching 2 Island diameter 300nm, siO 2 The island distribution density was 1×10 7 Individual/cm 2 . Wherein SiO is 2 The island fill-up layer 52 is a periodic structure formed by alternately growing an AlN layer 521 and a second AlGaN layer 522, the period number is 6, and the Al component in the AlN layerThe ratio of the Al composition in the second AlGaN layer 522 is 0.2, and the thickness of the single second AlGaN layer 522 is 3nm. The V-shaped pit opening extension layer 53 is a periodic structure formed by alternately growing the InGaN layer 531 and the first AlGaN layer 532, the period number is 6, the ratio of the In component In the InGaN layer 531 is 0.2, the thickness of the single InGaN layer 531 is 2nm, the ratio of the Al component In the first AlGaN layer 532 is 0.3, and the thickness of the single first AlGaN layer 532 is 7nm.
The multiple quantum well layer 6 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm. Wherein the electron blocking layer 7 is Al a Ga 1-a N layers (a=0.12) and In b Ga 1-b Periodic structure with N layers (b=0.3) alternately grown, with a period of 8, single Al a Ga 1-a The thickness of the N layer is 6nm, single In b Ga 1-b The thickness of the N layer was 6nm. The doping element of the P-GaN layer 8 is Mg, and the doping concentration is 3.5X10 19 cm -3 The thickness was 250nm.
The preparation method of the epitaxial wafer for the Micro-LED in the embodiment comprises the following steps:
(1) Providing a substrate; the substrate was loaded into MOCVD and annealed at 1120℃under a 400torr atmosphere of hydrogen for 6min.
(2) Growing a nucleation layer on the substrate;
specifically, MOCVD is adopted to grow the AlGaN layer, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As an N source; by H 2 And N 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas.
(3) Growing an intrinsic GaN layer on the nucleation layer;
specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, and NH is introduced into an MOCVD reaction chamber during growth 3 As an N source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
(4) Growing an N-GaN layer on the intrinsic GaN layer;
specifically, MOCVD is adopted to grow an N-GaN layer, the growth temperature is 1120 ℃, and the growth pressure is 150torr; during growth, NH is introduced into the MOCVD reaction chamber 3 As N source, siH is introduced 4 As an N-type doping source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
(5) Growing a V-shaped pit opening layer on the N-GaN layer;
specifically, the preparation method of the V-shaped pit opening layer comprises the following steps:
growth of SiO on N-GaN layer 2 An island layer;
specifically, siO is deposited in the PECVD reaction chamber 2 Thin film layer, siO 2 The growth temperature of the film is 280 ℃, and SiH is used during growth 4 As Si source, with N 2 O is O source, N 2 Is a carrier gas.
For SiO 2 Performing ICP etching on the film layer to obtain SiO 2 Island layers. Etching time is 15min, and gas used in etching is Cl 2 And BCl 3 Wherein, cl 2 And BCl 3 The volume ratio of (2) is 10:1.
(II) at SiO 2 Growth of SiO on island layer 2 Island filling layer;
specifically, the AlN layer and the second AlGaN layer are periodically grown in MOCVD to form SiO 2 Island fill-in layers. SiO (SiO) 2 The island fill level layer was grown at 1050 c and at a pressure of 300torr. When growing the AlN layer, introducing NH into the MOCVD reaction chamber 3 As N source, TMAL is introduced as Al source, H is used 2 And N 2 As a carrier gas. NH is introduced into the MOCVD reaction chamber when the second AlGaN layer is grown 3 Introducing TMAL as Al source, introducing TEGa as Ga source, and taking H as N source 2 And N 2 As a carrier gas.
(III) at SiO 2 Growing a V-shaped pit opening extension layer on the island filling layer;
specifically, an InGaN layer and a first AlGaN layer are periodically grown in MOCVD to form a V-shaped pit opening extension layer. The growth temperature of the V-shaped pit opening extension layer is 900 ℃ and the growth pressure is 300torr. Wherein, growNH is introduced into the MOCVD reaction chamber during InGaN layer 3 As N source, take NH 3 And N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein, when the first AlGaN layer is grown, NH is introduced into the MOCVD reaction chamber 3 Introducing TMAL as Al source, introducing TEGa as Ga source, and NH 3 And N 2 As a carrier gas.
(6) Growing a multi-quantum well layer on the V-shaped pit opening layer;
specifically, an InGaN quantum well layer and a GaN quantum barrier layer are periodically grown in MOCVD to form a multi-quantum well layer. Wherein the growth temperature of the InGaN quantum well layer is 750 ℃, the growth pressure is 300torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with N 2 As a carrier gas, TEGa was introduced as a Ga source, and TMIn was introduced as an In source. Wherein, the growth temperature of the GaN quantum barrier layer is 850 ℃, the growth pressure is 300torr, and NH is introduced into the MOCVD reaction chamber during growth 3 As N source, with H 2 And N 2 As carrier gas, TEGa was introduced as a Ga source.
(7) Growing an electron blocking layer on the multiple quantum well layer;
specifically, periodically growing Al in MOCVD a Ga 1-a N layer and In b Ga 1-b And an N layer serving as an electron blocking layer. Wherein Al is a Ga 1-a The growth temperature of the N layer is 950 ℃ and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 TMAl was introduced as an Al source and TMGa was introduced as a Ga source as a carrier gas. In (In) b Ga 1-b The growth temperature of the N layer is 950 ℃ and the growth pressure is 300torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, with N 2 And H 2 As a carrier gas, TMIn was introduced as an In source, and TMGa was introduced as a Ga source.
(8) Growing a P-GaN layer on the electron blocking layer;
specifically, the P-GaN layer is grown in MOCVD at 900 ℃ under a growth pressure of 200torr. During growth, NH is introduced into the MOCVD reaction chamber 3 As N source, cp is introduced 2 Mg asIs a P-type doping source; by H 2 And N 2 As a carrier gas, TMGa was introduced as a Ga source.
Comparative example 1
This comparative example provides an epitaxial wafer for Micro-LEDs, which is different from example 1 in that the V-shaped pit opening layer 5 is a periodically laminated structure of an InGaN layer and a GaN layer. Correspondingly, in the preparation method, the growth temperature of the InGaN layer is 750 ℃, the growth pressure is 300torr, the growth temperature of the GaN layer is 850 ℃, and the growth pressure is 300torr, and the rest is the same as that of the example 1.
Comparative example 2
This comparative example provides an epitaxial wafer for Micro-LED, which is different from example 1 in that no SiO is provided in the V-shaped pit opening layer 5 2 Island layer 51, accordingly, was prepared without providing the step of preparing the layer in the preparation method, and the remainder was the same as in example 1.
Comparative example 3
This comparative example provides an epitaxial wafer for Micro-LED, which is different from example 1 in that no SiO is provided in the V-shaped pit opening layer 5 2 Island-filling layer 52, accordingly, was prepared without providing the step of preparing the layer in the preparation method, and the rest was the same as in example 1.
Comparative example 4
This comparative example provides an epitaxial wafer for Micro-LEDs, which is different from example 1 in that V-shaped pit opening extension layer 53 is not provided in V-shaped pit opening layer 5, and accordingly, in the manufacturing method, the manufacturing step of this layer is not provided either, and the rest is the same as example 1.
The epitaxial wafers for Micro-LEDs obtained in examples 1-2 and comparative examples 1-4 were subjected to tests for brightness, light emission wavelength and antistatic ability, and the specific test methods were as follows:
(1) Preparing the epitaxial wafer into a chip with a vertical structure of 10mil multiplied by 24mil, and testing the luminous brightness of the chip; 20 samples are tested in each example and comparative example, and the standard deviation of the test value is taken as the brightness distribution uniformity;
(2) Uniformity of emission wavelength: taking 20 epitaxial wafers prepared in each example and comparative example, respectively measuring the luminescence wavelength of the epitaxial wafers, and calculating the relative standard deviation of the epitaxial wafers, namely the luminescence wavelength uniformity;
(3) Antistatic performance test: the antistatic performance of the chip is tested by using an electrostatic instrument under an HBM (human body discharge model) model, and the test chip can bear the passing proportion of the reverse 6000V static electricity.
The specific results are as follows:
as can be seen from the table, after the conventional V-shaped pit layer (comparative example 1) was changed into the V-shaped pit opening layer in the present invention, the brightness was improved from 193.1mW to 195.2mW, the brightness uniformity was improved from 5.32 to 3.97, the emission wavelength uniformity was improved from 1.44 to 1.28, and the antistatic power was improved from 40.6% to 80.2%, indicating that the V-shaped pit opening layer in the present invention can effectively improve the brightness, improve the brightness distribution uniformity, improve the emission wavelength uniformity, and improve the antistatic power. Further, as can be seen from a comparison of example 1 with comparative examples 2 to 4, when the V-shaped pit opening layer structure in the present invention is changed, it is difficult to effectively exert the effects of improving luminance, improving luminance distribution uniformity, improving emission wavelength uniformity, and improving antistatic ability.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.
Claims (10)
1. The epitaxial wafer for the Micro-LED is characterized by comprising a substrate, and a nucleation layer, an intrinsic GaN layer, an N-GaN layer, a V-shaped pit opening layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer which are sequentially arranged on the substrate; the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-shaped pit opening extension layers;
the SiO is 2 The island layer comprises a plurality of SiO arrays distributed on the N-GaN layer 2 An island;
the SiO is 2 The island filling layer comprises an AlN layer;
the V-shaped pit opening extension layer is a periodic structure formed by alternately growing an InGaN layer and a first AlGaN layer.
2. The epitaxial wafer for Micro-LEDs according to claim 1, wherein said SiO 2 The island layer is SiO 2 The film layer is obtained by ICP etching, wherein the SiO is prepared by etching 2 The thickness of the thin film layer is 10nm-100nm.
3. The epitaxial wafer for Micro-LEDs according to claim 1, wherein said SiO 2 The island has a diameter of 100nm-500nm and a distribution density of 1×10 6 Individual/cm 2 -1×10 8 Individual/cm 2 。
4. The epitaxial wafer for Micro-LEDs according to claim 1, wherein said SiO 2 The island fill-in layer has a thickness of 20nm to 130nm so that the SiO is 2 The islands are filled and submerged, and the Al component in the AlN layer has a ratio of 0.4-0.6.
5. The epitaxial wafer for Micro-LEDs according to claim 1, wherein the number of periods of said V-shaped pit opening extension layer is 3-10, wherein the ratio of the In component In said InGaN layer is 0.05-0.3, the thickness of a single InGaN layer is 1nm-3nm, the ratio of the Al component In said first AlGaN layer is 0.1-0.4, and the thickness of a single first AlGaN layer is 5nm-10nm.
6. The epitaxial wafer for Micro-LEDs according to any one of claims 1 to 5, wherein the SiO 2 The island filling layer is a periodic structure formed by alternately growing an AlN layer and a second AlGaN layer, the period number is 3-10, and the thickness of a single AlN layer is 5-10 nm; the ratio of Al components in the second AlGaN layer is 0.1-0.3, and the thickness of each second AlGaN layer is 2-3 nm.
7. A method for producing an epitaxial wafer for Micro-LEDs, which is used for producing the epitaxial wafer for Micro-LEDs according to any one of claims 1 to 6, characterized by comprising:
providing a substrate, and sequentially growing a nucleation layer, an intrinsic GaN layer, an N-GaN layer, a V-shaped pit opening layer, a multiple quantum well layer, an electron blocking layer and a P-GaN layer on the substrate; the V-shaped pit opening layer comprises sequentially laminated SiO 2 Island layer, siO 2 Island fill level layers and V-shaped pit opening extension layers;
the SiO is 2 The island layer comprises a plurality of SiO arrays distributed on the N-GaN layer 2 An island;
the SiO is 2 The island filling layer comprises an AlN layer;
the V-shaped pit opening extension layer is a periodic structure formed by alternately growing an InGaN layer and a first AlGaN layer.
8. The method for preparing an epitaxial wafer for Micro-LEDs according to claim 7, wherein SiO is deposited in a PECVD reaction chamber 2 A thin film layer, wherein the SiO 2 The deposition temperature of the film is 250-300 ℃;
by then passing through the SiO 2 The SiO is obtained by etching a film layer through ICP 2 The island layer is etched for 10min-20min, and the gas used in etching is Cl 2 And BCl 3 Wherein, cl 2 And BCl 3 The volume ratio of (2) is 10: (1-2);
the SiO is 2 The growth temperature of the island filling layer is 1000-1100 ℃, and the growth pressure is 100-500 torr;
the growth temperature of the V-shaped pit opening extension layer is 850-950 ℃ and the growth pressure is 100-500 torr.
9. The method for producing an epitaxial wafer for Micro-LEDs according to claim 7 or 8, wherein the SiO 2 The island filling layer is a periodic structure formed by alternately growing an AlN layer and a second AlGaN layer, and the SiO is formed by 2 The growth temperature of the island filling layer is 1000-1100 ℃, and the growth pressure is 100-500 torr.
10. A Micro-LED comprising an epitaxial wafer for a Micro-LED according to any one of claims 1 to 6.
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| CN202310443299.7A Withdrawn CN116154069A (en) | 2023-04-24 | 2023-04-24 | Epitaxial wafer for Micro-LED, preparation method of epitaxial wafer and Micro-LED |
| CN202310870123.XA Pending CN117117052A (en) | 2023-04-24 | 2023-07-17 | Epitaxial wafer for Micro-LED, preparation method of epitaxial wafer and Micro-LED |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008159620A (en) * | 2006-12-20 | 2008-07-10 | Sony Corp | Method of manufacturing light-emitting diode, and method of manufacturing function element |
| US20090272993A1 (en) * | 2008-05-02 | 2009-11-05 | Cheong Hung Seob | Semiconductor light emitting device |
| CN102054917A (en) * | 2009-10-28 | 2011-05-11 | Lg伊诺特有限公司 | Light emitting device and light emitting device package |
| TW201218422A (en) * | 2010-10-22 | 2012-05-01 | Aceplux Optotech Inc | comprises an epitaxial substrate, a reflection point array, a buffer film, and an epitaxial film |
| CN104078538A (en) * | 2013-03-27 | 2014-10-01 | 展晶科技(深圳)有限公司 | Light emitting diode and fabrication method thereof |
| CN106025024A (en) * | 2016-07-21 | 2016-10-12 | 厦门市三安光电科技有限公司 | Nitride light-emitting diode and manufacturing method thereof |
| CN106784206A (en) * | 2017-01-23 | 2017-05-31 | 厦门三安光电有限公司 | Gallium nitride based light emitting diode |
| CN115799415A (en) * | 2023-02-10 | 2023-03-14 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED |
-
2023
- 2023-04-24 CN CN202310443299.7A patent/CN116154069A/en not_active Withdrawn
- 2023-07-17 CN CN202310870123.XA patent/CN117117052A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008159620A (en) * | 2006-12-20 | 2008-07-10 | Sony Corp | Method of manufacturing light-emitting diode, and method of manufacturing function element |
| US20090272993A1 (en) * | 2008-05-02 | 2009-11-05 | Cheong Hung Seob | Semiconductor light emitting device |
| CN102054917A (en) * | 2009-10-28 | 2011-05-11 | Lg伊诺特有限公司 | Light emitting device and light emitting device package |
| TW201218422A (en) * | 2010-10-22 | 2012-05-01 | Aceplux Optotech Inc | comprises an epitaxial substrate, a reflection point array, a buffer film, and an epitaxial film |
| CN104078538A (en) * | 2013-03-27 | 2014-10-01 | 展晶科技(深圳)有限公司 | Light emitting diode and fabrication method thereof |
| CN106025024A (en) * | 2016-07-21 | 2016-10-12 | 厦门市三安光电科技有限公司 | Nitride light-emitting diode and manufacturing method thereof |
| CN106784206A (en) * | 2017-01-23 | 2017-05-31 | 厦门三安光电有限公司 | Gallium nitride based light emitting diode |
| CN115799415A (en) * | 2023-02-10 | 2023-03-14 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED |
Non-Patent Citations (1)
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| 黄书万: "《光电材料》", pages: 39 - 58 * |
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| CN117117052A (en) | 2023-11-24 |
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