JP2009212256A - Manufacturing method for light-emitting diode, manufacturing method for semiconductor device, and manufacturing method for function element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a light-emitting diode, wherein a substrate can be easily exfoliated at low cost without almost damaging nitride-based group III-V compound semiconductor layers that form a light-emitting diode structure after such layers are grown on the substrate, and a vertical current injection type light-emitting diode can be easily manufactured. <P>SOLUTION: A metallic convex portion 12 is formed on a substrate 11, and nitride-based group III-V compound semiconductor layers 14 are grown at a concave portion 13 between the convex portion 12 and the substrate after the concave portion 13 takes a shape of a triangular cross section with a bottom face as a base. After the lateral growth of the nitride-based group III-V compound semiconductor layers 14, a light-emitting diode structure is formed by growing the nitride-based group III-V compound semiconductor layers including an active layer 17 thereon. Subsequently, the substrate 11 is exfoliated from those nitride-based group III-V compound semiconductor layers by removing the convex portion 12 through electrolysis. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a light emitting diode, a method for manufacturing a semiconductor element, and a method for manufacturing a functional element. For example, the present invention is suitable for application to manufacturing a light emitting diode using a nitride III-V compound semiconductor. .

  For example, when manufacturing a vertical current injection type GaN-based light emitting diode, a GaN-based semiconductor layer is grown on a sapphire substrate to form a light-emitting diode structure, one electrode is formed thereon, and then the GaN-based light-emitting diode is formed. It is necessary to peel the sapphire substrate from the semiconductor layer and form the other electrode on the back surface. Conventionally, after a GaN-based semiconductor layer is grown on a sapphire substrate, a technique for peeling the sapphire substrate from the GaN-based semiconductor layer is as follows. A technique of irradiating and thermally decomposing a GaN-based semiconductor layer at the interface portion is used (see, for example, Non-Patent Document 1). Recently, as another technique, after a metal buffer layer is grown on a sapphire substrate, a GaN-based semiconductor layer is grown thereon, and then the sapphire substrate is removed by removing the metal buffer layer by chemical etching. Has been proposed (see, for example, Non-Patent Document 2). As another technology, after growing a GaN-based semiconductor layer on a sapphire substrate, the temperature is raised and lowered, and a thermal cycle is applied to cause strain due to the difference in thermal expansion coefficient between the two to peel off the sapphire substrate. Proposed.

  On the other hand, a substrate having a plurality of convex portions on one main surface, and the convex portions are made of a material different from that of the substrate, and the concave portion of the substrate has a triangular cross-sectional shape with the bottom surface as the base. A first nitride-based III-V compound semiconductor layer is grown through the state, and a second nitride-based III-V compound semiconductor layer is formed on the substrate from the first nitride-based III-V compound semiconductor layer. A layer is laterally grown, and a third nitride III-V compound semiconductor layer of the first conductivity type, an active layer, and a second conductivity are formed on the second nitride III-V compound semiconductor layer. The present applicant has proposed a method for manufacturing a light emitting diode in which a light emitting diode structure is formed by sequentially growing a fourth nitride-based group III-V compound semiconductor layer of a type (see Patent Document 1). .

Appl.Phys.Lett.72,599 (1998) [Search June 7, 2006], Internet <URL: http://www.cir.tohoku.ac.jp/j/3activity/seika/seika04/yao.html> JP 2007-116097 A

  After growing the GaN-based semiconductor layer on the sapphire substrate, the GaN-based semiconductor layer in the vicinity of the interface with the sapphire substrate is irradiated with a pulsed laser beam in order to peel the sapphire substrate from the GaN-based semiconductor layer. The above-described conventional technique for thermal decomposition requires a large and expensive equipment such as a KrF excimer laser, so that there is a problem that the separation cost is high and the manufacturing cost of the GaN-based light emitting diode is high. Moreover, in the technology for removing the sapphire substrate by removing the metal buffer layer by chemical etching, it is necessary to side-etch the metal buffer layer sandwiched between the sapphire substrate and the GaN-based semiconductor layer. Since it is not easy to continuously supply the etching solution into the gap between the GaN-based semiconductor layer without causing stagnation in the middle, the controllability of the etching is poor, the etching becomes uneven, and the etching is difficult. There are problems in many ways, such as taking a long time. Furthermore, in the technique of peeling the sapphire substrate by applying a cooling and heating cycle, a large load is applied to the GaN-based semiconductor layer, so that a large physical damage occurs, and in some cases, a crack breakage may occur.

Accordingly, the problem to be solved by the present invention is to grow a nitride-based III-V compound semiconductor layer forming a light-emitting diode structure on a substrate, and then to form the nitride-based III-V compound semiconductor layer on the substrate. It is an object of the present invention to provide a method for manufacturing a light emitting diode that can be easily peeled off at low cost without causing any physical damage to the light emitting diode and can easily manufacture a vertical current injection type light emitting diode.
Another problem to be solved by the present invention is that after a nitride III-V compound semiconductor layer forming element structures of various semiconductor elements including a light emitting diode, a semiconductor laser, and a transistor is grown on a substrate. The substrate can be easily peeled off at low cost with almost no physical damage to the nitride III-V compound semiconductor layer, and a semiconductor device such as a vertical current injection type light emitting diode can be easily manufactured. It is providing the manufacturing method of the semiconductor device which can do.
Still another problem to be solved by the present invention is not only a semiconductor element such as a light emitting diode, a semiconductor laser, and a transistor, but also an element structure of various functional elements including a dielectric element, a superconducting element, an electro-optical element, and the like. After the layer to be formed is grown on the substrate, the substrate can be easily peeled off at low cost with almost no physical damage to the layer, and functional elements such as vertical current injection type light emitting diodes can be easily obtained. It is providing the manufacturing method of the functional element which can be manufactured.

In order to solve the above problem, the first invention is:
A substrate having a plurality of protrusions on one main surface, the protrusions having at least a surface made of a first metal, and having a triangular cross-sectional shape with the bottom surface of the recess in the substrate. Growing a first nitride-based III-V compound semiconductor layer through a state;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above Of the fourth nitride-based III-V compound semiconductor layer, a portion corresponding to the concave portion is formed in the depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer. Forming a first groove by removing until a portion is exposed;
Forming a second groove so that a part of the convex portion, the third nitride-based III-V compound semiconductor layer, or the second nitride-based III-V compound semiconductor layer is exposed; ,
The at least part of the protrusion exposed in the second groove, the third nitride III-V compound semiconductor layer, or the second nitride III-V compound semiconductor layer Forming an extraction electrode made of a second metal having a smaller ionization tendency than the first metal;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. From the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. A method for producing a light-emitting diode, comprising: a step of peeling.

The first metal constituting at least the surface of the convex portion on the substrate may be various, but it is necessary to have a melting point higher than the growth temperature of the nitride III-V compound semiconductor layer. . Specifically, the first metal is copper (Cu), chromium (Cr), nickel (Ni), iron (Fe), cobalt (Co), palladium (Pd), platinum (Pt), or the like. It is simplest to form the entire convex portion with a single metal, but if necessary, the portion including the surface of the convex portion is formed with the first metal, and the other portions are made of other materials. May be formed. These materials may be various materials, and may or may not have electrical conductivity. For example, dielectric materials such as oxides, nitrides, and carbides, conductors such as metals and alloys different from the first metal, etc. It is. As the oxide, for example, various oxides such as silicon oxide (SiO _x ), titanium oxide (TiO _x ), and tantalum oxide (TaO _x ) can be used, and two or more of these can be mixed or laminated. It can also be used in the form of a membrane. As the nitride, for example, silicon nitride (SiN _x ), SiON, CrN, CrNO or the like can be used, and two or more of these can be mixed or used in the form of a laminated film. As the carbide, SiC, HfC, ZrC, WC, TiC, CrC or the like can be used, and two or more of these can be mixed or used in the form of a laminated film. The second metal constituting the extraction electrode is selected as needed from metals having a smaller ionization tendency than the first metal. As an example, Cu is used as the first metal, and gold (Au) is used as the second metal.

  The conductivity type of the first nitride III-V compound semiconductor layer and the second nitride III-V compound semiconductor layer may be any of p-type, n-type, and i-type, The conductivity types may or may not be the same conductivity type, and the conductivity types may be within the first nitride III-V compound semiconductor layer or the second nitride III-V compound semiconductor layer. Two or more different parts may be mixed.

  Typically, when the first nitride-based III-V compound semiconductor layer is grown, dislocations are generated in a direction perpendicular to the principal surface of the substrate from the interface with the bottom surface of the recess of the substrate. When the dislocation reaches the slope of the first nitride-based III-V compound semiconductor layer in the state of having a triangular cross-sectional shape or the vicinity thereof, a triangular portion is formed in a direction parallel to the one principal surface. Bend away from the camera. Here, the triangular cross-sectional shape or the triangular shape in the triangular portion means not only an accurate triangle, but also includes what can be regarded as an approximate triangle, such as a rounded top (for example) ( The same applies below). Preferably, in the initial stage of growth of the first nitride-based III-V group compound semiconductor layer, a plurality of micronuclei are formed on the bottom surface of the concave portion of the substrate, and these micronuclei grow and coalesce. Thus, dislocations generated from the interface with the bottom surface of the concave portion of the substrate in a direction perpendicular to one main surface of the substrate are repeatedly bent in a direction parallel to the one main surface. By doing so, dislocations that escape to the top during the growth of the first nitride-based III-V compound semiconductor layer can be reduced.

Typically, convex portions and concave portions are alternately and periodically formed on one main surface of the substrate. In this case, although the period of a convex part and a recessed part is 3-5 micrometers suitably, it is not limited to this. Further, the ratio of the length of the bottom of the convex portion to the length of the bottom of the concave portion is preferably 0.5 to 3, and most preferably around 0.5, but is not limited thereto. . The height of the convex portion as viewed from one main surface of the substrate is preferably 0.3 μm or more, more preferably 1 μm or more, but is not limited thereto. The convex portion preferably has a side surface inclined with respect to one main surface of the substrate (for example, a side surface in contact with one main surface of the substrate), and an angle between the side surface and one main surface of the substrate is θ. Then, from the viewpoint of improving the light extraction efficiency, preferably 100 ° <θ <160 °, more preferably 132 ° <θ <139 ° or 147 ° <θ <154 °, and most preferably Although it is 135 degrees or 152 degrees, it is not limited to this. The cross-sectional shape of the convex portion may be various shapes, and the side surface may be a curved surface as well as a flat surface. For example, an n-gon (where n is an integer of 3 or more), specifically Triangles, quadrangles, pentagons, hexagons, etc., or those with their corners cut off, rounded corners, circles, ellipses, etc. Although the cross-sectional shape of the recess may be various shapes, for example, an n-gon (where n is an integer of 3 or more), specifically, a triangle, a quadrangle, a pentagon, a hexagon, or the like, or these corners are cut off. Or rounded, oval, etc. From the viewpoint of improving the light extraction efficiency, preferably, the cross-sectional shape of the recess is an inverted trapezoid. Here, the inverted trapezoidal shape means not only an accurate inverted trapezoid but also includes an object that can be approximately regarded as an inverted trapezoid (the same applies hereinafter). In this case, from the viewpoint of minimizing the dislocation density of the second nitride-based III-V compound semiconductor layer, it is preferable that the depth of the concave portion (same as the height of the convex portion) be d and the width of the bottom surface of the concave portion. when a you a W _g, the angle between the inclined surface and the main surface of the substrate of the first nitride III-V compound semiconductor layer in a state where a triangular cross-sectional shape is alpha, the 2d ≧ W _g tan [alpha D, W _g , and α are determined so as to hold. Since α is normally constant, d and W _g are determined so that this equation is satisfied. If d is too large, the source gas is not sufficiently supplied to the inside of the recess, which hinders the growth of the first nitride-based III-V compound semiconductor layer from the bottom of the recess, and conversely if d is too small. The first nitride-based III-V compound semiconductor layer grows not only on the concave portion of the substrate but also on the convex portions on both sides thereof. From the viewpoint of preventing these, generally, 0.5 μm <d It is selected within the range of <5 μm and typically selected within the range of 1.0 ± 0.2 μm, but is not limited thereto. W _g is generally 0.5 to 5 μm and is typically selected within the range of 2 ± 0.5 μm, but is not limited thereto. The width W _t of the upper surface of the convex portion is 0 when the cross-sectional shape of the convex portion is triangular, but when the cross-sectional shape of the convex portion is trapezoidal, this convex portion is the second nitride III- Since this is a region used for lateral growth of the group V compound semiconductor layer, the longer the area, the larger the area of the portion with less dislocation density. When the cross-sectional shape of the convex portion is trapezoidal, W _t is generally 1-1000 μm, but is not limited thereto.

  For example, the convex portion or the concave portion may extend in a stripe shape in one direction on the substrate, or may extend in a stripe shape in at least a first direction and a second direction intersecting each other. As a result, the convex portion is an n-gon (where n is an integer of 3 or more), specifically, a triangle, a quadrangle, a pentagon, a hexagon, or the like, or those with the corners cut off, rounded, or circular Alternatively, it may be a two-dimensional pattern such as an ellipse or a dot. In a preferred example, the convex portions have a hexagonal planar shape, the convex portions are two-dimensionally arranged in a honeycomb shape, and concave portions are formed so as to surround the convex portions. By doing so, light emitted from the active layer can be efficiently extracted in all directions of 360 °. Alternatively, the recess may have a hexagonal planar shape, the recesses may be two-dimensionally arranged in a honeycomb shape, and a protrusion may be formed so as to surround the recess. When the concave portion of the substrate has a stripe shape, the concave portion extends, for example, in the <1-100> direction of the first nitride-based III-V compound semiconductor layer, or a sapphire substrate is used as the substrate, for example. In some cases, the sapphire substrate may extend in the <11-20> direction. The convex portion is, for example, an n-pyramid (where n is an integer of 3 or more), specifically, a triangular pyramid, a quadrangular pyramid, a pentagonal pyramid, a hexagonal pyramid, etc., or a cut or rounded corner. Things, cones, elliptical cones, etc.

  In the third nitride-based III-V compound semiconductor layer, an electrode on the first conductivity type side is formed in a state of being electrically connected thereto. Similarly, an electrode on the second conductivity type side is formed on the fourth nitride-based III-V compound semiconductor layer in a state of being electrically connected thereto. When light is extracted through these first conductivity type side electrodes or second conductivity type side electrodes, a transparent conductive material is used as the material of the light extraction side electrode, and the material of the electrode on the opposite side is used. For example, a highly reflective material having a high reflectance of light having an emission wavelength from the active layer is preferably used, but is not limited thereto.

  As described above, the number of dislocations that escape to the top during the growth of the first nitride-based III-V compound semiconductor layer can be reduced, but the dislocations that escape to the top are the second nitride-based III-V in the upper layer. It propagates to the group compound semiconductor layer, the third nitride-based III-V group compound semiconductor layer, the active layer, and the fourth nitride-based group III-V compound semiconductor layer to form threading dislocations. This threading dislocation includes a first nitride-based III-V compound semiconductor layer, a second nitride-based III-V compound semiconductor layer, a third nitride-based III-V compound semiconductor layer, an active layer, and The fourth nitride-based III-V group compound semiconductor layer concentrates on a portion corresponding to the recess (portion above the recess). The threading dislocations and the vicinity thereof have poor crystallinity and a large number of non-emissive centers exist, so that the luminous efficiency is lowered. In particular, the non-radiative centers present in the active layer have a great adverse effect on the luminous efficiency. Therefore, the first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth Of the nitride-based III-V compound semiconductor layer, a portion corresponding to the concave portion is formed in a depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer, typically a part of the convex portion. If the first groove is formed by removing until the side surface of the convex portion is exposed, at least the active layer and the layer generated above the threading dislocation can be removed. Can be reduced. The width of the portion to be removed may be any width as long as a part of the convex portion is exposed and all or most of the threading dislocations can be removed, but is typically larger than the width of the concave portion. . As described above, since a part of the convex portion is exposed in the first groove, when the convex portion is electrolyzed in the electrolytic solution in a later step, the convex portion is electrolyzed in the first groove. The liquid can come into contact. This removal can be performed by various methods such as a reactive ion etching (RIE) method, a powder blast method, and a sand blast method. Typically, a first nitride III-V compound semiconductor layer, a second nitride III-V compound semiconductor layer, a third nitride III-V compound semiconductor layer, an active layer, and A portion of the fourth nitride III-V compound semiconductor layer corresponding to the recess is exposed in the depth direction from the surface of the fourth nitride III-V compound semiconductor layer, and The first groove is formed by removing until a part of the convex portion is exposed. By doing so, threading dislocations can be almost eliminated.

  On the other hand, when the second nitride-based III-V compound semiconductor layer is grown in the lateral direction, threading dislocations are present at the association portion of the second nitride-based III-V compound semiconductor layer above the convex portion. The threading dislocations of the second nitride-based III-V compound semiconductor layer are concentrated, and the third nitride-based III-V compound semiconductor layer, the active layer, and the fourth nitride-based III-V group of the upper layer are concentrated. Propagates to the compound semiconductor layer. This threading dislocation is caused by the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. It concentrates on the part corresponding to the center part between the mutually adjacent recessed parts (part on the center part between recessed parts). Therefore, preferably, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer are used. At least a third nitride III-V group in the depth direction from the surface of the fourth nitride III-V compound semiconductor layer. If the third groove is formed by removing the compound semiconductor layer until it is exposed, at least the active dislocations of the threading dislocations and those generated in the upper layer can be removed, thereby greatly reducing the non-luminescent center. Can be made. The width of the part to be removed may be a width that can remove all or most of the threading dislocations, for example. This removal can also be performed by various methods such as RIE, powder blasting, and sand blasting. As needed, a second nitride III-V compound semiconductor layer, a third nitride III-V compound semiconductor layer, an active layer, a fourth nitride III-V compound semiconductor layer, and By removing the portion corresponding to the central portion between the concave portions adjacent to each other among the convex portions from the surface of the fourth nitride-based III-V compound semiconductor layer in the depth direction until the substrate is exposed. A third groove may be formed. By doing so, since the convex portion is exposed also in the third groove, when the convex portion is electrolyzed in the electrolytic solution in a later step, the contact area between the convex portion and the electrolytic solution is further increased. This makes it easy to remove the convex portion by electrolysis.

  The second groove has a convex portion or a part of the third nitride-based III-V compound semiconductor layer exposed, or the second nitride-based III-V compound semiconductor layer is conductive. In some cases, the second nitride III-V compound semiconductor layer is formed so as to be exposed. The second groove is preferably formed so as to cross the substrate and cross the first groove. That the second groove crosses the substrate means that the second groove extends from one part of the outer periphery of the substrate to another part. When the second groove intersects the first groove in this way, the second groove communicates with the first groove. In the case where the third groove is formed so that the convex portion is exposed, the second groove is formed so as to intersect the first groove and the third groove, and the second groove is the first groove. It is preferable to communicate with the third groove. By carrying out like this, when electrolyzing a convex part in electrolyte solution in a later process, electrolyte solution may contact a convex part through these 1st groove | channel, 2nd groove | channel, and 3rd groove | channel. It becomes possible. Preferably, the second groove communicates with all the first grooves or the first groove and the third groove, but there may be a portion that does not partially communicate as long as it does not interfere with the peeling of the substrate. . If necessary, the second groove may be formed simultaneously in the step of forming the first groove.

  A first protrusion formed in the second groove, formed on at least a part of the third nitride III-V compound semiconductor layer or the second nitride III-V compound semiconductor layer; The extraction electrode made of the second metal having a smaller ionization tendency than that of the metal is preferably a protrusion exposed in the second groove, the third nitride system, in order to improve the conduction with the protrusion. It is formed on the entire group III-V compound semiconductor layer or the second nitride-based group III-V compound semiconductor layer. When the extraction electrode is directly formed on the convex portion, the extraction electrode is directly electrically connected to the convex portion. Since the third nitride-based III-V compound semiconductor layer is of the first conductivity type, the second electrode is formed when the extraction electrode is formed on the third nitride-based III-V compound semiconductor layer. Assuming that the nitride-based III-V compound semiconductor layer is conductive, the extraction electrode includes the third nitride-based III-V compound semiconductor layer and the second nitride-based III-V compound semiconductor layer. It is electrically connected to the convex portion through the layer. When the take-out electrode is formed on the conductive second nitride-based III-V compound semiconductor layer, the protrusion is electrically connected with the second nitride-based III-V compound semiconductor layer. Connected to. If necessary, the extraction electrode may be removed after electrolysis of the convex portion.

  As the metal constituting the counter electrode used as the cathode when electrolyzing the convex portion, the first metal constituting the convex portion is typically used, but the ionization tendency is substantially equal to the first metal. A metal different from these metals may be used. When the extraction electrode made of the second metal is formed on the third nitride-based III-V compound semiconductor layer exposed in the second groove, the convex portion, the third nitride-based III The whole of the group V compound semiconductor layer and the extraction electrode is used as an anode. As the electrolytic solution for electrolysis, a conventionally known electrolytic solution can be used, and is appropriately selected according to the type of the first metal constituting the convex portion.

  This method of manufacturing a light emitting diode typically further includes a step of attaching a support substrate to the surface of the substrate on the extraction electrode side before electrolyzing the convex portion. By doing so, the light emitting diode structure after peeling off the substrate by electrolyzing the convex portion is mechanically supported by this support substrate, so that it can be prevented from being broken or damaged, and easy to handle. It becomes. Typically, an electrode is formed in advance on a support substrate, and the support substrate is pasted so that this electrode comes into contact with the take-out electrode of the substrate, but the present invention is not limited to this. As the metal constituting the electrode, a metal having a smaller ionization tendency than the metal constituting the convex portion, for example, the same metal as the metal constituting the extraction electrode formed in the second groove is used. The shape of the support substrate may be various shapes and is appropriately selected according to the shape of the substrate, but is generally circular or rectangular.

Various substrates can be used as the substrate. Specifically, the substrate made of a material different from the nitride III-V compound semiconductor includes, for example, sapphire (including a c-plane, a-plane, r-plane, etc., and a plane off from these planes). ), SiC (including 6H, 4H, 3C), Si, ZnS, ZnO, LiMgO, GaAs, spinel (MgAl ₂ O ₄ , ScAlMgO ₄ ), garnet, CrN (for example, CrN (111)), etc. Preferably, a hexagonal or cubic substrate made of these materials, more preferably a hexagonal substrate is used. As the substrate, a substrate made of a nitride III-V group compound semiconductor (GaN, AlGaInN, AlN, GaInN, etc.) may be used. Alternatively, a nitride III-V compound semiconductor layer is grown as a substrate on a substrate made of a material different from the nitride III-V compound semiconductor, and the nitride III-V compound semiconductor layer is formed on the nitride III-V compound semiconductor layer. What formed the convex part may be sufficient. The shape of the substrate may be various shapes, but is typically circular.

The first to fourth nitride III-V compound semiconductor layer and the nitride constituting the active layer based III-V compound semiconductor layer, most _{commonly, Al X B y Ga 1-} xyz In z As _u N _1-uv P _v (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ u ≦ 1, 0 ≦ v ≦ 1, 0 ≦ x + y + z <1, 0 ≦ u + v <consists 1), more _{specifically, Al X B y Ga 1-} xyz in z N ( However, 0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ x + y + z <1) Typically, it consists of Al _x Ga _{1 -xz} In _z N (where 0 ≦ x ≦ 1, 0 ≦ z ≦ 1). Specific examples are GaN, InN, AlN, AlGaN, InGaN. And AlGaInN. The nitride III-V compound semiconductor layer constituting the first to fourth nitride III-V compound semiconductor layers and the active layer promotes the bending of dislocations when, for example, B or Cr is contained in GaN. Therefore, it may be made of BGaN, GaN: B doped GaN: B, GaN: Cr doped GaN: Cr, or the like. Particularly first first nitride III-V compound semiconductor layer grown on the recessed portions of the substrate, _{preferably, GaN, In X Ga 1-} x N (0 <x <0.5), Al X A material consisting of Ga _1-x N (0 <x <0.5) and Al _x In _y Ga _1-xy N (0 <x <0.5, 0 <y <0.2) is used. The first conductivity type may be n-type or p-type, and the second conductivity type is p-type or n-type accordingly. In addition, as a so-called low-temperature buffer layer that is first grown on the substrate, a GaN buffer layer, an AlN buffer layer, an AlGaN buffer layer, etc. are generally used, and those doped with Cr or CrN buffer layers are used. Also good.

The thickness of the second nitride-based III-V compound semiconductor layer is selected as necessary, and is typically about several μm or less, but is thicker depending on the application, for example, about several tens to 300 μm. It may be.
Examples of a method for growing the nitride III-V compound semiconductor layers constituting the first to fourth nitride III-V compound semiconductor layers and the active layer include, for example, metal organic chemical vapor deposition (MOCVD), Various epitaxial growth methods such as hydride vapor phase epitaxial growth, halide vapor phase epitaxial growth (HVPE), and molecular beam epitaxy (MBE) can be used, but are not limited thereto.

  The light-emitting diode manufactured according to the first invention is suitable for application to various electronic devices that use light emission. For example, in a light source cell unit, a light emitting diode backlight, a light emitting diode illumination device, a light emitting diode display, etc., in which a plurality of cells each including at least one red light emitting diode, green light emitting diode, and blue light emitting diode are arranged. , At least one of a red light emitting diode, a green light emitting diode and a blue light emitting diode, and particularly as at least one of a green light emitting diode and a blue light emitting diode. A light emitting diode manufactured according to the invention is used. As the red light emitting diode, for example, a diode using an AlGaInP-based semiconductor can be used. Alternatively, in an electronic device having one or a plurality of light emitting diodes, the light emitting diode manufactured according to the first invention is used as the at least one light emitting diode.

The second invention is
A substrate having a plurality of convex portions on one main surface, the convex portions having at least a surface made of the first metal, and having a triangular cross-sectional shape with the bottom surface as the bottom of the concave portion of the substrate. Growing a first nitride-based III-V compound semiconductor layer through a state;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
The fifth nitride-based III-V compound semiconductor layer includes an element structure formed on the second nitride-based III-V compound semiconductor layer and includes at least one conductive nitride-based III-V compound semiconductor layer electrically connected to the protrusion. Growing a nitride III-V compound semiconductor layer of
In the recess of the first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, and the fifth nitride III-V compound semiconductor layer. Forming a first groove by removing a corresponding portion in a depth direction from the surface of the fifth nitride-based III-V compound semiconductor layer until a part of the convex portion is exposed; and ,
Forming a second groove so that a part of the convex portion or the conductive nitride-based III-V compound semiconductor layer is exposed;
From the second metal having a smaller ionization tendency than the first metal on the convex portion exposed in the second groove or at least part of the conductive nitride-based III-V compound semiconductor layer Forming an extraction electrode,
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. And a step of peeling from the second nitride III-V compound semiconductor layer and the fifth nitride III-V compound semiconductor layer.

In the second invention, the semiconductor element includes a general light emitting diode, an intersubband transition emission type (quantum cascade type) light emitting diode, an ordinary semiconductor laser, and an intersubband transition emission type (quantum cascade type) semiconductor laser. In addition to such light emitting elements, light receiving elements such as photodiodes or sensors, solar cells, and field effect transistors (FET) such as high electron mobility transistors and transistors such as bipolar transistors such as heterojunction bipolar transistors (HBT) The electronic travel element represented by is included. The fifth nitride group III-V compound semiconductor layer forming the element structure is appropriately designed according to the type of the semiconductor element. For example, when the semiconductor element is a light emitting diode, the fifth nitride-based III-V group compound semiconductor layer includes the third nitride-based III-V group compound semiconductor layer, the active layer, and the fourth layer in the first invention. In this case, the conductive nitride III-V compound semiconductor layer included in the fifth nitride III-V compound semiconductor layer is, for example, a third nitride III-V compound semiconductor layer. It is a nitride III-V compound semiconductor layer.
In the second invention, what has been described in relation to the first invention is valid as far as it is not contrary to the nature thereof.

The third invention is
A substrate having a plurality of convex portions on one main surface, the convex portions having at least a surface made of the first metal, and having a triangular cross-sectional shape with the bottom surface as the bottom of the concave portion of the substrate. Growing a first layer through a state;
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer including at least one conductive layer electrically connected to the protrusion on the second layer;
Of the first layer, the second layer, and the third layer, the portion corresponding to the concave portion is formed in the depth direction from the surface of the third layer, with the convex portion or the conductive layer. Forming a first groove by removing until a part of is exposed;
Forming a second groove so that a part of the convex portion or the conductive layer is exposed;
Forming a lead electrode made of a second metal having a smaller ionization tendency than the first metal on at least a part of the convex portion or the conductive layer exposed in the second groove;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. And a step of peeling from the second layer and the third layer.

The fourth invention is:
A substrate having a plurality of convex portions on one main surface, the convex portions using at least a surface made of a first metal, and including at least one conductive layer electrically connected to the convex portions on the substrate. Growing a fourth layer;
The portion corresponding to the concave portion of the fourth layer is removed from the surface of the fourth layer in the depth direction until the convex portion or a part of the conductive layer is exposed. Forming a groove of 1;
Forming a second groove so that a part of the convex portion or the conductive layer is exposed;
Forming a lead electrode made of a second metal having a smaller ionization tendency than the first metal on at least a part of the convex portion or the conductive layer exposed in the second groove;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. A method of manufacturing a functional element, comprising: a step of peeling the substrate from the fourth layer.

  Functional elements include piezoelectric elements, pyroelectric elements, optical elements (second harmonic generation elements using nonlinear optical crystals, etc.), dielectrics, in addition to the above semiconductor elements (light emitting elements, light receiving elements, electron transit elements, etc.). Also included are body elements (including ferroelectric elements), superconducting elements, and the like. In this case, the material of the layer forming the element structure is a nitride-based III-V group compound semiconductor, a wurtzit structure, or more generally a hexagonal crystal in various semiconductor elements as described above. Other semiconductor structures having a crystalline structure such as oxide semiconductors such as ZnO, α-ZnS, α-CdS, α-CdSe, and other crystalline structures such as CrN (111) and oxychalcogenide semiconductors It may be made of various semiconductors. Here, the oxychalcogenide-based semiconductor means oxychalcogenide LnMOCh (where Ln is at least one lanthanoid, M is Cu or Cd, and Ch is at least one chalcogen) or a part of the constituent elements of the oxychalcogenide is another element. In particular, Ln is selected from the group consisting of La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. At least one kind. For the piezoelectric element, pyroelectric element, optical element, dielectric element, superconducting element, and the like, various materials such as an oxide having a hexagonal crystal structure can be used.

By using a device including a light emitting diode or a semiconductor laser as a functional element, a light emitting diode backlight, a light emitting diode illumination device, a light emitting diode display, etc., a projector or a rear projection television set using a light emitting diode or a semiconductor laser as a light source, a grating light Electronic devices such as valves can be configured.
In the third and fourth inventions, the matters other than the above are explained in relation to the first and second inventions unless they are contrary to the nature.

  In the first to fourth inventions configured as described above, the substrate on which the extraction electrode made of the second metal is formed or the substrate on which the support substrate is attached to the surface on the extraction electrode side is immersed in the electrolytic solution. Then, the electrolytic solution comes into contact with the first groove and the second groove or the first groove, the second groove, and the third groove at least on the convex portion made of the first metal. Then, when electrolysis is performed in the electrolytic solution using the convex portion and the extraction electrode as the anode and the counter electrode made of a metal having a substantially same ionization tendency as that of the first metal in the electrolytic solution, at least the surface of the convex portion is gradually dissolved electrochemically. Therefore, the layer grown on the substrate can be peeled off from the substrate. In this case, since the electrolysis speed can be easily controlled by the voltage applied between the anode and the cathode, the peeling speed can be easily controlled. At the time of peeling, the convex portions are gradually removed by electrolysis, so that physical damage can hardly occur in the layer grown on the substrate.

  According to the present invention, after a nitride III-V compound semiconductor layer forming a light emitting diode structure or an element structure is grown on one main surface of the substrate, the substrate is then nitrided III-V compound semiconductor. For example, a vertical current injection type light emitting diode having high luminous efficiency can be easily manufactured. And using this vertical current injection type light emitting diode with high luminous efficiency, for example, high performance light source cell unit, light emitting diode backlight, light emitting diode illumination device, light emitting diode display, light emitting diode optical communication device, optical space transmission Devices, various electronic devices, and the like can be realized.

  In addition, after the layer that forms the element structure is grown on one main surface of the substrate, the substrate can be easily peeled off at a low cost with almost no physical damage to the layer that forms the element structure, Various functional elements such as a vertical current injection type light emitting diode having high luminous efficiency can be easily manufactured.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings of the embodiments, the same or corresponding parts are denoted by the same reference numerals.
1 to 15 show a method for manufacturing a light-emitting diode according to a first embodiment of the present invention. This light-emitting diode uses a nitride III-V compound semiconductor such as GaN.

  In the first embodiment, as shown in FIG. 1, first, a substrate 11 having a flat main surface and made of a material different from a nitride III-V compound semiconductor is prepared. The convex part 12 whose cross-sectional shape is trapezoid shape or a rectangular shape is periodically formed on a predetermined planar shape on it. Although the shape of the substrate 11 may be various shapes, it is circular here. A concave portion 13 having an inverted trapezoidal shape or a rectangular cross-sectional shape is formed between the convex portions 12. As this substrate 11, for example, those already described can be used. Specifically, for example, a sapphire substrate is used, and its main surface is, for example, a c-plane. The planar shape of the convex portion 12 and the concave portion 13 can be the various planar shapes already described. For example, as shown in FIG. 16, both the convex portion 12 and the concave portion 13 have a stripe shape extending in one direction. In other cases, as shown in FIG. 17, the convex portion 12 has a hexagonal planar shape and is two-dimensionally arranged in a honeycomb shape. Typically, the direction of the dotted line in FIG. 16 (direction perpendicular to the stripe) is parallel to the a-axis of the nitride III-V compound semiconductor layer 14 described later, and the direction of the dotted line in FIG. The direction connecting the portions 12) is parallel to the m-axis of the nitride III-V compound semiconductor layer 14 described later. For example, when the substrate 11 is a sapphire substrate, the extending direction of the stripe-shaped convex portion 12 and the concave portion 13 in FIG. 16 is the <1-100> direction of the sapphire substrate, and the extending direction of the concave portion 13 in FIG. Similarly, it is the <1-100> direction of the sapphire substrate. These extending directions may be the <11-20> direction of the sapphire substrate.

  The convex portion 12 is at least a surface made of metal, and typically is entirely made of metal. As this metal, a metal having a melting point higher than at least the growth temperature of the nitride III-V compound semiconductor is used. The convex portion 12 can be formed by a conventionally known method. For example, after forming a film made of a material for forming the convex portion 12 on the substrate 11, the convex portion 12 is formed by patterning the film by etching using the RIE method or the like. A resist pattern having an opening corresponding to the portion 12 is formed, a film made of a material for forming the convex portion 12 is formed on the entire surface of the substrate 11, and then the resist pattern is removed together with the film formed thereon (lift-off). ) To form the convex portion 12.

  Next, the surfaces of the substrate 11 and the projections 12 are cleaned by performing thermal cleaning or the like, and then, for example, a GaN buffer layer or an AlN buffer is formed on the substrate 11 at a growth temperature of, for example, about 550 ° C. A layer, a CrN buffer layer, a Cr-doped GaN buffer layer, or a Cr-doped AlN buffer layer (not shown) is grown. Next, a nitride III-V compound semiconductor is epitaxially grown by MOCVD in the same manner as described in Patent Document 1. That is, the growth is started from the bottom surface of the recess 13 to generate a plurality of micronuclei made of a nitride III-V compound semiconductor, and through the process of growth and coalescence of these micronuclei, the bottom surface of the recess 13 is used as the bottom. The nitride III-V compound semiconductor layer is grown so as to have an isosceles triangular cross-sectional shape having a facet inclined with respect to the main surface of the substrate 11, and subsequently, the nitride III-V The group compound semiconductor layer is grown while maintaining the facet plane orientation of the slope. Thus, as shown in FIG. 2, a nitride-based III-V group compound semiconductor layer 14 having a pentagonal cross-sectional shape is grown so as to fill the recess 13. In FIG. 2, a nitride-based III-V group compound semiconductor layer 14 having an isosceles triangular cross section having a bottom surface of the recess 13 as a base and a facet inclined with respect to the main surface of the substrate 11 on the inclined surface is indicated by an alternate long and short dash line. Show. For example, the extending direction of the nitride III-V compound semiconductor layer 14 is the <1-100> direction, and the facet of the inclined surface is the (1-101) plane. The nitride III-V compound semiconductor layer 14 may be undoped or doped with n-type impurities or p-type impurities. The growth conditions for the nitride III-V compound semiconductor layer 14 will be described later. The extending direction of the nitride-based III-V compound semiconductor layer 14 may be the <11-20> direction. Dislocations 15 are generated in the nitride-based III-V compound semiconductor layer 14 from the interface with the substrate 11.

  Next, when the growth condition is set to a condition in which the lateral growth is dominant and the growth is continued, the nitride III-V compound semiconductor layer 14 grows in the lateral direction and the cross-sectional shape becomes a hexagonal shape. When the nitride-based III-V compound semiconductor layer 14 grows while increasing in thickness as it spreads over the convex portion 12 and continues to grow in the lateral direction, the nitride finally grown from the adjacent concave portion 13 grows. The group III-V compound semiconductor layers 14 come into contact with each other on the convex portion 12 and are associated with each other. Subsequently, the nitride-based III-V compound semiconductor layer 14 is laterally grown until the surface thereof becomes a flat surface parallel to the main surface of the substrate 11. The nitride III-V compound semiconductor layer 14 in this state is shown in FIG. Dislocations 15 of the nitride-based III-V compound semiconductor layer 14 propagate in the nitride-based III-V compound semiconductor layer 14 grown in this manner in a direction parallel to the substrate 11. The dislocation density in the upper layer portion of the group compound semiconductor layer 14 is extremely low. In this case, it is assumed that the nitride III-V compound semiconductor layer 14 is n-type.

Next, as shown in FIG. 3, the n-type nitride III-V compound semiconductor layer 16, the nitride III-V group are formed on the nitride III-V compound semiconductor layer 14 by, for example, MOCVD. An active layer 17 using a compound semiconductor and a p-type nitride-based III-V group compound semiconductor layer 18 are sequentially epitaxially grown. In these nitride III-V compound semiconductor layer 14, n-type nitride III-V compound semiconductor layer 16, active layer 17, and p-type nitride III-V compound semiconductor layer 18, a convex portion 12, that is, threading dislocations 19 at a high density (for example, about 10 ⁸ / cm ² or more) in the vicinity of the center portion of 12, that is, in the meeting portion between the nitride-based III-V group compound semiconductor layers 14 grown from the adjacent recesses 13. The threading dislocations 19 are generated in the portion above the recess 13 although the density is low, and the other portions have a low dislocation density. For example, when the depth d of the recess 13 is 1 μm and the width W _{g of} the bottom surface is 2 μm, the dislocation density of the low dislocation density portion is 6 × 10 ⁷ / cm ² , and the substrate 11 subjected to the uneven processing is used. The dislocation density is reduced by 1 to 2 orders of magnitude compared to the case where there is no dislocation. No dislocation occurs in the direction perpendicular to the side wall of the recess 13. FIG. 18 shows a distribution of threading dislocations 19 when the convex portion 12 has the planar shape shown in FIG. FIG. 19 shows a distribution of threading dislocations 19 when the convex portion 12 has the planar shape shown in FIG.

The growth source of the above-mentioned nitride III-V compound semiconductor layer is, for example, triethylgallium ((C ₂ H ₅ ) ₃ Ga, TEG) or trimethyl gallium ((CH ₃ ) ₃ Ga, TMG as a Ga source. ), Trimethylaluminum ((CH ₃ ) ₃ Al, TMA) as a raw material of Al, triethylindium ((C ₂ H ₅ ) ₃ In, TEI) or trimethylindium ((CH ₃ ) ₃ In, TMI), and ammonia (NH ₃ ) is used as a raw material for N. As for the dopant, for example, silane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as the n-type dopant, and bis (methylcyclopentadienyl) magnesium ((CH ₃ C ₅ H ₄ ) ₂ is used as the p-type dopant. Mg), bis (ethylcyclopentadienyl) magnesium ((C ₂ H ₅ C ₅ H ₄ ) ₂ Mg) or bis (cyclopentadienyl) magnesium ((C ₅ H ₅ ) ₂ Mg) is used. For the carrier gas atmosphere during the growth of the nitride-based III-V compound semiconductor layer, eg, H ₂ gas is used.

In the first embodiment, in order to minimize the threading dislocation density of the nitride-based III-V compound semiconductor layer 14, the width W _g of the bottom surface of the recess 13 and the depth of the recess 13, that is, the protrusion 12 2 and the angle α formed by the slope of the nitride III-V compound semiconductor layer 14 in the state indicated by the alternate long and short dash line in FIG. 2 and the principal surface of the substrate 11 are determined to satisfy the following formula: (See FIG. 20).
2d ≧ W _g tan α
For example, when W _g = 2.1 μm and α = 59 °, d ≧ 1.75 μm, W _g = 2 μm, and when α = 59 °, d ≧ 1.66 μm, W _g = 1.5 μm, α When d = 59 °, d ≧ 1.245 μm, W _g = 1.2 μm, and when α = 59 °, d ≧ 0.966 μm. However, in any case, it is desirable that d <5 μm.

At the time of growth of the nitride-based III-V compound semiconductor layer 14 shown in FIG. 2, it is preferable to set the growth temperature low so as to increase the V / III ratio of the growth raw material. Specifically, when the growth of the nitride-based III-V compound semiconductor layer 14 is performed under a pressure condition of 1 atm, the V / III ratio of the growth material is in the range of, for example, 13000 ± 2000, and the growth temperature is, for example, 1100. It is preferable to set in the range of ± 50 ° C. Regarding the V / III ratio of the growth material, when the growth of the nitride-based III-V compound semiconductor layer 14 is performed under a pressure condition of x atmospheric pressure, the pressure is determined from Bernoulli's law that defines the relationship between the flow velocity and the pressure. It is preferable to set the V / III ratio corresponding to the square of the amount of change, specifically (13000 ± 2000) × x ² . For example, when the growth is performed at 0.92 atmospheres (700 Torr), the V / III ratio of the growth raw material is preferably set to a range of 11000 ± 1700 (for example, 10530). x is generally from 0.01 to 2 atmospheres. Regarding the growth temperature, when growth is performed under a pressure condition of 1 atm or less, lateral growth of the nitride-based III-V compound semiconductor layer 14 is suppressed, and the nitride-based III-V compound semiconductor in the recess 13 is suppressed. In order to facilitate the selective growth of the layer 14, it is preferable to set it to a lower growth temperature. For example, when growth is performed at 0.92 atmospheres (700 Torr), the growth temperature is preferably set in a range of 1050 ± 50 ° C. (for example, 1050 ° C.). By doing so, the nitride III-V compound semiconductor layer 14 grows as shown in FIG. At this time, the nitride-based III-V compound semiconductor layer 14 does not start to grow from above the convex portion 12. The growth rate is generally 0.5 to 5.0 μm / h, preferably about 3.0 μm / h. When the nitride III-V compound semiconductor layer 14 is, for example, a GaN layer, the flow rate of the source gas is, for example, 20 SCCM for TMG and 20 SLM for NH ₃ . On the other hand, the growth (lateral growth) of the nitride-based III-V compound semiconductor layer 14 in the step shown in FIG. 3 is performed by setting the growth temperature higher while lowering the V / III ratio of the growth material. Specifically, when the growth of the nitride-based III-V compound semiconductor layer 14 is performed under a pressure condition of 1 atm, the V / III ratio of the growth material is in the range of 5000 ± 2000, for example, and the growth temperature is, for example, 1200. Set in the range of ± 50 ° C. Regarding the V / III ratio of the growth material, when the growth of the nitride-based III-V compound semiconductor layer 14 is performed under a pressure condition of x atmospheric pressure, the pressure is determined from Bernoulli's law that defines the relationship between the flow velocity and the pressure. It is preferable to set the V / III ratio corresponding to the square of the amount of change, specifically (5000 ± 2000) × x ² . For example, when the growth is performed at 0.92 atmospheres (700 Torr), the V / III ratio of the growth material is preferably set in the range of 4200 ± 1700 (for example, 4232). As for the growth temperature, when growth is performed under a pressure condition of 1 atm or less, the surface of the nitride III-V compound semiconductor layer 14 is prevented from being roughened, and the lateral growth is favorably performed. It is preferable to set the temperature. For example, when growth is performed at 0.92 atmospheres (700 Torr), the growth temperature is preferably set in the range of 1150 ± 50 ° C. (eg, 1110 ° C.). When the nitride-based III-V group compound semiconductor layer 14 is, for example, a GaN layer, the flow rate of the source gas is, for example, 40 SCCM for TMG and 20 SLM for NH ₃ . By doing so, the nitride III-V compound semiconductor layer 14 is laterally grown as shown in FIG.

Next, the substrate 11 on which the nitride-based III-V compound semiconductor layer is grown in this way is taken out from the MOCVD apparatus.
Next, in order to activate the p-type impurity of the p-type nitride III-V compound semiconductor layer 18, for example, a mixed gas of N ₂ and O ₂ (composition is, for example, 99% N ₂ and O ₂ In a 1% atmosphere, heat treatment is performed at a temperature of 550 to 750 ° C. (for example, 650 ° C.) or 580 to 620 ° C. (for example, 600 ° C.). Here, for example, activation is easily caused by mixing O ₂ with N ₂ . Further, for example, nitrogen halide (NF ₃ , NCl _3, etc.) is mixed in a mixed gas atmosphere of N ₂ or N ₂ and O ₂ as a raw material such as F and Cl having high electronegativity as in O and N. You may do it. The time for this heat treatment is, for example, 5 minutes to 2 hours or 40 minutes to 2 hours, generally about 10 to 60 minutes. The reason for the relatively low temperature of the heat treatment is to prevent deterioration of the active layer 17 and the like during the heat treatment. In addition, you may perform this heat processing, after forming the below-mentioned p side electrode.

  Next, by lithography on the p-type nitride III-V compound semiconductor layer 18, a portion of the nitride III-V compound semiconductor layer 14 corresponding to the recess 13, the n-type nitride III-V compound A resist pattern (not shown) having a predetermined shape having an opening corresponding to a predetermined portion including threading dislocations 19 generated in the semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 is formed. Then, etching is performed using the resist pattern as a mask until the substrate 11 is exposed, for example, by RIE. By this etching, a groove 20 is formed as shown in FIG. 4, and threading dislocations 19 in the groove 20 are removed. Thereafter, the resist pattern is removed. Next, by lithography on the p-type nitride-based III-V compound semiconductor layer 18, portions of the nitride-based III-V compound semiconductor layer 14 corresponding to the central portion of the convex portion 12, the n-type nitride-based III A resist pattern (not shown) having a portion corresponding to a predetermined portion including a threading dislocation 19 generated in the -V group compound semiconductor layer 16, the active layer 17, and the p-type nitride-based III-V group compound semiconductor layer 18. After that, the n-type nitride III-V compound semiconductor layer 16 is etched to a depth in the middle of the thickness direction by the RIE method using the resist pattern as a mask. By this etching, a groove 21 is formed, and the threading dislocation 19 in the portion of the groove 21 is removed. The order of forming the grooves 20 and 21 may be reversed.

  Next, as shown in FIG. 5, the nitride-based III-V compound semiconductor layer 14, the n-type nitride-based III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride-based III-V group compound. An elongated groove 22 is formed that extends across the substrate 11 on which the semiconductor layer 18 has been grown and extends linearly, for example, in the direction indicated by the dotted line in FIG. 16 or 17, and the protrusion 12 is exposed in the groove 22. . Specifically, the groove 22 is formed as follows, for example. That is, first, a resist pattern (not shown) having an opening corresponding to the groove 22 to be formed is formed on the p-type nitride-based III-V compound semiconductor layer 18. Next, using this resist pattern as a mask, the nitride-based III-V compound semiconductor layer 14, the n-type nitride-based III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride-based III- The V group compound semiconductor layer 18 is etched until the protrusions 12 are exposed. Thus, the groove 22 is formed. FIG. 5 shows, as an example, the extending direction of the groove 20 when the convex portion 12 has a stripe shape as shown in FIG. It is sufficient to form at least one groove 22, but a plurality of grooves 22 may be formed in parallel to each other as necessary. 6A is a cross-sectional view along a straight line (A-A line in FIG. 5) parallel to the groove 22 outside the groove 22, and FIG. 6B is along a center line (B-B line in FIG. 5) of the groove 22. All cross-sectional views are shown. In this case, the groove 22 communicates with all the grooves 20 and 21.

  Next, as shown in FIG. 7B, the extraction electrode 23 made of a metal having a smaller ionization tendency than the metal constituting the protrusion 12 is formed on the protrusion 12 exposed in the groove 22. Here, FIG. 7B shows a cross-sectional view along the center line of the groove 22 (the BB line in FIG. 5). FIG. 7A shows a cross-sectional view along a straight line (A-A line in FIG. 5) outside the groove 22 in this state and parallel to the groove 22. As an example, Cu is used as the metal constituting the convex portion 12, and Au is used as the metal constituting the extraction electrode 23. Specifically, for example, the extraction electrode 23 is formed as follows. That is, first, after forming a resist pattern (not shown) in which only a portion above the convex portion 12 exposed in the groove 22 is opened, a metal having a smaller ionization tendency than the metal constituting the convex portion 12 is vacuum deposited. After forming the entire surface by the method, this resist pattern is removed together with the metal film formed thereon. In this way, the extraction electrode 23 is formed on the convex portion 12 exposed in the groove 22. The extraction electrode 23 can be formed by, for example, a plating method.

  Next, as shown in FIG. 8, a support substrate 24 larger than the substrate 11 is attached to the surface of the substrate 11 on the extraction electrode 23 side. 9A is a cross-sectional view taken along the straight line (A-A line in FIG. 8) parallel to the groove 22 outside the groove 22, and FIG. 9B is along the center line (BB line in FIG. 8) of the groove 22. All cross-sectional views are shown. As shown in FIG. 9B, an electrode 25 made of a metal having a smaller ionization tendency than the metal constituting the convex portion 12 is formed on one main surface of the support substrate 24, and this electrode 25 is the upper surface of the extraction electrode 23. In contact with. All the extraction electrodes 23 are electrically connected to each other by this electrode 25. As an example, when Cu is used as the metal constituting the convex portion 12 and Au is used as the metal constituting the extraction electrode 23, Au is used as the metal constituting the electrode 25.

Next, as shown in FIG. 10, the entire substrate 11 and the support substrate 24 are immersed in the electrolytic solution 27 placed in the electrolytic bath 26, and the counter electrode 28 is immersed in the electrolytic solution 27. As this counter electrode 28, the thing which consists of the metal which comprises the convex part 12, and the metal whose ionization tendency is substantially equal is used. For example, when Cu is used as the metal constituting the convex portion 12, Cu is used as the metal constituting the counter electrode 28. As the electrolytic solution 27, a conventionally known one can be used, and is appropriately prepared according to the metal constituting the convex portion 12, the speed at which the convex portion 12 is electrolyzed, and the like. For example, when Cu is used as the metal constituting the convex portion 12, a copper sulfate solution is used as the electrolytic solution 27. More specifically, for example, CuSO ₄ : H ₂ SO ₄ = 1: 1 (molar ratio) (concentration of H ₂ SO ₄ solution: 1 mol / l) can be used as the electrolytic solution 27.

Then, the convex portion 12, the extraction electrode 23 and the electrode 25 are set as an anode, and the counter electrode 28 is set as a cathode, that is, a voltage is applied to the convex portion 12, the extraction electrode 23 and the electrode 25 so that the counter electrode 28 has a negative potential. The part 12 is electrolyzed and removed. When the convex portion 12 is removed in this manner, as shown in FIG. 11, the substrate 11 becomes a nitride III-V compound semiconductor layer 14, an n-type nitride III-V compound semiconductor layer 16, an active layer 17, and The p-type nitride III-V compound semiconductor layer 18 is peeled off. The DC voltage applied to the anode with respect to the cathode during the electrolysis is appropriately selected according to the speed at which the convex portion 12 is electrolyzed, and is about 0.3 V, for example. In addition, the density of the direct current that flows through the anode during the electrolysis is appropriately selected according to the speed of electrolysis of the convex portion 12. For example, the convex portion 12 is set to about 0.1 mA / cm ^2. Can be electrolyzed.

As a result of the substrate 11 being peeled off, a nitride-based III-V compound semiconductor layer that forms a light-emitting diode structure is formed on the support substrate 24 as shown in FIG. FIG. 13A is a cross-sectional view taken along the straight line (line BB in FIG. 12) parallel to the groove 22 outside the groove 22, and FIG. 13B is along the center line (line AA in FIG. All cross-sectional views are shown.
Thereafter, the extraction electrode 23 in the groove 22 is removed as necessary.

Next, as shown in FIG. 14, the inside of the groove 20 is filled with a dielectric 29 to flatten the surface, and then an n-side electrode 30 is formed on the back surface of the nitride-based III-V compound semiconductor layer 14. The dielectric 29 includes a nitride III-V compound semiconductor layer 14, an n-type nitride III-V compound semiconductor layer 16, an active layer 17, and a p-type nitride III-V compound semiconductor layer 18. A material having a refractive index smaller than the refractive index of the active layer 17 and transparent to light having an emission wavelength from the active layer 17 is used. Specifically, for example, SiO ₂ is used.
Next, after attaching the surface on the n-side electrode 30 side to another support substrate (not shown), the support substrate 24 is peeled off together with the electrode 25.
Next, as shown in FIG. 15, the inside of the groove 21 is filled with a dielectric 31 to planarize the surface, and then a p-side electrode 32 is formed on the p-type nitride-based III-V compound semiconductor layer 18. .

Here, by using the p-side electrode 32 and the n-side electrode 30 as highly reflective electrodes or transparent electrodes, the light extraction direction can be selected. When the p-side electrode 32 is a highly reflective electrode, it is preferable to use an ohmic metal having high reflectivity such as Ag or an Ag alloy containing Ag as a main component.
Thus, the intended vertical current injection type light emitting diode is manufactured.

A specific structural example of the light emitting diode will be described. That is, for example, the n-type nitride-based III-V compound semiconductor layer 14 is in order from the bottom, the n-type GaN layer and the n-type GaInN layer, and the p-type nitride-based III-V group compound semiconductor layer 18 is in order from the bottom. A p-type AlInN layer, a p-type GaN layer, and a p-type GaInN layer. The active layer 17 has, for example, a GaInN-based multiple quantum well (MQW) structure (for example, one in which GaInN quantum well layers and GaN barrier layers are alternately stacked), and the In composition of the active layer 17 is the light emission of the light emitting diode. It is selected according to the wavelength. For example, it is ˜11% at an emission wavelength of 405 nm, ˜18% at 450 nm, and ˜24% at 520 nm. As the material of the p-side electrode 32, for example, Ag, Pd / Ag, or the like is used, or a barrier metal made of Ti, W, Cr, WN, CrN, or the like is used in addition to this, if necessary. As the n-side electrode 30, for example, a Ti / Pt / Au structure is used.
In the light-emitting diode thus obtained, light is emitted by applying a forward voltage between the p-side electrode 32 and the n-side electrode 30 to flow current, and light is extracted outside. By selecting the In composition of the active layer 17, red to ultraviolet light emission, particularly blue light emission, green light emission, or red light emission can be obtained.

  As described above, according to the first embodiment, the nitride III-V compound semiconductor layer forming the light emitting diode structure grown on the substrate 11 can be formed without using an expensive and large-scale apparatus. Moreover, since these nitride-based III-V compound semiconductor layers can be easily separated from the substrate 11 with little physical damage, the gap between the p-side electrode 32 and the n-side electrode 30 facing each other can be reduced. It is possible to manufacture a vertical current injection type light emitting diode that allows current to flow through at low cost. Further, since the substrate 11 can be recycled through surface treatment such as surface polishing as necessary, resources can be effectively used and the manufacturing cost of the light emitting diode can be reduced.

Further, the threading dislocations in the nitride-based III-V compound semiconductor layer 14 are concentrated in the vicinity of the central portion of the convex portion 12 of the substrate 11, and the dislocation density in other portions is, for example, about 6 × 10 ⁷ / cm ² . Since it is greatly reduced as compared with the case of using a concavo-convex processed substrate, a nitride III-V compound semiconductor layer such as a nitride III-V compound semiconductor layer 14 and an active layer 17 grown thereon is provided. The crystallinity of this material is greatly improved, and the non-luminescent center and the like are also greatly reduced. Further, threading dislocations generated in the nitride III-V compound semiconductor layer 14, the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18. 19 is removed by forming the grooves 20 and 21, the threading dislocation 19 in the removed portion and the non-luminescent center that is concentrated in the vicinity thereof can be removed. For this reason, a significant reduction in non-radiative recombination can be achieved. As a result, a nitride III-V compound semiconductor light emitting diode with extremely high luminous efficiency can be obtained.

  In addition, the epitaxial growth necessary for manufacturing the nitride-based III-V compound semiconductor light-emitting diode is only required once, and not only a growth mask is not required, but also the protrusion 12 on the substrate 11 is formed on the substrate 11. Since a film that becomes the material of the convex portion 12 is formed on the substrate and this is processed only by etching, powder blasting method, sand blasting method, etc., processing of the substrate 11 such as a sapphire substrate, which is difficult to process unevenness, is possible. Since it is unnecessary, the manufacturing process is simple, and a nitride III-V compound semiconductor light emitting diode can be manufactured at low cost.

Next explained is the second embodiment of the invention.
In the second embodiment, as shown in FIG. 21, in the step shown in FIG. 4 of the first embodiment, a portion of the nitride-based III-V compound semiconductor layer corresponding to the central portion of the convex portion 12 14 until a predetermined portion including the threading dislocation 19 generated in the n-type nitride III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 is exposed. The groove 21 is formed by etching, and the side surface of the convex portion 12 is exposed in the groove 21.

Thereafter, the process proceeds in the same manner as in the first embodiment. As shown in FIG. 22, the entire substrate 11 and the support electrode 24 are immersed in an electrolytic solution 27 placed in the electrolytic cell 26 and electrolysis is performed. The counter electrode 28 is immersed in the liquid 27, and the convex portion 12 is electrolyzed and removed. In this way, the substrate 11 is peeled off. In this case, since the convex portion 12 is exposed not only in the grooves 20 and 22 but also in the groove 21, the electrolytic solution contacts the convex portion 12 in these grooves 20 to 22. The contact area of the electrolytic solution with respect to the convex portion 12 is increased, whereby the convex portion 12 can be easily removed by electrolysis, and the convex portion 12 can be removed in a shorter time.
Thereafter, the process proceeds in the same manner as in the first embodiment to manufacture a target light emitting diode.
According to the second embodiment, in addition to the same advantages as those of the first embodiment, the substrate 11 can be peeled off in a shorter time, so that the light emitting diode can be manufactured in a shorter time. The advantage that it can be obtained.

Next explained is the third embodiment of the invention.
In the third embodiment, as shown in FIG. 23, when forming the groove 22 in the step shown in FIGS. 5 and 6 of the first embodiment, the n-type nitride III-V compound semiconductor is formed. Etching is performed to a depth in the middle of the thickness direction of the layer 16 to form a groove 22, and the n-type nitride III-V group compound semiconductor layer 16 is exposed in the groove 22.
Next, as shown in FIG. 24, an extraction electrode 23 is formed on the n-type nitride-based III-V compound semiconductor layer 16 exposed in the groove 22. The extraction electrode 23 is electrically connected to the convex portion 12 through the n-type nitride-based III-V group compound semiconductor layer 16.
Thereafter, the process proceeds in the same manner as in the first embodiment. As shown in FIG. 25, the entire substrate 11 and the support electrode 24 are immersed in the electrolytic solution 27 placed in the electrolytic cell 26, and electrolysis is performed. The counter electrode 28 is immersed in the liquid 27, and the convex portion 12 is electrolyzed and removed. In this way, the substrate 11 is peeled off.
Thereafter, the process proceeds in the same manner as in the first embodiment to manufacture a target light emitting diode.
According to the third embodiment, the same advantages as those of the first embodiment can be obtained.

Next explained is the fourth embodiment of the invention.
In the second embodiment, when the groove 21 is formed in the third embodiment, a portion of the nitride-based III-V compound semiconductor layer 14 corresponding to the central portion of the convex portion 12 and the n-type nitride are formed. A predetermined portion including threading dislocations 19 generated in the III-V compound semiconductor layer 16, the active layer 17, and the p-type nitride III-V compound semiconductor layer 18 is etched until the substrate 11 is exposed to form the groove 21. The side surface of the convex portion 12 is exposed in the groove 21.
Thereafter, the process proceeds in the same manner as in the first embodiment, and as shown in FIG. 26, the entire substrate 11 and the support electrode 24 are immersed in an electrolytic solution 27 placed in the electrolytic cell 26, and electrolysis is performed. The counter electrode 28 is immersed in the liquid 27, and the convex portion 12 is electrolyzed and removed. In this way, the substrate 11 is peeled off. In this case, since the convex portion 12 is exposed not only in the grooves 20 and 22 but also in the groove 21, the electrolytic solution contacts the convex portion 12 in these grooves 20 to 22. The contact area of the electrolytic solution with respect to the convex portion 12 is increased, whereby the convex portion 12 can be easily removed by electrolysis, and the convex portion 12 can be removed in a shorter time.
Thereafter, the process proceeds in the same manner as in the first embodiment to manufacture a target light emitting diode.
According to the fourth embodiment, in addition to the same advantages as those of the first embodiment, the substrate 11 can be peeled in a shorter time, so that the light emitting diode can be manufactured in a shorter time. The advantage that it can be obtained.

Next explained is the fifth embodiment of the invention.
In the fifth embodiment, in addition to the blue light emitting diode and the green light emitting diode obtained by any one of the first to fourth embodiments, a separately prepared red light emitting diode (for example, an AlGaInP system). A case of manufacturing a light emitting diode backlight using a light emitting diode) will be described.
A blue light emitting diode is obtained in the form of a flip chip according to any of the first to fourth embodiments. Similarly, a green light emitting diode is obtained in the form of a flip chip. On the other hand, as a red light emitting diode, an AlGaInP light emitting diode is formed by stacking an AlGaInP semiconductor layer on an n-type GaAs substrate to form a diode structure and forming a p-side electrode thereon. It shall be used in the form.

As shown in FIG. 27, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 as described above are formed as one unit (cell) on the wiring board 61. Are arranged in a predetermined pattern as necessary. Next, after potting the transparent resin so as to cover this one unit, the transparent resin is cured. By this curing process, the transparent resin is solidified and is slightly reduced accordingly. In this way, as shown in FIG. 28, the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 as a unit are sealed with the transparent resin 68 to form a wiring board 61. A light-emitting diode backlight arranged in an array is obtained.
This light emitting diode backlight is suitable for use in a backlight of a liquid crystal panel, for example.

Next, a sixth embodiment of the present invention will be described.
In the sixth embodiment, as in the fifth embodiment, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 are arranged on a wiring board 61 in a predetermined manner. After arranging a necessary number of patterns, as shown in FIG. 29, potting of a transparent resin 69 suitable for the light emitting diode chip 63 is performed so as to cover the red light emitting diode chip 63, and a green light emitting diode chip 64 is formed. The transparent resin 70 suitable for the light emitting diode chip 64 is potted so as to cover the light emitting diode chip 64, and the transparent resin 71 suitable for the light emitting diode chip 65 is potted so as to cover the blue light emitting diode chip 65. Thereafter, the curing treatment of the transparent resins 69 to 71 is performed. By this curing process, the transparent resins 69 to 71 are solidified and are slightly reduced accordingly. In this way, a light emitting diode backlight in which the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 as a unit are arranged in an array on the wiring board 61 is obtained. .
This light emitting diode backlight is suitable for use in a backlight of a liquid crystal panel, for example.

Next explained is the seventh embodiment of the invention.
In the seventh embodiment, in addition to the blue light emitting diode and the green light emitting diode obtained by any of the first to fourth embodiments, a light emitting cell using a separately prepared red light emitting diode is used. The case where a unit is manufactured will be described.
As shown in FIG. 30A, in the seventh embodiment, as in the fifth embodiment, a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65 are provided. A required number of cells 75 each including at least one and arranged in a predetermined pattern are arranged on the printed wiring board 76 in a predetermined pattern. In this example, each cell 75 includes a red light emitting diode chip 63, a green light emitting diode chip 64, and a blue light emitting diode chip 65, which are arranged at the apexes of an equilateral triangle. FIG. 30B shows the cell 75 in an enlarged manner. The interval a between the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 in each cell 75 is, for example, 4 mm, but is not limited thereto. The interval b of the cells 75 is, for example, 30 mm, but is not limited to this. As the printed wiring board 76, for example, an FR4 (abbreviation of Flame Retardant Type 4) board, a metal core board, a flexible wiring board, or the like can be used, but any other printed wiring board having heat dissipation can be used. However, it is not limited to these. As in the fifth embodiment, potting of the transparent resin 68 is performed so as to cover each cell 76, or, as in the fifth embodiment, the transparent resin 68 is covered so as to cover the red light emitting diode chip 63. 69, potting of the transparent resin 70 is performed so as to cover the green light emitting diode chip 64, and potting of the transparent resin 71 is performed so as to cover the blue light emitting diode chip 65. In this way, a light source cell unit is obtained in which the cells 75 including the red light emitting diode chip 63, the green light emitting diode chip 64, and the blue light emitting diode chip 65 are arranged on the printed wiring board 76.

Although the specific example of arrangement | positioning of the cell 75 on the printed wiring board 76 is shown in FIG.31 and FIG.32, it is not limited to these. In the example shown in FIG. 31, the cells 75 are arranged in a 4 × 3 two-dimensional array, and in the example shown in FIG. 32, the cells 75 are arranged in a 6 × 2 two-dimensional array.
FIG. 33 shows another configuration example of the cell 75. In this example, the cell 75 includes one red light emitting diode chip 63, two green light emitting diode chips 64, and one blue light emitting diode chip 65, which are arranged at the apex of a square, for example. Has been. Two green light emitting diode chips 64 are arranged at the apexes of both ends of one diagonal of the square, and a red light emitting diode chip 63 and a blue light emitting diode chip 65 are arranged at both ends of the other diagonal of the square. It is placed at the vertex.
By arranging one or a plurality of the light source cell units, a light emitting diode backlight suitable for use in a backlight of a liquid crystal panel, for example, can be obtained.

As mentioned above, although embodiment of this invention was described concretely, this invention is not limited to the above-mentioned embodiment, The various deformation | transformation based on the technical idea of this invention is possible.
For example, the numerical values, materials, structures, shapes, substrates, raw materials, processes, orientations of the convex portions 12 and the concave portions 13 and the like given in the first to seventh embodiments are merely examples, and if necessary, Different numerical values, materials, structures, shapes, substrates, raw materials, processes, orientations of the convex portions 12 and the concave portions 13 may be used.

It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a top view for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a top view which shows the example of the planar shape of the convex part formed on a board | substrate in the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a top view which shows the example of the planar shape of the convex part formed on a board | substrate in the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a basic diagram which shows the example of distribution of the threading dislocation of the nitride type III-V compound semiconductor layer grown on the board | substrate in the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a basic diagram which shows the example of distribution of the threading dislocation of the nitride type III-V compound semiconductor layer grown on the board | substrate in the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is a basic diagram which shows the uneven substrate used in the manufacturing method of the light emitting diode by 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 3rd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode by 4th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing method of the light emitting diode backlight by 5th Embodiment of this invention. It is a perspective view for demonstrating the manufacturing method of the light emitting diode backlight by 5th Embodiment of this invention. It is a perspective view for demonstrating the manufacturing method of the light emitting diode backlight by 6th Embodiment of this invention. It is the top view which shows the light source cell unit by 7th Embodiment of this invention, and the enlarged view of the cell of this light source cell unit. It is a top view which shows one specific example of the light source cell unit by 7th Embodiment of this invention. It is a top view which shows the other specific example of the light source cell unit by 7th Embodiment of this invention. It is a top view which shows the other structural example of the cell of the light source cell unit by 7th Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Board | substrate, 12 ... Convex part, 13 ... Recessed part, 14 ... Nitride type III-V group compound semiconductor layer, 15 ... Dislocation, 16 ... N type nitride type III-V group compound semiconductor layer, 17 ... Active layer, 18 ... p-type nitride III-V compound semiconductor layer, 19 ... threading dislocation, 20-22 ... groove, 23 ... extraction electrode, 24 ... support substrate, 25 ... electrode, 26 ... electrolyzer, 27 ... electrolyte, 63-65 ... Light emitting diode chip, 68-71 ... Transparent resin, 75 ... Cell, 76 ... Printed wiring board

Claims (9)

A substrate having a plurality of convex portions on one main surface, the convex portions having at least a surface made of the first metal, and having a triangular cross-sectional shape with the bottom surface as the bottom of the concave portion of the substrate. Growing a first nitride-based III-V compound semiconductor layer through a state;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
On the second nitride III-V compound semiconductor layer, the third conductivity type third nitride III-V compound semiconductor layer, the active layer, and the second conductivity type fourth nitride. Sequentially growing a III-V compound semiconductor layer,
The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above Of the fourth nitride-based III-V compound semiconductor layer, a portion corresponding to the concave portion is formed in the depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer. Forming a first groove by removing until a portion is exposed;
Forming a second groove so that a part of the convex portion, the third nitride-based III-V compound semiconductor layer, or the second nitride-based III-V compound semiconductor layer is exposed; ,
The at least part of the protrusion exposed in the second groove, the third nitride III-V compound semiconductor layer, or the second nitride III-V compound semiconductor layer Forming an extraction electrode made of a second metal having a smaller ionization tendency than the first metal;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. From the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer. A method for producing a light-emitting diode, comprising: a step of peeling.   2. The method of manufacturing a light emitting diode according to claim 1, wherein the second groove is formed so as to cross the substrate and intersect the first groove.   The method of manufacturing a light emitting diode according to claim 2, further comprising a step of attaching a support substrate to a surface of the substrate on the side of the extraction electrode.   The first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the above A portion of the fourth nitride III-V compound semiconductor layer corresponding to the recess is exposed in the depth direction from the surface of the fourth nitride III-V compound semiconductor layer. 4. The method of manufacturing a light emitting diode according to claim 3, wherein the first groove is formed by removing until a part of the convex portion is exposed.   Of the second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, and the fourth nitride III-V compound semiconductor layer At least the third nitride III-V in the depth direction from the surface of the fourth nitride III-V compound semiconductor layer. 5. The method of manufacturing a light emitting diode according to claim 4, further comprising a step of forming a third groove by removing the group compound semiconductor layer until it is exposed.   The second nitride III-V compound semiconductor layer, the third nitride III-V compound semiconductor layer, the active layer, the fourth nitride III-V compound semiconductor layer, and the above A portion corresponding to a central portion between the concave portions adjacent to each other among the convex portions is removed in the depth direction from the surface of the fourth nitride-based III-V compound semiconductor layer until the substrate is exposed. 6. The method of manufacturing a light emitting diode according to claim 5, wherein the third groove is formed. A substrate having a plurality of convex portions on one main surface, the convex portions having at least a surface made of the first metal, and having a triangular cross-sectional shape with the bottom surface as the bottom of the concave portion of the substrate. Growing a first nitride-based III-V compound semiconductor layer through a state;
Laterally growing a second nitride III-V compound semiconductor layer on the substrate from the first nitride III-V compound semiconductor layer;
The fifth nitride-based III-V compound semiconductor layer includes an element structure formed on the second nitride-based III-V compound semiconductor layer and includes at least one conductive nitride-based III-V compound semiconductor layer electrically connected to the protrusion. Growing a nitride III-V compound semiconductor layer of
In the recess of the first nitride III-V compound semiconductor layer, the second nitride III-V compound semiconductor layer, and the fifth nitride III-V compound semiconductor layer. Forming a first groove by removing a corresponding portion in a depth direction from the surface of the fifth nitride-based III-V compound semiconductor layer until a part of the convex portion is exposed; and ,
Forming a second groove so that a part of the convex portion or the conductive nitride-based III-V compound semiconductor layer is exposed;
From the second metal having a smaller ionization tendency than the first metal on the convex portion exposed in the second groove or at least part of the conductive nitride-based III-V compound semiconductor layer Forming an extraction electrode,
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. Separating the second nitride-based III-V compound semiconductor layer and the fifth nitride-based III-V compound semiconductor layer. A substrate having a plurality of convex portions on one main surface, the convex portions having at least a surface made of the first metal, and having a triangular cross-sectional shape with the bottom surface as the bottom of the concave portion of the substrate. Growing a first layer through a state;
Laterally growing a second layer on the substrate from the first layer;
Growing a third layer including at least one conductive layer electrically connected to the protrusion on the second layer;
Of the first layer, the second layer, and the third layer, the portion corresponding to the concave portion is formed in the depth direction from the surface of the third layer, with the convex portion or the conductive layer. Forming a first groove by removing until a part of is exposed;
Forming a second groove so that a part of the convex portion or the conductive layer is exposed;
Forming a lead electrode made of a second metal having a smaller ionization tendency than the first metal on at least a part of the convex portion or the conductive layer exposed in the second groove;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. A method for producing a functional element, comprising: separating the layer from the second layer and the third layer. A substrate having a plurality of convex portions on one main surface, the convex portions using at least a surface made of a first metal, and including at least one conductive layer electrically connected to the convex portions on the substrate. Growing a fourth layer;
The portion corresponding to the concave portion of the fourth layer is removed from the surface of the fourth layer in the depth direction until the convex portion or a part of the conductive layer is exposed. Forming a groove of 1;
Forming a second groove so that a part of the convex portion or the conductive layer is exposed;
Forming a lead electrode made of a second metal having a smaller ionization tendency than the first metal on at least a part of the convex portion or the conductive layer exposed in the second groove;
The substrate is obtained by electrolyzing and removing at least a part of the convex portion in the electrolytic solution using the convex portion and the extraction electrode as an anode, and a counter electrode made of a metal having a substantially same ionization tendency as the first metal as a cathode. A method for producing a functional element, comprising the step of:

Images