JP4882234B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device such as a large capacity IGBT (Insulated Gate Bipolar Transistor) module and a method for manufacturing the same.

In recent years, in a power semiconductor element such as a large-capacity IGBT module, in order to improve reliability, the junction temperature of the element is reduced and the current density of the external lead-out wiring is reduced. In order to reduce the junction temperature of this element and the current density of the external lead-out wiring, the lead-out plate is used as the wiring instead of the aluminum lead wiring, and the IGBT chip and the conductive plate have a thickness of 100 μm or more. An IGBT module in which heat dissipation efficiency is improved by joining with solder is disclosed (Patent Document 1). The IGBT module thus wired with the conductive plate will be described.
FIG. 8 shows an IGBT module wired with a conductive plate, where FIG. 8A is a cross-sectional view of the main part, FIG. 8B is a plan view of the conductive plate and the semiconductor chip of FIG. ) Is an enlarged cross-sectional view of a portion A in FIG. 10A, and is a cross-sectional view taken along the line XX in FIG.
The cooling plate 57 (heat sink) and the insulating metal substrate 53 whose surface of the insulating substrate 69 is selectively covered with the conductive film 70 are fixed with solder (not shown), and the insulating metal substrate 53 and the semiconductor chip 51 are fixed with the solder 55. The emitter electrode pad 65 which is a bonding pad of the emitter electrode on the semiconductor chip 51 and the conductive plate 52 (plate formed of a conductor: lead frame) are fixed with cream solder 54.

Further, the end portion of the conductive plate 52 and the first bonding pad 67 of the insulating metal substrate 53 are fixed by the solder 56. By connecting the first bonding pad 67 and the external lead-out terminal 59 with the bonding wire 61, the emitter electrode pad 65 of the semiconductor chip 51 and the external lead-out terminal 59 are electrically connected. Further, the gate electrode pad 66 and the external lead-out terminal 60 are connected by a bonding wire (not shown).
The resin-molded case 58 to which the external lead-out terminals 59 and 60 are fixed is bonded to the cooling body 57. The space surrounded by the case 58 and the cooling conductor 57 is filled with gel 62 (silicone gel or the like) for the purpose of protecting the semiconductor chip 51, the conductive plate 52, the insulating metal substrate 53, the bonding wire 61, and the like from moisture, moisture, and dust. Has been.
In this way, the solder electrode 54 on the surface of the semiconductor chip 51 is not wire-bonded, but cream solder 54 (so-called solder paste) is printed, and the conductive plate 52 with high thermal conductivity and large area is reflow-soldered. By electrically wiring, the heat generated in the semiconductor chip 51 can be dissipated not only to the insulating metal substrate 53 side but also to the conductive plate 52 side, and the junction temperature Tj of the semiconductor chip 51 can be set to a guaranteed temperature. It can be suppressed to 150 ° C. (in the case of silicon) or lower.

In addition, although not shown, in a flat IGBT having a pressure contact structure that does not use solder, the first emitter electrode divided by the gate liner is bridged by the second emitter electrode, so that the divided first emitter electrode is obtained. Is integrated with the emitter electrode of the second layer, and even when the whole surface of the IGBT chip is not pressurized by one-pressing, the whole surface of the IGBT can be operated uniformly by the presence of the second layer of the emitter chip. (Patent Document 2).
JP 2001-332664 A JP 2004-221269 A

In the structure of FIG. 8, since the conductive plate 52 and the emitter electrode pad 65 are connected by the four solders 54, the heat generated in the semiconductor chip 51 is radiated to the conductive plate 52 through the four solders 54. . However, since the thermal connection between the conductive plate 52 and the emitter electrode is limited to the joint portion by the solder 54, the heat dissipation efficiency is not always good.
In order to improve this, even if the entire surface of the emitter electrode pad 65 is fixed to the conductive plate 52 with solder, a protective film is formed on the emitter electrode pad 65 where the solder 54 is not attached in the structure of FIG. Covered and solder does not stick.
Further, as shown in FIG. 9, in the structure in which the emitter electrode 82 is divided by the gate liner 84 and this gate liner 84 is covered with a protective film such as a polyimide film 87, the solder wet spread covers the gate liner 84. 9B, the polyimide film 87 does not spread over the polyimide film 87, and a cavity 90 surrounded by the conductive plate 86, the polyimide film 87, and the solder layer 89 is generated. Therefore, since the heat generated in the IGBT chip 81 has the cavity 90 on the gate liner 84, it is not radiated from the gate liner 84 to the conductive plate 86, so that the thermal resistance increases and it is difficult to increase the heat radiation efficiency. Become. In addition, the electrical resistance of the wiring junction between the solder layer 89 and the conductive plate 86 is increased. If the heat dissipation efficiency is low and the electrical resistance is large, the temperature of the wiring junction will rise, causing cracks in the wiring junction and making it difficult to ensure high reliability.

  The object of the present invention is to solve the above-mentioned problems, cover the entire surface of the main electrode with a uniform solder solid film layer, reduce the thermal resistance of the wiring joint by solder, improve the heat dissipation efficiency, The object is to provide a highly reliable semiconductor device.

To achieve the above object, a semiconductor substrate, a main electrode formed on the main surface of the semiconductor substrate, an insulating film covering the main electrode and having a plurality of openings, and solder wettability Good metal foil or grid-like metal foil or metal core solder ball with good solder wettability, including a conductor disposed on the insulating film, a conductive plate facing the plurality of main electrodes, and the conductor And a solder that joins the conductive plate to the main electrode.
Also, a semiconductor substrate, a plurality of main electrodes formed on the main surface of the semiconductor substrate and divided by a control wiring connected to the control electrode, an insulating film covering the control wiring, and good solder wettability A metal foil or a grid-like metal foil or metal core solder ball having good solder wettability, including a conductor disposed on the insulating film, a conductive plate facing the plurality of main electrodes, and the conductor And a solder for joining the conductive plate to the main electrode .
The solder may be cream solder or plate solder.
The insulating film may be a polyimide film or a nitride film.

The material of the surface layer of the metal foil, Cu, Au, may be either and Ni.
The control wiring is preferably a gate liner.
Also, a support substrate, a semiconductor substrate to which the support substrate and one main surface are fixed, and a plurality of main electrodes formed on the other main surface of the semiconductor substrate and divided by a control wiring connected to the control electrode A semiconductor device comprising: an insulating film that covers the control wiring; a conductive plate that faces the plurality of main electrodes; and a solder that includes the conductor and joins the conductive plate to the plurality of main electrodes. In the manufacturing method of
Forming a preliminary solder on the main electrode higher than the surface height of the insulating film; arranging a solder ball on the insulating film; arranging the conductive plate on the preliminary solder and the solder ball; A manufacturing method includes a step of melting preliminary solder and solder balls through a furnace, and a step of cooling and solidifying the molten solder by heating.

The solder ball may be a solder-only ball or a metal core solder ball in which a solder layer is formed around a metal ball.
The material of the surface layer of the metal sphere may be any one of Cu, Au, and Ni.

  According to the present invention, the solder bonding layer is divided at the divided portion by covering the portion (gate liner) where the main electrode on the surface side of the semiconductor element is divided into a plurality of regions with the conductive film having good solder wettability. Thus, it is possible to provide a semiconductor device that can prevent heat generation, improve heat dissipation efficiency, reduce electrical resistance of a wiring joint portion by solder, and ensure high reliability.

  In the IGBT chip in which the emitter electrode is divided by a gate liner, a plurality of divided emitter electrodes are bridged by a solder solid film layer, and a conductive plate as an external lead-out wiring is formed on the solder solid film layer. An object of the present invention is to provide a semiconductor device in which the heat dissipation efficiency is improved by fixing and the reliability of the wiring joint portion is increased.

1A and 1B are main part configuration diagrams of a semiconductor device according to a first embodiment of the present invention. FIG. 1A is a plan view of the main part, and FIG. 1B is an XX line of FIG. Sectional drawing which cut | disconnected principal part and the figure (c) are principal part perspective views of the metal foil of the figure (b). Here, for example, an IGBT module is used as the semiconductor device. FIG. 1A is a plan view of an IGBT chip constituting the IGBT module, and a dotted line is a plan view of a conductive plate. Reference numeral 5 in the figure denotes a breakdown voltage structure.
The emitter electrode 2 of the IGBT chip 1 is formed with, for example, an electroless Ni (nickel) / Au (gold) plating film (a Ni film is an underlayer and an Au film is an upper layer) to enable solder bonding. . The collector electrode formed on the main surface opposite to the emitter electrode is not shown. The reason why the electroless Ni / Au plating film is used here is that the manufacturing cost can be reduced as compared with the case where it is formed by the CVD (Chemical Vapor Deposition) method. The emitter electrode 2 is divided into, for example, three parts by a gate liner 4 having a width of about 500 μm connected to the gate pad 3. In order to protect the gate liner 4, a polyimide film 7 is formed on the surface of the gate liner with a thickness of about 20 μm. Here, a metal foil 8 having a thickness of about 100 μm is covered on the polyimide film 7 covering the gate liner 4 with Cu, Au or the like having good solder wettability. On top of that, solder (cream solder or plate solder) is placed, and further a conductive plate 6 is placed. The solder is melted and solidified in a reflow furnace, and the solder is divided through the metal foil 7. It is possible to spread to the adjacent molten solder, and the molten solder is not divided by the polyimide film 7 covering the gate liner, and the uniform solder solid film layer 9 is formed with a thickness of about 150 μm. Can be formed. Even if the polyimide film 7 is replaced with a nitride film of about 0.5 μm to 1 μm, the solid solder film layer 9 can be similarly formed. The nitride film can be formed by a CVD method or the like. Further, since the thermal conductivity is higher than that of polyimide, the thermal bonding between the IGBT chip and the conductive plate 6 is excellent, which is advantageous for heat radiation from the emitter electrode side of the IGBT.

The metal foil 8 may be formed in a U shape as shown in FIG. 1C and placed on the polyimide film 7 covering the gate liner 4 by using a robot with a pattern recognition function. Further, although not shown, a frame may be formed and a portion other than the portion disposed on the gate liner 4 may be covered with a film having poor solder wettability, and the frame may be disposed on the gate liner 4. In the case of this method, the frame may be formed of a wire instead of a metal foil. In this case, the surface of the wire not disposed on the gate liner 4 is covered with an insulating film such as polyimide having poor solder wettability.
By forming the solder solid film layer 9 in this way, the conductive plate 6 and the emitter electrode 2 are bonded via the solder solid film layer 9, and the thermal resistance of the wiring bonding portion by solder can be lowered. Temperature rise at the part can be suppressed. As a result, it is possible to provide an IGBT module that has high heat dissipation efficiency and can ensure high reliability with no occurrence of cracks in the wiring joint.

  Even when the emitter electrode 2 is not divided as shown in FIG. 2, this embodiment is used when a plurality of openings 11 are formed in the polyimide film 10 as a protective film formed on the emitter electrode 2. Is applicable. That is, in an IGBT with a relatively small chip size manufactured by connecting a plurality of locations of the emitter electrode 2 with bonding wires, the IGBT chip 1a is left as it is, and only the bonding wire is replaced with a conductive plate. This is a case where the entire surface of the emitter electrode is fixed with a uniform solder solid film layer.

3A and 3B are main part configuration diagrams of a semiconductor device according to a second embodiment of the present invention, in which FIG. 3A is a plan view of the main part, and FIG. 3B is an XX line in FIG. It is the principal part sectional drawing cut | disconnected. This figure is a configuration diagram of an IGBT chip in the same manner as described above.
As shown in FIG. 1, the metal foil 8 is not disposed on the gate liner 4, but a grid (mesh) metal foil 12 having an opening of 50 μm □ to 300 μm □ and a wire diameter of about 100 μmφ is disposed on the emitter electrode 2. By placing the solder on the gate liner 4 and placing the solder on the gate liner 4, the molten solder 12 can be spread evenly on the emitter electrode 2 and the gate liner 4 through the grid-like metal foil 12. The solder solid film layer 9 can be formed without the solder on the emitter electrode 2 being divided by the gate liner 4 after reflow. In this case, the same effect as in FIG. 1 can be obtained.

FIG. 4 is a cross-sectional view of the main part of the semiconductor device according to the third embodiment of the present invention. This figure is a cross-sectional view corresponding to FIG.
This is an embodiment in which metal core solder balls 13 are arranged on the gate liner 4. In this embodiment, first, only the solder is placed on the emitter electrode 2 of the IGBT chip 1 as the preliminary solder 9a and is passed through a reflow furnace. Here, the amount of solder is controlled so that the thickness of the solder layer becomes thicker than that of the polyimide film 7. In this state, in the preliminary solder 9a, the solder is inhibited from spreading by the polyimide film 7 covering the gate liner, and is divided by the polyimide film 7. Here, the metal core solder balls 13 are disposed on the polyimide film 7 covering the gate liner 4 where the solder is divided, and are passed again through a reflow furnace (a lead frame and the like are also disposed in an actual process). As a result, the preliminary solder 9a divided by the polyimide film 7 covering the gate liner wets and spreads through the metal core solder balls 13, and the melted solder is not divided by the polyimide film 7 but on the emitter electrode 2. A uniform solder solid film layer 9 can be formed on the gate liner 4. Since heat is conducted to the metal core solder ball 13 through the conductive plate 6, the conductive plate 6 and the molten metal core solder ball 13 come into contact with each other, and the solder solid film layer 9 is formed on the conductive plate 6. The In this case, the polyimide film 7 is directly covered with solder. In this case, the same effect as in FIG. 1 can be obtained. The metal core solder ball 13 is formed by coating a solder film 15 around a metal sphere 14, and the metal sphere 14 is a thin layer in which an Au film is formed on a surface of Cu sphere or Cu sphere on a Ni film. Metal spheres or Ni spheres coated with (Ni / Au film).

  FIG. 5 is a sectional view showing the principal part of a semiconductor device according to the fourth embodiment of the present invention. The difference from FIG. 4 is that the metal core solder ball 13 is changed to a solder ball 16 having no metal core. In this case, the same effect as in FIG. 4 can be obtained.

FIG. 6 is a cross-sectional view of the principal part of the semiconductor device according to the fifth embodiment of the present invention. This figure is a cross-sectional view corresponding to FIG.
This is because an Al (aluminum) / Ni (nickel) / Au (gold) film 17 is formed on the emitter electrode 2 and the polyimide film 7 covering the gate liner 4 after the polyimide film 7 covering the gate liner 4 is formed. (The lowermost layer is an Al film, the middle layer is a Ni film, and the uppermost layer is an Au film) is formed by vapor deposition or CVD. Next, the solder and the conductive plate 6 are arranged on the Al / Ni / Au film, and the solder is melted and solidified through a reflow furnace, so that the conductive plate 6 and the Al / Ni / Au film 17 are formed by the solder solid film layer 9. Stick. Since the Al / Ni / Au film 17 is also formed on the polyimide film 7 covering the gate liner 4, the molten solder forms a uniform solder solid film layer 9 without being divided by the gate liner 4. be able to. In this case, the same effect as in FIG. 1 can be obtained.

  Although an Ni / Au film may be formed without an Al film on the polyimide film 7 and the emitter electrode 2, the adhesion with the polyimide film 7 is not as good as that of the Al / Ni / Au film 17. Of course, the Al / Ni / Au film 17 may be formed only on the polyimide film 7 without being formed on the emitter electrode 2.

FIG. 7 is a view showing a method of manufacturing a semiconductor device according to a sixth embodiment of the present invention, and FIGS. 7A to 7C are cross-sectional views showing main part manufacturing steps shown in the order of steps. This is a method of manufacturing the semiconductor device of FIG.
Only solder is placed on the emitter electrode 2 of the IGBT chip 1 and preliminary solder 9a is performed through a reflow furnace. In the preliminary solder 9 a, the solder is prevented from spreading by the polyimide film 7 that covers the gate liner 4, and is divided by the polyimide film 7 that covers the gate liner 4, and the solder is fixed only on the divided emitter electrode 2. Here, the amount of solder is controlled so that the thickness of the solder layer is thicker than that of the polyimide film 7 (FIG. 1A).
Next, the solder balls 16 are placed on the polyimide film 7 at the bottom of the well-shaped portion sandwiched between the preliminary solders 9a, and the conductive plate 6 is placed thereon ((b) in the figure).

Next, the preliminary solder 9a and the solder ball 16 are melted through a reflow furnace at about 250 ° C., and then cooled to solidify the solder, and the conductor 6 and the emitter electrode 2 are fixed by the uniform solder solid film layer 9.
The uniform solder solid film layer 9 can be formed on the emitter electrode 2 and the gate liner 4 as shown in FIG. 6C because heat is transferred to the solder balls 16 via the conductive plate 6. The preliminary solder 9a in contact with the solder 6 and the solder balls 16 are melted to form the solid solder film layer 9. In this case, the polyimide film 7 is directly covered with solder.
If the solder ball 16 is replaced with the metal core solder ball 13, the manufacturing method of the semiconductor device shown in FIG. 4 is obtained. Further, since the figure is a schematic diagram, one solder ball 16 and one metal core solder ball 13 are drawn in the well, but a plurality of balls are actually included because the size of the ball is small with respect to the well.

BRIEF DESCRIPTION OF THE DRAWINGS It is a principal part block diagram of the semiconductor device of 1st Example of this invention, (a) is a principal part top view, (b) is principal part sectional drawing cut | disconnected by the XX line of (a), (c). (B) Perspective view of main part of metal foil of (b) Diagram of IGBT chip when emitter electrode is not divided FIG. 4 is a configuration diagram of a main part of a semiconductor device according to a second embodiment of the present invention, where (a) is a plan view of the main part and (b) is a cross-sectional view of the main part taken along line XX of (a). Sectional drawing of the principal part of the semiconductor device of 3rd Example of this invention. Sectional drawing of the principal part of the semiconductor device of 4th Example of this invention. Sectional drawing of the principal part of the semiconductor device of 5th Example of this invention It is a figure which shows the manufacturing method of the semiconductor device of 6th Example of this invention, (a)-(c) is principal part manufacturing process sectional drawing shown to process order The IGBT module wired by the conducting plate is shown, (a) is a sectional view of the main part, (b) is a plan view of the conducting plate and the semiconductor chip of (a), and (c) is an enlarged sectional view of the A part of (a). Sectional drawing of the place cut | disconnected by the XX line of (b) Diagram of IGBT chip with emitter electrode divided by gate liner

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1a IGBT chip | tip 2 Emitter electrode 3 Gate pad 4 Gate liner 5 Pressure | voltage resistant structure 6 Conductor plate 7, 10 Polyimide film 8 Metal foil 9 Solder solid film layer 9a Preliminary solder 11 Opening part 12 Grid-shaped metal foil 13 Metal core solder ball 14 Metal ball 15 Solder film 16 Solder ball 17 Al / Ni / Au film

Claims (9)

A semiconductor substrate, a main electrode formed on the main surface of the semiconductor substrate, an insulating film covering the main electrode and having a plurality of openings, and a metal foil with good solder wettability or good solder wettability A grid-like metal foil or metal core solder ball, comprising: a conductor disposed on the insulating film; a conductive plate facing the main electrode; and the conductor including the conductor and the plurality of openings. And a solder for joining to the main electrode through the semiconductor device. A semiconductor substrate, a plurality of main electrodes formed on the main surface of the semiconductor substrate and divided by a control wiring connected to the control electrode, an insulating film covering the control wiring, and a metal foil having good solder wettability Alternatively, a grid-like metal foil or metal core solder ball having good solder wettability, including a conductor disposed on the insulating film, a conductive plate facing the plurality of main electrodes, and the conductor A semiconductor device comprising: a solder for joining a conductive plate to the main electrode . The semiconductor device according to claim 1, wherein the solder is cream solder or plate solder. The semiconductor device according to claim 1, wherein the insulating film is a polyimide film or a nitride film. 3. The semiconductor device according to claim 1, wherein a material of a surface layer of the metal foil is any one of Cu, Au, and Ni. The semiconductor device according to claim 2 , wherein the control wiring is a gate liner. A support substrate, a semiconductor substrate to which the support substrate and one main surface are fixed, and a plurality of main electrodes formed on the other main surface of the semiconductor substrate and divided by a control wiring connected to the control electrode; Manufacture of a semiconductor device comprising: an insulating film covering the control wiring; a conductive plate facing the plurality of main electrodes; and solder that includes the conductor and joins the conductive plate to the plurality of main electrodes. In the method
Forming a preliminary solder on the main electrode higher than the surface height of the insulating film; arranging a solder ball on the insulating film; arranging the conductive plate on the preliminary solder and the solder ball; A method for manufacturing a semiconductor device, comprising: a step of melting preliminary solder and solder balls through a furnace; and a step of cooling and solidifying the molten solder by heating. 8. The method of manufacturing a semiconductor device according to claim 7, wherein the solder ball is a solder-only ball or a metal core solder ball in which a solder layer is formed around a metal ball. 9. The method of manufacturing a semiconductor device according to claim 8, wherein a material of the surface layer of the metal sphere is any one of Cu, Au, and Ni.

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