JP4877239B2 - Method for manufacturing light emitting device - Google Patents

Method for manufacturing light emitting device Download PDF

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JP4877239B2
JP4877239B2 JP2008016920A JP2008016920A JP4877239B2 JP 4877239 B2 JP4877239 B2 JP 4877239B2 JP 2008016920 A JP2008016920 A JP 2008016920A JP 2008016920 A JP2008016920 A JP 2008016920A JP 4877239 B2 JP4877239 B2 JP 4877239B2
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substrate
light
mounting substrate
bonding
led
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JP2008113039A (en
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昌男 桐原
裕二 鈴木
雅男 久保
薫 戸根
健一郎 田中
將有 鎌倉
和司 吉田
威 中筋
佳治 佐名川
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Panasonic Corp
Panasonic Electric Works Co Ltd
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Matsushita Electric Works Ltd
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Description

本発明は、発光ダイオードチップ(LEDチップ)を用いた発光装置の製造方法に関するものである。   The present invention relates to a method for manufacturing a light emitting device using a light emitting diode chip (LED chip).

従来から、LEDと、LEDを駆動する駆動回路部と、LEDの光出力を検出する光検出素子と、光検出素子の出力が予め設定された目標値に保たれるように駆動回路部からLEDへ流れる電流をフィードバック制御する制御回路部とを備えた照明装置が提案されている(例えば、特許文献1参照)。   Conventionally, an LED, a drive circuit unit that drives the LED, a light detection element that detects the light output of the LED, and an LED from the drive circuit unit so that the output of the light detection element is maintained at a preset target value. There has been proposed an illuminating device including a control circuit unit that feedback-controls a current flowing in the direction (for example, see Patent Document 1).

ここにおいて、上記特許文献1には、図11に示すように、発光色の異なる複数種のLED101a,101b,101cを実装基板(ベース部材)102の一表面に形成した収納凹所102aの内底面に実装するとともに、実装基板102の上記一表面側に各LED101a,101b,101cを覆う形で各LED101a,101b,101cを封止する透明樹脂層103を設け、透明樹脂層103の側方に各LED101a,101b,101cから放射された光を検出するフォトダイオードからなる光検出素子104a,104b,104cが形成された光検出素子形成基板106を配置した発光装置が開示されている。   Here, in Patent Document 1, as shown in FIG. 11, an inner bottom surface of a housing recess 102a in which a plurality of types of LEDs 101a, 101b, and 101c having different emission colors are formed on one surface of a mounting substrate (base member) 102. And a transparent resin layer 103 for sealing the LEDs 101a, 101b, and 101c is provided on the one surface side of the mounting substrate 102 so as to cover the LEDs 101a, 101b, and 101c. A light emitting device is disclosed in which a photodetection element forming substrate 106 on which photodetection elements 104a, 104b, and 104c made of photodiodes that detect light emitted from the LEDs 101a, 101b, and 101c are formed is disposed.

図11に示した構成の発光装置では、透明樹脂層103が、各LED101a,101b,101cから放射された光の一部を光検出素子104a,104b,104c側へ導光する機能を有するように透明樹脂層103の厚さ寸法を設定してある。また、図11に示した構成の発光装置では、各LED101a,101b,101cそれぞれの発光色の波長域の光を選択的に透過させる3つの分光フィルタ105a,105b,105cを各光検出素子104a,104b,104cの受光面側に択一的に設けてあり、各LED101a,101b,101cそれぞれの発光色の波長域の光を3つの光検出素子104a,104b,104cで同時かつ各別に検出することができるようになっている。したがって、図11に示した構成の発光装置を備えた照明装置では、制御回路部によって駆動回路部から各LED101a,101b,101cへ流れる電流それぞれをフィードバック制御することにより、各発光色ごとのLED101a,101b,101cの光出力の経時変化の違いなどによらず所望の光色や色温度の混色光(例えば、LED101aの発光色が赤色、LED101bの発光色が緑色、LED101cの発光色が青色であれば、白色光)を得ることができる。   In the light emitting device having the configuration shown in FIG. 11, the transparent resin layer 103 has a function of guiding a part of the light emitted from each of the LEDs 101a, 101b, and 101c toward the light detection elements 104a, 104b, and 104c. The thickness dimension of the transparent resin layer 103 is set. In addition, in the light emitting device having the configuration shown in FIG. 11, the three spectral filters 105a, 105b, and 105c that selectively transmit light in the wavelength regions of the light emission colors of the respective LEDs 101a, 101b, and 101c 104b and 104c are provided alternatively on the light receiving surface side, and light in the wavelength band of each LED 101a, 101b and 101c is detected simultaneously and separately by the three photodetectors 104a, 104b and 104c. Can be done. Therefore, in the illuminating device including the light emitting device having the configuration shown in FIG. 11, the control circuit unit feedback-controls each of the currents flowing from the drive circuit unit to the LEDs 101a, 101b, and 101c, whereby the LEDs 101a, Regardless of differences in the light output of 101b and 101c over time, mixed light with a desired light color and color temperature (for example, LED 101a emits red, LED 101b emits green, and LED 101c emits blue) White light) can be obtained.

また、上記特許文献1には、LED101aが発光する期間とLED101bが発光する期間とLED101cが発光する期間とが時系列的に現れるように、制御回路部によって駆動回路部を制御することにより、発光色の異なる複数種のLED101a,101b,101cの光出力を1つの光検出素子により各別に検出する技術も開示されている。   Further, in Patent Document 1, light is emitted by controlling the drive circuit unit by the control circuit unit so that the period in which the LED 101a emits light, the period in which the LED 101b emits light, and the period in which the LED 101c emits light appear in time series. A technique is also disclosed in which the light output of a plurality of types of LEDs 101a, 101b, and 101c having different colors is individually detected by a single light detection element.

また、上記特許文献1には、図12に示すように、実装基板102の一表面に形成された各収納凹所102aの内底面に発光色が同じLED101を実装するとともに、実装基板102の上記一表面に光検出素子104を実装し、透明樹脂層103によって各LED101および光検出素子104を覆った構成の発光装置も提案されている。
特開2002−344031号公報
Further, in Patent Document 1, as shown in FIG. 12, the LEDs 101 having the same emission color are mounted on the inner bottom surface of each storage recess 102 a formed on one surface of the mounting substrate 102, and There has also been proposed a light emitting device in which the light detection element 104 is mounted on one surface and each LED 101 and the light detection element 104 are covered with a transparent resin layer 103.
JP 2002-344031 A

しかしながら、図12のように、一表面にLED101を収納する収納凹所102aが形成された実装基板102の上記一表面上に光検出素子104を実装し、透明樹脂層103によってLED101および光検出素子104を覆うようにした構成の発光装置では、実装基板102の上記一表面に光検出素子104を配置するためのスペースを別途に確保する必要があり、実装基板102の平面サイズが大きくなってしまい、プリント基板などの回路基板への実装面積が大きくなってしまう。   However, as shown in FIG. 12, the light detection element 104 is mounted on the one surface of the mounting substrate 102 in which the housing recess 102 a for housing the LED 101 is formed on one surface, and the LED 101 and the light detection element are formed by the transparent resin layer 103. In the light emitting device configured to cover 104, it is necessary to separately secure a space for arranging the light detection element 104 on the one surface of the mounting substrate 102, and the planar size of the mounting substrate 102 becomes large. The mounting area on a circuit board such as a printed board becomes large.

本発明は上記事由に鑑みて為されたものであり、その目的は、光検出素子を実装基板に設けながらも小型化が可能な発光装置の製造方法を提供することにある。   The present invention has been made in view of the above reasons, and an object of the present invention is to provide a method for manufacturing a light-emitting device that can be downsized while providing a light detection element on a mounting substrate.

請求項1の発明は、LEDチップと、少なくともLEDチップを収納する収納凹所が一表面に形成された実装基板により構成されるパッケージとを備え、実装基板が収納凹所の周部から内方へ突出する突出部を有し、当該突出部にLEDチップから放射された光を検出する光検出素子が設けられてなるものであり、実装基板が、第1のシリコン基板を用いて形成されてなりLEDチップが一表面側に搭載されたLED搭載用基板と、第2のシリコン基板を用いて形成されてなりLED搭載用基板の前記一表面側に対向配置され光取出窓が形成されるとともに光検出素子が形成された光検出素子形成基板と、第3のシリコン基板を用いて形成されてなりLED搭載用基板と光検出素子形成基板との間に介在し光取出窓に連通する開口窓が形成され開口窓の内側面がLEDチップから放射された光を光検出素子へ導くミラーとなる中間層基板とで構成され、LED搭載用基板と中間層基板と光検出素子形成基板とで囲まれた空間が前記収納凹所を構成してなる発光装置の製造方法であって、光検出素子が形成された第2のシリコン基板と中間層基板とを接合する第1の接合工程と、第1の接合工程の後で第2のシリコン基板を所望の厚さまで研磨する研磨工程と、研磨工程の後で第2のシリコン基板に光取出窓を形成する光取出窓形成工程と、光取出窓形成工程の後でLEDチップが実装されたLED搭載用基板と中間層基板とを接合する第2の接合工程とを備えることを特徴とする。   The invention of claim 1 includes an LED chip and a package constituted by a mounting substrate in which at least a storage recess for storing the LED chip is formed on one surface, and the mounting substrate is inward from a peripheral portion of the storage recess. And a light detection element that detects light emitted from the LED chip is provided on the protrusion, and the mounting substrate is formed using the first silicon substrate. The LED mounting substrate on which the LED chip is mounted on the one surface side and the second silicon substrate are formed, and the light mounting window is formed to be opposed to the one surface side of the LED mounting substrate. A light detection element forming substrate on which a light detection element is formed, and an opening window formed between the LED mounting substrate and the light detection element formation substrate, which is formed using a third silicon substrate, and communicates with the light extraction window. Formed A space in which the inner surface of the opening window is composed of an intermediate layer substrate that serves as a mirror that guides light emitted from the LED chip to the light detection element, and is surrounded by the LED mounting substrate, the intermediate layer substrate, and the light detection element formation substrate Is a method of manufacturing a light emitting device comprising the housing recess, wherein the first bonding step of bonding the second silicon substrate on which the light detection element is formed and the intermediate layer substrate, and the first bonding A polishing step of polishing the second silicon substrate to a desired thickness after the step, a light extraction window forming step of forming a light extraction window on the second silicon substrate after the polishing step, and a light extraction window forming step And a second bonding step of bonding the LED mounting substrate on which the LED chip is mounted and the intermediate layer substrate later.

この発明によれば、光検出素子を実装基板に設けながらも小型化が可能な発光装置を提供することができる。また、この発明によれば、中間層基板におけるミラーと光検出素子形成基板における光検出素子との相対的な位置精度を高めることができる。   According to the present invention, it is possible to provide a light emitting device that can be miniaturized while providing the light detection element on the mounting substrate. Moreover, according to this invention, the relative positional accuracy of the mirror in an intermediate | middle layer board | substrate and the photon detection element in a photon detection element formation board | substrate can be improved.

請求項2の発明は、請求項1の発明において、前記第1の接合工程および前記第2の接合工程では、接合前に互いの接合表面の活性化を行ってから接合表面同士を接触させ常温接合することを特徴とする。   The invention according to claim 2 is the invention according to claim 1, wherein in the first joining step and the second joining step, the joining surfaces are brought into contact with each other after the joining surfaces are activated before joining. It is characterized by joining.

この発明によれば、前記第2の接合工程で前記LEDチップのジャンクション温度が最大ジャンクション温度を超えるのを防止することができる。   According to this invention, it is possible to prevent the junction temperature of the LED chip from exceeding the maximum junction temperature in the second bonding step.

請求項3の発明は、請求項2の発明において、前記中間層基板に、前記光検出素子に電気的に接続される貫通孔配線が形成され、前記LED搭載用基板に、前記LEDチップに電気的に接続される貫通孔配線および前記中間層基板の貫通孔配線と電気的に接続される貫通孔配線が形成され、前記中間層基板および前記光検出素子形成基板が前記LED搭載用基板と同じ外形寸法に形成されてなり、前記第1の接合工程では、前記第2のシリコン基板と前記中間層基板との活性化された接合用金属層同士および活性化された導体パターン同士を常温接合するようにし、導体パターン同士の接合部位を、前記中間層基板に形成された前記貫通孔配線に重なる領域からずらしてあり、前記第2の接合工程では、前記LED搭載用基板と前記中間層基板との活性化された接合用金属層同士および活性化された導体パターン同士を常温接合するようにし、導体パターン同士の接合部位を、前記LED搭載用基板に形成された前記貫通孔配線に重なる領域および前記中間層形成基板に形成された前記貫通孔配線に重なる領域からずらしてあることを特徴とする。   According to a third aspect of the invention, in the invention of the second aspect, a through-hole wiring electrically connected to the photodetecting element is formed in the intermediate layer substrate, and the LED chip is electrically connected to the LED mounting substrate. Connected through hole wiring and through hole wiring electrically connected to the through hole wiring of the intermediate layer substrate are formed, and the intermediate layer substrate and the light detection element forming substrate are the same as the LED mounting substrate In the first bonding step, the activated bonding metal layers and the activated conductor patterns of the second silicon substrate and the intermediate layer substrate are bonded at room temperature in the first bonding step. In the second bonding step, the bonding portion between the conductor patterns is shifted from the region overlapping the through-hole wiring formed in the intermediate layer substrate. The activated bonding metal layers and the activated conductor patterns are bonded to each other at room temperature, and the bonding portion between the conductor patterns overlaps the through-hole wiring formed on the LED mounting substrate. And it has shifted from the area | region which overlaps with the said through-hole wiring formed in the said intermediate | middle layer formation board | substrate.

この発明によれば、前記第1の接合工程において導体パターン同士の接合表面の平坦度を高めることができ、接合歩留まりを高めることができるとともに接合信頼性を高めることができ、また、前記第2の接合工程において導体パターン同士の接合表面の平坦度を高めることができ、接合歩留まりを高めることができるとともに接合信頼性を高めることができる。   According to the present invention, the flatness of the bonding surfaces of the conductor patterns can be increased in the first bonding step, the bonding yield can be increased, and the bonding reliability can be increased. In this bonding step, the flatness of the bonding surfaces of the conductor patterns can be increased, the bonding yield can be increased, and the bonding reliability can be increased.

請求項4の発明は、請求項1ないし請求項3の発明において、前記各工程をウェハレベルで行うことでウェハレベルパッケージ構造体を形成するようにし、当該ウェハレベルパッケージ構造体から前記発光装置に分割するダイシング工程を備えることを特徴とする。   According to a fourth aspect of the present invention, in the first to third aspects of the present invention, a wafer level package structure is formed by performing each of the steps at a wafer level, and the light emitting device is formed from the wafer level package structure. A dicing process for dividing is provided.

この発明によれば、前記LED搭載用基板と前記中間層基板と前記光検出素子形成基板とが同じ外形サイズとなり、小型のパッケージを実現できるとともに、製造が容易になる。   According to the present invention, the LED mounting substrate, the intermediate layer substrate, and the photodetecting element forming substrate have the same outer size, so that a small package can be realized and manufacturing is facilitated.

請求項5の発明は、請求項4の発明において、前記第2の接合工程と前記ダイシング工程との間に、前記実装基板の前記収納凹所に封止樹脂を充填して前記LEDチップを封止する封止部を形成する封止部形成工程を備えることを特徴とする。   According to a fifth aspect of the present invention, in the invention of the fourth aspect, between the second bonding step and the dicing step, the housing recess of the mounting substrate is filled with a sealing resin to seal the LED chip. A sealing portion forming step for forming a sealing portion to be stopped is provided.

この発明によれば、前記ダイシング工程の前に前記LEDチップを封止することができる。   According to this invention, the LED chip can be sealed before the dicing step.

請求項6の発明は、請求項5の発明において、前記パッケージが、前記実装基板と前記実装基板の前記一表面側において前記収納凹所を閉塞する形で前記実装基板に接合された透光性部材とで構成され、前記封止部形成工程と前記ダイシング工程との間に、前記実装基板と透光性部材とを接合する第3の接合工程を備えることを特徴とする。   According to a sixth aspect of the present invention, in the invention of the fifth aspect, the package is joined to the mounting substrate so as to close the housing recess on the mounting substrate and the one surface side of the mounting substrate. And a third joining step for joining the mounting substrate and the translucent member between the sealing portion forming step and the dicing step.

この発明によれば、透光性部材が前記LED搭載用基板と同じ外形サイズとなり、小型のパッケージを実現できるとともに、製造が容易になる。   According to the present invention, the translucent member has the same outer size as the LED mounting substrate, so that a small package can be realized and manufacture is facilitated.

請求項1の発明では、光検出素子を実装基板に設けながらも小型化が可能な発光装置を提供することができるという効果がある。   According to the first aspect of the present invention, there is an effect that it is possible to provide a light emitting device that can be downsized while providing the light detection element on the mounting substrate.

以下、本実施形態の発光装置について図1〜図10に基づいて説明する。   Hereinafter, the light-emitting device of this embodiment will be described with reference to FIGS.

本実施形態の発光装置は、図2に示すように、可視光(例えば、赤色光、緑色光、青色光など)を放射する1つのLEDチップ1と、LEDチップ1を収納する収納凹所2aが一表面に形成され収納凹所2aの内底面にLEDチップ1が実装された実装基板2と、実装基板2の上記一表面側において収納凹所2aを閉塞する形で実装基板2に固着された透光性部材3と、実装基板2に設けられLEDチップ1から放射された光を検出する光検出素子4と、実装基板2の収納凹所2aに充填された透光性の封止樹脂(例えば、シリコーン樹脂、アクリル樹脂など)からなりLEDチップ1および当該LEDチップ1に接続されたボンディングワイヤ14(図3参照)を封止した封止部5と備えている。ここで、実装基板2は、上記一表面側において収納凹所2aの周部から内方へ突出した庇状の突出部2cを有しており、当該突出部2cに光検出素子4が設けられている。なお、本実施形態では、実装基板2と透光性部材3とでパッケージを構成しているが、透光性部材3は、必ずしも設けなくてもよく、必要に応じて適宜設ければよい。   As shown in FIG. 2, the light emitting device of the present embodiment includes one LED chip 1 that emits visible light (for example, red light, green light, blue light, and the like) and a storage recess 2 a that stores the LED chip 1. Is mounted on the mounting substrate 2 in such a manner that the LED chip 1 is mounted on the inner bottom surface of the housing recess 2a and the housing recess 2a is closed on the one surface side of the mounting substrate 2. Translucent member 3, photodetecting element 4 provided on mounting substrate 2 for detecting light emitted from LED chip 1, and translucent sealing resin filled in housing recess 2 a of mounting substrate 2 It is provided with a sealing portion 5 that is made of (for example, a silicone resin, an acrylic resin, etc.) and seals the LED chip 1 and the bonding wire 14 (see FIG. 3) connected to the LED chip 1. Here, the mounting substrate 2 has a hook-like protrusion 2c protruding inward from the peripheral portion of the housing recess 2a on the one surface side, and the light detection element 4 is provided on the protrusion 2c. ing. In the present embodiment, the package is constituted by the mounting substrate 2 and the translucent member 3, but the translucent member 3 is not necessarily provided, and may be appropriately provided as necessary.

実装基板2は、図2〜図4に示すように、LEDチップ1が一表面側に搭載される矩形板状のLED搭載用基板20と、LED搭載用基板20の上記一表面側に対向配置され円形状の光取出窓41が形成されるとともに光検出素子4が形成された光検出素子形成基板40と、LED搭載用基板20と光検出素子形成基板40との間に介在し光取出窓41に連通する矩形状の開口窓31が形成された中間層基板30とで構成されており、LED搭載用基板20と中間層基板30と光検出素子形成基板40とで囲まれた空間が上記収納凹所2aを構成している。ここにおいて、LED搭載用基板20および中間層基板30および光検出素子形成基板40の外周形状は矩形状であり、中間層基板30および光検出素子形成基板40はLED搭載用基板20と同じ外形寸法に形成されている。また、光検出素子形成基板40の厚み寸法はLED搭載用基板20および中間層基板30の厚み寸法に比べて小さく設定されている。   As shown in FIGS. 2 to 4, the mounting substrate 2 is disposed so as to be opposed to the rectangular plate-shaped LED mounting substrate 20 on which the LED chip 1 is mounted on one surface side and the LED mounting substrate 20 on the one surface side. The circular light extraction window 41 and the light detection element forming substrate 40 on which the light detection element 4 is formed, and the light extraction window interposed between the LED mounting substrate 20 and the light detection element formation substrate 40. The space surrounded by the LED mounting substrate 20, the intermediate layer substrate 30, and the photodetecting element forming substrate 40 is configured by the intermediate layer substrate 30 in which the rectangular opening window 31 communicating with the terminal 41 is formed. The storage recess 2a is configured. Here, the outer peripheral shapes of the LED mounting substrate 20, the intermediate layer substrate 30, and the light detection element formation substrate 40 are rectangular, and the intermediate layer substrate 30 and the light detection element formation substrate 40 have the same outer dimensions as the LED mounting substrate 20. Is formed. Further, the thickness dimension of the light detection element forming substrate 40 is set smaller than the thickness dimension of the LED mounting substrate 20 and the intermediate layer substrate 30.

本実施形態では、LEDチップ1がLEDを構成し、LED搭載用基板20が、LEDが実装されるLED実装部を構成し、中間層基板30と光検出素子形成基板40とが、LED実装部においてLEDが実装される領域の周部に設けられた壁部2bを構成し、光検出素子形成基板40において中間層基板30の開口窓31上に張り出した部位が、壁部2bの先端部から内方へ突出する突出部2cを構成している。   In the present embodiment, the LED chip 1 constitutes an LED, the LED mounting substrate 20 constitutes an LED mounting portion on which the LED is mounted, and the intermediate layer substrate 30 and the light detection element forming substrate 40 include the LED mounting portion. The wall portion 2b provided in the peripheral portion of the region where the LED is mounted is configured, and the portion of the light detection element forming substrate 40 that protrudes over the opening window 31 of the intermediate layer substrate 30 is from the tip portion of the wall portion 2b. The protrusion part 2c which protrudes inward is comprised.

上述のLED搭載用基板20、中間層基板30、光検出素子形成基板40は、それぞれ、導電形がn形で主表面が(100)面のシリコン基板20a,30a,40aを用いて形成してあり、中間層基板30の内側面が、アルカリ系溶液(例えば、TMAH溶液、KOH溶液など)を用いた異方性エッチングにより形成された(111)面により構成されており(つまり、中間層基板30は、開口窓31の開口面積がLED搭載用基板20から離れるにつれて徐々に大きくなっており)、LEDチップ1から放射された光を前方へ反射するミラー2dを構成している。要するに、本実施形態では、中間層基板30がLEDチップ1から側方へ放射された光を前方へ反射させる枠状のリフレクタを兼ねている。   The LED mounting substrate 20, the intermediate layer substrate 30, and the light detection element formation substrate 40 described above are formed using silicon substrates 20 a, 30 a, and 40 a each having an n-type conductivity and a (100) plane main surface. In addition, the inner side surface of the intermediate layer substrate 30 is configured by a (111) plane formed by anisotropic etching using an alkaline solution (for example, TMAH solution, KOH solution, etc.) (that is, the intermediate layer substrate) 30 indicates that the opening area of the opening window 31 gradually increases as the distance from the LED mounting substrate 20 increases), and constitutes a mirror 2d that reflects light emitted from the LED chip 1 forward. In short, in the present embodiment, the intermediate layer substrate 30 also serves as a frame-like reflector that reflects light emitted from the LED chip 1 to the side.

LED搭載用基板20は、図5および図6に示すように、シリコン基板20aの一表面側(図5(c)における左面側)に、LEDチップ1の両電極それぞれと電気的に接続される2つの導体パターン25a,25aが形成されるとともに、中間層基板30に形成された後述の2つの貫通孔配線34,34を介して光検出素子4と電気的に接続される2つの導体パターン25b,25bが形成されており、各導体パターン25a,25a,25b,25bとシリコン基板20aの他表面側(図5(c)における右面側)に形成された4つの外部接続用電極27a,27a,27b,27bとがそれぞれ貫通孔配線24を介して電気的に接続されている。また、LED搭載用基板20は、シリコン基板20aの上記一表面側に、中間層基板30と接合するための接合用金属層29も形成されている。   As shown in FIGS. 5 and 6, the LED mounting substrate 20 is electrically connected to each of both electrodes of the LED chip 1 on one surface side (left surface side in FIG. 5C) of the silicon substrate 20 a. Two conductor patterns 25a and 25a are formed, and two conductor patterns 25b that are electrically connected to the light detection element 4 through two through-hole wirings 34 and 34, which will be described later, formed on the intermediate layer substrate 30. , 25b, and four external connection electrodes 27a, 27a, 27b formed on the other surface side (right side in FIG. 5 (c)) of each conductor pattern 25a, 25a, 25b, 25b and the silicon substrate 20a. 27b and 27b are electrically connected through the through-hole wiring 24, respectively. The LED mounting substrate 20 is also formed with a bonding metal layer 29 for bonding to the intermediate layer substrate 30 on the one surface side of the silicon substrate 20a.

本実施形態におけるLEDチップ1は、結晶成長用基板として導電性基板を用い厚み方向の両面に電極(図示せず)が形成された可視光LEDチップである。そこで、LED搭載用基板20は、LEDチップ1が電気的に接続される2つの導体パターン25a,25aのうちの一方の導体パターン25aを、LEDチップ1がダイボンディングされる矩形状のダイパッド部25aaと、ダイパッド部25aaに連続一体に形成され貫通孔配線24との接続部位となる引き出し配線部25abとで構成してある。要するに、LEDチップ1は、上記一方の導体パターン25aのダイパッド部25aaにダイボンディングされており、ダイパッド部25aa側の電極がダイパッド部25aaに接合されて電気的に接続され、光取り出し面側の電極がボンディングワイヤ14を介して他方の導体パターン25aと電気的に接続されている。   The LED chip 1 in the present embodiment is a visible light LED chip in which a conductive substrate is used as a crystal growth substrate and electrodes (not shown) are formed on both surfaces in the thickness direction. Therefore, the LED mounting substrate 20 has one of the two conductor patterns 25a, 25a to which the LED chip 1 is electrically connected, the rectangular die pad portion 25aa to which the LED chip 1 is die-bonded. And a lead-out wiring portion 25ab that is continuously formed integrally with the die pad portion 25aa and serves as a connection portion with the through-hole wiring 24. In short, the LED chip 1 is die-bonded to the die pad portion 25aa of the one conductor pattern 25a, and the electrode on the die pad portion 25aa side is joined to and electrically connected to the die pad portion 25aa, and the electrode on the light extraction surface side. Is electrically connected to the other conductor pattern 25 a via the bonding wire 14.

また、LED搭載用基板20は、シリコン基板20aの上記他表面側に、シリコン基板20aよりも熱伝導率の高い金属材料からなる矩形状の放熱用パッド部28が形成されており、ダイパッド部25aaと放熱用パッド部28とがシリコン基板20aよりも熱伝導率の高い金属材料(例えば、Cuなど)からなる複数(本実施形態では、9つ)の円柱状のサーマルビア26を介して熱的に結合されており、LEDチップ1で発生した熱が各サーマルビア26および放熱用パッド部28を介して放熱されるようになっている。   The LED mounting substrate 20 has a rectangular heat radiation pad portion 28 made of a metal material having a higher thermal conductivity than the silicon substrate 20a on the other surface side of the silicon substrate 20a. The die pad portion 25aa And the heat dissipating pad portion 28 through a plurality of (in this embodiment, nine) cylindrical thermal vias 26 made of a metal material (for example, Cu) having a thermal conductivity higher than that of the silicon substrate 20a. The heat generated in the LED chip 1 is dissipated through the thermal vias 26 and the heat dissipating pad portion 28.

ところで、LED搭載用基板20は、シリコン基板20aに、上述の4つの貫通孔配線24それぞれが内側に形成される4つの貫通孔22aと、上述の9つのサーマルビア26それぞれが内側に形成される9つの貫通孔22bとが厚み方向に貫設され、シリコン基板20aの上記一表面および上記他表面と各貫通孔22a,22bの内面とに跨って熱酸化膜(シリコン酸化膜)からなる絶縁膜23が形成されており、各導体パターン25a,25a,25b,25b、接合用金属層29、各外部接続用電極27a,27a,27b,27b、放熱用パッド部28、各貫通孔配線24および各サーマルビア26がシリコン基板20aと電気的に絶縁されている。   By the way, the LED mounting substrate 20 has, in the silicon substrate 20a, four through holes 22a in which the above-described four through-hole wirings 24 are formed inside, and each of the nine thermal vias 26 in the inside. Nine through holes 22b are provided in the thickness direction, and an insulating film made of a thermal oxide film (silicon oxide film) straddling the one surface and the other surface of the silicon substrate 20a and the inner surfaces of the through holes 22a and 22b. 23, each conductor pattern 25a, 25a, 25b, 25b, bonding metal layer 29, each external connection electrode 27a, 27a, 27b, 27b, heat radiation pad 28, each through-hole wiring 24, and each The thermal via 26 is electrically insulated from the silicon substrate 20a.

ここにおいて、各導体パターン25a,25a,25b,25b、接合用金属層29、各外部接続用電極27a,27a,27b,27b、放熱用パッド部28は、絶縁膜23上に形成されたTi膜と当該Ti膜上に形成されたAu膜との積層膜により構成されており、同時に形成してある。なお、本実施形態では、絶縁膜23上のTi膜の膜厚を15〜50nm、Ti膜上のAu膜の膜厚を500nmに設定してあるが、これらの数値は一例であって特に限定するものではない。また、各Au膜の材料は、純金に限らず不純物を添加したものでもよい。また、各Au膜と絶縁膜23との間に密着性改善用の密着層としてTi膜を介在させてあるが、密着層の材料はTiに限らず、例えば、Cr、Nb、Zr、TiN、TaNなどでもよい。また、貫通孔配線24およびサーマルビア26の材料としては、Cuを採用しているが、Cuに限らず、例えば、Niなどを採用してもよい。   Here, each conductor pattern 25a, 25a, 25b, 25b, bonding metal layer 29, each external connection electrode 27a, 27a, 27b, 27b, and heat radiation pad portion 28 are formed on the insulating film 23. And an Au film formed on the Ti film, and are formed at the same time. In this embodiment, the thickness of the Ti film on the insulating film 23 is set to 15 to 50 nm, and the thickness of the Au film on the Ti film is set to 500 nm. However, these numerical values are only examples and are particularly limited. Not what you want. Further, the material of each Au film is not limited to pure gold, and may be one added with impurities. In addition, although a Ti film is interposed as an adhesion layer for improving adhesion between each Au film and the insulating film 23, the material of the adhesion layer is not limited to Ti, for example, Cr, Nb, Zr, TiN, TaN or the like may be used. Moreover, although Cu is adopted as the material of the through-hole wiring 24 and the thermal via 26, it is not limited to Cu, and for example, Ni may be adopted.

中間層基板30は、図7および図8に示すように、シリコン基板30aの一表面側(図7(c)における右面側)に、LED搭載用基板20の2つの導体パターン27b,27bと接合されて電気的に接続される2つの導体パターン35,35が形成されるとともに、LED搭載用基板20の接合用金属層29と接合される接合用金属層36が形成されている。また、中間層基板30は、シリコン基板30aの他表面側(図7(c)における左面側)に、貫通孔配線34,34を介して導体パターン35,35と電気的に接続される導体パターン37,37が形成されるとともに、光検出素子形成基板40と接合するための接合用金属層38が形成されている。   As shown in FIGS. 7 and 8, the intermediate layer substrate 30 is bonded to the two conductor patterns 27b and 27b of the LED mounting substrate 20 on one surface side (right side in FIG. 7C) of the silicon substrate 30a. Thus, two conductive patterns 35 and 35 that are electrically connected are formed, and a bonding metal layer 36 that is bonded to the bonding metal layer 29 of the LED mounting substrate 20 is formed. In addition, the intermediate layer substrate 30 is a conductor pattern electrically connected to the conductor patterns 35 and 35 via the through-hole wirings 34 and 34 on the other surface side (the left side in FIG. 7C) of the silicon substrate 30a. 37 and 37 are formed, and a bonding metal layer 38 for bonding to the light detection element forming substrate 40 is formed.

また、中間層基板30は、上述の2つの貫通孔配線34それぞれが内側に形成される2つの貫通孔32がシリコン基板30aの厚み方向に貫設され、シリコン基板30aの上記一表面および上記他表面と各貫通孔32の内面とに跨って熱酸化膜(シリコン酸化膜)からなる絶縁膜33が形成されており、各導体パターン35,35,37,37および各接合用金属層36,38がシリコン基板30aと電気的に絶縁されている。ここにおいて、各導体パターン35,35,37,37および各接合用金属層36,38は、絶縁膜33上に形成されたTi膜と当該Ti膜上に形成されたAu膜との積層膜により構成されており、同時に形成してある。なお、本実施形態では、絶縁膜33上のTi膜の膜厚を15〜50nm、Ti膜上のAu膜の膜厚を500nmに設定してあるが、これらの数値は一例であって特に限定するものではない。ここにおいて、各Au膜の材料は、純金に限らず不純物を添加したものでもよい。また、各Au膜と絶縁膜33との間に密着性改善用の密着層としてTi膜を介在させてあるが、密着層の材料はTiに限らず、例えば、Cr、Nb、Zr、TiN、TaNなどでもよい。また、貫通孔配線34の材料としては、Cuを採用しているが、Cuに限らず、例えば、Niなどを採用してもよい。   Further, the intermediate layer substrate 30 has two through holes 32 formed therein in the thickness direction of the silicon substrate 30a, and the one surface of the silicon substrate 30a and the other. An insulating film 33 made of a thermal oxide film (silicon oxide film) is formed across the surface and the inner surface of each through hole 32, and each conductor pattern 35, 35, 37, 37 and each bonding metal layer 36, 38 are formed. Is electrically insulated from the silicon substrate 30a. Here, each of the conductor patterns 35, 35, 37, 37 and each of the bonding metal layers 36, 38 is a laminated film of a Ti film formed on the insulating film 33 and an Au film formed on the Ti film. Constructed and formed simultaneously. In this embodiment, the thickness of the Ti film on the insulating film 33 is set to 15 to 50 nm, and the thickness of the Au film on the Ti film is set to 500 nm. However, these numerical values are only examples and are particularly limited. Not what you want. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. Further, although a Ti film is interposed as an adhesion improving layer for adhesion between each Au film and the insulating film 33, the material of the adhesion layer is not limited to Ti, for example, Cr, Nb, Zr, TiN, TaN or the like may be used. Moreover, although Cu is adopted as the material of the through-hole wiring 34, it is not limited to Cu, and for example, Ni may be adopted.

光検出素子形成基板40は、図9および図10に示すように、シリコン基板40aの一表面側(図9(c)における右面側)に、中間層基板30の2つの導体パターン37,37と接合されて電気的に接続される2つの導体パターン47a,47bが形成されるとともに、中間層基板30の接合用金属層38と接合される接合用金属層48が形成されている。ここにおいて、光検出素子4は、フォトダイオードにより構成されており、光検出素子形成基板40に形成された2つの導体パターン47a,47bの一方の導体パターン47a(図10における上側の導体パターン47a)は、光検出素子4を構成するフォトダイオードのp形領域4aに電気的に接続され、他方の導体パターン47b(図10における下側の導体パターン47b)は、上記フォトダイオードのn形領域4bを構成するシリコン基板40aに電気的に接続されている。   As shown in FIGS. 9 and 10, the photodetecting element forming substrate 40 has two conductor patterns 37, 37 of the intermediate layer substrate 30 on one surface side of the silicon substrate 40a (right side in FIG. 9C). Two conductor patterns 47 a and 47 b that are bonded and electrically connected are formed, and a bonding metal layer 48 that is bonded to the bonding metal layer 38 of the intermediate layer substrate 30 is formed. Here, the photodetecting element 4 is constituted by a photodiode, and one of the two conductor patterns 47a and 47b formed on the photodetecting element forming substrate 40 (the upper conductive pattern 47a in FIG. 10). Is electrically connected to the p-type region 4a of the photodiode constituting the photodetecting element 4, and the other conductor pattern 47b (lower conductor pattern 47b in FIG. 10) is connected to the n-type region 4b of the photodiode. It is electrically connected to the silicon substrate 40a that constitutes it.

また、光検出素子形成基板40は、シリコン基板40aの上記一表面側にシリコン酸化膜からなる絶縁膜43が形成されており、当該絶縁膜43がフォトダイオードの反射防止膜を兼ねている。また、光検出素子形成基板40は、上記一方の導体パターン47aが、絶縁膜43に形成したコンタクトホール43aを通してp形領域4aと電気的に接続され、上記他方の導体パターン47bが絶縁膜43に形成したコンタクトホール43bを通してn形領域4bと電気的に接続されている。ここにおいて、各導体パターン47a,47bおよび接合用金属層48は、絶縁膜43上に形成されたTi膜と当該Ti膜上に形成されたAu膜との積層膜により構成されており、同時に形成してある。なお、本実施形態では、絶縁膜43上のTi膜の膜厚を15〜50nm、Ti膜上のAu膜の膜厚を500nmに設定してあるが、これらの数値は一例であって特に限定するものではない。ここにおいて、各Au膜の材料は、純金に限らず不純物を添加したものでもよい。また、各Au膜と絶縁膜43との間に密着性改善用の密着層としてTi膜を介在させてあるが、密着層の材料はTiに限らず、例えば、Cr、Nb、Zr、TiN、TaNなどでもよい。   Further, in the photodetecting element forming substrate 40, an insulating film 43 made of a silicon oxide film is formed on the one surface side of the silicon substrate 40a, and the insulating film 43 also serves as an antireflection film of the photodiode. Further, in the light detection element forming substrate 40, the one conductor pattern 47a is electrically connected to the p-type region 4a through the contact hole 43a formed in the insulating film 43, and the other conductor pattern 47b is connected to the insulating film 43. The n-type region 4b is electrically connected through the formed contact hole 43b. Here, each of the conductor patterns 47a and 47b and the bonding metal layer 48 is composed of a laminated film of a Ti film formed on the insulating film 43 and an Au film formed on the Ti film, and is formed at the same time. It is. In this embodiment, the thickness of the Ti film on the insulating film 43 is set to 15 to 50 nm, and the thickness of the Au film on the Ti film is set to 500 nm. However, these numerical values are only examples and are particularly limited. Not what you want. Here, the material of each Au film is not limited to pure gold, and may be added with impurities. Further, although a Ti film is interposed as an adhesion improving layer for adhesion between each Au film and the insulating film 43, the material of the adhesion layer is not limited to Ti, for example, Cr, Nb, Zr, TiN, TaN or the like may be used.

上述の実装基板2の形成にあたっては、例えば図1に示すように、光検出素子4、絶縁膜43、各導体パターン47a,47b、および接合用金属層48が形成されたシリコン基板40aと中間層基板30とを低温での直接接合が可能な常温接合法などにより接合する第1の接合工程を行った後、シリコン基板40aを所望の厚みまで研磨する研磨工程を行い、その後、誘導結合プラズマ(ICP)型のドライエッチング装置などを用いてシリコン基板40aに光取出窓41を形成する光取出窓形成工程を行うことで光検出素子形成基板40を完成させてから、LEDチップ1が実装されボンディングワイヤ14の結線が行われたLED搭載用基板20と中間層基板30とを常温接合法などにより接合する第2の接合工程を行うようにすればよい。なお、常温接合法では、接合前に互いの接合表面へアルゴンのプラズマ若しくはイオンビーム若しくは原子ビームを真空中で照射して各接合表面の清浄化・活性化を行ってから、接合表面同士を接触させ、常温下で直接接合する。なお、本実施形態では、シリコン基板20aが第1のシリコン基板を構成し、シリコン基板40aが第2のシリコン基板を構成し、シリコン基板30aが第3のシリコン基板を構成している。   In the formation of the mounting substrate 2 described above, for example, as shown in FIG. 1, the silicon substrate 40a and the intermediate layer on which the light detecting element 4, the insulating film 43, the conductor patterns 47a and 47b, and the bonding metal layer 48 are formed. After performing a first bonding step for bonding the substrate 30 to the substrate 30 by a room temperature bonding method capable of direct bonding at a low temperature, a polishing step for polishing the silicon substrate 40a to a desired thickness is performed, and then inductively coupled plasma ( The light detection element forming substrate 40 is completed by performing the light extraction window forming step of forming the light extraction window 41 on the silicon substrate 40a using an ICP) type dry etching apparatus or the like, and then the LED chip 1 is mounted and bonded. If a second bonding step is performed in which the LED mounting substrate 20 to which the wires 14 are connected and the intermediate layer substrate 30 are bonded by a room temperature bonding method or the like. There. In the normal temperature bonding method, the bonding surfaces are contacted with each other after the bonding surfaces are cleaned and activated by irradiating the bonding surfaces with argon plasma, ion beam or atomic beam in vacuum before bonding. And bond directly at room temperature. In the present embodiment, the silicon substrate 20a constitutes a first silicon substrate, the silicon substrate 40a constitutes a second silicon substrate, and the silicon substrate 30a constitutes a third silicon substrate.

上述の第1の接合工程では、シリコン基板40aの接合用金属層48と中間層基板30の接合用金属層38とが接合されるとともに、シリコン基板40aの導体パターン47a,47bと中間層基板30の導体パターン37,37とが接合され電気的に接続される。ここで、導体パターン47a,47bと導体パターン37,37との接合部位は、貫通孔配線34に重なる領域からずらしてあるので、導体パターン47a,47bと導体パターン37,37との互いの接合面の平坦度を高めることができ、接合歩留まりを高めることができるとともに接合信頼性を高めることができる。また、第2の接合工程では、LED搭載用基板20の接合用金属層29と中間層基板30の接合用金属層36とが接合されるとともに、LED搭載用基板20の導体パターン25b,25bと中間層基板30の導体パターン35,35とが接合され電気的に接続される。ここで、導体パターン25b,25bと導体パターン35,35との接合部位は、貫通孔配線24に重なる領域および貫通孔配線34に重なる領域からずらしてあるので、導体パターン25b,25bと導体パターン35,35との互いの接合面の平坦度を高めることができ、接合歩留まりを高めることができるとともに接合信頼性を高めることができる。   In the first bonding step, the bonding metal layer 48 of the silicon substrate 40a and the bonding metal layer 38 of the intermediate layer substrate 30 are bonded, and the conductor patterns 47a and 47b of the silicon substrate 40a and the intermediate layer substrate 30 are bonded. The conductor patterns 37 and 37 are joined and electrically connected. Here, since the joint portions of the conductor patterns 47a and 47b and the conductor patterns 37 and 37 are shifted from the region overlapping the through-hole wiring 34, the joint surfaces of the conductor patterns 47a and 47b and the conductor patterns 37 and 37 are mutually connected. The flatness of the substrate can be increased, the junction yield can be increased, and the junction reliability can be increased. In the second bonding step, the bonding metal layer 29 of the LED mounting substrate 20 and the bonding metal layer 36 of the intermediate layer substrate 30 are bonded, and the conductor patterns 25b and 25b of the LED mounting substrate 20 The conductor patterns 35 and 35 of the intermediate layer substrate 30 are joined and electrically connected. Here, since the joint portions of the conductor patterns 25b and 25b and the conductor patterns 35 and 35 are shifted from the region overlapping the through-hole wiring 24 and the region overlapping the through-hole wiring 34, the conductor patterns 25b and 25b and the conductor pattern 35 are arranged. , 35, the flatness of the mutual joint surfaces can be increased, the joint yield can be increased, and the joint reliability can be enhanced.

また、上述の透光性部材3は、透光性材料(例えば、シリコーン、アクリル樹脂、ガラスなど)からなる透光性基板を用いて形成してある。ここで、透光性部材3は、実装基板2と同じ外周形状の矩形板状に形成されており、実装基板2側とは反対の光取り出し面に、LEDチップ1から放射された光の全反射を抑制する微細凹凸構造が形成されている。ここにおいて、透光性部材3の光取り出し面に形成する微細凹凸構造は、多数の微細な凹部が2次元周期構造を有するように形成されている。なお、上述の微細凹凸構造は、例えば、レーザ加工技術やエッチング技術やインプリントリソグラフィ技術などを利用して形成すればよい。また、微細凹凸構造の周期は、LEDチップ1の発光ピーク波長の1/4〜100倍程度の範囲で適宜設定すればよい。   Moreover, the above-mentioned translucent member 3 is formed using the translucent board | substrate which consists of translucent materials (for example, silicone, an acrylic resin, glass, etc.). Here, the translucent member 3 is formed in a rectangular plate shape having the same outer peripheral shape as the mounting substrate 2, and all of the light emitted from the LED chip 1 is formed on the light extraction surface opposite to the mounting substrate 2 side. A fine concavo-convex structure that suppresses reflection is formed. Here, the fine concavo-convex structure formed on the light extraction surface of the translucent member 3 is formed such that many fine concave portions have a two-dimensional periodic structure. The fine concavo-convex structure described above may be formed using, for example, a laser processing technique, an etching technique, an imprint lithography technique, or the like. The period of the fine concavo-convex structure may be set as appropriate within a range of about ¼ to 100 times the emission peak wavelength of the LED chip 1.

本実施形態の発光装置の製造にあたっては、上述の各シリコン基板20a,30a,40aとして、それぞれLED搭載用基板20、中間層基板30、光検出素子形成基板40を多数形成可能なシリコンウェハを用いるとともに、上述の透光性基板として透光性部材3を多数形成可能なウェハ状のもの(透光性ウェハ)を用い、上述の第1の接合工程、研磨工程、光取出窓形成工程、第2の接合工程、実装基板2の収納凹所2aに封止樹脂を充填して封止部5を形成する封止部形成工程、封止部形成工程の後で実装基板2と透光性部材3とを接合する第3の接合工程などの各工程をウェハレベルで行うことでウェハレベルパッケージ構造体を形成してから、ダイシング工程により実装基板2のサイズに分割されている。したがって、LED搭載用基板20と中間層基板30と光検出素子形成基板40と透光性部材3とが同じ外形サイズとなり、小型のパッケージを実現できるとともに、製造が容易になる。また、中間層基板30におけるミラー2dと光検出素子形成基板40における光検出素子4との相対的な位置精度を高めることができ、LEDチップ1から側方へ放射された光がミラー2dにより反射されて光検出素子4へ導かれる。   In manufacturing the light emitting device of this embodiment, a silicon wafer capable of forming a large number of LED mounting substrates 20, intermediate layer substrates 30, and light detection element formation substrates 40 is used as each of the silicon substrates 20a, 30a, and 40a described above. In addition, a wafer-like one (translucent wafer) capable of forming a large number of translucent members 3 is used as the above-described translucent substrate, and the above-described first bonding step, polishing step, light extraction window forming step, The mounting substrate 2 and the translucent member after the bonding step 2, the sealing portion forming step of filling the housing recess 2a of the mounting substrate 2 with the sealing resin to form the sealing portion 5, and the sealing portion forming step The wafer level package structure is formed by performing each process such as a third bonding process for bonding 3 to the wafer 3 at the wafer level, and then divided into the size of the mounting substrate 2 by a dicing process. Therefore, the LED mounting substrate 20, the intermediate layer substrate 30, the light detection element forming substrate 40, and the translucent member 3 have the same outer size, so that a small package can be realized and manufacturing is facilitated. Further, the relative positional accuracy between the mirror 2d on the intermediate layer substrate 30 and the light detecting element 4 on the light detecting element forming substrate 40 can be increased, and the light emitted from the LED chip 1 to the side is reflected by the mirror 2d. Then, it is guided to the light detection element 4.

以上説明した本実施形態の発光装置では、LEDチップ1を収納する収納凹所2aが一表面に形成され当該収納凹所2aの内底面にLEDチップ1が実装される実装基板2が、収納凹所2aの周部から内方へ突出する突出部2cを有し、当該突出部2cにLEDチップ1から放射された光を検出する光検出素子4が設けられているので、実装基板2の一表面側において収納凹所2aの周囲に光検出素子4を配置するためのスペースを別途に確保する必要がなく、光検出素子4を実装基板2に設けながらも小型化が可能になる。   In the light emitting device of the present embodiment described above, the housing recess 2a for housing the LED chip 1 is formed on one surface, and the mounting substrate 2 on which the LED chip 1 is mounted on the inner bottom surface of the housing recess 2a Since the projecting portion 2c projecting inward from the peripheral portion of the location 2a and the light detecting element 4 for detecting the light emitted from the LED chip 1 is provided on the projecting portion 2c, one of the mounting substrates 2 is provided. There is no need to separately provide a space for disposing the light detection element 4 around the housing recess 2a on the front surface side, and the light detection element 4 can be downsized while being provided on the mounting substrate 2.

また、本実施形態の発光装置では、実装基板2に、当該実装基板2の他表面側の外部接続用電極27aとLEDチップ1とを電気的に接続する貫通孔配線24が形成されているので、実装基板2の一表面側においてLEDチップ1と電気的に接続される配線を引き回す場合に比べて、実装基板2の小型化を図れる。また、本実施形態では、実装基板2を複数のシリコン基板20a,30a,40aを用いて形成しているので、フォトダイオードのような光検出素子4を実装基板2中に容易に形成することが可能となり、低コスト化を図れる。   Further, in the light emitting device of this embodiment, the through hole wiring 24 that electrically connects the external connection electrode 27a on the other surface side of the mounting substrate 2 and the LED chip 1 is formed on the mounting substrate 2. The mounting substrate 2 can be reduced in size as compared with the case where the wiring electrically connected to the LED chip 1 is routed on the one surface side of the mounting substrate 2. In the present embodiment, since the mounting substrate 2 is formed using a plurality of silicon substrates 20a, 30a, and 40a, the light detection element 4 such as a photodiode can be easily formed in the mounting substrate 2. This is possible and the cost can be reduced.

また、本実施形態の発光装置は、実装基板2に光検出素子4が設けられているので、例えば、LEDチップ1として赤色LEDチップを採用した発光装置と、LEDチップ1として緑色LEDチップを採用した発光装置と、LEDチップ1として青色LEDチップを採用した発光装置とを同一の回路基板上に近接して配置して、当該回路基板に各発光装置のLEDチップ1を駆動する駆動回路部と、各光検出素子4により検出される光強度がそれぞれの目標値に保たれるように駆動回路部から各発光色のLEDチップ1に流れる電流をフィードバック制御する制御回路部などを設けておくことにより、各光検出素子4それぞれの出力に基づいて各発光色のLEDチップ1の光出力を各別に制御することができ、各発光色ごとのLEDチップ1の光出力の経時変化の違いなどによらず混色光(ここでは、白色光)の光色や色温度の精度を向上することができる。要するに、所望の混色光を安定して得ることができる。   In the light emitting device of the present embodiment, since the light detection element 4 is provided on the mounting substrate 2, for example, a light emitting device employing a red LED chip as the LED chip 1 and a green LED chip as the LED chip 1 are employed. A light emitting device and a light emitting device employing a blue LED chip as the LED chip 1 are arranged close to each other on the same circuit board, and a drive circuit unit that drives the LED chip 1 of each light emitting apparatus on the circuit board; In addition, a control circuit unit that feedback-controls the current flowing from the drive circuit unit to the LED chip 1 of each emission color is provided so that the light intensity detected by each photodetecting element 4 is maintained at each target value. Thus, the light output of the LED chip 1 of each emission color can be controlled separately based on the output of each light detection element 4, and the LED chip 1 for each emission color can be controlled. The light output of the difference such as to depend not mixed color light of aging (here, white light) can improve the accuracy of the light color and color temperature. In short, desired mixed color light can be stably obtained.

また、本実施形態の発光装置では、光検出素子4の受光面へ外乱光が入射するのを防止することができ、光検出素子4の出力のS/N比をより高めることが可能になる。   Further, in the light emitting device of the present embodiment, disturbance light can be prevented from entering the light receiving surface of the light detection element 4, and the S / N ratio of the output of the light detection element 4 can be further increased. .

また、図12に示した従来構成では、透明樹脂層103と空気との界面でLED101からの光の一部を全反射させる必要があるのに対して、本実施形態の発光装置では、透光性部材3の光取り出し面に、LEDチップ1から放射された光の全反射を抑制する微細凹凸構造が形成されているので、透光性部材3における実装基板2側とは反対に存在する媒質(空気)と透光性部材3との屈折率差に起因した光の全反射を抑制することができ、光取り出し効率を高めることができる。   In the conventional configuration shown in FIG. 12, it is necessary to totally reflect a part of the light from the LED 101 at the interface between the transparent resin layer 103 and the air. Since the fine concavo-convex structure for suppressing the total reflection of the light emitted from the LED chip 1 is formed on the light extraction surface of the transparent member 3, the medium existing opposite to the mounting substrate 2 side in the transparent member 3 Total reflection of light caused by the difference in refractive index between (air) and the translucent member 3 can be suppressed, and light extraction efficiency can be increased.

また、本実施形態では、実装基板2の形成にあたって上述の各接合工程において、低温での直接接合が可能な常温接合法を採用しているので、各接合工程でLEDチップ1のジャンクション温度が最大ジャンクション温度を超えるのを防止することができる。   Further, in the present embodiment, since the room temperature bonding method capable of direct bonding at a low temperature is adopted in each of the above-described bonding processes in forming the mounting substrate 2, the junction temperature of the LED chip 1 is maximized in each bonding process. It is possible to prevent the junction temperature from being exceeded.

また、本実施形態の発光装置では、実装基板2のLED搭載用基板20にLEDチップ1と熱結合するサーマルビア26を設けてあるので、LEDチップ1で発生した熱を効率よく外部へ逃がすことができ、LEDチップ1のジャンクション温度の温度上昇を抑制できるから、入力電力を大きくでき、光出力の高出力化を図れる。   Further, in the light emitting device of the present embodiment, the thermal via 26 that is thermally coupled to the LED chip 1 is provided on the LED mounting substrate 20 of the mounting substrate 2, so that the heat generated in the LED chip 1 is efficiently released to the outside. Since the temperature rise of the junction temperature of the LED chip 1 can be suppressed, the input power can be increased and the light output can be increased.

なお、本実施形態では、実装基板2の収納凹所2aの内底面に1つのLEDチップ1を実装してあるが、LEDチップ1の数は特に限定するものではなく、発光色が同じ複数のLEDチップ1を収納凹所2aの内底面に実装するようにしてもよい。   In the present embodiment, one LED chip 1 is mounted on the inner bottom surface of the housing recess 2a of the mounting substrate 2. However, the number of LED chips 1 is not particularly limited, and a plurality of light emission colors are the same. The LED chip 1 may be mounted on the inner bottom surface of the storage recess 2a.

実施形態の発光装置における実装基板の形成方法の説明図である。It is explanatory drawing of the formation method of the mounting substrate in the light-emitting device of embodiment. 同上の発光装置の概略断面図である。It is a schematic sectional drawing of a light-emitting device same as the above. 同上の発光装置の概略分解斜視図である。It is a general | schematic disassembled perspective view of a light-emitting device same as the above. 同上における実装基板を示し、(a)は概略平面図、(b)は(a)のA−A’概略断面図、(c)は(a)のB−B’概略断面図である。The mounting board | substrate is shown, (a) is a schematic plan view, (b) is A-A 'schematic sectional drawing of (a), (c) is B-B' schematic sectional drawing of (a). 同上におけるLED搭載用基板を示し、(a)は概略平面図、(b)は(a)のA−A’概略断面図、(c)は(a)のB−B’概略断面図である。The board | substrate for LED mounting same as the above is shown, (a) is a schematic plan view, (b) is AA 'schematic sectional drawing of (a), (c) is BB' schematic sectional drawing of (a). . 同上におけるLED搭載用基板の概略下面図である。It is a schematic bottom view of the board | substrate for LED mounting in the same as the above. 同上における中間層基板を示し、(a)は概略平面図、(b)は(a)のA−A’概略断面図、(c)は(a)のB−B’概略断面図である。The intermediate | middle layer board | substrate in the same is shown, (a) is a schematic plan view, (b) is A-A 'schematic sectional drawing of (a), (c) is B-B' schematic sectional drawing of (a). 同上における中間層基板の概略下面図である。It is a schematic bottom view of the intermediate | middle layer board | substrate in the same as the above. 同上における光検出素子形成基板を示し、(a)は概略平面図、(b)は(a)のA−A’概略断面図、(c)は(a)のB−B’概略断面図である。The optical detection element formation board in the same as above is shown, (a) is a schematic plan view, (b) is an AA 'schematic sectional view of (a), (c) is a BB' schematic sectional view of (a). is there. 同上における光検出素子形成基板の概略下面図である。It is a schematic bottom view of the optical detection element formation board | substrate in the same as the above. 従来例を示し、(a)は概略平面図、(b)は(a)のA−A’概略断面図である。A prior art example is shown, (a) is a schematic plan view, and (b) is a schematic cross-sectional view along A-A 'of (a). 他の従来例を示す概略断面図である。It is a schematic sectional drawing which shows another prior art example.

符号の説明Explanation of symbols

1 LEDチップ
2 実装基板
2a 収納凹所
2c 突出部
4 光検出素子
20 LED搭載用基板
20a シリコン基板(第1のシリコン基板)
24 貫通孔配線
30 中間層基板
30a シリコン基板(第3のシリコン基板)
31 開口窓
34 貫通孔配線
40 光検出素子形成基板
40a シリコン基板(第2のシリコン基板)
41 光取出窓
DESCRIPTION OF SYMBOLS 1 LED chip 2 Mounting board | substrate 2a Storage recess 2c Protrusion part 4 Photodetection element 20 LED mounting board | substrate 20a Silicon substrate (1st silicon substrate)
24 Through-hole wiring 30 Intermediate layer substrate 30a Silicon substrate (third silicon substrate)
31 Opening window 34 Through-hole wiring 40 Photodetecting element forming substrate 40a Silicon substrate (second silicon substrate)
41 Light extraction window

Claims (6)

LEDチップと、少なくともLEDチップを収納する収納凹所が一表面に形成された実装基板により構成されるパッケージとを備え、実装基板が収納凹所の周部から内方へ突出する突出部を有し、当該突出部にLEDチップから放射された光を検出する光検出素子が設けられてなるものであり、実装基板が、第1のシリコン基板を用いて形成されてなりLEDチップが一表面側に搭載されたLED搭載用基板と、第2のシリコン基板を用いて形成されてなりLED搭載用基板の前記一表面側に対向配置され光取出窓が形成されるとともに光検出素子が形成された光検出素子形成基板と、第3のシリコン基板を用いて形成されてなりLED搭載用基板と光検出素子形成基板との間に介在し光取出窓に連通する開口窓が形成され開口窓の内側面がLEDチップから放射された光を光検出素子へ導くミラーとなる中間層基板とで構成され、LED搭載用基板と中間層基板と光検出素子形成基板とで囲まれた空間が前記収納凹所を構成してなる発光装置の製造方法であって、光検出素子が形成された第2のシリコン基板と中間層基板とを接合する第1の接合工程と、第1の接合工程の後で第2のシリコン基板を所望の厚さまで研磨する研磨工程と、研磨工程の後で第2のシリコン基板に光取出窓を形成する光取出窓形成工程と、光取出窓形成工程の後でLEDチップが実装されたLED搭載用基板と中間層基板とを接合する第2の接合工程とを備えることを特徴とする発光装置の製造方法。   An LED chip and a package formed of a mounting substrate in which at least a storage recess for storing the LED chip is formed on one surface, and the mounting substrate has a protruding portion that protrudes inward from the peripheral portion of the storage recess. In addition, a light detection element for detecting light emitted from the LED chip is provided in the projecting portion, and the mounting substrate is formed using the first silicon substrate, and the LED chip is on the one surface side. The LED mounting substrate and the second silicon substrate mounted on the LED mounting substrate are opposed to the one surface side of the LED mounting substrate to form a light extraction window and a light detection element. An opening window formed between the LED mounting substrate and the light detection element formation substrate is formed by using the light detection element formation substrate and the third silicon substrate, and communicates with the light extraction window. Side An intermediate layer substrate that serves as a mirror that guides light emitted from the ED chip to the light detection element, and a space surrounded by the LED mounting substrate, the intermediate layer substrate, and the light detection element formation substrate forms the storage recess. A method for manufacturing a light-emitting device comprising the first bonding step for bonding the second silicon substrate on which the light detection element is formed and the intermediate layer substrate, and the second after the first bonding step. The LED chip is mounted after the polishing step of polishing the silicon substrate to a desired thickness, the light extraction window forming step of forming the light extraction window on the second silicon substrate after the polishing step, and the light extraction window forming step And a second bonding step for bonding the LED mounting substrate and the intermediate layer substrate. 前記第1の接合工程および前記第2の接合工程では、接合前に互いの接合表面の活性化を行ってから接合表面同士を接触させ常温接合することを特徴とする請求項1項に記載の発光装置の製造方法。   2. The room temperature bonding according to claim 1, wherein in the first bonding step and the second bonding step, the bonding surfaces are brought into contact with each other after the bonding surfaces are activated before bonding. Manufacturing method of light-emitting device. 前記中間層基板に、前記光検出素子に電気的に接続される貫通孔配線が形成され、前記LED搭載用基板に、前記LEDチップに電気的に接続される貫通孔配線および前記中間層基板の貫通孔配線と電気的に接続される貫通孔配線が形成され、前記中間層基板および前記光検出素子形成基板が前記LED搭載用基板と同じ外形寸法に形成されてなり、前記第1の接合工程では、前記第2のシリコン基板と前記中間層基板との活性化された接合用金属層同士および活性化された導体パターン同士を常温接合するようにし、導体パターン同士の接合部位を、前記中間層基板に形成された前記貫通孔配線に重なる領域からずらしてあり、前記第2の接合工程では、前記LED搭載用基板と前記中間層基板との活性化された接合用金属層同士および活性化された導体パターン同士を常温接合するようにし、導体パターン同士の接合部位を、前記LED搭載用基板に形成された前記貫通孔配線に重なる領域および前記中間層形成基板に形成された前記貫通孔配線に重なる領域からずらしてあることを特徴とする請求項2記載の発光装置の製造方法。   A through-hole wiring electrically connected to the photodetecting element is formed in the intermediate layer substrate, and the through-hole wiring electrically connected to the LED chip and the intermediate layer substrate are electrically connected to the LED mounting substrate. A through-hole wiring electrically connected to the through-hole wiring is formed, and the intermediate layer substrate and the light detection element forming substrate are formed to have the same outer dimensions as the LED mounting substrate, and the first bonding step Then, the activated bonding metal layers of the second silicon substrate and the intermediate layer substrate and the activated conductor patterns are bonded at room temperature, and the bonding portion of the conductive patterns is defined as the intermediate layer. In the second bonding step, the activated bonding metal layers of the LED mounting substrate and the intermediate layer substrate and the active metal layers are shifted from the region overlapping the through-hole wiring formed on the substrate. The conductor patterns thus formed are joined at room temperature, and the joint portions of the conductor patterns are overlapped with the through-hole wiring formed in the LED mounting substrate and the through-hole formed in the intermediate layer forming substrate. 3. The method for manufacturing a light emitting device according to claim 2, wherein the method is shifted from a region overlapping with the wiring. 前記各工程をウェハレベルで行うことでウェハレベルパッケージ構造体を形成するようにし、当該ウェハレベルパッケージ構造体から前記発光装置に分割するダイシング工程を備えることを特徴とする請求項1ないし請求項3のいずれか1項に記載の発光装置の製造方法。   4. A dicing process for dividing the wafer level package structure into the light emitting device by forming each wafer level at a wafer level to form a wafer level package structure. The manufacturing method of the light-emitting device of any one of these. 前記第2の接合工程と前記ダイシング工程との間に、前記実装基板の前記収納凹所に封止樹脂を充填して前記LEDチップを封止する封止部を形成する封止部形成工程を備えることを特徴とする請求項4記載の発光装置の製造方法。   A sealing portion forming step of forming a sealing portion for sealing the LED chip by filling the housing recess of the mounting substrate with a sealing resin between the second bonding step and the dicing step. The method for manufacturing a light emitting device according to claim 4, further comprising: 前記パッケージが、前記実装基板と前記実装基板の前記一表面側において前記収納凹所を閉塞する形で前記実装基板に接合された透光性部材とで構成され、前記封止部形成工程と前記ダイシング工程との間に、前記実装基板と透光性部材とを接合する第3の接合工程を備えることを特徴とする請求項5記載の発光装置の製造方法。   The package is composed of the mounting substrate and a translucent member bonded to the mounting substrate so as to close the housing recess on the one surface side of the mounting substrate, and the sealing portion forming step and the The method for manufacturing a light emitting device according to claim 5, further comprising a third joining step for joining the mounting substrate and the translucent member between the dicing steps.
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