JP4829690B2 - Semiconductor device - Google Patents

Abstract

A semiconductor device is composed of a pair of semiconductor chips (402, 404) arranged parallel on the same flat plane; a high voltage bus bar (21) bonded on the surface on the collector side of one semiconductor chip (402); a low voltage bus bar (23) connected to the surface on the emitter side of the other semiconductor chip (404) with a bonding wire (27); a first metal wiring board (24-1) connected to the surface on the emitter side of the semiconductor chip (402) with a bonding wire (26); a second metal wiring board (24-2) bonded on the surface on the collector side of the semiconductor chip (404); a third metal wiring board (24-3) connected to the first metal wiring board (24-1); a fourth metal wiring board (24-4) connected by being bent from an end portion of the second metal wiring board (24-2); and an output bus bar (24) having output terminals (405) extending from each end portion of the third metal wiring board (24-3) and that of the fourth metal wiring board (24-4).

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device including an IGBT module used in a drive circuit for driving a drive motor of an electric vehicle.

  In an electric vehicle such as an electric vehicle, an inverter device is used to drive the drive motor. This inverter device includes an electric circuit in which switching elements are connected in a bridge circuit configuration. In the inverter device, the switching element of the bridge circuit is appropriately turned on / off to switch the current flowing to the driving motor. As switching elements constituting the bridge circuit, power transistors, IGBTs, FETs, IEGTs, and the like are widely used. Such an inverter device is usually configured with a module structure in which a plurality of switching elements are housed in one package.

  When operating a drive motor of an electric vehicle, a large current flows through the switching elements constituting the bridge circuit, and a surge voltage is generated due to an on / off operation. For this reason, in the inverter device, when a plurality of switching elements are mounted inside one package, the length of the wiring serving as a current path is shortened as much as possible, thereby reducing the resistance of the wiring and reducing the AC current. A device has been devised to reduce the value of inductance, which is an electrical characteristic.

Conventionally, for example, a semiconductor device described in Patent Document 1 is known as a semiconductor device having a module structure such as the above-described inverter device. The semiconductor device described in Patent Document 1 has three power terminals: a high voltage external power terminal, a low voltage external power terminal, and an output external power terminal. Each of these three power terminals has a plate shape whose planar shape is a rectangle, and is arranged in a state of being overlapped with a gap so as to have a parallel arrangement relationship. An output external power terminal is arranged between the high voltage external power terminal and the low voltage external power terminal. Furthermore, among the three power terminals, a semiconductor chip (such as a switching element) is sandwiched between two adjacent power terminals. The high-voltage external power terminal and the low-voltage external power terminal are formed to extend to the same one end side, and the output external power terminal between them extends to the other end side on the opposite side. It is formed to be installed.
JP 2002-26251 A

  In the semiconductor device described in Patent Document 1, since the connection between the semiconductor chip and the power terminal is performed at a short distance, the voltage drop caused by the internal wiring is reduced. In the semiconductor device, since the direction of the current flowing through the high-voltage external power terminal and the direction of the current flowing through the low-voltage external power terminal are reversed, the direction of the magnetic field generated by each current is reversed, and inductance can be reduced. It has the characteristic.

  By the way, the inverter device in the case of a three-phase motor includes a high-side (high-voltage side) semiconductor chip and a low-side (low-voltage side) semiconductor chip for each of the U phase, V phase, and W phase, for a total of six semiconductors. Built-in chip. This inverter device includes a semiconductor module in which two high-side and low-side semiconductor chips are packaged for each in-phase. In this semiconductor module, when used for motor control, since the high-side semiconductor chip and the low-side semiconductor chip are not short-circuited, no current flows through the high-voltage power terminal and the low-voltage power terminal simultaneously. That is, in the bridge circuit, any one of a current path flowing from the high voltage power terminal to the output power terminal through the semiconductor chip and a current path flowing from the output power terminal to the low voltage power terminal through the semiconductor chip. For this reason, when motor control is performed by an inverter device of a three-phase motor, there is a problem that it is difficult to reduce inductance even if the configuration of the semiconductor device described in Patent Document 1 is applied.

  An object of the present invention is to provide a semiconductor device capable of reducing the inductance of a main circuit in a semiconductor module structure in which a plurality of semiconductor chips are mounted in one package. is there.

  In order to achieve the above object, a semiconductor device according to the present invention is configured as follows.

A first semiconductor device (corresponding to claim 1) is a high-side and low-side semiconductor chip constituting a bridge circuit of an inverter device, and a pair of semiconductor chips juxtaposed on the same plane and one of the high side Bonded to one surface of a semiconductor chip, a high voltage bus bar bonded to one surface of the semiconductor chip and having a high voltage terminal, a low voltage bus bar connected to one surface of the other semiconductor chip on the low side and having a low voltage terminal A first metal wiring board connected by a wire, a second metal wiring board joined to the other surface of the other semiconductor chip, and a first metal wiring board connected to the other surface of one semiconductor chip. A third metal wiring board that is spaced apart from the bonding wire by a predetermined distance and that is arranged in parallel to the high-voltage bus bar, and folded from the end of the second metal wiring board A fourth metal wiring board that is connected back and is spaced apart from the bonding wire connected to the other semiconductor chip by a predetermined distance and parallel to the second metal wiring board; a third metal wiring board; and a fourth metal wiring And an output bus bar having output terminals extending from respective ends of the plate.
In the above, when the power semiconductor element of the semiconductor chip is an IGBT element (N-channel type), one surface of one semiconductor chip is a surface on the collector side, the other surface is a surface on the emitter side, and the other semiconductor chip One side is an emitter side surface, and the other side is a collector side surface.

  In the semiconductor device described above, the current flows in opposite directions in the current path on the high side and the current path on the low side due to the structure of the semiconductor element module including the high-side and low-side semiconductor chips constituting the bridge circuit of the inverter device. The magnetic field generated around the high-voltage bus bar and the first metal wiring board is canceled out, and similarly, the magnetic field generated around the low-voltage bus bar and the second metal wiring board is canceled out. This reduces the inductance of the main circuit in the semiconductor module structure. Further, the magnetic field generated around the high-voltage side bonding wire and the third metal wiring board is canceled, and similarly, the magnetic field generated around the low-voltage side bonding wire and the fourth metal wiring board is canceled.

  In the second semiconductor device (corresponding to claim 2), in the above configuration, the high voltage terminal of the high voltage bus bar and the low voltage terminal of the low voltage bus bar are preferably on the same side, and the output terminal of the output bus bar is the high voltage terminal and the low voltage terminal. It is arrange | positioned in the intermediate position of the electric current path between.

  In the third semiconductor device (corresponding to claim 3), preferably, the first metal wiring board and the third metal wiring board are formed as separate members in the above configuration, and the second metal wiring board and the fourth metal are formed. The wiring board is formed as a separate member, and the output bus bar is joined to the joint between the third metal wiring board and the fourth metal wiring board. With this configuration, assemblability is improved and wire bonding is facilitated.

  In the above configuration, the fourth semiconductor device (corresponding to claim 4) is preferably made of metal between the first metal wiring board and the third metal wiring board and between the second metal wiring board and the fourth metal wiring board. A spacer is provided, and the gap between the third metal wiring board and the bonding wire and the gap between the fourth metal wiring board and the bonding wire can be adjusted.

  In the fifth semiconductor device (corresponding to claim 5), preferably, each of the pair of semiconductor chips includes a power semiconductor element and a rectifying semiconductor element, and the fifth semiconductor device (corresponding to claim 5) is more suitable for power than the rectifying semiconductor element. When driving a semiconductor device in which the ratio of the current flowing through the semiconductor element is increased, the power semiconductor element of one semiconductor chip is disposed on the side close to the high voltage terminal by the high voltage bus bar, and the power semiconductor of the other semiconductor chip When driving the semiconductor device in which the element is arranged on the side far from the low-voltage terminal on the second metal wiring board and the ratio of the current flowing through the power semiconductor element is smaller than that of the rectifying semiconductor element, The power semiconductor device of the chip is arranged on the side far from the high voltage terminal by the high voltage bus bar, and the power semiconductor element of the other semiconductor chip is arranged by the second metal wiring board with respect to the low voltage terminal. Characterized in that it is arranged to have side.

  According to the present invention, in a semiconductor element module comprising a high-side semiconductor chip and a low-side semiconductor chip constituting a bridge circuit of an inverter device, a wiring path portion from the high-voltage terminal to the high-side semiconductor chip and from the semiconductor chip to the output terminal The wiring path portions are arranged in parallel and the current flows in the opposite direction to reciprocate, so that the inductance of a circuit such as a high voltage bus bar can be reduced. In the same semiconductor element module, the wiring path part from the output terminal to the low-side semiconductor chip and the wiring path part from the semiconductor chip to the low-voltage terminal are arranged in parallel, and the current flows in the opposite direction and reciprocates. Therefore, the inductance of a circuit such as a low-voltage bus bar can be reduced. Since the inductance in the main circuit of the semiconductor element module can be reduced as described above, the surge voltage and switching loss generated during the switching operation in the inverter device can be reduced.

  DESCRIPTION OF EMBODIMENTS Preferred embodiments (examples) of the present invention will be described below with reference to the accompanying drawings.

  A representative embodiment of a semiconductor device according to the present invention will be described with reference to FIGS. FIG. 1 is an external view of a semiconductor device according to this embodiment, and shows a module structure of an IGBT module. 2 is a cross-sectional view taken along line AA in FIG. 1, and FIG. 3 is a cross-sectional view taken along line BB in FIG. 4 shows a circuit configuration diagram of the electrical circuit of the IGBT module shown in FIG. 1, and FIG. 5 shows a characteristic relationship of wiring of the IGBT module.

  The semiconductor device described in the present embodiment is a power semiconductor device, which is typically an inverter device for driving a three-phase motor for driving an electric vehicle. The IGBT module shown in FIG. 1 shows the main part of the inverter device. First, the configuration of the electrical circuit of the IGBT module will be described with reference to FIG.

  FIG. 4 shows an electric circuit portion of one phase of the bridge circuit of the inverter device (any one of the U phase, the V phase, and the W phase). The electric circuit shown in FIG. 4 includes a high-side IGBT element 402 disposed on the high-voltage terminal 401 side and a low-side IGBT element 404 disposed on the low-voltage terminal 403 side. The semiconductor element used in the semiconductor device according to the present embodiment is not limited to the IGBT element, and any element can be used as long as it is a power semiconductor element. The bridge circuit of the inverter device includes six power semiconductor elements, but one module is formed by a pair of upper and lower power semiconductor elements.

  The collector (C) of the IGBT element 402 is connected to the high voltage terminal 401. The emitter (E) of the IGBT element 402 is connected to the collector (C) of the IGBT element 404, and this connection point is connected to the output terminal 405. Further, the emitter (E) of the IGBT element 404 is connected to the low voltage terminal 403.

  Signal connectors 406 and 407 are connected between the gates (G) and emitters (E) of the two IGBT elements 402 and 404, respectively. Between the input terminals of the signal connectors 406 and 407, a drive control rectangular pulse signal 408 for turning on and off the IGBT elements 402 and 404 is input at an appropriate timing. Further, rectifying diode elements 409 and 410 are connected between the emitter (E) and the collector (C) of each of the two IGBT elements 402 and 404.

  Next, the physical structure of the IGBT module having the above electric circuit configuration will be described with reference to FIGS.

  In FIG. 1, a block 11 indicated by an alternate long and short dash line indicates an external shape of a package forming the IGBT module 12. The block 11 is substantially a mold part made of resin. A portion indicated by a solid line in FIG. 1 is a physical structure portion of the wiring board. Elements that are substantially the same as those of the electric circuit described in FIG. 4 are denoted by the same reference numerals.

  In FIG. 1, a portion denoted by reference numeral 401 is the high voltage terminal, a portion denoted by reference numeral 403 is the low voltage terminal, and a portion denoted by reference numeral 405 is the output terminal. Reference numerals 406 and 407 are the signal connectors. Further, reference numerals 402 and 404 are the IGBT elements, and reference numerals 409 and 410 are the diode elements. 1 to 3, the IGBT elements 402 and 404 have a vertical structure, an emitter and a gate are formed on the upper surface, a collector is formed on the lower surface, and an anode is formed on the upper surface of the diode elements 409 and 410. A cathode is formed on the lower surface.

  The high voltage terminal 401 is one end of the high voltage bus bar 21 and is the outer end of the high voltage bus bar 21 extending outside the block 11. The high-voltage bus bar 21 is a wiring member having a rectangular plate shape as a whole, and is a wiring member disposed on the high-voltage terminal 401 side. As shown in FIGS. 1 and 3, the high-voltage bus bar 21 is formed in a flat plate shape by a predetermined distance from the high-voltage terminal 401 and is bent downward from the middle. Is formed in a flat plate shape. As shown in FIG. 3 and the like, a hole 21 a is formed at the location of the high voltage terminal 401 of the high voltage bus bar 21, and the right half 21 b is fixed on the insulating layer 22. The insulating layer 22 is, for example, an epoxy or an insulating oxide film.

  The low-voltage terminal 403 is one end portion of the low-pressure bus bar 23 and is an outer end portion of the low-pressure bus bar 23 extending outside the block 11. Similarly, the low-voltage bus bar 23 is a wiring member having a rectangular plate shape as a whole, and is a wiring member disposed on the low-voltage terminal 403 side. As shown in FIGS. 1 and 2, the low-voltage bus bar 23 is formed in a flat plate shape by a predetermined distance from the low-voltage terminal 403, is bent slightly downward from the middle, and is formed on the insulating layer 22. It is fixed. As shown in FIG. 2 and the like, a hole 23 a is formed at the location of the low voltage terminal 403 of the low voltage bus bar 23.

  The output terminal 405 constitutes one end portion of the output bus bar 24 and is an outer end portion of the output bus bar 24 extended to the outside of the block 11. The output bus bar 24 has a substantially long shape as a whole, and a main portion has a Y-shaped plate shape. A hole 24 a is formed at the output terminal 405 of the output bus bar 24.

  In the IGBT module 12, as shown in FIGS. 1 to 3, the first metal wiring board 24-1, the second metal wiring board 24-2, the third metal wiring board 24-3, and the fourth metal wiring are used as wiring members. It has a plate 24-4. These first to fourth metal wiring boards are wiring elements that form the output bus bar 24. In particular, the Y-shaped portion of the output bus bar 24 is formed by a third metal wiring board 24-3 and a fourth metal wiring board 24-4.

  In the above, the plate-shaped high-voltage terminal 401 of the high-voltage bus bar 21, the plate-shaped low-voltage terminal 403 of the low-voltage bus bar 23, and the plate-shaped output terminal 405 of the output bus bar 24 are in the same plane at the same side location in the IGBT module 12. They are juxtaposed to be placed on top. Furthermore, the output terminal 405 is disposed at an intermediate position in the current path between the high voltage terminal 401 and the low voltage terminal 403. Thereby, the length of the current path from the high-voltage terminal 401 to the output terminal 405 through the high-side IGBT element 402 and the current path from the output terminal 405 to the low-voltage terminal 403 through the low-side IGBT element 404. The length of is almost equal. As a result, the electric characteristics of the high-pressure side and the low-pressure side are almost equal, and the motor output characteristics are improved. Further, if the output terminal 405 is to be disposed on the opposite side with respect to the high voltage terminal 401 and the low voltage terminal 403, the output terminal 405 needs to be bent and extended to the opposite side. For this reason, the member forming the output terminal becomes long, and the wiring length unrelated to the reduction of the inductance becomes long. The output terminal 405 of the present embodiment has an advantage that such a problem does not occur.

  In addition, about the plate shape of each bus bar of said high voltage | pressure bus bar 21, the low voltage | pressure bus bar 23, and the output bus bar 24, width is 20 mm, for example, and thickness is 0.5 mm, for example.

  Next, the electrical connection relationship between the IGBT elements 402 and 404 and the diode elements 409 and 410 will be described. This connection relationship is made by wiring by the high-voltage bus bar 21, the low-voltage bus bar 23, the output bus bar 24, and the first to fourth metal wiring boards 24-1, 24-2, 24-3, 24-4. .

  The high voltage side (high side) IGBT element 402 and the diode element 409 are mounted on the high voltage bus bar 21. The lower surfaces of the IGBT element 402 and the diode element 409, that is, the collector-side surface of the IGBT element 402 and the cathode-side surface of the diode element 409 are joined to the high-voltage bus bar 21 with solder or the like. The diode element 409 is disposed at a position far from the high voltage terminal 401, and the IGBT element 402 is disposed at a position near the high voltage terminal 401. The high voltage bus bar 21 is a wiring member connected to the high voltage terminal 401, and the cathode of the diode element 409 and the collector of the IGBT element 402 are electrically connected to the high voltage bus bar 21.

  Above the diode element 409 and the IGBT element 402, the third metal wiring board 24-3 is arranged at a required interval. The third metal wiring board 24-3 has a substantially plate shape, and one end is connected to the output bus bar 24. A first metal wiring board 24-1 is connected to the other end of the third metal wiring board 24-3 by a screw 25. In addition, you may make it the said coupling | bond part by the screw | thread 25 couple | bond using ultrasonic joining, solder joining, caulking etc. as another means. Further, as shown in FIG. 3, the upper surfaces of the diode element 409 and the IGBT element 402, that is, the anode of the diode element 409, the emitter and the gate of the IGBT element 402 are respectively connected to the first metal wiring board 24- 1 is connected.

  As shown in FIG. 2, the low voltage side (low side) IGBT element 404 and the diode element 410 are mounted on a second metal wiring board 24-2 fixed on the insulating layer 22. The lower surfaces of the IGBT element 404 and the diode element 410, that is, the collector-side surface of the IGBT element 404 and the cathode-side surface of the diode element 410 are joined to the second metal wiring board 24-2 with solder or the like. The low-voltage bus bar 23 is a wiring member connected to the low-voltage terminal 403, and the low-voltage bus bar 23 is connected to the anode on the upper surface of the diode element 410 and the emitter and gate on the upper surface of the IGBT element 404 by bonding wires 27. . The diode element 410 is arranged at a position close to the low voltage terminal 403, and the IGBT element 404 is arranged at a position far from the low voltage terminal 403.

  The second metal wiring board 24-2 is electrically connected to the cathode on the lower surface of the diode element 410 and the collector and gate of the IGBT element 404. One end of the second metal wiring board 24-2 is coupled to the fourth metal wiring board 24-4 with a screw 28. In addition, you may make it the said coupling | bond part by the screw | thread 28 couple | bond using ultrasonic bonding, solder bonding, caulking etc. as another means.

  A connecting portion between the first metal wiring board 24-1 and the third metal wiring board 24-3 and a connecting portion between the second metal wiring board 24-2 and the fourth metal wiring board 24-4 will be described.

  As shown in FIG. 2 or FIG. 3, the coupling side end of the third metal wiring board 24-3 and the coupling side end of the fourth metal wiring board 24-4 are respectively directed downward with respect to each of the above coupling parts. It is formed as an L-shaped bent part that forms a step. The coupling side end of the third metal wiring board 24-3 and the coupling side end of the fourth metal wiring board 24-4 are each a vertical part A forming an L-shape, as shown in FIG. -1 and the horizontal part A-2. The horizontal portion A-2 is a portion that comes into contact with and is joined to the coupling end portion of the corresponding metal wiring board. Regarding the vertical portion A-1, by changing the length in the vertical direction, the gap between the bonding wire 26 and the third metal wiring board 24-3 or the bonding wire 27 and the fourth metal wiring board 24-4 is obtained. It is possible to change the gap between the two.

  In addition, as an L-shaped bent portion that forms an upward step with respect to each of the coupling side end portion of the first metal wiring board 24-1 and the coupling side end portion of the second metal wiring board 24-2 positioned on the lower side. When formed, a gap between the horizontal portion similar to the above and the heat sink 32 widens, and it becomes easy to dispose a chip head for bonding such as ultrasonic bonding and caulking.

  In the above description, the arrangement relationship between the high-side IGBT element 402 and the diode element 409 with respect to the high-voltage terminal 401 and the arrangement relationship with respect to the low-side IGBT element 404 and the diode element 410 with respect to the low-voltage terminal 403 are opposite perspective positions relative to the respective terminals. is there.

  In this case, when driving the semiconductor device in which the ratio of the current flowing through the IGBT element is larger than that of the diode element, the IGBT element of one semiconductor chip is arranged on the side closer to the high voltage terminal by the high voltage bus bar, The IGBT element of the semiconductor chip is arranged on the side far from the low-voltage terminal in the second metal wiring board. On the other hand, when driving a semiconductor device in which the ratio of the current flowing through the IGBT element is smaller than that of the diode element, the IGBT element of one semiconductor chip is disposed on the side far from the high voltage terminal by the high voltage bus bar, The IGBT element of the semiconductor chip is arranged on the side closer to the low voltage terminal in the second metal wiring board.

  As shown in FIGS. 2 and 3, a heat sink 32 is provided below the insulating layer 22, that is, below the block 11 forming the IGBT module 12. The heat sink 32 is omitted in FIG.

  In the IGBT module 12 having the above structure, the IGBT element 402 and the diode element 409 on the high voltage terminal 401 side form a high voltage side (high side) semiconductor chip, and the IGBT element 404 and the diode element 410 on the low voltage terminal 403 side are on the low voltage side. A (low-side) semiconductor chip is formed. These pair of semiconductor chips have a physical positional relationship in which they are juxtaposed on the same plane.

  In the above structure, the high-voltage bus bar 21 and the low-voltage bus bar 23 arranged in parallel to each semiconductor chip, and the first metal wiring board 24-1 and the third metal wiring board 24-3 are all in a parallel positional relationship. And their distance is also set to a minimum. Further, the bus bar structure of the high-voltage side arm and the bus bar structure of the low-voltage side arm are in a symmetrical arrangement relationship with the vertical relationship reversed with respect to the semiconductor chip. For this reason, the electrical characteristics such as circuit inductance and circuit resistance are the same in the high-voltage side arm and the low-voltage side arm.

  In the above description, the third metal wiring board 24-3 is a metal wiring board that is spaced apart from the bonding wire 26 by a predetermined distance and is disposed in parallel to the high-voltage bus bar 21. The fourth metal wiring board 24-4 is connected by being folded back from the end of the second metal wiring board 24-2, is separated from the bonding wire 27 by a predetermined distance, and is connected to the second metal wiring board 24-2. It is a metal wiring board arrange | positioned in parallel.

  In the structure described above, it is optional between the first metal wiring board 24-1 and the third metal wiring board 24-3 and between the second metal wiring board 24-2 and the fourth metal wiring board 24-4. A metal spacer having a thickness of 1 mm can be provided. According to this configuration, the gap between the third metal wiring board 24-3 and the bonding wire 26 and the gap between the fourth metal wiring board 24-4 and the bonding wire 27 can be appropriately adjusted. .

  FIG. 5 shows a wiring path by the high-pressure bus bar 21, the low-pressure bus bar 23, the output bus bar 24, and the first to fourth metal wiring boards 24-1 to 24-4. As apparent from FIG. 5, the direction of the current flowing in the wiring path is reversed in each of the high-voltage side semiconductor chip (IGBT element 402 and diode element 409) and the low-voltage side semiconductor chip (IGBT element 404 and diode element 410). It is wired to become.

  With the configuration of the wiring board path in the IGBT module 12, the inductance of the main circuit is greatly reduced, and a non-inductive effect due to mutual inductance is produced.

  Next, an example of a method for manufacturing the IGBT module 12 will be outlined.

First, the high pressure side semiconductor chip (IGBT element 402 and diode element 409) is connected to the high voltage bus bar 21, and the low voltage side semiconductor chip (IGBT element 404 and diode element 410) is connected to the second metal wiring board 24-2, respectively. Die bond with.
Next, the high voltage bus bar 21 and the second metal wiring board 24-2 are set on the upper surface of the heat sink 32 via the insulating layer 22.
Next, a wire bond jig is set on the upper surface of the heat sink 32, and the first metal wiring board 24-1 and the low-voltage bus bar 23 are disposed on the wire bond jig.
Next, the signal connectors 406 and 407 are bonded to the upper surface of the heat sink 32.
Next, the main power wire and the signal wire are wire bonded.
Next, after setting the terminals (high voltage bus bar, low voltage bus bar, output bus bar) on the terminal gripping jig, the wire bonding jig is removed.
Finally, resin molding (block 11) is performed.

  According to the above manufacturing method, the first metal wiring board 24-1 and the third metal wiring board 24-3 are made of separate members, and the second metal wiring board 24-2 and the fourth metal wiring board 24- Since 4 is made of different members, there is an advantage that wire bonding is easy.

In the description of the above embodiment, the power semiconductor element used in the semiconductor device is an N-channel IGBT element. In this case, in the relationship between a pair of semiconductor chips juxtaposed on the same plane, the power semiconductor element of each semiconductor chip is an IGBT element (N-channel type), and one surface of one semiconductor chip is a surface on the collector side, The other surface is the emitter side surface, one surface of the other semiconductor chip is the emitter side surface, and the other surface is the collector side surface.
When any other power semiconductor element other than the IGBT element is used as the power semiconductor element, one surface and the other surface are functionally corresponding to the respective surfaces of the IGBT element. It becomes. For example, in the case of an N-channel MOS-FET, the collector of the IGBT element corresponds to “drain” and the emitter of the IGBT element corresponds to “source”.

  The configurations, shapes, sizes, and arrangement relationships described in the above embodiments are merely shown to the extent that the present invention can be understood and implemented, and the numerical values and the compositions (materials) of the respective configurations are as follows. It is only an example. Therefore, the present invention is not limited to the described embodiments, and can be modified in various forms without departing from the scope of the technical idea shown in the claims.

  The present invention is used as a semiconductor element module structure of an inverter device that drives a drive motor of an electric vehicle.

1 is an external view of a module structure of an IGBT module, particularly showing an external appearance of a semiconductor device according to an embodiment of the present invention. It is the sectional view on the AA line in FIG. It is the BB sectional view taken on the line in FIG. It is a circuit block diagram of the electric circuit of the IGBT module shown in FIG. FIG. 2 is a circuit diagram conceptually showing a characteristic relationship of wiring of the IGBT module shown in FIG. 1.

Explanation of symbols

11 blocks (resin mold)
12 IGBT Module 21 High Voltage Bus Bar 22 Insulating Film 23 Low Voltage Bus Bar 24 Output Bus Bar 24-1 First Metal Wiring Board 24-2 Second Metal Wiring Board 24-3 Third Metal Wiring Board 24-4 Fourth Metal Wiring Board 402, 404 IGBT element 409,410 Diode element

Claims (5)

A pair of semiconductor chips juxtaposed on the same plane;
A high-voltage bus bar bonded to one surface of one of the semiconductor chips and having a high-voltage terminal;
A low-voltage bus bar connected to one surface of the other semiconductor chip with a bonding wire and having a low-voltage terminal;
A first metal wiring board connected to the other surface of the one semiconductor chip by a bonding wire;
A second metal wiring board bonded to the other surface of the other semiconductor chip;
A third metal wiring board connected to the first metal wiring board and spaced apart from the bonding wire connected to the other surface of the one semiconductor chip by a predetermined distance and parallel to the high-voltage bus bar;
A fourth metal wiring which is connected by being folded back from an end of the second metal wiring board and spaced apart from the bonding wire connected to the other semiconductor chip by a predetermined distance and in parallel with the second metal wiring board. The board,
An output bus bar having output terminals extending from respective ends of the third metal wiring board and the fourth metal wiring board;
A semiconductor device comprising:   The high voltage terminal of the high voltage bus bar and the low voltage terminal of the low voltage bus bar are on the same side, and the output terminal of the output bus bar is disposed at an intermediate position of a current path between the high voltage terminal and the low voltage terminal. The semiconductor device according to claim 1.   The first metal wiring board and the third metal wiring board are formed as separate members, and the second metal wiring board and the fourth metal wiring board are formed as separate members, and the third metal wiring board and the first metal wiring board are formed as separate members. 3. The semiconductor device according to claim 1, wherein the output bus bar is joined to a joint portion with a four metal wiring board.   Metal spacers are provided between the first metal wiring board and the third metal wiring board and between the second metal wiring board and the fourth metal wiring board, and a gap between the third metal wiring board and the bonding wire, The semiconductor device according to claim 1, wherein a gap between the fourth metal wiring board and the bonding wire is adjustable. Each of the pair of semiconductor chips includes a power semiconductor element and a rectifying semiconductor element,
When driving a semiconductor device in which the ratio of current flowing through the power semiconductor element is larger than that of the rectifying semiconductor element, the power semiconductor element of the one semiconductor chip is connected to the high-voltage terminal by the high-voltage bus bar. The power semiconductor element of the other semiconductor chip is disposed on the side far from the low-voltage terminal in the second metal wiring board ,
When driving a semiconductor device in which the proportion of current flowing through the power semiconductor element is smaller than that of the rectifying semiconductor element, the power semiconductor device of the one semiconductor chip is connected to the high-voltage terminal by the high-voltage bus bar. The power semiconductor element of the other semiconductor chip is arranged on the side closer to the low-voltage terminal in the second metal wiring board,
The semiconductor device according to claim 1, wherein:

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