JP4810795B2 - Display device and driving method of display device - Google Patents

Description

  The present invention relates to a display device and a driving method of the display device, and in particular, an electro-optic element and pixels including the electro-optic element are two-dimensionally arranged in a matrix and wired for each column of the matrix-like pixel array. The present invention relates to a display device configured to output a pixel signal through a signal line and a method for driving the display device.

  In a display device in which electro-optic elements and pixels including the electro-optic elements are two-dimensionally arranged in a matrix, for example, a liquid crystal display device using a liquid crystal cell as an electro-optic element, the pixels are two-dimensionally arranged in a matrix. On the same substrate as the pixel array section, that is, on a liquid crystal panel (display panel), there is a tendency to integrally form peripheral drive circuit sections that drive each pixel of the pixel array section. A control signal such as a vertical start pulse VST and a vertical clock pulse VCK is used in a peripheral drive circuit unit, for example, a vertical drive circuit that selects each pixel of the pixel array unit in a row unit. These control signals are given to the liquid crystal panel from the outside.

  By the way, as a power supply voltage used in a circuit portion outside the display panel, a power supply voltage having a low amplitude voltage of about 3 V or 3.3 V is generally used for the purpose of reducing power consumption of the entire liquid crystal display device. . On the other hand, in particular for liquid crystal display devices, the polarity of the analog video signal is intended to prevent deterioration of the specific resistance of the liquid crystal (resistance value specific to the substance) due to the continuous application of a DC voltage of the same polarity to the liquid crystal. Is exchanged with a predetermined period. For this reason, a control signal used inside the liquid crystal panel is level-shifted to a high amplitude voltage of 10 V or more, for example, about 15 V, using a level shift circuit.

  This level shift circuit is generally manufactured on a separate chip from the liquid crystal panel using single crystal silicon, or on a printed circuit board using discrete components. However, if a level shift circuit is fabricated on a chip or printed circuit board that is separate from the liquid crystal panel, the number of parts that make up the set increases and each component must be fabricated in a separate process. This hinders cost reduction.

  Therefore, conventionally, the level shift circuit is also integrally formed on the same substrate (liquid crystal panel) together with the pixel array portion in the same manner as the peripheral drive circuit portion such as the vertical drive circuit. (For example, refer patent document 1).

JP 2002-175026 A

  By the way, when a control signal is input to the liquid crystal panel from the outside, in order to prevent internal circuit elements from being destroyed by static electricity through the input path, a protective diode is provided at the input stage of the control signal to take countermeasures against static electricity. It is common. This protective diode is provided at the input stage of the level shift circuit when the level shift circuit is mounted on the liquid crystal panel. At this time, when the peripheral drive circuit section such as the vertical drive circuit is made of, for example, polysilicon, the level shift circuit and the protection diode are naturally made of polysilicon.

  However, the performance of a protection diode made of polysilicon is extremely reduced compared to a protection diode made of single crystal silicon. Therefore, by adopting a configuration in which the level shift circuit is mounted on the liquid crystal panel, the size of the set can be reduced and the cost can be reduced. However, as the performance of the protection diode is reduced, the circuit element in the panel is reduced. There was a problem that countermeasures against static electricity would be insufficient.

  The present invention has been made in view of the above problems, and the object of the present invention is to provide a more reliable electrostatic countermeasure for circuit elements inside the panel while reducing the size and cost of the set. It is an object of the present invention to provide a display device that can be applied and a method for driving the display device.

In order to achieve the above object, the present invention has a pixel array section in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are wired for each column of the matrix-like pixel arrangement ( In addition, a display panel having a precharge circuit that writes a precharge signal to the pixel array unit prior to the writing of the video signal to the pixel array unit, and a digital video signal are converted into an analog video signal Control used for driving the display panel in a display device comprising a first drive block and a second drive block for buffering (impedance conversion) an analog video signal output from the first drive block signal (or, the precharge signal) the display panel after the level shifting by the second driving blocks (or, buffered) It adopts a configuration supplies.

In the display device having the above structure, the level shift (or buffering ) of the control signal (or precharge signal) in the second drive block means that the level shift circuit (or buffer circuit ) is placed on the display panel. It means mounting on the second drive block instead of mounting. Accordingly, since the level shift circuit (or buffer circuit ) can be made of single crystal silicon, the performance of the protection diode provided in the input stage of the level shift circuit (or buffer circuit ) can be improved. In addition, since the level shift circuit (or buffer circuit ) is not manufactured on a dedicated chip but on the chip of the second drive block, the number of parts does not increase, and the second drive block Since the same process can be used, the number of processes does not increase.

  According to the present invention, a high-performance protective diode can be produced without increasing the number of chips or changing the process, so that the interior of the panel can be reduced while reducing the size and cost of the set. A more reliable countermeasure against static electricity can be applied to the circuit element.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a block diagram illustrating a configuration example of a display device to which the present invention is applied. In this embodiment, for example, a three-plate projection type liquid crystal display device using high-temperature polysilicon adopting a full HD (dot clock; 160 MHz) driving method with a gradation of 10 bits and a resolution of 1920 × 1080 is given as an application example. Specific examples thereof will be described.

  As shown in FIG. 1, a three-plate projection type liquid crystal display device 10 according to this application example includes R (red), G (green), and B (blue) liquid crystal panels (display panels) 11R, 11G, and 11B. For these liquid crystal panels 11R, 11G, and 11B, one system of signal control unit 12, three systems of LCD drivers (first drive blocks) 13R, 13G, and 13B, and analog drivers (second drive blocks) 14R, 14G and 14B are provided.

  FIG. 2 shows an example of the configuration of the liquid crystal panels 11R, 11G, and 11B. The liquid crystal panels 11R, 11G, and 11B have a configuration in which two transparent insulating substrates, for example, glass substrates are disposed to face each other with a predetermined gap, and a liquid crystal material is sealed between the two glass substrates. Pixels 21 are two-dimensionally arranged in a matrix on one glass substrate of the liquid crystal panels 11R, 11G, and 11B to form a pixel array unit 24. In the pixel array section 24, scanning lines 22-1 to 22-m are wired for each row with respect to a pixel array of m rows and n columns, and signal lines 23-1 to 23-n are wired for each column. Yes.

  FIG. 3 shows an example of the circuit configuration of the pixel 21. The pixel 21 includes a pixel transistor, for example, a TFT (Thin Film Transistor) 211, a liquid crystal cell 212 having a pixel electrode connected to the drain electrode of the TFT 211, and a storage capacitor having one electrode connected to the drain electrode of the TFT 211. 213. Here, the liquid crystal cell 21 means a liquid crystal capacitance generated between a pixel electrode and a counter electrode formed opposite to the pixel electrode. As the TFT 211, a polysilicon TFT having high mobility is used.

  The TFT 211 has a gate electrode connected to the scanning line 22 (22-1 to 22-m) and a source electrode connected to the signal line 23 (23-1 to 23-n). For example, the counter electrode of the liquid crystal cell 212 and the other electrode of the storage capacitor 213 are connected to the common line 27 in common for each pixel. The common electrode (common electrode voltage) Vcom is applied to the common electrode of the liquid crystal cell 212 via the common line 27.

  On the same glass substrate as the pixel array unit 24, vertical drive circuits 25A and 25B are arranged on the left and right sides of the pixel array unit 24, for example, and a selector circuit 26 is arranged on the pixel array unit 24, for example. Yes. Here, the vertical drive circuits 25A and 25B are arranged on both the left and right sides of the pixel array unit 24. However, it is possible to adopt a configuration in which one vertical drive circuit 25 is arranged only on one of the left and right sides of the pixel array unit 24. is there. The vertical drive circuits 25A and 25B and the selector circuit 26 are also manufactured using polysilicon TFTs. On the other hand, a color filter (not shown) of each color (R, G, B) is provided for each pixel 21 on the other glass substrate of the liquid crystal panels 11R, 11G, 11B.

  The two vertical drive circuits 25A and 25B are configured by a shift register or the like. In these vertical drive circuits 25A and 25B, each shift register starts a shift operation in response to the vertical start pulse VST, and the vertical start pulse VST is converted into a vertical clock pulse VCK (generally, clock pulses having opposite phases to each other). By sequentially shifting in synchronization with (VCK, VCKX), the transfer pulses transferred at each transfer stage are sequentially output as scan pulses V1 to Vm. The scanning pulses V1 to Vm are sequentially applied to the scanning lines 22-1 to 22-m to select the pixels 21 in units of rows.

  The selector circuit 26 is configured by, for example, the number n of horizontal pixels, that is, the number k (= n / 2) of the switch circuits SW1 to SWk which is half the number n of the signal lines 23-1 to 23-n. These switch circuits SW1 to SWk are configured to have one input and two outputs, and k video signal input lines 28- for inputting analog video signals from the analog drivers 14R, 14G, and 14B to the liquid crystal panels 11R, 11G, and 11B. 1-28-k is connected to the input terminal, and one of the signal lines 23-1 to 23-n is connected to the odd signal lines 23-1, 23-3,. The other output terminals are connected to the even signal lines 23-2, 23-4,..., 23-n.

  Accordingly, the switch circuits SW1 to SWk connect the odd signal lines 23-1, 23-3,..., 23-n-1 and the even signal lines 23-2, 23-4,. By selecting, the analog video signals input by the video signal input lines 28-1 to 28-k are input to the pixels 21 in the row selected by the vertical scanning by the vertical drive circuits 25A and 25B. Writing is performed twice, divided into pixels and even-numbered pixels. Hereinafter, such driving is referred to as pseudo-sequential driving for line-sequential driving in which analog video signals are simultaneously written to all the pixels 21 in the selected row.

  Here, the analog video signals are selectively transmitted to the odd signal lines 23-1, 23-3,..., 23-n-1 and the even signal lines 23-2, 23-4,. An example of pseudo-line sequential driving by selecting two signal lines for supplying a signal is described as an example, but the present invention is not limited to pseudo-line sequential driving by selecting two signal lines, and analog video is selectively applied to four signal lines. 4 signal line selection for supplying signals, 6 signal line selection for selectively supplying analog video signals to 6 signal lines, and an analog video signal for selectively supplying 8 signal lines It is also possible to adopt pseudo line sequential driving by selecting eight signal lines.

  Further, as shown in FIG. 4, an analog video signal is input to the liquid crystal panels 11R, 11G, and 11B through n video signal input lines 28-1 to 28-n without selecting a signal line by the selector circuit 26. In addition, the n video signal input lines 28-1 to 28-n and the n signal lines 23-1 to 23-n are directly connected to each other and directly from the video signal input lines 28-1 to 28-n. It is also possible to adopt complete line sequential driving in which an analog video signal is input to the signal lines 23-1 to 23-n and the analog video signals are simultaneously written to the pixels 21 in the selected row.

  In FIG. 1 again, the signal control unit 12 performs processing for dividing the input digital video signals R, G, and B into, for example, an odd pixel and an even pixel every horizontal period, and the like. Various timing pulses for driving and controlling the LCD drivers 13R, 13G, 13B and the analog drivers 14R, 14G, 14B are generated based on the horizontal synchronization signal HSYNC, the vertical synchronization signal VSYNC, and the master clock CLK.

  The LCD drivers 13R, 13G, and 13B have a D / A (digital / analog) conversion function for converting a digital video signal transferred from the signal control unit 12 into an analog video signal, and also perform impedance conversion (buffering). Has function. The analog drivers 14R, 14G, and 14B are made of high-mobility transistors such as single crystal silicon, and have a function of sample-holding analog video signals supplied from the LCD drivers 13R, 13G, and 13B and performing impedance conversion again. ing.

  In the three-plate projection type liquid crystal display device 10 using the high-temperature polysilicon having the above-described configuration, the circuit portion for impedance conversion (buffering) of the analog video signal after D / A conversion is set to the first operation speed (operation Frequency), for example, LCD drivers 13R, 13G, 13B that operate at a high speed of 1 MHz or higher, and analog drivers 14R, 14G, 14B that operate at a second operating speed lower than the first operating speed, for example, a low speed of 1 MHz or lower. The two-stage configuration. By adopting such a two-stage configuration, the following effects can be obtained.

  In other words, by interposing the analog drivers 14R, 14G, and 14B operating at low speed between the LCD drivers 13R, 13G, and 13B operating at high speed and the liquid crystal panels 11R, 11G, and 11B, the operation is limited to about 6 MHz. A liquid crystal display device using polysilicon TFTs can be driven by line sequential driving (including pseudo line sequential driving) without adopting block sequential (simultaneous sampling of multiple dots) driving. This means that the number of LCD drivers 13R, 13G, and 13B can be reduced.

  More specifically, the conventional high-temperature polysilicon can only operate at about 6 MHz and requires four LCD drivers (6 outputs x 4 = 24 outputs), whereas high movement of single crystal silicon or the like. The analog drivers 14R, 14G, and 14B manufactured with the same number of transistors can operate even when the drive frequency is 20 MHz or more, so that the number of LCD drivers per analog driver can be reduced to one (6 outputs). As a result, even if the analog drivers 14R, 14G, and 14B are inserted, it is only necessary to provide two drivers for each of the liquid crystal panels 11R, 11G, and 11B, for a total of six, thereby reducing the cost of the entire system. Can do.

  In addition, since line-sequential driving (including pseudo-line sequential driving) is possible, writing time to the storage capacitor 213 (see FIG. 3) of the pixel 21 can be increased, so that image quality can be improved. Can do. Further, since the W / L of the TFT 211 of the pixel 21 can be narrowed and there is no sampling circuit that operates at high speed on the glass substrate, the low-speed peripheral circuit section (vertical drive circuits 25A and 25B) and the pixel array section There is no need to make TFTs separately. Therefore, the liquid crystal panels 11R, 11G, and 11B can be provided at a low cost.

  In mounting the LCD drivers 13R, 13G, and 13B and the analog drivers 14R, 14G, and 14B, in the three-plate projection type liquid crystal display device, the LCD drivers 13R, 13G, and 13B have as few as 100 or fewer output pins. For this reason, the analog drivers 14R, 14G, and 14B are mounted on a PCB (Printed Circuit Board) board and have a large number of output pins, so it is desirable to mount them on COF (Chip On Film) or COG (Chip On Glass).

[First Embodiment]
FIG. 5 shows an example of the configuration of the LCD driver 13 (13R, 13G, 13B), the analog driver 14 (14R, 14G, 14B), and the liquid crystal panel 11 (11R, 11G, 11B) according to the first embodiment of the present invention. FIG.

  In FIG. 5, the LCD driver 13 includes a sample hold circuit 131, a D / A converter circuit 132, and an analog buffer circuit 133 with an AC function. The sample hold circuit 131 samples and holds the digital video signal DS transferred from the signal control unit 12 in synchronization with the clock CK in response to the start pulse SP. The D / A converter circuit 132 converts the digital video signal sampled and held by the sample hold circuit 131 into an analog video signal and outputs the analog video signal. The analog buffer circuit 133 with an AC function performs impedance conversion (buffering) on the analog video signal output from the D / A converter circuit 132 and changes the polarity of the analog video signal to, for example, 1H (H is a horizontal period). ) To invert the video signal.

  The analog driver 14 includes an analog sample hold circuit 141, an analog buffer circuit 142, and a level shift circuit 143. The analog sample hold circuit 141 samples and holds the analog video signal transferred from the LCD driver 13 in synchronization with the clock ACK having a lower speed (frequency) than the clock CK in response to the start pulse ASP. The analog buffer circuit 142 performs impedance conversion (buffering) on the analog video signal output from the analog sample and hold circuit 141 and then transfers it to the liquid crystal panel 11.

  The level shift circuit 143 is used to drive control signals used for driving the liquid crystal panel 11 (11R, 11G, 11B), for example, the vertical start pulse VST and the vertical clock pulse VCK used for driving the vertical drive circuits 25A and 25B, and the selector circuit 26. The timing pulse such as the horizontal select pulse HSEL to be used is level-shifted from a low amplitude voltage of 5 V or less, specifically about 3 V or 3.3 V, to a high amplitude voltage of 10 V or more, for example, about 15 V, necessary for driving the liquid crystal. And supplied to the liquid crystal panel 11.

  By the way, in a panel-type liquid crystal display device, when static electricity is generated at an input terminal called a pad that is electrically connected to an external circuit, circuit elements inside the panel may be destroyed by the static electricity. . Therefore, in order to protect the circuit elements inside the panel from the electrostatic breakdown due to static electricity, in this example, the circuit elements constituting the vertical drive circuits 25A and 25B, the vertical start pulse VST, the vertical clock pulse VCK, the horizontal select pulse HSEL, etc. As shown in FIG. 6, a protection circuit 143A is provided at the input stage of the level shift circuit 143.

  The protection circuit 143A includes a protection diode D11 having a cathode connected to the power supply line VDD and an anode connected to the input line L11, and a protection diode D12 having a cathode connected to the input line L11 and an anode connected to the ground line GND. Has been. The protection diodes D11 and D12 are made of high mobility transistors such as single crystal silicon, similarly to the circuit elements constituting the analog sample hold circuit 141 and the analog buffer circuit 142.

  Timing pulses such as a vertical start pulse VST, a vertical clock pulse VCK, and a horizontal select pulse HSEL that are input to the level shift circuit 143 pass through the protection circuit 143A, and then are levels that actually perform level conversion (level shift) of the amplitude voltage. This is supplied to the conversion circuit unit 143B. The protection circuit 143A is not limited to the one having the above-described configuration including the two protection diodes D11 and D12.

  As described above, in the three-plate projection type liquid crystal display device 10 using, for example, high-temperature polysilicon, the level shift circuit 143 for level-shifting the timing pulse as the control signal is provided on the analog driver (second drive block) 14. Since the level shift circuit 143 can be made of single crystal silicon by mounting, the performance of the protection diodes D11 and D12 in the input stage can be improved as compared with the case of being made of polysilicon on the liquid crystal panel 11. Can do.

  In addition, since the level shift circuit 143 is manufactured on the chip of the analog driver 14 rather than on a dedicated chip, the number of parts does not increase and can be manufactured in the same process as the analog driver 14. Therefore, the process does not increase. Therefore, since high-performance protection diodes D11 and D12 can be manufactured without increasing the number of chips or changing the process, the size of the set can be reduced and the cost can be reduced. The circuit element, in this example, the vertical drive circuits 25A and 25B and the circuit elements constituting the selector circuit 26 can be more reliably subjected to electrostatic countermeasures.

[Second Embodiment]
FIG. 7 shows an example of the configuration of the LCD driver 13 (13R, 13G, 13B), the analog driver 14 (14R, 14G, 14B), and the liquid crystal panel 11 (11R, 11G, 11B) according to the second embodiment of the present invention. In the figure, the same parts as those in FIG. 5 are denoted by the same reference numerals. The configuration of the LCD driver 13 is exactly the same as in the case of FIG.

  In order to improve uniformity (improve image quality), the liquid crystal panel 11 according to the present embodiment applies a precharge signal of a predetermined level to each pixel of the pixel array unit 24 before writing an analog video signal. The precharge circuit 27 for writing to each pixel of the array unit 24 is provided. In FIG. 7, the left and right vertical drive circuits 25 </ b> A and 25 </ b> B of the pixel array unit 24 are omitted for simplification of the drawing.

  The analog driver 14 has an analog buffer circuit 144 in addition to the analog sample hold circuit 141 and the analog buffer circuit 142. The functions of the analog sample hold circuit 141 and the analog buffer circuit 142 are the same as those in FIG. The analog buffer circuit 144 is an impedance conversion circuit that performs impedance conversion (buffering) on a precharge signal input from the outside and then transfers the precharge signal to the liquid crystal panel 11.

  As shown in FIG. 8, the analog buffer circuit 144 has a protection circuit 144A at the input stage. The protection circuit 144A includes a protection diode D21 having a cathode connected to the power supply line VDD and an anode connected to the input line L21, and a protection diode D22 having a cathode connected to the input line L21 and an anode connected to the grounded line GND. Has been. The protection diodes D1 and D2 are made of high mobility transistors such as single crystal silicon, similarly to the circuit elements constituting the analog sample hold circuit 141 and the analog buffer circuit 142.

  The precharge signal input to the analog buffer circuit 144 is supplied to the impedance conversion circuit unit 144B that actually performs impedance conversion after passing through the protection circuit 144A. The protection circuit 144A is not limited to the one having the above-described configuration including the two protection diodes D21 and D22.

  As described above, in the three-plate projection type liquid crystal display device 10 using the liquid crystal panel 11 (11R, 11G, 11B) equipped with the precharge circuit 27 for the purpose of improving uniformity (improving image quality), for example, precharge is performed. Since the analog buffer circuit 144 that performs impedance conversion on the signal is formed on the analog driver (second drive block) 14, the analog buffer circuit 144 can be manufactured using single crystal silicon. The performance of the protection diodes D21 and D22 in the input stage can be improved as compared with the case where it is made of polysilicon.

  In addition, since the analog buffer circuit 144 is not manufactured on a dedicated chip but on the chip of the analog driver 14, the number of components does not increase and can be manufactured in the same process as the analog driver 14. Therefore, the process does not increase. Therefore, since high-performance protection diodes D21 and D22 can be manufactured without increasing the number of chips or changing the process, the size of the set can be reduced and the cost can be reduced. A more reliable electrostatic countermeasure can be applied to the circuit elements, in this example, the circuit elements constituting the precharge circuit 27.

  In the present embodiment, the case where the analog buffer circuit 144 that performs impedance conversion (buffering) on the precharge signal is mounted on the analog driver 14 has been described. The level conversion circuit 143 for converting the level of the timing pulse applied from the above may be mounted on the analog driver 14 together with the analog buffer circuit 144.

  In the first and second embodiments, the case where the present invention is applied to a liquid crystal display device using a liquid crystal cell as an electro-optical element of a pixel has been described as an example. However, the present invention is limited to this application example. Rather, it can be applied to all display devices that are configured to convert a digital video signal into an analog video signal in the first drive block, and then convert the impedance in the second drive block and input it to the display panel. It is. For example, in addition to a three-plate projection type liquid crystal display device, the invention can also be applied to a two-plate projection type liquid crystal display device, a single-plate projection type liquid crystal display device, and a viewfinder (VF) used in a camcorder. Furthermore, the present invention can be applied to an organic EL display device using an organic EL (electroluminescence) element as an electro-optical element of a pixel.

1 is a block diagram showing a configuration of a three-plate projection type liquid crystal display device using high-temperature polysilicon to which the present invention is applied. It is a block diagram which shows the example of 1 structure of a liquid crystal panel. It is a circuit diagram which shows an example of the circuit structure of a pixel. It is a block diagram which shows the other structural example of a liquid crystal panel. It is a block diagram which shows an example of a structure of the LCD driver, analog driver, and liquid crystal panel which concern on 1st Embodiment of this invention. It is a block diagram which shows an example of a structure of a level shift circuit. It is a block diagram which shows an example of a structure of the LCD driver, analog driver, and liquid crystal panel which concern on 2nd Embodiment of this invention. It is a block diagram which shows an example of a structure of an analog buffer circuit.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... 3 plate type projection type liquid crystal display device, 11 (11R, 11G, 11B) ... Liquid crystal panel, 12 ... Signal control part, 13 (13R, 13G, 13B) ... LCD driver, 14 (14R, 14G, 14B) ... Analog Driver, 15 (15R, 15G, 15B) ... LCD analog driver, 21 ... Pixel, 22 (22-1 to 22-m) ... Scanning line, 23 (23-1 to 23-n) ... Signal line, 24 ... Pixel Array unit, 25A, 25B ... vertical drive circuit, 26 ... selector circuit, 27 ... precharge circuit, 143 ... level conversion circuit, 144 ... analog buffer circuit (impedance conversion circuit)

Claims (6)

A display panel using a high-temperature polysilicon thin film transistor having a pixel array section in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and a signal line is wired for each column of the matrix-like pixel arrangement;
A first drive block for converting a digital video signal into an analog video signal;
Single crystal silicon interposed as a separate chip between the display panel and the first driving block, and buffering an analog video signal output from the first driving block and supplying the analog video signal to the display panel. A produced second drive block;
A level shift circuit made of single crystal silicon in the second drive block and level-shifting a control signal used for driving the display panel and having a protection circuit in an input stage;
The first drive block samples and holds a digital video signal in synchronization with a first clock, and converts the digital video signal sampled and held by the sample and hold circuit into an analog video signal. a digital / analog converter circuit, a buffer circuit for bus Ffaringu the analog video signal output from the digital / analog converter circuit,
The second driving block samples the analog video signal output from the first driving block in synchronization with a second clock having a frequency lower than that of the first clock and enabling line-sequential driving. It has a sample hold circuit for holding, and a buffer circuit for bus Ffaringu the analog video signal output from the sample-and-hold circuit
Viewing equipment. The display panel includes a precharge circuit that writes a precharge signal to the pixel array unit prior to writing a video signal to the pixel array unit,
2. The buffer circuit according to claim 1, further comprising a buffer circuit made of single crystal silicon in the second drive block, buffering the precharge signal and supplying the precharge signal to the display panel, and having a protection circuit in an input stage. Display device. A display panel using a high-temperature polysilicon thin film transistor having a pixel array section in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and a signal line is wired for each column of the matrix-like pixel arrangement;
A first drive block for converting a digital video signal into an analog video signal;
Single crystal silicon interposed as a separate chip between the display panel and the first driving block, and buffering an analog video signal output from the first driving block and supplying the analog video signal to the display panel. A prepared second drive block;
The first drive block samples and holds a digital video signal in synchronization with a first clock, and converts the digital video signal sampled and held by the sample and hold circuit into an analog video signal. a digital / analog converter circuit, a buffer circuit for bus Ffaringu the analog video signal output from the digital / analog converter circuit,
The second driving block samples the analog video signal output from the first driving block in synchronization with a second clock having a frequency lower than that of the first clock and enabling line-sequential driving. It has a sample hold circuit for holding, and a buffer circuit for bus Ffaringu the analog video signal output from the sample-and-hold circuit
A method of driving a Viewing device,
A control device for supplying a control signal used for driving the display panel to the display panel after being level-shifted by a level shift circuit made of single crystal silicon in the second drive block and having a protection circuit in an input stage. Driving method. The display panel includes a precharge circuit that writes a precharge signal to the pixel array unit prior to writing a video signal to the pixel array unit,
4. The display device according to claim 3, wherein the precharge signal is supplied to the display panel after being buffered by a buffer circuit made of single crystal silicon in the second driving block and having a protection circuit in an input stage. 5. Driving method. Prior to the writing of a video signal to the pixel array unit, in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are arranged for each column of the matrix pixel arrangement. A display panel using a high-temperature polysilicon thin film transistor having a precharge circuit for writing a precharge signal to the pixel array unit;
A first drive block for converting a digital video signal into an analog video signal;
Single crystal silicon interposed as a separate chip between the display panel and the first driving block, and buffering an analog video signal output from the first driving block and supplying the analog video signal to the display panel. A produced second drive block;
A buffer circuit made of single crystal silicon in the second driving block, buffering the precharge signal and supplying it to the display panel, and having a protection circuit in an input stage;
The first drive block samples and holds a digital video signal in synchronization with a first clock, and converts the digital video signal sampled and held by the sample and hold circuit into an analog video signal. a digital / analog converter circuit, a buffer circuit for bus Ffaringu the analog video signal output from the digital / analog converter circuit,
The second driving block samples the analog video signal output from the first driving block in synchronization with a second clock having a frequency lower than that of the first clock and enabling line-sequential driving. It has a sample hold circuit for holding, and a buffer circuit for bus Ffaringu the analog video signal output from the sample-and-hold circuit
Viewing equipment. Prior to the writing of a video signal to the pixel array unit, in which pixels including electro-optic elements are two-dimensionally arranged in a matrix and signal lines are arranged for each column of the matrix pixel arrangement. A display panel using a high-temperature polysilicon thin film transistor having a precharge circuit for writing a precharge signal to the pixel array unit;
A first drive block for converting a digital video signal into an analog video signal;
Single crystal silicon interposed as a separate chip between the display panel and the first driving block, and buffering an analog video signal output from the first driving block and supplying the analog video signal to the display panel. A prepared second drive block;
The first drive block samples and holds a digital video signal in synchronization with a first clock, and converts the digital video signal sampled and held by the sample and hold circuit into an analog video signal. a digital / analog converter circuit, a buffer circuit for bus Ffaringu the analog video signal output from the digital / analog converter circuit,
The second driving block samples the analog video signal output from the first driving block in synchronization with a second clock having a frequency lower than that of the first clock and enabling line-sequential driving. a method of driving a display device including a sample hold circuit for holding, and a buffer circuit for bus Ffaringu the analog video signal output from the sample-hold circuit,
A driving method of a display device, wherein the precharge signal is supplied to the display panel after being buffered by a buffer circuit made of single crystal silicon in the second driving block and having a protection circuit in an input stage.

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