JP4802907B2 - Semiconductor mounting structure - Google Patents

Semiconductor mounting structure Download PDF

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Publication number
JP4802907B2
JP4802907B2 JP2006201578A JP2006201578A JP4802907B2 JP 4802907 B2 JP4802907 B2 JP 4802907B2 JP 2006201578 A JP2006201578 A JP 2006201578A JP 2006201578 A JP2006201578 A JP 2006201578A JP 4802907 B2 JP4802907 B2 JP 4802907B2
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solid
glass substrate
mounting structure
substrate
state imaging
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JP2008028284A (en
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正平 卯野
裕彦 伊奈
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Panasonic Corp
Panasonic Holdings Corp
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Panasonic Corp
Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA

Description

本発明は、半導体素子、特にＣＣＤやＣＭＯＳ等からなる固体撮像素子をフレキシブル基板に実装するための半導体実装構造に関する。   The present invention relates to a semiconductor mounting structure for mounting a semiconductor element, particularly a solid-state imaging element made of a CCD, a CMOS, or the like on a flexible substrate.

極少型のＣＣＤやＣＭＯＳ等からなる固体撮像素子をフレキシブル基板に実装した固体撮像モジュールの画質を向上させるためにマイクロレンズを用いた構成は既に提案されている。例えば、所要の端子が設けられたガラス基板との間に所定の間隔を空けて配設される固体撮像素子の撮像面にマイクロレンズを配設し、その固体撮像素子端子とガラス基板端子とをバンプを介して電気的に接続し、かつ、マイクロレンズとガラス基板との間に所定の空間を形成して、固体撮像素子の撮像面の外側を前記端子接続部を含めて樹脂材で封止した固体撮像モジュールが提案されている（例えば、特許文献１参照）。このような構成によれば、樹脂材によって、マイクロレンズを配設した固体撮像素子の撮像面とガラス基板の対向面間に、光学的な影響が回避された状態で所定の空間が確保されるためマイクロレンズは光学的な干渉を受けることがなく、画質が向上するとされている。   In order to improve the image quality of a solid-state imaging module in which a solid-state imaging device composed of an extremely small CCD or CMOS is mounted on a flexible substrate, a configuration using a microlens has already been proposed. For example, a microlens is disposed on the imaging surface of a solid-state imaging device that is disposed with a predetermined interval between the glass substrate provided with a required terminal, and the solid-state imaging device terminal and the glass substrate terminal are arranged. Electrically connected via bumps, and a predetermined space is formed between the microlens and the glass substrate, and the outside of the imaging surface of the solid-state imaging device is sealed with a resin material including the terminal connection portion. A solid-state imaging module has been proposed (see, for example, Patent Document 1). According to such a configuration, the resin material secures a predetermined space between the imaging surface of the solid-state imaging device provided with the microlens and the opposing surface of the glass substrate in a state where an optical influence is avoided. For this reason, the microlens is not subject to optical interference, and the image quality is improved.

また、バンプを介して固体撮像素子端子を接続したガラス基板端子をさらにフレキシブル基板（の導電体）に電気的に接続する場合に、上記例とは別に、例えば、図３（ａ）（ｂ）に示すように、ガラス基板１の両側に形成されているガラス基板端子２に対応させてハンダボール１２を配設するための円形状のランド１３をフレキシブル基板８に所定の間隔をおいて形成し、該ランド１３とガラス基板端子２との間に配設したハンダボール１２を溶融させてガラス基板端子２とフレキシブル基板８を電気的に接続するようにしていた。なお、図３（ａ）〜（ｃ）中、符号３は固体撮像素子、４は端子、５はバンプ、６はマイクロレンズ、７は封止用の樹脂材である。
特開平７−２３１０７４号公報 Further, when the glass substrate terminal to which the solid-state imaging device terminal is connected via the bump is further electrically connected to the flexible substrate (the conductor thereof), for example, FIG. 3A and FIG. As shown in FIG. 2, circular lands 13 for disposing solder balls 12 corresponding to the glass substrate terminals 2 formed on both sides of the glass substrate 1 are formed on the flexible substrate 8 at a predetermined interval. The solder ball 12 disposed between the land 13 and the glass substrate terminal 2 is melted to electrically connect the glass substrate terminal 2 and the flexible substrate 8. 3A to 3C, reference numeral 3 denotes a solid-state imaging device, 4 denotes a terminal, 5 denotes a bump, 6 denotes a microlens, and 7 denotes a sealing resin material.
Japanese Patent Application Laid-Open No. 7-231074

しかし、近年、素子パッケージの小型化の要請が強くなっており、図３（ａ）（ｂ）に示すように、ガラス基板のサイズを切り詰めて小型化した場合、固体撮像素子の端縁とハンダボールの設置位置とが接近してしまい、この状態でハンダボール１２を溶融させると、図３（ｃ）に示すように、溶融したハンダボール１２が固体撮像素子３と接触してしまうおそれがある。このようにハンダボール１２が固体撮像素子３に接触すると、半導体素子である固体撮像素子３を介してリーク電流が発生するおそれがある。リーク電流が発生すると画像データの劣化や電力の漏洩による消費電力の無駄などにつながり好ましくない。   However, in recent years, there has been a strong demand for downsizing of the device package. As shown in FIGS. 3A and 3B, when the size of the glass substrate is cut down and downsized, the edge of the solid-state imaging device and the solder If the solder ball 12 is melted in this state due to the approaching position of the ball, the melted solder ball 12 may come into contact with the solid-state imaging device 3 as shown in FIG. . When the solder ball 12 contacts the solid-state image sensor 3 in this way, there is a possibility that a leak current is generated via the solid-state image sensor 3 that is a semiconductor element. Generation of a leakage current is not preferable because it leads to degradation of image data and wasted power consumption due to power leakage.

本発明は、このような実情に鑑みてなされ、リーク電流を発生させることなく画質の劣化を防止することができるようにした半導体実装構造を提供することを目的とする。   The present invention has been made in view of such a situation, and an object of the present invention is to provide a semiconductor mounting structure capable of preventing deterioration of image quality without generating a leakage current.

本発明の半導体実装構造は、半導体素子の端子がガラス基板に設けられた端子に電気的に接続され、かつ、前記ガラス基板と基板の間に前記半導体素子を介在させた状態にて、前記ガラス基板と基板がハンダボールを介して電気的に接続される半導体実装構造において、前記基板の前記ハンダボールが対応する箇所に形成するランドの中心位置を前記半導体素子の外方にシフトした位置に設定したことを特徴とする。   In the semiconductor mounting structure of the present invention, the terminal of the semiconductor element is electrically connected to the terminal provided on the glass substrate, and the semiconductor element is interposed between the glass substrate and the glass substrate. In a semiconductor mounting structure in which a substrate and a substrate are electrically connected via a solder ball, a center position of a land formed at a location corresponding to the solder ball of the substrate is set to a position shifted outward of the semiconductor element. It is characterized by that.

このような構成によれば、基板、例えばフレキシブル基板の絶縁材を切り抜いて形成されるランドの中心位置を外方に向けてシフトさせていることにより、溶融したハンダボールを半導体素子の外方に向けて流動させ、半導体素子に接触させないようにしているため、半導体素子を介してリーク電流が発生するのを低減でき、これにより画質の劣化を抑止することができる。   According to such a configuration, the center position of the land formed by cutting out the insulating material of the substrate, for example, the flexible substrate is shifted outward, so that the molten solder ball is moved outward of the semiconductor element. Therefore, it is possible to reduce the occurrence of a leakage current through the semiconductor element, thereby suppressing the deterioration of the image quality.

また、前記ランドは、前記半導体素子の外方に向けて長辺方向が延びる楕円状もしくは長円状に形成されていてもよい。このようにすれば、隣り合うランド同士の間隔を狭めることなくランドの面積を半導体素子の外方に向けて広げることができるので、隣り合うハンダボール同士を接触させないようにしつつ、より多くの量のハンダボールを半導体素子の外方に向けて流動させ、半導体素子に接触させないようにすることができる。なお、ランドの形状は勿論、楕円状もしくは長円状に限らずあらゆる形状で形成できる。   Further, the land may be formed in an elliptical shape or an elliptical shape whose long side direction extends toward the outside of the semiconductor element. In this way, the area of the land can be expanded toward the outside of the semiconductor element without reducing the distance between adjacent lands, so that a larger amount can be obtained while preventing adjacent solder balls from contacting each other. This solder ball can be made to flow outward from the semiconductor element so as not to contact the semiconductor element. Of course, the shape of the land is not limited to an ellipse or an ellipse, and can be formed in any shape.

本発明の半導体実装構造は、基板に形成するランドの中心を半導体素子の外方にシフトした位置に設定することにより、ハンダボールを半導体素子に接触させないようにすることができるので、半導体素子を介してリーク電流の発生を低減することができる。   The semiconductor mounting structure of the present invention can prevent the solder ball from coming into contact with the semiconductor element by setting the center of the land formed on the substrate to a position shifted outward of the semiconductor element. Therefore, generation of leakage current can be reduced.

以下に、本発明の最良の実施の形態に係る半導体実装構造について図面を参照しつつ詳細に説明する。   Hereinafter, a semiconductor mounting structure according to a preferred embodiment of the present invention will be described in detail with reference to the drawings.

図１（ａ）は半導体実装構造の断面図、図１（ｂ）はフレキシブル基板の平面図、図１（ｃ）はハンダボールが溶融した状態の半導体実装構造の断面図である。これらの図にて、符号１は、例えば矩形状に形成されたガラス基板、２はガラス基板１の裏面両側に被着された端子、３は例えば矩形状に形成された半導体素子としての固体撮像素子、４は固体撮像素子３の表面両側に形成された端子、５は端子２，４同士を電気的に接続するための導電性バンプ（例えばＡｕバンプ）、６は固体撮像素子３の撮像面３ａに配設されたマイクロレンズ、７は、その撮像面３ａの外周縁を端子２，４の接続部と共に封止するための樹脂材、８はフレキシブル基板で、請求項に記載の基板であり、フィルム材９の上に導電体１０と絶縁材（絶縁カバー）１１を積層してなる。   1A is a cross-sectional view of the semiconductor mounting structure, FIG. 1B is a plan view of the flexible substrate, and FIG. 1C is a cross-sectional view of the semiconductor mounting structure in a state where the solder balls are melted. In these figures, reference numeral 1 is a glass substrate formed in a rectangular shape, for example, 2 is a terminal attached to both sides of the back surface of the glass substrate 1, and 3 is a solid-state imaging as a semiconductor element formed in a rectangular shape, for example. Elements 4 are terminals formed on both sides of the surface of the solid-state imaging device 3, 5 is a conductive bump (for example, Au bump) for electrically connecting the terminals 2 and 4, and 6 is an imaging surface of the solid-state imaging device 3. The microlens 7 disposed in 3a is a resin material for sealing the outer peripheral edge of the imaging surface 3a together with the connection portions of the terminals 2 and 4, 8 is a flexible substrate, and is a substrate according to claim The conductive material 10 and the insulating material (insulating cover) 11 are laminated on the film material 9.

１２はハンダボールで、絶縁材１１を切り抜いて導電体１０を露出させて固体撮像素子３の外方に向けて長辺方向が延びる楕円状（又は長円状）に形成したランド１３と、ガラス基板１の端子２の外側との間に間装され溶融されることで、図１（ｃ）に示すように、端子２と導電体１０を電気的に接続する。本発明では、そのランド１３の中心を、図１（ｂ）に示すように、固体撮像素子３の外方にシフトさせた位置に設定することで、図１（ｃ）に示すように、溶融したハンダボール１２を、固体撮像素子３に接触させないようにしている。そして、固体撮像素子３の底面とフレキシブル基板８との間には若干の隙間が形成されるようにしている。撮像面３ａの周囲は樹脂材７によって封止されることで、マイクロレンズ６を配設した固体撮像素子３の撮像面３ａとガラス基板１の対向面間に所定の空間が確保され、マイクロレンズ６の光学的特性を維持しつつゴミなどの浸入を防止している。   Reference numeral 12 denotes a solder ball, which is formed by cutting out the insulating material 11 to expose the conductor 10 and forming the land 13 in an elliptical shape (or an oval shape) extending in the long side direction toward the outside of the solid-state imaging device 3, and glass By interposing and melting between the outside of the terminal 2 of the substrate 1 and as shown in FIG. 1C, the terminal 2 and the conductor 10 are electrically connected. In the present invention, the center of the land 13 is set at a position shifted outward of the solid-state imaging device 3 as shown in FIG. 1B, thereby melting as shown in FIG. The solder ball 12 is not brought into contact with the solid-state image sensor 3. A slight gap is formed between the bottom surface of the solid-state imaging device 3 and the flexible substrate 8. The periphery of the imaging surface 3a is sealed with a resin material 7, so that a predetermined space is secured between the imaging surface 3a of the solid-state imaging device 3 provided with the microlens 6 and the opposing surface of the glass substrate 1, and the microlens. Intrusion of dust and the like is prevented while maintaining the optical characteristics of No. 6.

このような構成によれば、フレキシブル基板１の絶縁材１１を切り抜いて形成される楕円状のランド１３の中心位置を固体撮像素子３の外方に向けてシフトさせ、溶融したハンダボール１２を、固体撮像素子３に接触させないようにしているため、固体撮像素子３を介してリーク電流が発生するのを低減することができる。   According to such a configuration, the center position of the elliptical land 13 formed by cutting out the insulating material 11 of the flexible substrate 1 is shifted toward the outside of the solid-state imaging device 3, and the molten solder ball 12 is Since no contact is made with the solid-state image sensor 3, it is possible to reduce the occurrence of leakage current via the solid-state image sensor 3.

さらに詳しく説明すると、図２（ａ）はガラス基板１の底面図（又は平面図）、図２（ｂ）は固体撮像素子３の平面図、図２（ｃ）は固体撮像素子３が一体化されたガラス基板１の平面図であり、上述のガラス基板１の端子２は、図２（ａ）に示すように、 外部電極２ａと内部電極２ｃが配線２ｂによって接続されてなり、その内部電極２ｃが導電性バンプ５を介して固体撮像素子３の端子４に接続されることで、図２（ｃ）に示すように、固体撮像素子３がガラス基板１に一体化される。   More specifically, FIG. 2A is a bottom view (or a plan view) of the glass substrate 1, FIG. 2B is a plan view of the solid-state image sensor 3, and FIG. 2 is a plan view of the glass substrate 1, and the terminal 2 of the glass substrate 1 is formed by connecting an external electrode 2a and an internal electrode 2c by wiring 2b as shown in FIG. 2c is connected to the terminal 4 of the solid-state imaging device 3 through the conductive bumps 5, whereby the solid-state imaging device 3 is integrated with the glass substrate 1 as shown in FIG.

このように固体撮像素子３がガラス基板１に一体化された状態で、ガラス基板１の外部電極２ａとフレキシブル基板８のランド１３の間にハンダボール１２を間装して該ハンダボール１２を溶融する際に、そのランド１３の中心位置を固体撮像素子３の外方にシフトさせているため、図１（ｃ）に示すように、溶融したハンダボール１２は固体撮像素子３の外方に向けて流動し、内方に溶け込まずに固体撮像素子３に接触しない状態で凝固する。   In such a state that the solid-state imaging device 3 is integrated with the glass substrate 1, the solder ball 12 is interposed between the external electrode 2 a of the glass substrate 1 and the land 13 of the flexible substrate 8 to melt the solder ball 12. In this case, since the center position of the land 13 is shifted to the outside of the solid-state image sensor 3, the molten solder ball 12 faces the outside of the solid-state image sensor 3 as shown in FIG. And solidify in a state where the solid-state imaging device 3 is not contacted without being melted inward.

また、ランド１３は、固体撮像素子３の外方に向けて長辺方向が延びる楕円状（又は長円状）に形成されているので、隣り合うランド１３同士の間隔を狭めることなくランド１３の面積を固体撮像素子３の外方に向けて広げることができ、隣り合うハンダボール１２同士を接触させないようにしつつ、より多くの量のハンダボール１２を固体撮像素子３の外方に向けて流動させ、固体撮像素子３に接触させないようにすることができる。   Further, since the lands 13 are formed in an elliptical shape (or an oval shape) extending in the long side direction toward the outside of the solid-state imaging device 3, the lands 13 can be formed without reducing the interval between the adjacent lands 13. The area can be expanded toward the outside of the solid-state imaging device 3, and a larger amount of the solder balls 12 can flow toward the outside of the solid-state imaging device 3 while preventing the adjacent solder balls 12 from contacting each other. Thus, the solid-state imaging device 3 can be prevented from contacting.

以上のように、本実施の形態によれば、ガラス基板１のサイズを小型化して固体撮像素子３の端縁とハンダボール１２の設置位置とが接近する場合でも、溶融したハンダボール１２が固体撮像素子３と接触する心配が少なくなるため、素子パッケージの小型化を達成しつつ、リーク電流を低減し画質の劣化を防止できる。   As described above, according to the present embodiment, even when the edge of the solid-state imaging device 3 and the installation position of the solder ball 12 approach each other by reducing the size of the glass substrate 1, the molten solder ball 12 is solid. Since there is less concern about contact with the image pickup element 3, it is possible to reduce the leakage current and prevent image quality deterioration while achieving downsizing of the element package.

なお、本発明は、実施の形態に限定されることなく発明の要旨を逸脱しない限りにおいて、適宜、必要に応じて、設計変更や改良等を行うのは自由であり、例えば、ランド１３の形状は楕円状もしくは長円状に限らず、円形状、長方形状などあらゆる形状をとり得る。
また、固体撮像素子３の端子４とガラス基板１の端子２は、必ずしも導電性バンプ５を介して接続されるものに限らず、電気的に接続されていればよい。 Note that the present invention is not limited to the embodiment, and it is free to make design changes or improvements as necessary, as long as it does not depart from the gist of the invention. Is not limited to an elliptical shape or an oval shape, and may take any shape such as a circular shape or a rectangular shape.
Moreover, the terminal 4 of the solid-state image sensor 3 and the terminal 2 of the glass substrate 1 are not necessarily connected via the conductive bumps 5, and may be electrically connected.

本発明に係る半導体実装構造によれば、コンパクト化を達成した上で画質の劣化防止を図ることができるのでコンパクト化されたカメラモジュール等に適用することができる。   The semiconductor mounting structure according to the present invention can be applied to a compact camera module or the like because it is possible to prevent deterioration in image quality while achieving compactness.

（ａ）は本発明の実施の形態に係る半導体実装構造の断面図、（ｂ）は同フレキシブル基板の平面図、（ｃ）は同ハンダボールが溶融した状態の半導体実装構造の断面図(A) is sectional drawing of the semiconductor mounting structure which concerns on embodiment of this invention, (b) is a top view of the flexible substrate, (c) is sectional drawing of the semiconductor mounting structure of the state which the solder ball fuse | melted （ａ）は同ガラス基板の底面図（又は平面図）、（ｂ）は同固体撮像素子の平面図、（ｃ）は同固体撮像素子が一体化されたガラス基板の平面図(A) is a bottom view (or plan view) of the glass substrate, (b) is a plan view of the solid-state image sensor, and (c) is a plan view of a glass substrate in which the solid-state image sensor is integrated. （ａ）は従来の半導体実装構造の断面図、（ｂ）は同フレキシブル基板の平面図、（ｃ）は同ハンダボールが溶融した状態の半導体実装構造の断面図(A) is a sectional view of a conventional semiconductor mounting structure, (b) is a plan view of the flexible substrate, and (c) is a sectional view of the semiconductor mounting structure in a state where the solder balls are melted.

符号の説明Explanation of symbols

１ ガラス基板
２ 端子
３ 固体撮像素子
４ 端子
５ 導電性バンプ
６…マイクロレンズ
７…封止材
８…フレキシブル基板
１２…ハンダボール
１３…ランド
DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Terminal 3 Solid-state image sensor 4 Terminal 5 Conductive bump 6 ... Micro lens 7 ... Sealing material 8 ... Flexible substrate 12 ... Solder ball 13 ... Land

Claims (2)

半導体素子の端子がガラス基板に設けられた端子に電気的に接続され、かつ、前記ガラス基板と基板の間に前記半導体素子を介在させた状態にて、前記ガラス基板と基板がハンダボールを介して電気的に接続される半導体実装構造において、
前記基板の前記ハンダボールが対応する箇所に形成するランドの中心位置を前記半導体素子の外方にシフトした位置に設定したことを特徴とする半導体実装構造。 In a state where the terminals of the semiconductor element are electrically connected to the terminals provided on the glass substrate and the semiconductor element is interposed between the glass substrate and the substrate, the glass substrate and the substrate are interposed via solder balls. In a semiconductor mounting structure electrically connected to each other,
A semiconductor mounting structure characterized in that a center position of a land formed at a location corresponding to the solder ball of the substrate is set to a position shifted outward of the semiconductor element. 前記ランドは、前記半導体素子の外方に向けて長辺方向が延びる楕円状もしくは長円状に形成されていることを特徴とする請求項１に記載の半導体実装構造。
2. The semiconductor mounting structure according to claim 1, wherein the land is formed in an elliptical shape or an elliptical shape having a long side direction extending outward of the semiconductor element.
JP2006201578A 2006-07-25 2006-07-25 Semiconductor mounting structure Expired - Fee Related JP4802907B2 (en)

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