JP4784851B2 - 集積回路の製造中に光学的に蓄積電荷を消去する方法及び装置 - Google Patents
集積回路の製造中に光学的に蓄積電荷を消去する方法及び装置 Download PDFInfo
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
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- 230000005540 biological transmission Effects 0.000 claims description 3
- 239000001307 helium Substances 0.000 claims description 3
- 229910052734 helium Inorganic materials 0.000 claims description 3
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 3
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28176—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
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Description
1つの態様では、集積回路の製造中に発生する蓄積電荷を低減する方法は、広帯域放射パターンを、集積回路の製造中に発生する蓄積電荷を低減するために有効な強度および照射時間で当該集積回路に照射することを含んでいる。
Claims (24)
- 浮遊ゲート電極、導電性ゲート電極、および浮遊ゲート電極と導電性ゲート電極との間に介在する絶縁膜からなる浮遊ゲート構造体を有する集積回路の製造中に蓄積電荷を除去するための方法であって、
広帯域放射パターンを、集積回路の製造中に発生する蓄積電荷を低減するために有効な強度および照射時間で当該集積回路に照射し、前記広帯域放射パターンは、少なくとも1つの280nmよりも短い波長を含み、かつ10nmよりも大きな半値全幅を含むことを特徴とする方法。 - 前記広帯域放射パターンは、20nmよりも大きな半値全幅を含むことを特徴とする請求項1に記載の方法。
- 前記広帯域放射パターンは、20nmよりも大きな半値全幅を有する少なくとも1つの180nmから250nmの波長を含むことを特徴とする請求項1に記載の方法。
- 前記広帯域放射パターンは、マイクロ波駆動式無電極電球から発生することを特徴とする請求項1に記載の方法。
- ウエハを加熱することを含む請求項1に記載の方法。
- 前記広帯域放射パターンを前記集積回路に照射することは、前記集積回路中に少なくとも1つの導電層を形成した後に実施することを特徴とする請求項1に記載の方法。
- 浮遊ゲート電極、導電性ゲート電極、および浮遊ゲート電極と導電性ゲート電極との間に介在する絶縁膜からなる浮遊ゲート構造体を有する集積回路の製造中に浮遊ゲート電極上の蓄積電荷を低減する方法であって、
浮遊ゲート電極を含む集積回路を処理室に配置する工程と、
広帯域放射パターンを、浮遊ゲート電極上の蓄積電荷を低減するために有効な強度および照射時間で当該集積回路に照射する工程と、
を含み、
前記広帯域放射パターンは、少なくとも1つの280nmよりも短い波長を含み、かつ10nmよりも大きな半値全幅を含むことを特徴とする方法。 - 前記広帯域放射パターンを集積回路に照射する工程は、さらに、前記放射パターンが通過する雰囲気を不活性ガスでパージする工程を含むことを特徴とする請求項7に記載の方法。
- 前記不活性ガスは、窒素、ヘリウム、アルゴン、およびこれらの不活性ガスの少なくとも1つを含む組合せからなるグループから選択されることを特徴とする請求項8に記載の方法。
- 前記広帯域放射パターンは、15nmよりも大きな半値全幅を含むことを特徴とする請求項7に記載の方法。
- 前記広帯域放射パターンは、20nmよりも大きな半値全幅を含むことを特徴とする請求項7に記載の方法。
- 前記広帯域放射パターンは、マイクロ波駆動式無電極電球から発生することを特徴とする請求項7に記載の方法。
- 浮遊ゲート電極、導電性ゲート電極、および浮遊ゲート電極と導電性ゲート電極との間に介在する絶縁膜からなる浮遊ゲート構造体を有する集積回路の製造中に発生する蓄積電荷を消去するための装置であって、
180nmから280nmの範囲の波長を含み、かつ10nmよりも大きな半値全幅を含む広帯域放射パターンを放射するために適した光源を備える放射源室と、
支持体、不活性ガスが導通するガス吸気口、およびガス排気口を備える処理室と、
前記放射源室と前記処理室との間に介在しかつ180nmから280nmの波長を透過する透過プレートと、
を含むことを特徴とする装置。 - 前記広帯域放射パターンは、20nmよりも大きな半値全幅を含むことを特徴とする請求項13に記載の装置。
- 前記広帯域放射パターンは、少なくとも1つの180nmから250nmの波長を含むことを特徴とする請求項14に記載の装置。
- 前記光源は、マイクロ波駆動式無電極電球を含むことを特徴とする請求項13に記載の装置。
- 前記不活性ガスは、窒素、ヘリウム、アルゴン、およびこれらの不活性ガスの少なくとも1つを含む組合せからなるグループから選択されることを特徴とする請求項13に記載の装置。
- 前記支持体または前記処理室は、処理中に基板の温度を上昇させるために適していることを特徴とする請求項13に記載の装置。
- 前記プレートは、石英から製造されることを特徴とする請求項13に記載の装置。
- 前記処理室には空気が存在しないことを特徴とする請求項14に記載の装置。
- 浮遊ゲート電極、導電性ゲート電極、および浮遊ゲート電極と導電性ゲート電極との間に介在する絶縁膜からなる浮遊ゲート構造体を有する集積回路の製造中に発生する蓄積電荷を消去するための装置であって、
180nmから280nmの範囲の複数の波長を含みかつ少なくとも1つのピーク波長が10nmよりも大きな半値全幅を有する広帯域放射パターンを放射するマイクロ波駆動式無電極電球を備える放射源室と、
支持体、不活性ガスが導通するガス吸気口、およびガス排気口を備える処理室と、
前記放射源室と前記処理室との間に介在しかつ180nmから280nmの波長に対して透過的なプレートと、
を含むことを特徴とする装置。 - 前記半値全幅は、20nmよりも大きいことを特徴とする請求項21に記載の装置。
- 浮遊ゲート電極、導電性ゲート電極、および浮遊ゲート電極と導電性ゲート電極との間に介在する絶縁膜からなる浮遊ゲート構造体を有する集積回路の製造中に発生する蓄積電荷を消去するための装置であって、
190nmから240nmに渡り、かつ10nmよりも大きな半値全幅を含むガウス型の広帯域放射パターンを放射するマイクロ波駆動式無電極電球を備える放射源室と、
支持体、不活性ガスが導通するガス吸気口、およびガス排気口を備える処理室と、
前記放射源室と前記処理室との間に介在しかつ前記広帯域放射パターンに対して透過的なプレートと、
を含むことを特徴とする装置。 - 前記広帯域放射パターンは、20nmよりも大きい半値全幅を含むことを特徴とする請求項23に記載の装置。
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US10/000,772 | 2001-11-30 | ||
US10/000,772 US6605484B2 (en) | 2001-11-30 | 2001-11-30 | Process for optically erasing charge buildup during fabrication of an integrated circuit |
PCT/US2002/038310 WO2003049182A2 (en) | 2001-11-30 | 2002-12-02 | Process for optically erasing charge buildup during fabrication of an integrated circuit |
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JP2005512324A JP2005512324A (ja) | 2005-04-28 |
JP2005512324A5 JP2005512324A5 (ja) | 2005-12-22 |
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US (2) | US6605484B2 (ja) |
EP (1) | EP1451868A2 (ja) |
JP (1) | JP4784851B2 (ja) |
KR (1) | KR20040068925A (ja) |
CN (2) | CN100336205C (ja) |
AU (1) | AU2002346599A1 (ja) |
WO (1) | WO2003049182A2 (ja) |
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US20050250346A1 (en) * | 2004-05-06 | 2005-11-10 | Applied Materials, Inc. | Process and apparatus for post deposition treatment of low k dielectric materials |
US20060249175A1 (en) * | 2005-05-09 | 2006-11-09 | Applied Materials, Inc. | High efficiency UV curing system |
US20060251827A1 (en) * | 2005-05-09 | 2006-11-09 | Applied Materials, Inc. | Tandem uv chamber for curing dielectric materials |
CN103364706B (zh) * | 2013-07-26 | 2017-03-08 | 上海华虹宏力半导体制造有限公司 | 验收测试装置及一次性可编程器件的验收测试方法 |
CN103820772B (zh) * | 2014-02-12 | 2016-07-06 | 清华大学 | 去除pecvd装置的电荷的系统及其控制方法 |
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2002
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- 2002-12-02 EP EP02784670A patent/EP1451868A2/en not_active Withdrawn
- 2002-12-02 WO PCT/US2002/038310 patent/WO2003049182A2/en active Application Filing
- 2002-12-02 CN CNB2007101287719A patent/CN100565807C/zh not_active Expired - Fee Related
- 2002-12-02 JP JP2003550278A patent/JP4784851B2/ja not_active Expired - Fee Related
- 2002-12-02 KR KR10-2004-7008048A patent/KR20040068925A/ko not_active Application Discontinuation
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2003
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Also Published As
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JP2005512324A (ja) | 2005-04-28 |
KR20040068925A (ko) | 2004-08-02 |
US20030104644A1 (en) | 2003-06-05 |
US20030180976A1 (en) | 2003-09-25 |
CN100336205C (zh) | 2007-09-05 |
AU2002346599A1 (en) | 2003-06-17 |
EP1451868A2 (en) | 2004-09-01 |
CN1596467A (zh) | 2005-03-16 |
WO2003049182A2 (en) | 2003-06-12 |
CN100565807C (zh) | 2009-12-02 |
CN101145520A (zh) | 2008-03-19 |
US6803319B2 (en) | 2004-10-12 |
US6605484B2 (en) | 2003-08-12 |
WO2003049182A3 (en) | 2003-09-12 |
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