JP4777337B2 - エッチング方法及び装置 - Google Patents
エッチング方法及び装置 Download PDFInfo
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- JP4777337B2 JP4777337B2 JP2007503962A JP2007503962A JP4777337B2 JP 4777337 B2 JP4777337 B2 JP 4777337B2 JP 2007503962 A JP2007503962 A JP 2007503962A JP 2007503962 A JP2007503962 A JP 2007503962A JP 4777337 B2 JP4777337 B2 JP 4777337B2
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- 238000005530 etching Methods 0.000 title claims description 87
- 238000000034 method Methods 0.000 title claims description 57
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 67
- 229920005591 polysilicon Polymers 0.000 claims description 67
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 66
- 238000012545 processing Methods 0.000 claims description 46
- 239000000758 substrate Substances 0.000 claims description 37
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 27
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 27
- 229910052710 silicon Inorganic materials 0.000 claims description 27
- 239000010703 silicon Substances 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 17
- 230000005284 excitation Effects 0.000 claims description 6
- 239000003701 inert diluent Substances 0.000 claims description 6
- 238000001816 cooling Methods 0.000 claims description 5
- 239000007789 gas Substances 0.000 description 40
- 230000008569 process Effects 0.000 description 30
- 230000009977 dual effect Effects 0.000 description 14
- 230000015572 biosynthetic process Effects 0.000 description 8
- 239000006117 anti-reflective coating Substances 0.000 description 7
- 229910052734 helium Inorganic materials 0.000 description 7
- 239000001307 helium Substances 0.000 description 6
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 6
- 238000009966 trimming Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000002826 coolant Substances 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 241000699666 Mus <mouse, genus> Species 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000012530 fluid Substances 0.000 description 2
- 230000006698 induction Effects 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 241000699670 Mus sp. Species 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012776 robust process Methods 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/82345—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
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- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
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Description
実施例1
その他の実施例
308…基板
312…シリコンシード層
320…デュアルドープポリシリコン層
322…非ドープ領域
324…非ドープポリシリコン層
328…ドープ領域
336…フォトレジストマスク
500…処理チャンバ
500…プラズマ処理チャンバ
504…誘導コイル
508…下部電極
510…ガスソース
520…排出ポンプ
528…チャンバ上部
528…リアクタ上部
535…コントローラ
540…プラズマ容積
543…ガス入口
552…チャンバ壁
552…冷却器
556…流体送給デバイス
560…ヒータ
604…ゲート酸化層
712…シリコンシード層
722…ポリシリコン層
780…基板
800…コンピュータシステム
802…モニタ
804…ディスプレイ
806…筐体
808…ディスクドライブ
810…キーボード
812…マウス
814…ディスク
814…リムーバブルディスク
820…システムバス
822…CPU
824…メモリ
826…固定ディスク
830…スピーカ
840…ネットワークインタフェース
Claims (11)
- 処理チャンバ内で、基板上に少なくとも一つのシリコンゲルマニウム層と前記シリコンゲルマニウム層上のポリシリコン層とを有するスタックをエッチングする方法であって、
前記ポリシリコン層は、少なくとも一つのドープ領域と少なくとも一つの非ドープ領域とを含み、
前記方法は、
前記シリコンゲルマニウム層上のポリシリコン層にブレークスルーエッチングを提供して、前記少なくとも一つのドープ領域と前記少なくとも一つの非ドープ領域とを同時にエッチングする工程と、
前記ブレークスルーエッチングの後にポリシリコンメインエッチングを提供する工程と、
前記ポリシリコンメインエッチングの後にシリコンゲルマニウムエッチングを提供する工程と、
を備え、
前記ブレークスルーエッチングを提供する工程は、
CHF 3 とCH 2 F 2 の少なくとも一方と、N 2 と、SF 6 と、を含む前記エッチャントガスを前記処理チャンバ内に提供する工程と、
前記ポリシリコン層の前記少なくとも一つのドープ領域と前記少なくとも一つの非ドープ領域とを同時にエッチングするために、前記エッチャントガスをプラズマに転換する工程と、
を含み、
前記ポリシリコンメインエッチングを提供する工程は、
Cl 2 、HBr、O 2 、及びCF 4 の少なくとも一つを含むエッチャントガスを提供する工程と、
前記シリコンゲルマニウム層に至るまで前記ポリシリコン層をエッチングするために、前記エッチャントガスをプラズマに転換する工程と、
を含み、
前記シリコンゲルマニウムエッチングを提供する工程は、
O2とN2の少なくとも一方と、HBrと、不活性希釈剤と、を含むエッチャントガスを前記処理チャンバ内に提供する工程と、
40℃未満の温度に前記基板を冷却する工程と、
前記シリコンゲルマニウム層をエッチングするために、前記エッチャントガスをプラズマに転換する工程と、
を含む、エッチング方法。 - 請求項1記載のエッチング方法であって、
前記シリコンゲルマニウム層及び前記ポリシリコン層を前記エッチングする工程は、垂直なプロファイルを提供するエッチング方法。 - 請求項1又は2に記載のエッチング方法であって、
前記スタックは、さらに、前記シリコンゲルマニウム層下にシードシリコン層を備え、
前記シリコンゲルマニウムエッチングは、前記シードシリコン層をエッチングするエッチング方法。 - 請求項3記載のエッチング方法であって、
前記シードシリコン層及びシリコンゲルマニウム層の合計厚さは、10乃至50ナノメートルであるエッチング方法。 - 請求項1ないし4のいずれかに記載のエッチング方法であって、さらに、
前記スタック上にフォトレジストマスクを提供する工程を備えるエッチング方法。 - 請求項5記載のエッチング方法であって、
前記フォトレジストマスクは、193nm世代以降の世代のフォトレジストであるエッチング方法。 - 請求項3記載のエッチング方法であって、
前記シードシリコン層及びシリコンゲルマニウム層の合計厚さは、前記ポリシリコン層の厚さの半分未満であるエッチング方法。 - 少なくとも一つのドープ領域と少なくとも一つの非ドープ領域とを有する、基板上のポリシリコン層をエッチングする方法であって、
処理チャンバ内に前記基板を配置する工程と、
CHF3とCH2F2の少なくとも一方と、N2と、SF6と、を含むエッチャントガスを前記処理チャンバ内に提供する工程と、
前記ポリシリコン層の前記少なくとも一つのドープ領域と前記少なくとも一つの非ドープ領域とを同時にエッチングするために、前記エッチャントガスをプラズマに転換する工程と、
ポリシリコンメインエッチングを提供する工程と、
を備え、
前記ポリシリコンメインエッチングを提供する工程は、
Cl 2 、HBr、O 2 、及びCF 4 の少なくとも一つを含むエッチャントガスを提供する工程と、
前記ポリシリコン層をエッチングするために、前記エッチャントガスをプラズマに転換する工程と、
を含む、エッチング方法。 - 請求項8記載のエッチング方法であって、さらに、
前記スタック上にフォトレジストマスクを提供する工程を備えるエッチング方法。 - 請求項9記載のエッチング方法であって、
前記フォトレジストマスクは、193nm世代以降の世代のフォトレジストであるエッチング方法。 - 基板上に少なくとも一つのシリコンゲルマニウム層と前記シリコンゲルマニウム層上のポリシリコン層とを有するスタックをエッチングする装置であって、
処理チャンバと、
ガスソースと、
励起ソースと、
前記基板の温度を制御するための温度制御デバイスと、
コントローラと、を備え、
前記ポリシリコン層は、少なくとも一つのドープ領域と少なくとも一つの非ドープ領域とを含み、
前記コントローラは、
前記シリコンゲルマニウム層上のポリシリコン層にブレークスルーエッチングを提供して、前記少なくとも一つのドープ領域と前記少なくとも一つの非ドープ領域とを同時にエッチングするコンピュータ読み取り可能なコードと、
前記ブレークスルーエッチングの後にポリシリコンメインエッチングを提供するコンピュータ読み取り可能なコードと、
前記ポリシリコンメインエッチングの後にシリコンゲルマニウムエッチングを提供するコンピュータ読み取り可能なコードと、
を格納するコンピュータ読み取り可能な媒体を備え、
前記ブレークスルーエッチングを提供するためのコンピュータ読み取り可能なコードは、
CHF 3 とCH 2 F 2 の少なくとも一方と、N 2 と、SF 6 と、を含む前記エッチャントガスを前記ガスソースから前記処理チャンバ内に提供するコンピュータ読み取り可能なコードと、
前記ポリシリコン層の前記少なくとも一つのドープ領域と前記少なくとも一つの非ドープ領域とを同時にエッチングするために、前記励起ソースを用いて前記エッチャントガスをプラズマに転換するコンピュータ読み取り可能なコードと、
を含み、
前記ポリシリコンメインエッチングを提供するコンピュータ読み取り可能なコードは、
Cl 2 、HBr、O 2 、及びCF 4 の少なくとも一つを含むエッチャントガスを前記ガスソースから前記処理チャンバ内に提供するコンピュータ読み取り可能なコードと、
前記シリコンゲルマニウム層に至るまで前記ポリシリコン層をエッチングするために、前記励起ソースを用いて前記エッチャントガスをプラズマに転換するコンピュータ読み取り可能なコードと、
を含み、
前記シリコンゲルマニウムエッチングを提供するコンピュータ読み取り可能なコードは、
O2とN2の少なくとも一方と、HBrと、不活性希釈剤と、を含むエッチャントガスを、前記ガスソースから前記処理チャンバへ提供するためのコンピュータ読み取り可能なコードと、
前記基板を40℃未満の温度に冷却するためのコンピュータ読み取り可能なコードと、
前記励起ソースを使用して、前記エッチャントガスをプラズマに転換し、前記シリコンゲルマニウム層をエッチングするためのコンピュータ読み取り可能なコードと、
を含む、エッチング装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/803,342 | 2004-03-17 | ||
US10/803,342 US7682985B2 (en) | 2004-03-17 | 2004-03-17 | Dual doped polysilicon and silicon germanium etch |
PCT/US2005/007750 WO2005091338A2 (en) | 2004-03-17 | 2005-03-08 | Dual doped polysilicon and silicon germanium etch |
Publications (3)
Publication Number | Publication Date |
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JP2007529904A JP2007529904A (ja) | 2007-10-25 |
JP2007529904A5 JP2007529904A5 (ja) | 2008-04-24 |
JP4777337B2 true JP4777337B2 (ja) | 2011-09-21 |
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JP2007503962A Expired - Fee Related JP4777337B2 (ja) | 2004-03-17 | 2005-03-08 | エッチング方法及び装置 |
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---|---|
US (1) | US7682985B2 (ja) |
JP (1) | JP4777337B2 (ja) |
KR (1) | KR101191699B1 (ja) |
CN (1) | CN100530566C (ja) |
TW (1) | TWI456650B (ja) |
WO (1) | WO2005091338A2 (ja) |
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WO2005091338A3 (en) | 2005-12-08 |
CN100530566C (zh) | 2009-08-19 |
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TWI456650B (zh) | 2014-10-11 |
US7682985B2 (en) | 2010-03-23 |
US20050205862A1 (en) | 2005-09-22 |
TW200539345A (en) | 2005-12-01 |
CN1954416A (zh) | 2007-04-25 |
KR101191699B1 (ko) | 2012-10-16 |
JP2007529904A (ja) | 2007-10-25 |
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