JP4772833B2 - Ic内のヒューズ・プログラミング電流を制御するためのシステムおよび方法 - Google Patents
Ic内のヒューズ・プログラミング電流を制御するためのシステムおよび方法 Download PDFInfo
- Publication number
- JP4772833B2 JP4772833B2 JP2008173837A JP2008173837A JP4772833B2 JP 4772833 B2 JP4772833 B2 JP 4772833B2 JP 2008173837 A JP2008173837 A JP 2008173837A JP 2008173837 A JP2008173837 A JP 2008173837A JP 4772833 B2 JP4772833 B2 JP 4772833B2
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- fuses
- current
- measurement
- impedance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/027—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in fuses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C2029/5006—Current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Read Only Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
前記選択された電流を生成するように構成されたトランジスタをオンする制御信号を生成し、前記選択された電流を前記目標ヒューズに流す、ことを具備する、態様(1)の方法。
Claims (5)
- 複数の測定ヒューズに複数の相違する電流を流し、複数の前記測定ヒューズの対応するものを破壊することなく切断した1つまたは複数の電流を特定し、前記特定された電流のうちの1つを自動的に選択するように構成されている測定回路と、
前記選択された電流で1つまたは複数の目標ヒューズをプログラムするように構成されているプログラミング回路と、
を具備するシステム。 - 前記測定回路によって生成される複数の相違する電流は、最低の電流から最高の電流まで順に大きくなっている値を有している、請求項1のシステム。
- 前記測定回路は、
複数の前記測定ヒューズのいずれが所望のインピーダンスを有しているかを割り出し、
前記所望のインピーダンスを有している前記測定ヒューズに対応する電流を特定する、
ように構成されている、請求項1のシステム。 - 前記測定回路は、複数の前記測定ヒューズのいずれが破壊されているヒューズのインピーダンス未満で且つ切断されていないヒューズのインピーダンスを超えるインピーダンスを有しているかを割り出すように構成されている、請求項3のシステム。
- 前記切断されていないヒューズのインピーダンスより大きく且つ前記切断されていないヒューズのインピーダンスより小さい第1参照インピーダンスを有する第1参照部品の両端で第1参照電圧降下を生成し、
前記切断されているヒューズのインピーダンスより大きく且つ前記破壊されているヒューズのインピーダンスより小さい第2参照インピーダンスを有する第2参照部品の両端で第2参照電圧降下を生成し、
複数の前記測定ヒューズの両端のヒューズ電圧降下を割り出し、
前記測定ヒューズのインピーダンスが、前記ヒューズ電圧降下が前記第1参照電圧降下未満のときは前記切断されていないヒューズのインピーダンスであり、前記ヒューズ電圧降下が前記第1参照電圧降下より大きく且つ前記第2参照電圧降下未満であるときは前記切断されているヒューズであり、前記ヒューズ電圧降下が前記第2参照電圧降下より大きい場合には前記破壊されているヒューズである、と判定する、
ように構成されている1つまたは複数の参照電圧生成器をさらに具備する、請求項4のシステム。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/779,411 US7405590B1 (en) | 2007-07-18 | 2007-07-18 | Systems and methods for controlling a fuse programming current in an IC |
US11/779,411 | 2007-07-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009027159A JP2009027159A (ja) | 2009-02-05 |
JP4772833B2 true JP4772833B2 (ja) | 2011-09-14 |
Family
ID=39643291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008173837A Expired - Fee Related JP4772833B2 (ja) | 2007-07-18 | 2008-07-02 | Ic内のヒューズ・プログラミング電流を制御するためのシステムおよび方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7405590B1 (ja) |
JP (1) | JP4772833B2 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10180447B2 (en) | 2015-07-20 | 2019-01-15 | Eaton Intelligent Power Limited | Electric fuse current sensing systems and monitoring methods |
US11143718B2 (en) | 2018-05-31 | 2021-10-12 | Eaton Intelligent Power Limited | Monitoring systems and methods for estimating thermal-mechanical fatigue in an electrical fuse |
US11289298B2 (en) | 2018-05-31 | 2022-03-29 | Eaton Intelligent Power Limited | Monitoring systems and methods for estimating thermal-mechanical fatigue in an electrical fuse |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7701226B2 (en) * | 2007-07-03 | 2010-04-20 | Kabushiki Kaisha Toshiba | Systems and methods for determining the state of a programmable fuse in an IC |
US7724600B1 (en) * | 2008-03-05 | 2010-05-25 | Xilinx, Inc. | Electronic fuse programming current generator with on-chip reference |
JP2009266950A (ja) * | 2008-04-23 | 2009-11-12 | Toshiba Corp | 半導体集積回路 |
US7911820B2 (en) * | 2008-07-21 | 2011-03-22 | International Business Machines Corporation | Regulating electrical fuse programming current |
US8134854B2 (en) * | 2008-11-25 | 2012-03-13 | Mediatek Inc. | Efuse device |
US8745410B2 (en) * | 2009-03-18 | 2014-06-03 | Atmel Corporation | Method and apparatus to scramble data stored in memories accessed by microprocessors |
US8189419B2 (en) * | 2009-07-06 | 2012-05-29 | International Business Machines Corporation | Apparatus for nonvolatile multi-programmable electronic fuse system |
JP5636794B2 (ja) * | 2010-07-30 | 2014-12-10 | ソニー株式会社 | 半導体装置及びその駆動方法 |
US10249379B2 (en) * | 2010-08-20 | 2019-04-02 | Attopsemi Technology Co., Ltd | One-time programmable devices having program selector for electrical fuses with extended area |
US9818478B2 (en) | 2012-12-07 | 2017-11-14 | Attopsemi Technology Co., Ltd | Programmable resistive device and memory using diode as selector |
US10916317B2 (en) | 2010-08-20 | 2021-02-09 | Attopsemi Technology Co., Ltd | Programmable resistance memory on thin film transistor technology |
US10923204B2 (en) | 2010-08-20 | 2021-02-16 | Attopsemi Technology Co., Ltd | Fully testible OTP memory |
US10229746B2 (en) * | 2010-08-20 | 2019-03-12 | Attopsemi Technology Co., Ltd | OTP memory with high data security |
US10586832B2 (en) | 2011-02-14 | 2020-03-10 | Attopsemi Technology Co., Ltd | One-time programmable devices using gate-all-around structures |
US10192615B2 (en) | 2011-02-14 | 2019-01-29 | Attopsemi Technology Co., Ltd | One-time programmable devices having a semiconductor fin structure with a divided active region |
US8351291B2 (en) * | 2011-05-06 | 2013-01-08 | Freescale Semiconductor, Inc | Electrically programmable fuse module in semiconductor device |
EP3327724B1 (en) * | 2013-09-21 | 2020-10-28 | Shine C. Chung | Circuit and system of using junction diode as program selector for one-time programmable devices |
US9324448B2 (en) * | 2014-03-25 | 2016-04-26 | Semiconductor Components Industries, Llc | Fuse element programming circuit and method |
CN106910525B (zh) * | 2015-12-23 | 2019-09-20 | 中芯国际集成电路制造(北京)有限公司 | 电可编程熔丝单元阵列及其操作方法 |
US11062786B2 (en) | 2017-04-14 | 2021-07-13 | Attopsemi Technology Co., Ltd | One-time programmable memories with low power read operation and novel sensing scheme |
US10535413B2 (en) | 2017-04-14 | 2020-01-14 | Attopsemi Technology Co., Ltd | Low power read operation for programmable resistive memories |
US11615859B2 (en) | 2017-04-14 | 2023-03-28 | Attopsemi Technology Co., Ltd | One-time programmable memories with ultra-low power read operation and novel sensing scheme |
US10726914B2 (en) | 2017-04-14 | 2020-07-28 | Attopsemi Technology Co. Ltd | Programmable resistive memories with low power read operation and novel sensing scheme |
US10770160B2 (en) | 2017-11-30 | 2020-09-08 | Attopsemi Technology Co., Ltd | Programmable resistive memory formed by bit slices from a standard cell library |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6246496A (ja) * | 1985-08-23 | 1987-02-28 | Sony Corp | 固定記憶装置の書き込み方法 |
US6972614B2 (en) | 2004-04-07 | 2005-12-06 | International Business Machines Corporation | Circuits associated with fusible elements for establishing and detecting of the states of those elements |
JP2006253353A (ja) * | 2005-03-10 | 2006-09-21 | Matsushita Electric Ind Co Ltd | 電気ヒューズモジュール |
JP4946133B2 (ja) * | 2005-03-30 | 2012-06-06 | ヤマハ株式会社 | ヒューズ素子切断手順の決定方法 |
US7200064B1 (en) * | 2005-10-07 | 2007-04-03 | International Business Machines Corporation | Apparatus and method for providing a reprogrammable electrically programmable fuse |
US7254078B1 (en) * | 2006-02-22 | 2007-08-07 | International Business Machines Corporation | System and method for increasing reliability of electrical fuse programming |
-
2007
- 2007-07-18 US US11/779,411 patent/US7405590B1/en not_active Expired - Fee Related
-
2008
- 2008-07-02 JP JP2008173837A patent/JP4772833B2/ja not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10180447B2 (en) | 2015-07-20 | 2019-01-15 | Eaton Intelligent Power Limited | Electric fuse current sensing systems and monitoring methods |
US10598703B2 (en) | 2015-07-20 | 2020-03-24 | Eaton Intelligent Power Limited | Electric fuse current sensing systems and monitoring methods |
US11143718B2 (en) | 2018-05-31 | 2021-10-12 | Eaton Intelligent Power Limited | Monitoring systems and methods for estimating thermal-mechanical fatigue in an electrical fuse |
US11289298B2 (en) | 2018-05-31 | 2022-03-29 | Eaton Intelligent Power Limited | Monitoring systems and methods for estimating thermal-mechanical fatigue in an electrical fuse |
Also Published As
Publication number | Publication date |
---|---|
US7405590B1 (en) | 2008-07-29 |
JP2009027159A (ja) | 2009-02-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4772833B2 (ja) | Ic内のヒューズ・プログラミング電流を制御するためのシステムおよび方法 | |
US7701226B2 (en) | Systems and methods for determining the state of a programmable fuse in an IC | |
US8380768B2 (en) | Random number generator | |
JP4624516B2 (ja) | ヒューズ検出回路およびその集積回路メモリ | |
US7224633B1 (en) | eFuse sense circuit | |
US7098721B2 (en) | Low voltage programmable eFuse with differential sensing scheme | |
US7200064B1 (en) | Apparatus and method for providing a reprogrammable electrically programmable fuse | |
US7528646B2 (en) | Electrically programmable fuse sense circuit | |
JP6008387B2 (ja) | 半導体デバイスの電気的にプログラミング可能なヒューズモジュール | |
US9502132B2 (en) | Multi level antifuse memory device and method of operating the same | |
US8305822B2 (en) | Fuse circuit and semiconductor memory device including the same | |
US7986024B2 (en) | Fuse sensing scheme | |
US7242239B2 (en) | Programming and determining state of electrical fuse using field effect transistor having multiple conduction states | |
KR102529357B1 (ko) | 1 회 프로그래밍가능 메모리 셀들에 대한 기입 종료를 제공하기 위한 시스템들 및 방법들 | |
JP2007299926A (ja) | 抵抗変化型ヒューズ回路 | |
US7924646B2 (en) | Fuse monitoring circuit for semiconductor memory device | |
JP3361006B2 (ja) | 半導体デバイス | |
JP2006253353A (ja) | 電気ヒューズモジュール | |
JP2012109403A5 (ja) | ||
JP2012109329A (ja) | 半導体装置及びその制御方法 | |
US10127998B2 (en) | Memory having one time programmable (OTP) elements and a method of programming the memory | |
US7495987B2 (en) | Current-mode memory cell | |
KR102229463B1 (ko) | 이퓨즈 otp 메모리 장치 및 그 구동 방법 | |
CN118053475A (zh) | 一次性可编程存储器的写入电路及存储装置 | |
KR100632617B1 (ko) | 리페어 회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110328 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110531 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110622 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140701 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140701 Year of fee payment: 3 |
|
LAPS | Cancellation because of no payment of annual fees |