JP4770580B2 - Method of manufacturing nitride semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a nitride semiconductor device including a contact layer made of an n-type nitride semiconductor doped with a donor.

A nitride semiconductor is a compound semiconductor represented by the general formula Al _a In _b Ga _1-ab N (0 ≦ a ≦ 1, 0 ≦ b ≦ 1, 0 ≦ a + b ≦ 1), GaN, InGaN , AlGaN, AlInGaN, AlN, InN, etc. In the above chemical formula, a part of the group 3 element is substituted with B (boron), Tl (thallium), etc., and a part of N (nitrogen) is P (phosphorus), As (arsenic), Sb (antimony) Those substituted with Bi (bismuth) or the like are also included in the nitride semiconductor.

  In recent years, light-emitting elements such as light-emitting diodes have been put to practical use as nitride semiconductor elements using nitride semiconductors as the main part of the element structure. For example, a light emitting diode element using a nitride semiconductor has an n-type layer, an active layer, and a p-type layer made of a nitride semiconductor formed on a sapphire substrate using an organic metal compound vapor phase growth method (MOVPE method). It forms in order and is laminated | stacked, and it is comprised by forming an ohmic electrode in each of an n-type layer and a p-type layer. In general, a low temperature buffer layer formed by growing GaN, AlGaN, InGaN or the like at a temperature lower than the temperature at which the single crystal layer is formed is interposed between the sapphire substrate and the n-type layer. An n-type layer may be formed on the low-temperature buffer layer via an undoped nitride semiconductor layer. In particular, when using a substrate with irregularities on the surface, the irregularities are embedded with undoped GaN. Therefore, it is considered preferable to form an n-type layer doped with a donor (Patent Document 1). This is because if a donor such as Si (silicon) or Ge (germanium) is doped during the growth of a nitride semiconductor, lateral growth of the crystal (growth in a direction parallel to the main surface of the substrate) is suppressed. This is because it is difficult to bury the unevenness with a nitride semiconductor containing silicon.

On the other hand, in the n-type layer, the n-type contact layer where the ohmic electrode is formed is doped with a high concentration of donor so that the contact resistance with the ohmic electrode is lowered. The concentration is preferably 1 × 10 ¹⁸ cm ⁻³ or more, and more preferably 2 × 10 ¹⁸ cm ⁻³ or more. Usually, a nitride semiconductor doped with a donor is formed by simultaneously supplying a group 3 material (for example, trimethylgallium), a nitrogen material (for example, ammonia), and a donor material (for example, silane) ( Patent Document 2).

JP 2002-280609 A JP 2004-96122 A

  However, a nitride semiconductor layer in which a donor is not doped intentionally is used as a base layer, and a group III source material, a nitrogen source material, and a donor source material are simultaneously supplied immediately above the nitride semiconductor layer, and the donor semiconductor is highly doped. However, there is a tendency that abnormal growth occurs and a three-dimensional crystal is generated, and it is difficult to obtain a single crystal layer having a flat surface. A similar problem can be seen when a nitride semiconductor layer is formed by simultaneously supplying a Group 3 material, a nitrogen material, and a donor material immediately above the low temperature buffer layer as an underlayer.

  The present invention has been made in view of such circumstances, and grows a nitride semiconductor layer doped with a donor at a high concentration directly on a nitride semiconductor layer having a lower donor concentration or on a low-temperature buffer layer. An object of the present invention is to provide a method capable of preventing the occurrence of abnormal growth and thereby efficiently producing a nitride semiconductor device having an n-type contact layer doped with a donor.

In the organometallic compound vapor phase growth method, the inventors doped a donor when a nitride semiconductor was formed by alternately supplying a group 3 material and a donor material while continuously supplying a nitrogen material. A nitride semiconductor is obtained, and according to this method, a nitride semiconductor having a high donor concentration can be easily formed directly on a nitride semiconductor layer having a lower donor concentration or on a low-temperature buffer layer. The inventors have found that the film can be formed in layers, and have completed the present invention. Hereinafter, in such an organometallic compound vapor phase growth method, a method of forming an n-type nitride semiconductor by alternately supplying a Group 3 material and a donor material while continuously supplying a nitrogen material, This is called “alternate supply method”.
The production method of the present invention uses an alternate supply method, and has the following features in order to achieve the above object.

(1) A method of manufacturing a nitride semiconductor device including a contact layer made of an n-type nitride semiconductor doped with a donor, wherein the contact layer is formed of a nitride semiconductor layer having a lower donor concentration than the contact layer. When forming a base layer or a low-temperature buffer layer as a base layer by an organometallic compound vapor phase growth method, first, a group 3 source material is supplied while continuously supplying a nitrogen source material onto the base layer. And a donor material are alternately supplied to form a first portion doped with a donor, and then a nitrogen material, a group 3 material and a donor material are simultaneously supplied on the first portion. Forming a second portion doped with a donor.
(2) The manufacturing method according to (1), wherein the base layer is a nitride semiconductor layer having a donor concentration lower than that of the contact layer.
(3) The manufacturing method according to (2), wherein a donor concentration of the contact layer is 100 times or more of a donor concentration of the base layer.
(4) The manufacturing method according to (2), wherein the underlayer is a nitride semiconductor layer that is not intentionally doped with a donor.
(5) The manufacturing method according to (4), wherein the base layer is a nitride semiconductor layer doped with an acceptor.
(6) The manufacturing method according to (1), wherein the base layer is a low-temperature buffer layer.
(7) the donor concentration of the second portion is ^{1 × 10 18 cm -3 ~1 ×} 10 20 cm -3, The method according to any one of (1) to (6).
(8) Any of (1) to (7) above, wherein the donor concentration in the first portion is the same as or higher than the donor concentration in the second portion The manufacturing method of crab.
(9) The manufacturing method according to any one of (1) to (8), wherein the donor is Si.
(10) The manufacturing method according to any one of (1) to (9), which is a method for manufacturing a light emitting element.

  According to the manufacturing method of the present invention, abnormal growth occurs when a nitride semiconductor doped with a high donor concentration is grown directly on a nitride semiconductor layer having a lower donor concentration or on a low-temperature buffer layer. Therefore, a nitride semiconductor device including an n-type contact layer doped with a donor can be efficiently manufactured.

  Hereinafter, in describing embodiments of the present invention, a method of forming an n-type nitride semiconductor by simultaneously supplying a nitrogen source, a group 3 source, and a donor source in an organometallic compound vapor deposition method is described as “simultaneous”. It is also called “supply method”.

[First Embodiment]
FIG. 1 is a schematic cross-sectional view showing one structural example of a light-emitting diode element manufactured by the manufacturing method of the present invention. In FIG. 1, 1 is a sapphire substrate, 2 is a low-temperature buffer layer made of AlGaN, 3 is an n-type contact layer made of Si-doped GaN (also used as an n-type cladding layer), and 4 is An active layer having a multiple quantum well structure in which GaN barrier layers and InGaN well layers are alternately stacked, 5 is a p-type cladding layer made of Mg-doped AlGaN, and 6 is a p-type contact layer made of Mg-doped GaN. P1 is a negative ohmic electrode formed on the partially exposed n-type contact layer 3, and P2 is a positive electrode having translucency formed over substantially the entire surface on the p-type contact layer 6. P3 is a bonding pad that is electrically connected to the positive ohmic electrode P2.
The n-type contact layer 3 includes a first portion 31 formed by an alternate supply method and a second portion 32 formed by a simultaneous supply method.

The light emitting diode element shown in FIG. 1 can be manufactured as follows.
First, the surface of the sapphire substrate 1 is set in a growth furnace of a MOVPE apparatus and heated to 1100 ° C. in a hydrogen stream to clean the surface.
Next, the substrate temperature is lowered to 500 ° C., hydrogen gas is used as a carrier gas, trimethylaluminum (TMA), trimethylgallium (TMG), and ammonia are supplied as raw materials onto the substrate, and the low-temperature buffer layer 2 made of AlGaN is formed. It is formed to a thickness of 30 nm.
Next, the substrate temperature is raised to 1000 ° C., and the first portion 31 of the n-type contact layer is formed to a thickness of 0.1 μm by an alternate supply method. Specifically, TMG and silane are alternately supplied while continuously supplying ammonia as a raw material at a flow rate of 6 slm. When supplying TMG, hydrogen gas is used as a carrier gas, the flow rate is 42 sccm, and the supply time per time is 1 second. Silane is diluted with hydrogen gas to 10 ppm, the flow rate is 4 sccm, and the supply time per time is 1 second.
Next, ammonia, TMG, and silane are simultaneously supplied while maintaining the substrate temperature at 1000 ° C., that is, the second portion 32 of the n-type contact layer is formed to a thickness of 2.9 μm by the simultaneous supply method. Form. The supply amounts of TMG and silane are set so that the carrier concentration of the second portion 32 is 2 × 10 ¹⁸ cm ⁻³ .

Next, the substrate temperature is lowered to 700 ° C. to 800 ° C., nitrogen gas is used as a carrier gas, TMG, trimethylindium (TMI), and ammonia are used as raw materials, and a GaN barrier layer having a thickness of 10 nm and a thickness of 3 nm are used. Active layers 4 are formed by alternately growing InGaN well layers. Doping of impurities into the barrier layer and the well layer can be arbitrarily performed.
Next, the substrate temperature is raised to 1000 ° C., hydrogen gas is used as a carrier gas, TMA, TMG, ammonia, and biscyclopentadienyl magnesium (Cp ₂ Mg) are supplied onto the substrate as a p-type cladding layer 5 is formed to a thickness of 30 nm.
Next, while maintaining the substrate temperature at 1000 ° C., hydrogen gas is used as a carrier gas, TMG, ammonia, and Cp ₂ Mg are supplied onto the substrate as raw materials to form the p-type contact layer 6 with a thickness of 100 nm. To do.

  After the p-type contact layer 6 is formed, the substrate heating is stopped and the wafer is cooled to room temperature. By making the atmosphere during cooling an inert gas atmosphere containing a small amount of ammonia, Mg (magnesium) added as an acceptor to the p-type cladding layer 5 and the p-type contact 6 can be activated. Alternatively, Mg may be activated by performing cooling in an ammonia atmosphere and performing annealing treatment or electron beam irradiation treatment on the cooled wafer.

  The negative side ohmic electrode P1, the positive side ohmic electrode P2, and the bonding pad P3 are formed on the wafer obtained by the above procedure using a well-known method in this field. Finally, a chip-like light emitting diode element is cut out from the wafer using a well-known method in this field.

In the example of FIG. 1, the n-type contact layer 3 is formed immediately above the low-temperature buffer layer 2, but an undoped nitride semiconductor layer that is not intentionally doped with impurities on the low-temperature buffer layer 2 (for example, , An undoped GaN layer), and an n-type contact layer may be formed thereon by sequentially performing an alternate supply method and a simultaneous supply method. Even when a single crystal layer made of an undoped nitride semiconductor is used as an underlayer, a portion in contact with the undoped layer is grown by an alternating supply method, thereby forming a layer of a nitride semiconductor doped with a donor at a high concentration It becomes easy.
In addition, even when the underlayer is not an undoped layer but a single crystal layer of a nitride semiconductor doped with a donor at a lower concentration than the n-type contact layer, a portion in contact with the underlayer is formed by an alternating supply layer. Thus, an effect of suppressing abnormal growth when forming the n-type contact layer can be obtained. In particular, when the n-type contact layer is doped with a donor at a concentration 100 times or more that of the underlayer, a remarkable effect is obtained.

Of the n-type contact layer 3, the carrier concentration (donor concentration) of the first portion 31 formed by the alternate supply method is not particularly limited, but preferably, the carrier concentration of the first portion is formed by the simultaneous supply method. The carrier concentration of the second portion 32 is 10% or more, more preferably 30% or more. The carrier concentration of the first portion may be the same as the carrier concentration of the second portion or may be higher than that.
The film thickness of the first portion 31 may be set to such a thickness that the first portion completely covers the surface of the low-temperature buffer layer 2 that is the underlayer. For example, the film thickness is set to 0.001 μm to 1 μm. it can. In the alternate supply method, since the supply of the group 3 material and the donor material is intermittent, the growth rate of the semiconductor layer is smaller than that in the simultaneous supply method, and if the thickness is larger than 1 μm, the time required for the production becomes significantly longer. Therefore, the film thickness of the first portion is preferably 0.5 μm or less, and more preferably 0.2 μm or less.

The carrier concentration (donor concentration) of the n-type contact layer 3 is preferably 1 × 10 ¹⁸ cm ⁻³ or more and preferably 2 × 10 ¹⁸ cm ⁻³ or more in order to reduce the contact resistance with the electrode. Is more preferable. There is no particular upper limit on the carrier concentration of the n-type contact layer, but if the doping amount of the donor is too high, the crystallinity is significantly lowered. Therefore, it is preferably 1 × 10 ²⁰ cm ⁻³ or less, more preferably 5 × 10 ¹⁹ cm ⁻³ or less. The film thickness of the n-type contact layer can be 0.1 μm to 10 μm. The crystal composition of the n-type contact layer is not limited, and the first portion and the second portion may have the same crystal composition or may have different crystal compositions. Further, the first part and the second part may be formed by stacking layers made of crystals having different compositions. When the second portion is formed by the simultaneous supply method, the nitrogen raw material and the group 3 raw material may be continuously supplied, while the donor raw material may be supplied at short intervals in some places.

[Second Embodiment]
FIG. 2 is a schematic cross-sectional view showing another structural example of a light-emitting diode element manufactured using the manufacturing method of the present invention.
In FIG. 2, 1 is a sapphire substrate, 2 is a low-temperature buffer layer made of AlGaN, 3 is an n-type first contact layer made of Si-doped GaN, and 4 is an alternating GaN barrier layer and InGaN well layer. Is an active layer having a multiple quantum well structure, 5 is a p-type cladding layer made of Mg-doped AlGaN, 6 is a p-type intermediate layer made of Mg-doped GaN, and 7 is made of Si-doped GaN. n-type second contact layer, P1 is a negative ohmic electrode formed on the partially exposed n-type first contact layer 3, and P2 is a positive side formed on the n-type second contact layer 7 This is an ohmic electrode.
The n-type first contact layer 3 includes a first portion 31 formed by an alternate supply method and a second portion 32 formed by a simultaneous supply method.
The n-type second contact layer 7 includes a first portion 71 formed by an alternate supply method and a second portion 72 formed by a simultaneous supply method. A tunnel junction is formed between the p-type intermediate layer 6 and the n-type second contact layer 7.
The positive ohmic electrode P2 can be formed using, for example, one or more metals selected from Al (aluminum), Ti (titanium), W (tungsten), V (vanadium), Nb (niobium), and the like. In addition, it can be formed of conductive oxides such as ITO (indium tin oxide), IZO (indium zinc oxide), tin oxide, and zinc oxide.

In the case of manufacturing the light-emitting diode element shown in FIG. 2, the formation of the p-type cladding layer 5 can be performed by the same method as in the first embodiment.
Following the formation of the p-type cladding layer 5, the p-type intermediate layer 6 uses hydrogen gas as a carrier gas while keeping the substrate temperature at 1000 ° C., and supplies TMG, ammonia, and Cp ₂ Mg as raw materials onto the substrate. Then, it is formed to a thickness of 100 nm.
After the p-type intermediate layer 6 is formed, the first portion 71 of the n-type second contact layer 7 is formed to a thickness of 0.1 μm by an alternate supply method while the substrate temperature is kept at 1000 ° C. Specifically, TMG and silane are alternately supplied while continuously supplying ammonia as a raw material at a flow rate of 6 slm. When supplying TMG, hydrogen gas is used as a carrier gas, the flow rate is 42 sccm, and the supply time per time is 1 second. Silane is diluted with hydrogen gas to 10 ppm, the flow rate is 16 sccm, and the supply time per time is 1 second.
Subsequently, ammonia, TMG, and silane are simultaneously supplied while maintaining the substrate temperature at 1000 ° C., that is, the second portion 72 of the n-type second contact layer 7 is formed to a thickness of 1 μm by the simultaneous supply method. To form. The supply amounts of TMG and silane at this time are set so that the carrier concentration of the second portion 72 is 2 × 10 ¹⁸ cm ⁻³ .

Note that Cp ₂ Mg supplied at the time of forming the p-type cladding layer 5 and the p-type intermediate layer 6 is adsorbed on the inner wall of the growth furnace and the like and remains in the system, and therefore, the n-type second contact layer 7 that grows later. If the so-called “memory effect”, in which Mg is mixed, becomes a problem, after the formation of the p-type intermediate layer 6, the wafer is once taken out from the MOVPE apparatus, and Cp ₂ Mg is removed from the growth system by baking, cleaning, etc. This problem can be solved by performing the procedure described above or by transferring the wafer to another MOVPE apparatus and forming the n-type second contact layer 7.
After the n-type second contact layer 7 is formed, the substrate heating is stopped and the wafer is cooled to room temperature. By making the atmosphere at the time of cooling an inert gas atmosphere, Mg added as an acceptor to the p-type cladding layer 5 and the p-type intermediate layer 6 can be activated. Alternatively, the cooling may be performed in an ammonia atmosphere, and the annealed wafer may be annealed to activate Mg added to the p-type cladding layer 5 and the p-type intermediate layer 6.

The negative ohmic electrode P1 is formed on the exposed surface by partially exposing the n-type first contact layer 3 by reactive ion etching using chlorine gas. The negative ohmic electrode P1 is formed of a metal material such as Al, Ti, W, V, or Nb, or a conductive oxide such as ITO, IZO, tin oxide, or zinc oxide, similarly to the positive ohmic P2. be able to. Accordingly, the negative ohmic electrode P1 and the positive ohmic electrode P2 can be simultaneously formed of the same material. The positive and negative ohmic electrodes can be formed by vapor deposition or sputtering.
After the electrodes are formed, a chip-like light emitting diode element is cut out from the wafer using a well-known method in this field.

The second embodiment is characterized in that the alternate supply method is used not only for forming the n-type first contact layer 3 but also for forming the n-type second contact layer 7. In particular, the n-type second contact layer 7 needs to have a sufficiently high carrier concentration (donor concentration) in the vicinity of the interface with the p-type intermediate layer 6 so that a tunnel junction is formed with the p-type intermediate layer 6. However, according to the alternate supply method, GaN doped with Si at a high concentration so that a carrier concentration of 5 × 10 ¹⁸ cm ⁻³ or more can be obtained, and an Mg-doped GaN layer not intentionally doped with Si It can be easily grown in a layered form immediately above the surface.
As described above, the n-type nitride semiconductor forming method using the alternate supply method has a layered n-type nitride semiconductor that forms a tunnel junction with the p-type nitride semiconductor on the p-type nitride semiconductor layer. Very suitable for forming.

Hereinafter, an experimental example in which an n-type nitride semiconductor layer is formed by an alternating supply method and the carrier concentration (donor concentration) is measured will be shown.
[Experimental Example 1]
(Sample preparation)
The structure of the sample used in Experimental Example 1 is schematically shown in FIG. In FIG. 3, 10 is a sapphire substrate, 21 is a low-temperature buffer layer, 22 is an undoped GaN layer, and 30 is an n-type GaN layer. The method for producing this sample is as follows.
First, the c-plane sapphire substrate 10 having a diameter of 2 inches was placed in a growth furnace of a MOVPE apparatus, and the surface was cleaned by heating to 1100 ° C. in a hydrogen stream.
Next, the substrate temperature was lowered to 500 ° C., hydrogen gas was used as a carrier gas, TMG and ammonia were supplied as raw materials, and a low-temperature buffer layer 21 made of GaN was formed on the substrate 10 to a thickness of 30 nm.
Next, the substrate temperature was raised to 1000 ° C., hydrogen gas was used as a carrier gas, TMG and ammonia were supplied as raw materials, and an undoped GaN layer 22 was formed to a thickness of 2 μm on the low temperature buffer layer 21.
Next, the n-type GaN layer 30 was formed to a thickness of 2 μm by an alternate supply method while keeping the substrate temperature at 1000 ° C. When the n-type GaN layer 30 was formed, four types of samples (sample A to sample D) were produced by changing the ratio of the amount of TMG supplied onto the substrate and the amount of silane in four ways. Specifically, the flow rate when supplying TMG using hydrogen gas as a carrier gas was fixed at 42 sccm, and the supply time of TMG, the flow rate of silane, and the supply time were set as shown in Table 1. The ratio of the supply amount of silane to the supply amount of TMG is 2.5 for sample B, 10 for sample C, and 40 for sample D, where sample A is 1.
In any sample, the flow rate of ammonia supplied to the substrate 10 when forming the n-type GaN layer 30 was 6 slm, and silane diluted to 10 ppm with hydrogen gas was used.

  Table 2 shows the characteristics of the n-type GaN layer of each sample examined by hole measurement.

  As shown in Table 2, in each sample, the n-type GaN layer exhibited n-type conductivity. As the ratio of the supply amount of silane to the supply amount of TMG at the time of growth increases, the carrier concentration increases and the resistivity decreases. Therefore, Si derived from silane serves as a donor in the n-type GaN layer. It is thought that it was taken in.

  Note that when the surfaces of the n-type GaN layers of Sample A to Sample D were observed with a differential interference microscope, all of them exhibited a good mirror shape, and no difference between the samples was observed.

The present invention is not limited by the above-described embodiments and experimental examples.
In the manufacturing method of the present invention, as a substrate, in addition to a sapphire substrate, a SiC substrate, GaN substrate, AlGaN substrate, AlN substrate, Si substrate, GaAs substrate, GaP substrate, spinel substrate, ZnO substrate, NGO (NdGaO ₃ ) substrate, A single crystal substrate such as an LGO (LiGaO ₂ ) substrate, an LAO (LaAlO ₃ ) substrate, a ZrB ₂ substrate, or a TiB ₂ substrate can be preferably used. The nitride semiconductor device manufactured by the manufacturing method of the present invention does not necessarily include the substrate used when forming the n-type contact layer, and the substrate is polished, etched, laser lift-off, etc. in the manufacturing process of the device. May be removed by this method.

  In the manufacturing method of the present invention, at least a portion of the n-type contact layer that is in contact with the base layer (a nitride semiconductor layer having a lower donor concentration than the n-type contact layer or a low-temperature buffer layer) is alternately supplied. It is essential to form the n-type contact layer, but the configuration of the n-type contact layer is not limited to the configuration in which only the portion is formed by the alternate supply method. May be included alternately.

  In the production method of the present invention, ammonia, hydrazine, methyl hydrazine, dimethyl hydrazine, t-butylamine, ethylenediamine and the like can be suitably used as the nitrogen raw material. These may be used alone or in any combination.

  In the production method of the present invention, among the group 3 materials, trialkyl gallium such as trimethyl gallium and triethyl gallium is used as the gallium material, and trialkyl aluminum such as trimethyl aluminum, triethyl aluminum and triisobutyl aluminum is used as the aluminum material. As the indium raw material, trialkylindium such as trimethylindium and triethylindium, trialkylindium such as diethylindium chloride in which a part of the alkyl group of trialkylindium is replaced with a halogen atom, and indium halide such as indium chloride are preferably used. Can be used.

  In the production method of the present invention, Si and Ge (germanium) can be suitably used as the donor, and silane, disilane, germane, tetramethylgermanium, tetraethylgermanium, and the like can be suitably used as the donor raw material.

  In the alternate supply method, it is not essential to keep the supply amount of the nitrogen raw material constant. For example, the supply amount can be changed between the supply of the group 3 raw material and the supply of the donor. In the alternate supply method, when the supply of the Group 3 material and the donor material is switched, an interval for supplying neither the Group 3 material nor the donor material may be provided.

  The manufacturing method of the present invention is suitable for manufacturing any nitride semiconductor element such as a light emitting element such as a light emitting diode element and a laser element, a transistor such as a high electron mobility transistor (HEMT) and a field effect transistor (FET), and a light receiving element. Can be applied.

It is a schematic cross section which shows one structural example of the light emitting diode element manufactured by the manufacturing method of this invention. It is a schematic cross section which shows one structural example of the light emitting diode element manufactured by the manufacturing method of this invention. It is a schematic cross section for demonstrating the structure of a sample.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Sapphire substrate 2 Low-temperature buffer layer 3 n-type contact layer 31 1st part 32 2nd part 4 Active layer 5 p-type cladding layer 6 p-type contact layer P1 Negative ohmic electrode P2 Positive ohmic electrode P3 Bonding pad

Claims (10)

A method for manufacturing a nitride semiconductor device including a contact layer made of an n-type nitride semiconductor doped with a donor,
In forming the contact layer by using a nitride semiconductor layer having a donor concentration lower than that of the contact layer as a base layer or a low-temperature buffer layer as a base layer, an organic metal compound vapor phase growth method is directly formed thereon. First, a group 3 material and a donor material are alternately supplied while continuously supplying a nitrogen material on the underlayer, thereby forming a first portion doped with a donor. A method of manufacturing a nitride semiconductor device, comprising simultaneously supplying a nitrogen source, a group 3 source, and a donor source on the portion to form a second portion doped with a donor. The manufacturing method according to claim 1, wherein the underlayer is a nitride semiconductor layer having a donor concentration lower than that of the contact layer. The manufacturing method of Claim 2 whose donor concentration of the said contact layer is 100 times or more of the donor concentration of the said foundation | substrate layer. The manufacturing method according to claim 2, wherein the underlayer is a nitride semiconductor layer not intentionally doped with a donor. The manufacturing method according to claim 4, wherein the underlayer is a nitride semiconductor layer doped with an acceptor. The manufacturing method according to claim 1, wherein the underlayer is a low-temperature buffer layer. The donor concentration of the second portion is ^{1 × 10 18 cm -3 ~1 ×} 10 20 cm -3, The method according to any one of claims 1 to 6. The manufacturing method according to claim 1, wherein the donor concentration of the first part is the same as or higher than the donor concentration of the second part. . The manufacturing method in any one of Claims 1-8 whose said donor is Si. The manufacturing method in any one of Claims 1-9 which is a manufacturing method of a light emitting element.