JP4749556B2 - 割込強制レジスタを含む柔軟な割込コントローラ - Google Patents

割込強制レジスタを含む柔軟な割込コントローラ Download PDF

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Publication number
JP4749556B2
JP4749556B2 JP2001015501A JP2001015501A JP4749556B2 JP 4749556 B2 JP4749556 B2 JP 4749556B2 JP 2001015501 A JP2001015501 A JP 2001015501A JP 2001015501 A JP2001015501 A JP 2001015501A JP 4749556 B2 JP4749556 B2 JP 4749556B2
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interrupt
hardware
software
storage device
priority
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JP2001229031A5 (https=
JP2001229031A (ja
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ウィリアム・シー・モイヤー
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NXP USA Inc
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP2001015501A 2000-01-24 2001-01-24 割込強制レジスタを含む柔軟な割込コントローラ Expired - Fee Related JP4749556B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US490132 2000-01-24
US09/490,132 US6845419B1 (en) 2000-01-24 2000-01-24 Flexible interrupt controller that includes an interrupt force register

Publications (3)

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JP2001229031A JP2001229031A (ja) 2001-08-24
JP2001229031A5 JP2001229031A5 (https=) 2008-03-06
JP4749556B2 true JP4749556B2 (ja) 2011-08-17

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JP2001015501A Expired - Fee Related JP4749556B2 (ja) 2000-01-24 2001-01-24 割込強制レジスタを含む柔軟な割込コントローラ

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US (1) US6845419B1 (https=)
JP (1) JP4749556B2 (https=)
KR (1) KR100734158B1 (https=)
CN (1) CN1251077C (https=)
TW (1) TW563029B (https=)

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CN100365604C (zh) * 2005-12-02 2008-01-30 北京中星微电子有限公司 一种中断控制处理装置和方法
CN100365605C (zh) * 2005-12-02 2008-01-30 北京中星微电子有限公司 多级中断申请装置和方法
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US8135884B1 (en) * 2009-05-04 2012-03-13 Cypress Semiconductor Corporation Programmable interrupt routing system
US8112551B2 (en) 2009-05-07 2012-02-07 Cypress Semiconductor Corporation Addressing scheme to allow flexible mapping of functions in a programmable logic array
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US8135894B1 (en) * 2009-07-31 2012-03-13 Altera Corporation Methods and systems for reducing interrupt latency by using a dedicated bit
CN101699418B (zh) * 2009-10-30 2011-11-16 曙光信息产业(北京)有限公司 一种中断处理方法、系统及设备
JP5673672B2 (ja) * 2010-03-30 2015-02-18 富士通株式会社 マルチコアプロセッサシステム、制御プログラム、および制御方法
US8738830B2 (en) * 2011-03-03 2014-05-27 Hewlett-Packard Development Company, L.P. Hardware interrupt processing circuit
US9645823B2 (en) 2011-03-03 2017-05-09 Hewlett-Packard Development Company, L.P. Hardware controller to choose selected hardware entity and to execute instructions in relation to selected hardware entity
US9189283B2 (en) 2011-03-03 2015-11-17 Hewlett-Packard Development Company, L.P. Task launching on hardware resource for client
CN102314399A (zh) * 2011-07-07 2012-01-11 曙光信息产业股份有限公司 一种龙芯刀片设备中断分配的实现方法
US9146776B1 (en) * 2011-08-16 2015-09-29 Marvell International Ltd. Systems and methods for controlling flow of message signaled interrupts
WO2013038589A1 (ja) * 2011-09-14 2013-03-21 パナソニック株式会社 資源要求調停装置、資源要求調停システム、資源要求調停方法、集積回路およびプログラム
US9128920B2 (en) 2011-11-30 2015-09-08 Marvell World Trade Ltd. Interrupt handling systems and methods for PCIE bridges with multiple buses
US8762615B2 (en) * 2011-12-21 2014-06-24 International Business Machines Corporation Dequeue operation using mask vector to manage input/output interruptions
KR101356541B1 (ko) * 2012-01-09 2014-01-29 한국과학기술원 멀티 코어 프로세서, 이를 포함하는 멀티 코어 시스템, 전자 장치 및 멀티 코어 프로세서의 캐시 공유 방법
CN102932599A (zh) * 2012-11-09 2013-02-13 北京百纳威尔科技有限公司 基于gpio模拟数据总线实现照相机功能的装置及方法
JP6056576B2 (ja) * 2013-03-18 2017-01-11 富士通株式会社 割り込み要因を特定する方法及び装置
US9665509B2 (en) * 2014-08-20 2017-05-30 Xilinx, Inc. Mechanism for inter-processor interrupts in a heterogeneous multiprocessor system
US10078605B2 (en) * 2014-10-22 2018-09-18 Cavium, Inc. Multiple-interrupt propagation scheme in a network ASIC
US10591892B2 (en) 2015-06-05 2020-03-17 Renesas Electronics America Inc. Configurable mapping of timer channels to protection groups
GB2550904B (en) * 2016-05-27 2020-07-15 Arm Ip Ltd Methods and Apparatus for Creating Module Instances
GB2561881A (en) * 2017-04-27 2018-10-31 Airbus Group Ltd Microcontroller
CN112130904B (zh) * 2020-09-22 2024-04-30 黑芝麻智能科技(上海)有限公司 处理系统、处理器间通信方法、以及共享资源管理方法
CN116151390B (zh) * 2023-01-30 2026-02-06 澎峰(北京)科技有限公司 一种计算图划分方法、装置及存储介质

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Also Published As

Publication number Publication date
TW563029B (en) 2003-11-21
US6845419B1 (en) 2005-01-18
CN1309350A (zh) 2001-08-22
KR20010074544A (ko) 2001-08-04
CN1251077C (zh) 2006-04-12
KR100734158B1 (ko) 2007-07-03
JP2001229031A (ja) 2001-08-24

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