JP4746021B2 - Thin film transistor substrate manufacturing method and display device - Google Patents

Description

  The present invention relates to a thin film transistor substrate used for a liquid crystal display, a semiconductor, an optical component, and the like, and particularly to a novel thin film transistor substrate capable of directly connecting a source-drain electrode to a semiconductor layer of the thin film transistor. is there.

  Liquid crystal displays used in various fields ranging from small mobile phones to large televisions exceeding 30 inches can be divided into simple matrix liquid crystal displays and active matrix liquid crystal displays depending on the pixel driving method. Among them, an active matrix liquid crystal display having a thin film transistor (hereinafter referred to as TFT) as a switching element is widely used because it can realize high-accuracy image quality and can cope with high-speed moving images.

  With reference to FIG. 1, the configuration and operation principle of a typical liquid crystal display applied to an active matrix liquid crystal display will be described. Here, an example of a TFT substrate using hydrogen amorphous silicon as an active semiconductor layer (hereinafter sometimes referred to as an amorphous silicon TFT substrate) will be described.

As shown in FIG. 1, a liquid crystal display panel 100 includes a TFT substrate 1, a counter substrate 2 disposed to face the TFT substrate 1, and a TFT substrate 1 and the counter substrate 2. And a liquid crystal layer 3 functioning as The TFT substrate 1 has a TFT 4 disposed on an insulating glass substrate 1a, a transparent pixel electrode 5, and a wiring portion 6 including a scanning line and a signal line. The transparent pixel electrode 5 is formed of an indium tin oxide (ITO) film containing about 10% by mass of tin oxide (SnO) in indium oxide (In ₂ O ₃ ). The TFT substrate 1 is driven by a driver circuit 13 and a control circuit 14 connected via a TAB tape 12.

  The counter substrate 2 includes a common electrode 7 formed on the entire surface of the insulating glass substrate 1 b on the TFT substrate 1 side, a color filter 8 disposed at a position facing the transparent pixel electrode 5, and a TFT 4 on the TFT substrate 1. And a light shielding film 9 disposed at a position facing the wiring portion 6. The counter substrate 2 further includes an alignment film 11 for aligning liquid crystal molecules (not shown) included in the liquid crystal layer 3 in a predetermined direction.

  Polarizing plates 10a and 10b are disposed on the outer side (the side opposite to the liquid crystal layer 3 side) of the TFT substrate 1 and the counter substrate 2, respectively.

  In the liquid crystal panel 100, the orientation of liquid crystal molecules in the liquid crystal layer 3 is controlled by an electric field formed between the counter substrate 2 and the transparent pixel electrode 5, and light passing through the liquid crystal layer 3 is modulated. As a result, the amount of light transmitted through the counter substrate 2 is controlled and displayed as an image.

  Next, the configuration and operating principle of a conventional amorphous silicon TFT substrate suitably used for a liquid crystal panel will be described in detail with reference to FIG. FIG. 2 is an enlarged view of a main part A in FIG.

  In FIG. 2, a scanning line (gate thin film wiring) 25 is formed on a glass substrate (not shown), and a part of the scanning line 25 functions as a gate electrode 26 for controlling on / off of the TFT. A gate insulating film (Si nitride film) 27 is formed so as to cover the gate electrode 26. A signal line (source-drain wiring) 34 is formed so as to intersect the scanning line 25 via the gate insulating film 27, and a part of the signal line 34 functions as a source electrode 28 of the TFT. On the gate insulating film 27, an amorphous silicon channel film (active semiconductor film) 33, a signal line (source-drain wiring) 34, and an interlayer insulating Si nitride film (protective film) 30 are sequentially formed. This type is generally called a bottom gate type.

The amorphous silicon channel film 33 consists of a doped phase (n layer) doped with P (phosphorus) and an intrinsic layer (also referred to as i layer or non-doped layer) not doped with P. In the pixel region on the gate insulating film 27, for example, the transparent pixel electrode 5 formed of an ITO film containing SnO in In ₂ O ₃ is disposed. The drain electrode 29 of the TFT is in direct contact with and electrically connected to the transparent pixel electrode 5.

  When the gate voltage is supplied to the gate electrode 26 via the scanning line 25, the TFT 4 is turned on, and the drive voltage supplied in advance to the signal line 34 is transmitted from the source electrode 28 via the drain electrode 29 to the transparent pixel electrode. 5 is supplied. When a driving voltage of a predetermined level is supplied to the transparent pixel electrode 5, as described with reference to FIG. 1, a potential difference is generated between the transparent pixel electrode 5 and the counter electrode 2. As a result, the liquid crystal contained in the liquid crystal layer 3. The molecules are aligned and light modulation is performed.

  In the TFT substrate 1, the source-drain wiring 34 electrically connected to the source-drain electrode and the scanning line 25 electrically connected to the gate electrode 26 are conventionally made of Al because of easy processing. It is formed from a thin film of an Al alloy such as -Nd (hereinafter referred to as an Al-based alloy). However, with an increase in the size of the liquid crystal display, problems such as RC delay of wiring (a phenomenon in which an electrical signal transmitted through the wiring is delayed) have become apparent, and the need for a wiring material with lower resistance is increasing. Accordingly, attention has been focused on pure Cu or Cu alloys such as Cu—Ni alloys, which have lower electrical resistance than Al-based alloys such as Al-2.0 at% Nd.

  When pure Cu or the like is used for wiring, refractory metals such as Mo, Cr, Ti, and W are respectively provided below the source-drain wiring 34, the gate electrode 26, and the scanning line 25 as shown in FIG. Barrier metal layers 51, 52, and 53 are formed. Patent Documents 1 to 6 describe a technique such as a source-drain electrode having such a barrier metal layer. Typically, for example, a Mo layer (lower barrier metal layer) having a thickness of about 50 nm, a thickness of A multilayer wiring having a two-layer structure in which pure Cu or Cu alloy having a thickness of about 150 nm is sequentially formed can be used.

  Here, as shown in FIG. 2, the main reason for interposing the lower barrier metal layer 53 between the amorphous silicon channel layer 33 and the source-drain wiring 34 made of pure Cu or Cu alloy is a thin film such as pure Cu. This is to prevent Si and Cu from diffusing each other at the interface between the silicon and the amorphous silicon channel thin film (hereinafter sometimes referred to simply as the interface).

  In other words, when a pure Cu thin film or Cu alloy thin film is directly bonded to an amorphous silicon channel thin film and a heat treatment such as sintering or annealing is performed in the subsequent process of the TFT, the pure Cu or Cu alloy Cu is contained in the amorphous silicon. Diffusion or Si of amorphous silicon diffuses into Cu. As a result, the semiconductor performance of amorphous silicon is remarkably deteriorated, the on-current is reduced, the leakage current (off-current) that flows when the TFT is turned off is increased, and the switching speed of the TFT is lowered. Therefore, desired TFT characteristics cannot be obtained, and performance and quality as a display device are deteriorated. The lower barrier metal layer 53 is effective in suppressing such mutual diffusion between Cu and Si.

  In addition, when pure Cu or Cu alloy is used as the wiring material, defects such as wiring floating from the amorphous silicon channel thin film 33 and disconnection occur. This is because the adhesion between Cu and the amorphous silicon channel thin film is poor. Therefore, the lower barrier metal layer 53 is interposed between the amorphous silicon channel thin film 33 and the pure Cu or Cu alloy to improve the adhesion. Yes.

  However, in order to form the lower barrier metal layer 53 as described above, a film forming apparatus for forming a barrier metal is additionally required in addition to a film forming apparatus for forming pure Cu or Cu alloy wiring. Specifically, it is necessary to use a film forming apparatus (typically a cluster tool in which a plurality of film forming chambers are connected to a transfer chamber) provided with extra film forming chambers for forming a barrier metal. As the cost of the liquid crystal display is reduced along with the mass production, the increase in the manufacturing cost and the decrease in the productivity due to the formation of the barrier metal layer cannot be neglected.

  As described above, in order to form the lower barrier metal layer, in addition to the film forming sputtering apparatus necessary for forming the gate electrode, the source electrode, and the drain electrode, an extra film forming chamber for forming the barrier metal is provided. It must be equipped, resulting in an increase in manufacturing costs and a decrease in productivity.

  Therefore, the formation of a barrier metal layer can be omitted, and an electrode material capable of directly joining a source-drain electrode to a semiconductor layer such as an amorphous silicon channel thin film is desired. For example, Patent Documents 7 to 11 disclose a technique for omitting a barrier metal layer when pure Al or an Al alloy is used as a wiring material, although it is not pure Cu or a Cu alloy.

In the above description, the liquid crystal display device is taken up as a representative. However, the above-described problem is not limited to the liquid crystal display device, and is common to the amorphous silicon TFT substrate. In addition, the above-mentioned problem is also observed in a TFT substrate using polycrystalline silicon in addition to amorphous silicon as a TFT semiconductor layer.
JP-A-7-66423 JP 2001-196371 A JP 2002-353222 A JP 2004-133422 A JP 2004-221940 A JP 2005-166757 A Japanese Patent Laid-Open No. 11-337976 JP-A-11-283934 JP-A-11-284195 JP 2004-214606 A JP 2003-273109 A

  The present invention has been made paying attention to the above-described circumstances, and its purpose is to provide an excellent TFT even if a barrier metal layer usually provided between the source-drain electrode and the semiconductor layer of the TFT is omitted. An object of the present invention is to provide a technique capable of exhibiting characteristics and capable of directly and reliably connecting a source-drain wiring to a semiconductor layer of a TFT.

  The thin film transistor substrate of the present invention that has solved the above problems is a thin film transistor substrate having a semiconductor layer of a thin film transistor and a source-drain electrode, a nitrogen-containing layer containing nitrogen, or an oxygen-containing nitrogen containing nitrogen and oxygen And a thin film of pure Cu or Cu alloy, part or all of nitrogen constituting the nitrogen-containing layer, or part or all of nitrogen or oxygen constituting the oxygen-nitrogen containing layer is the thin film transistor The pure Cu or Cu alloy thin film is connected to the semiconductor layer of the thin film transistor through the nitrogen-containing layer or the oxygen-nitrogen containing layer. is doing.

  In a preferred embodiment, the maximum value of the ratio ([N] / [Si]) of the number of nitrogen atoms ([N]) and the number of Si atoms ([Si]) constituting the nitrogen-containing layer is 0.2 or more. The ratio of the sum of the number of nitrogen atoms ([N]) and the number of oxygen atoms ([O]) constituting the oxygen-nitrogen-containing layer to the number of Si atoms [([N] The maximum value of + [O]) / [Si]] is in the range of 0.2 to 2.0.

  In a preferred embodiment, the nitrogen-containing layer or the oxygen-nitrogen containing layer has a thickness in the range of 0.8 nm to 3.5 nm.

  In a preferred embodiment, the semiconductor layer of the thin film transistor is made of amorphous silicon or polycrystalline silicon.

  A display device of the present invention includes the above-described thin film transistor substrate.

  Since the thin film transistor substrate of the present invention has the above-described configuration, excellent TFT characteristics can be obtained without forming a barrier metal layer between the source-drain electrode and the TFT semiconductor layer as in the prior art. It is done.

  The wiring material for the source-drain electrode used in the present invention is pure Cu, or a group consisting of Ni, Zn, Mg, Mn, Ir, Ge, Nb, Cr, and rare earth elements (group X) as an alloy component. A Cu-X alloy containing at least one selected element can be used.

  By using the thin film transistor substrate of the present invention, a display device with excellent productivity, low cost and high performance can be obtained.

  The present inventor has studied in order to provide a novel thin film transistor substrate having a source-drain electrode that can be directly connected to a semiconductor layer of a TFT. In detail, in order to provide a thin film transistor substrate that can exhibit excellent TFT characteristics without interposing a barrier metal layer between a source-drain electrode and a semiconductor layer as in the prior art, studies have been made.

  As a result, as a wiring material for the source-drain electrodes, a nitrogen-containing layer containing nitrogen or an oxygen-nitrogen containing layer containing nitrogen and oxygen and pure Cu or Cu-X alloy (hereinafter referred to as Cu-based alloy) A part of or all of nitrogen constituting the nitrogen-containing layer, or part or all of nitrogen or oxygen constituting the oxygen-nitrogen containing layer is a semiconductor of a thin film transistor. It is found that the intended purpose can be achieved if the structure is bonded to Si of the layer (when viewed from the semiconductor layer side, at least part of the surface layer of the Si semiconductor layer is nitrided or oxynitrided). The present invention has been completed. As a result, the Cu-based alloy thin film is directly connected to the TFT semiconductor layer via the nitrogen-containing layer or the oxygen-nitrogen-containing layer.

  In this specification, the “source / drain electrodes” includes both the source / drain electrodes themselves and the source / drain wirings. That is, the source / drain electrodes of the present invention are formed by integrally forming the source / drain electrodes and the source / drain wirings, and the source / drain wirings are in contact with the source / drain regions.

  Hereinafter, for convenience of explanation, the “nitrogen-containing layer” or “oxygen-nitrogen-containing layer” characterizing the present invention may be collectively referred to as “nitrogen / oxygen-nitrogen-containing layer”. As will be described in detail later, for example, even when a nitrogen-containing layer is formed using nitrogen plasma, mixing of oxygen from oxygen atoms adsorbed in the chamber or piping may be unavoidable, As a result, an oxygen-nitrogen-containing layer that also contains oxygen may be formed in the nitrogen-containing layer (Embodiment 1 and Examples 1 to 3 described later). In Embodiment 1 and Examples 1 to 3, since a layer containing oxygen was confirmed by an experiment, it is specifically described as an “oxygen-nitrogen-containing layer” here.

(Source / drain electrodes used in the present invention)
As shown in FIG. 8, the source / drain electrodes 28 and 29 used in the present invention include nitrogen / oxygen-nitrogen containing layers 28a and 29a and Cu-based alloy thin films 28b and 29b. The nitrogen / oxygen-containing layers 28a and 29a are formed so as to cover the semiconductor layer 33 of the TFT. For example, the nitrogen atoms (N) of the nitrogen-containing layer or the nitrogen atoms (N) and oxygen of the oxygen-nitrogen containing layer are formed. Part or all of the atoms (O) exist in a state of being bonded to Si of the semiconductor layer. N constituting the nitrogen-containing layer, or N and O constituting the oxygen-nitrogen containing layer has better adhesion to Cu than Si constituting the semiconductor layer, and does not cause peeling of the electrode after patterning. Furthermore, the nitrogen / oxygen-nitrogen containing layers 28a and 29a function as a barrier (diffusion barrier) for preventing mutual diffusion of Cu and Si at the interface between the Cu-based alloys 28b and 29b and the semiconductor layer 33 of the TFT. Since these functions are superior to O in comparison with O, in the present invention, it is necessary to contain at least nitrogen.

  According to the present invention, as demonstrated in the examples described later, excellent TFT characteristics can be obtained without forming a barrier metal layer such as Mo as in the prior art. Further, since the nitrogen / oxygen-nitrogen containing layer can be easily produced by, for example, a plasma method after forming the semiconductor layer and before forming the Cu-based alloy layer, as will be described in detail later, As in the prior art, a special film forming apparatus for forming a barrier metal is not necessary.

  Details of the nitrogen / oxygen-nitrogen containing layer characterizing the present invention are as follows.

Some or all of the nitrogen atoms (N) of the nitrogen atom of the nitrogen-containing layer (N) combines with Si of the semiconductor layer is mainly, a Si nitride _{(Si x N 1-x)} . In addition, some or all of nitrogen atoms (N) and oxygen atoms (O) in the oxygen-nitrogen-containing layer are bonded to Si in the semiconductor layer and are mainly Si oxynitride (SiON). Si nitride is obtained, for example, by nitriding the surface of the Si semiconductor layer. Si oxynitride is obtained, for example, by combining with oxygen or nitrogen that is inevitably introduced in the process of forming Si nitride.

  Both the nitrogen-containing layer (Si nitride) or the oxygen-nitrogen containing layer (Si oxynitride) are excellent in adhesion to Cu, and more closely to Cu-based alloys than amorphous silicon (a-Si). Power is strong. Si nitride and Si oxynitride are slightly inferior in adhesion to typical refractory metals (Mo) used for barrier metal layers. It is confirmed by the adhesion test by the tape test shown below that the level is satisfactory.

  Here, the “tape test” means that a test material formed on amorphous silicon is cut into a 1 mm × 1 mm grid with a cutter or the like, and then an adhesive tape (an alternative to a clean room cello tape, manufactured by ULTRA TAPE) This is a method in which after the ultra tape # 6570 ") is applied, the adhesive tape is peeled off at once and the adhesion between the amorphous silicon and the test material is simply evaluated. Here, as a test material to be brought into direct contact with amorphous silicon, a pure Cu film (no nitrogen / oxygen-nitrogen containing layer, Comparative Example 1 described later) and a pure Cu film having an oxygen-nitrogen containing layer (Si oxynitride) (described later) Example 2) was used.

  As a result, it was confirmed that the use of a pure Cu film having an oxygen-nitrogen containing layer is superior in adhesion to amorphous silicon compared to a conventional pure Cu film having no nitrogen / oxygen-nitrogen containing layer.

  The nitrogen / oxygen-nitrogen containing layer preferably further satisfies the following requirements.

  Maximum ratio of the number of nitrogen atoms ([N]) and the number of Si atoms ([Si]) constituting the nitrogen-containing layer ([N] / [Si], hereinafter sometimes referred to as P value for convenience). Value and the ratio of the sum of the number of nitrogen atoms ([N]) and the number of oxygen atoms ([O]) constituting the oxygen-nitrogen-containing layer to the number of Si atoms {[([N] + [O]) / [ Si]], hereinafter, for convenience, may be referred to as a Q value. } Is preferably in the range of 0.2 or more and 2.0 or less. Thereby, the barrier action by the nitrogen / oxygen-containing layer can be effectively exhibited without deteriorating the TFT characteristics. The maximum values of P value and Q value are both preferably 0.6 or more, and more preferably 0.7 or more.

  As described above, the nitrogen / oxygen / nitrogen-containing layer has a barrier action that is superior to oxygen atoms because nitrogen atoms are more preferable than oxygen atoms. Even when oxygen atoms are included, the Q value is defined in the sense that if the Q value is in the range of 0.2 to 2.0, the effects of the present invention are not adversely affected.

The preferable lower limit (0.2) of the P value and the Q value is set by analogy with “O / Si” at the time of diffusion suppression by amorphous silicon surface oxidation. On the other hand, the preferable upper limit (2.0) of the P value and the Q value is set assuming that the maximum value of “O / Si” at the time of SiO ₂ formation is approximately 2.0.

  The maximum values of the P value and the Q value can be adjusted, for example, by controlling the plasma irradiation time within a range of about 5 seconds to 20 minutes in the step of forming a nitrogen / oxygen-nitrogen containing layer (described later). it can.

  The P value and the Q value are calculated by analyzing elements (N and Si) in the depth direction of the nitrogen / oxygen-nitrogen containing layer by the RBS method (Rutherford Backscattering Spectrometry, Rutherford backscattering spectroscopy).

  The thickness of the nitrogen / oxygen-containing layer is preferably in the range of 0.8 nm to 3.5 nm. The lower limit (0.8 nm) of the thickness generally corresponds to the lattice constant of SiN (SiN1 atomic layer). The above thickness means the thickness of a layer satisfying a P value or Q value of 0.2 or more, and the thickness of a layer having a P value or Q value of less than 0.2 is excluded.

  As described above, the nitrogen / oxygen-containing layer is useful as a barrier layer for preventing interdiffusion between Cu and Si at the interface between the Cu-based alloy layer and the TFT semiconductor layer, and the surface of the TFT semiconductor layer. In addition, an excellent barrier property is exhibited if it is formed to be approximately one atomic layer of SiN. However, if the nitrogen / oxygen-containing layer becomes too thick, the TFT characteristics deteriorate. By controlling the thickness of the nitrogen / oxygen-containing layer within the above range, an increase in electrical resistance due to the formation of the nitrogen / oxygen-containing layer can be suppressed within a range that does not adversely affect the TFT characteristics. The thickness of the nitrogen / oxygen-containing layer is more preferably 3.0 nm or less, and further preferably 2.5 nm or less.

  The thickness of the nitrogen / oxygen-containing layer can be determined by various physical analysis techniques. For example, in addition to the RBS method described above, an XPS (X-ray photoelectron spectroscopy) method, a SIMS (secondary ion mass spectrometry) method, a GD-OES (radio frequency glow discharge emission spectroscopy) method, or the like can be used.

  The nitrogen / oxygen-containing layer is formed, for example, by performing a nitriding process on the upper portion of the semiconductor layer. These treatment methods are not particularly limited, and for example, methods such as (i) a method using plasma, (ii) a method by heating, (iii) an amination method, and the like can be employed.

  When plasma is used as in (i) above, for example, a nitrogen-containing layer may be formed using nitrogen gas, and an oxygen-nitrogen containing layer may be formed using a mixed gas of nitrogen gas and oxygen gas. However, as described above, even when nitrogen gas is used, the oxygen-nitrogen-containing layer may be formed by oxygen atoms that may be inevitably mixed. Nitrogen gas and oxygen gas used for plasma treatment may be diluted with an inert gas such as Ar. When nitrogen or oxygen is supplied from a nitrogen-oxygen-containing plasma source, an ion implantation method using nitrogen ions or mixed ions of nitrogen ions and oxygen ions can be used.

  When heating is performed as in (ii) above, the Si semiconductor layer may be heated in an atmosphere of nitrogen gas or a mixed gas of nitrogen gas and oxygen gas. A layer is obtained. Nitrogen gas and oxygen gas used for the heat treatment may be diluted with an inert gas such as Ar.

Further, when the amination method is used as in (iii) above, a photochemical reaction or the like is applied to chemically adsorb an N atom-containing substituent such as an amino group (—NH ₃ ) on the surface of the Si semiconductor layer. A desired nitrogen-containing layer or oxygen-nitrogen-containing layer can be formed by vapor-depositing a Cu-based alloy.

  In addition to the above method, for example, in the process of forming the source-drain electrode, N atoms and O atoms present on the surface of the Si semiconductor layer diffuse into the Cu-based alloy thin film, thereby forming a nitrogen-containing layer or an oxygen-nitrogen-containing layer. However, it is possible to use such a natural diffusion method.

  Hereinafter, the above (i) to (iii) will be described in detail.

(I) Plasma nitriding method The plasma nitriding method uses plasma, and it is preferable to use a nitrogen-containing gas as shown in an embodiment and Example 1 described later. Examples of the nitrogen-containing gas include gases such as N ₂ , NH ₃ , and NF ₃ . These are used alone or as a mixed gas of two or more. Specifically, a TFT semiconductor layer is preferably provided in the vicinity of a plasma source containing nitrogen. Here, the distance between the plasma source and the semiconductor layer is appropriately set within an appropriate range according to the type of plasma and plasma generation conditions [power (input power), pressure, temperature, irradiation time, gas composition, etc.]. Although it may be sufficient, it is preferable that it is generally in the range of several tens of centimeters. In the vicinity of such plasma, high-energy nitrogen atoms exist, whereby a desired nitrogen / oxygen-nitrogen containing layer can be easily formed on the surface of the semiconductor layer.

  When nitrogen is supplied from a nitrogen-containing plasma source or the like, an ion implantation method can also be used. According to the ion implantation method, ions accelerated by an electric field can move over a long distance, so that the distance between the plasma source and the semiconductor layer can be arbitrarily set. In the ion implantation method, it is preferable to implant ions over the entire surface of the semiconductor layer by applying a negative high voltage pulse to the semiconductor layer installed in the vicinity of the plasma. Alternatively, ion implantation may be performed using a dedicated ion implantation apparatus.

  In order to further improve the TFT characteristics, the ratio (N / O) of the surface density (N) of nitrogen to the surface density (O) of nitrogen of the nitrogen / oxygen-containing layer is set to 0.5 or more. For example, plasma generation conditions such as plasma gas pressure, gas composition, and processing temperature are preferably controlled as follows. This effectively suppresses the oxidation of the semiconductor layer, promotes the nitriding reaction, and increases the generation efficiency (see Examples described later).

  First, it is preferable that processing temperature is 300 degreeC or more. When the processing temperature is less than 300 ° C., the nitriding reaction proceeds slowly, and it takes a long time to form a nitrogen / oxygen-containing layer that can effectively act as a diffusion barrier, and the oxidation reaction proceeds significantly more than the nitriding reaction. It becomes difficult to obtain better TFT characteristics. However, if the temperature is excessively high, the semiconductor layer to be processed is deteriorated and the semiconductor layer is damaged. Therefore, the temperature is preferably approximately 360 ° C. or lower.

  Moreover, regarding the pressure, it is preferable to carry out under the pressure of 55 Pa or more. When the pressure is less than 55 Pa, the nitriding reaction proceeds slowly, and it takes a long time to form a nitrogen / oxygen-containing layer that can effectively act as a diffusion barrier. If the pressure is increased, the nitriding reaction proceeds more than the oxidation reaction, and the TFT characteristics are improved. From the above viewpoint, the higher the pressure, the better. For example, the pressure is more preferably 60 Pa or more, and further preferably 66 Pa or more. Note that the upper limit of the pressure depends on the performance of the apparatus to be used and is not easily determined. However, from the viewpoint of stably supplying the plasma, the upper limit of the pressure is preferably approximately 400 Pa or less. The following is more preferable.

  The plasma irradiation time is preferably 10 minutes or less. When the plasma irradiation time exceeds 10 minutes, the voltage drop due to the nitrogen / oxygen-containing layer formed on the amorphous silicon surface cannot be ignored, and the TFT characteristics deteriorate. The plasma irradiation time is more preferably 7 minutes or less, and further preferably 5 minutes or less. With regard to the lower limit of the plasma irradiation time, at least considering the fact that the effect of the present invention can be sufficiently exerted if a nitrogen / oxygen-nitrogen-containing layer of about one layer is formed on the amorphous silicon surface, at least the surface of the amorphous silicon In addition, it may be set to a time for forming a nitrogen / oxygen-containing layer to the extent of one layer. The plasma irradiation time is preferably 1 second or longer, and more preferably 5 seconds or longer. In the examples described later, it has been confirmed that sufficient diffusion barrier characteristics can be obtained when the plasma irradiation time is about 5 seconds.

  The input power is preferably 50 W or more. When the input power is less than 50 W, the progress of the nitriding reaction is slow, and it takes a long time to form a nitrogen-containing layer that can effectively act as a diffusion barrier. In addition, the oxidation reaction proceeds significantly more than the nitriding reaction, and the TFT characteristics are improved. descend. From the above viewpoint, the higher the input power, the better. For example, it is preferably 60 W or more, and more preferably 75 W or more.

The gas composition may be only the nitrogen-containing gas (N ₂ , NH ₃ , NF ₃ etc.) described above, but is preferably a mixed gas of nitrogen-containing gas and reducing element-containing gas. Further, the oxidation of the semiconductor layer can be suppressed more effectively. Examples of the reducing gas include NH ₃ and H ₂ . Of these, NH ₃ not only has a reducing action, but also acts as a nitrogen-containing gas, so it can be used alone or in combination with H ₂ .

(Ii) Thermal nitridation The thermal nitridation method is widely used for reasons such as good coating coverage. Specifically, for example, it is preferable to heat at a temperature of 400 ° C. or lower in a nitrogen gas atmosphere. When the heating temperature is high, damage to the semiconductor layer increases. On the other hand, when the heating temperature is low, a desired nitrogen / oxygen-nitrogen containing layer may not be sufficiently formed. The heating temperature is more preferably controlled to 200 ° C. or higher and 380 ° C. or lower, and more preferably 250 ° C. or higher and 350 ° C. or lower. The above heat treatment may be used in combination with the above-described plasma nitridation method, which can further promote the formation of the nitrogen / oxygen-containing layer.

(Iii) Amination method The amination method is a method of generating a nitrogen / oxygen-nitrogen-containing layer by promoting the decomposition or reaction of gas by the action of light, and usually has a wavelength in the ultraviolet region (about 200 nm to 400 nm). Light is used. As the light source, a mercury lamp (low pressure mercury lamp: wavelength 254 nm, high pressure mercury lamp: 365 nm), excimer laser (ArF: 194 nm, KrF: 248 nm) or the like may be used. Specifically, it is preferable to use ultraviolet rays having a shorter wavelength in a nitrogen-containing gas atmosphere, and thereby high energy can be imparted.

  The amination method is preferably performed using a nitrogen-containing liquid containing an amino group or the like. If such a nitrogen-containing liquid is further irradiated with ultraviolet rays in contact with the semiconductor layer, nitrogen can be supplied to the semiconductor layer more efficiently.

  As described above, the nitrogen / oxygen-containing layer is preferably formed by the methods (i) to (iii) described above. Further, from the viewpoints of simplifying the manufacturing process and shortening the processing time, the nitrogen / oxygen-containing layer is formed. / It is preferable to carry out by controlling the apparatus, chamber, temperature and gas composition used for forming the oxygen-nitrogen-containing layer as follows.

  First, it is preferable to perform the apparatus using the same apparatus as the semiconductor layer forming apparatus in order to simplify the manufacturing process. This eliminates the need for extra work to be processed between devices or between devices.

  In addition, regarding the temperature, it is preferable to carry out at substantially the same temperature as the temperature at which the semiconductor layer is formed, so that the adjustment time associated with temperature fluctuation can be omitted.

Alternatively, the gas composition is preferably a mixed gas of the nitrogen-containing gas and the reducing element-containing gas described above, thereby suppressing the oxidation of the semiconductor layer. Examples of the reducing element include NH ₃ and H ₂ . Of these, NH ₃ not only has a reducing action, but also acts as a nitrogen-containing gas, so it can be used alone or in combination with H ₂ .

  The method for forming the nitrogen / oxygen-containing layer has been described in detail above.

  After forming the nitrogen / oxygen-nitrogen containing layer on the semiconductor layer of the TFT in this way, a desired source-drain wiring can be obtained, for example, by forming a Cu-based alloy by sputtering. Since the source-drain electrode used in the present invention can be formed using a single sputtering target and a single sputtering gas, it is not necessary to change the composition of the sputtering gas as in Patent Document 11 described above. Therefore, according to the present invention, the process can be further simplified than in the prior art.

  The source-drain electrode used in the present invention is characterized in that the nitrogen / oxygen-nitrogen containing layer is provided between the TFT semiconductor layer and the Cu-based alloy so as to cover the TFT semiconductor layer. Therefore, for example, the type of the semiconductor layer is not particularly limited, and those normally used for the source-drain electrodes can be used as long as the TFT characteristics are not adversely affected.

  A typical example of the semiconductor layer is amorphous silicon (preferably hydrogenated amorphous silicon) or polycrystalline silicon.

  Further, as a wiring material for the source-drain electrodes, pure Cu that has been conventionally used can be used as it is.

  Alternatively, Cu containing at least one element selected from the group consisting of Ni, Zn, Mg, Mn, Ir, Ge, Nb, Cr, and rare earth elements (group X) as a wiring material for the source-drain electrodes -X alloy may be used.

  Here, the content of elements belonging to Group X is preferably in the range of generally about 0.01 atomic% to 3 atomic%. If the content of the element belonging to Group X is less than 0.01 atomic%, the desired effect cannot be obtained. On the other hand, when it exceeds 3 atomic%, the electrical resistance of the Cu-X alloy thin film becomes extremely high, the response speed of the pixel is slowed down, the power consumption is increased, the quality of the display is lowered, and it cannot be put into practical use. . The content of elements belonging to Group X is preferably 0.05 atomic percent or more and 2.0 atomic percent or less.

  If a thin film transistor substrate having such a source-drain electrode is used, it becomes unnecessary to interpose a lower barrier metal layer between the Cu-based alloy thin film and the TFT semiconductor layer as in the prior art. The alloy can be bonded to the semiconductor layer via the nitrogen-containing layer or the oxygen-nitrogen containing layer. As shown in the examples to be described later, a TFT manufactured using a thin film of pure Cu or Cu-X alloy realizes TFT characteristics at the same level or higher as in the case of a conventional example in which a barrier metal layer such as Cr is interposed. It was confirmed that it was possible. Therefore, according to the present invention, the manufacturing process can be simplified by omitting the barrier metal layer, and the manufacturing cost can be reduced.

  Hereinafter, preferred embodiments of a TFT module according to the present invention will be described with reference to the drawings. In the following, a liquid crystal display device having an amorphous silicon TFT substrate will be described as a representative example. However, the present invention is not limited to this, and is implemented with appropriate modifications within a range that can meet the purpose described above and below. Any of these may be included in the technical scope of the present invention. The source-drain electrode used in the present invention can be similarly applied to, for example, a reflective electrode such as a reflective liquid crystal display device and a TAB (tab) connection electrode used for signal input / output to the outside. I have confirmed.

(Embodiment 1)
FIG. 3 is a schematic cross-sectional view illustrating an embodiment of an amorphous silicon TFT substrate according to the present invention. In FIG. 3, the same reference numerals as those in FIG. 2 showing the conventional TFT substrate are attached. According to this embodiment, formation of a layer containing nitrogen and oxygen (oxygen-nitrogen-containing layer) has been confirmed as described in detail below.

  In FIG. 3, the source-drain wiring 34 electrically connected to the source electrode 28 and the drain electrode 29 is composed of an oxygen / nitrogen-containing layer and Cu or Cu-0.34 atomic% Ni alloy. The amorphous silicon channel thin film 33 is formed so as to cover it. The configuration of the source-drain wiring 34 is shown in FIGS. 4E and 4F described later.

  As apparent from the comparison between FIG. 2 and FIG. 3, in the conventional TFT substrate, as shown in FIG. 2, the lower barrier metal layer 53 such as Mo is formed under the source-drain electrodes. On the other hand, in the TFT module of the present invention, the lower barrier metal layer 53 can be omitted.

  According to the present embodiment, the Cu-based alloy can be directly connected to the amorphous silicon channel thin film through the oxygen-nitrogen-containing layer without interposing the lower barrier metal layer as in the prior art, which is the same as the conventional TFT substrate. It is possible to realize a TFT characteristic as good as or more than that (refer to Examples described later).

  Next, a manufacturing method of the TFT substrate according to this embodiment shown in FIG. 3 will be described with reference to FIG. 4, the same reference numerals as those in FIG. 3 are given.

  First, as shown in FIG. 4A, a Mo thin film 52 having a thickness of about 50 nm and a Cu alloy thin film (Cu-0.34) having a thickness of about 200 nm are formed on a glass substrate 1a by using a method such as sputtering. Atomic% Ni alloy) 61 is sequentially laminated. The film formation temperature of sputtering was room temperature. On this laminated thin film, as shown in FIG. 4B, after patterning the resist 62 by photolithography, the laminated film of the Mo thin film 52 and the Cu-based alloy thin film 61 is etched by using the resist 62 as a mask to obtain a gate. The electrode 26 is formed (FIG. 4C). At this time, it is preferable to etch the periphery of the laminated thin film in a taper shape of about 30 ° to 60 ° so that the coverage of the gate insulating film 27 to be formed later is improved.

Next, as shown in FIG. 4D, a Si nitride film (gate insulating film) 27 having a thickness of about 300 nm is formed using a method such as plasma CVD. The film formation temperature of the plasma CVD method was about 350 ° C. Subsequently, for example, an undoped hydrogenated amorphous silicon film (a-Si-H) 55 having a thickness of about 200 nm and a thickness are formed on the Si nitride film (gate insulating film) 27 by using a method such as plasma CVD. An n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si—H) 56 doped with phosphorus of about 80 nm is sequentially stacked. The n ⁺ type hydrogenated amorphous silicon film is formed by performing plasma CVD using SiH ₄ and PH ₃ as raw materials.

Next, in the same plasma CVD apparatus used for forming the Si nitride film, as shown in FIG. 4E, the n ⁺ type hydrogenated amorphous silicon film (n ⁺ ) obtained as described above is used. The oxygen / nitrogen-containing layer 60 is formed on the (a-Si-H) 56. Specifically, the source gas used for forming the amorphous silicon film was eliminated while the substrate was held in the chamber. Next, plasma was generated by supplying only nitrogen as a carrier gas into the chamber, and the surface of the n ⁺ -type hydrogenated amorphous silicon film 56 was treated for 30 seconds to form an oxygen-nitrogen-containing layer. The radio frequency (RF) power density was 0.14 W / cm ² , the deposition temperature was 320 ° C., and the gas pressure was 133 Pa.

  Example 1 to be described later examined the TFT characteristics when the experiment was performed under the above conditions. As a result of analyzing the surface of the oxygen-nitrogen containing layer formed as described above by the RBS method and the XPS method, the layer contains oxygen atoms, and the ratio of the sum of nitrogen atoms and oxygen atoms to silicon atoms ( It was confirmed that an oxygen / nitrogen-containing layer having a Q value of more than 0.2 was formed with a thickness of about 3.0 nm. As described above, the reason why the oxygen-containing layer containing oxygen is formed in spite of using only nitrogen as the carrier gas is that the plasma nitriding process is performed in the plasma CVD chamber as described above. This is because there are cases in which oxygen atoms are inevitably mixed into the nitrogen-containing layer due to oxygen atoms adsorbed on the inner wall of the chamber or the inner wall of the pipe.

  In the present embodiment, the oxygen / nitrogen-containing layer 60 is formed by plasma nitriding, but the present invention is not limited to this, and even if the above-described (ii) thermal nitriding method or (iii) amination method is employed, Experiments have confirmed that a desired oxygen / nitrogen-containing layer or a nitrogen-containing layer substantially free of oxygen atoms can be obtained.

Next, as shown in FIG. 4F, a Cu-0.34 atomic% Ni alloy film 63 having a thickness of about 300 nm is formed on the oxygen-nitrogen containing layer 60 by using a method such as sputtering. The film formation temperature of sputtering was room temperature. Next, after patterning the resist by photolithography, the Cu-0.34 atomic% Ni alloy film 63 is etched using the resist as a mask to form the source electrode 28 and the drain electrode 29 (FIG. 4 ( f)). Further, using the source electrode 28 and the drain electrode 29 as a mask, the n ⁺ type hydrogenated amorphous silicon film 56 is removed by dry etching (FIG. 4G).

  Next, a Si nitride film (protective film) having a thickness of about 300 nm is formed using a plasma nitriding apparatus, for example (not shown). The film formation at this time was performed at about 250 ° C. Next, a resist is patterned on the Si nitride film 30, and contact holes 57 are formed by performing dry etching or the like.

  Next, the photoresist layer (not shown) is stripped using, for example, an amine-based stripping solution. Finally, an ITO film having a thickness of about 50 nm (addition of 10% by mass of tin oxide to indium oxide) is formed. Next, patterning by wet etching is performed to form the transparent pixel electrode 5, thereby completing the TFT.

  According to this embodiment, a TFT substrate in which an amorphous silicon channel thin film is connected to a Cu—Ni alloy thin film via a nitrogen / oxygen-nitrogen containing layer is obtained.

  In the above description, an ITO curtain is used as the transparent pixel electrode 5, but an IZO film may be used. Further, polysilicon may be used as the active semiconductor layer instead of amorphous silicon.

  Using the TFT substrate thus obtained, for example, the liquid crystal display device shown in FIG. 1 described above is produced by the method described below.

  First, for example, polyimide is applied to the surface of the TFT substrate 1 produced as described above, and after drying, a rubbing treatment is performed to form an alignment film.

  On the other hand, the counter substrate 2 forms the light shielding film 9 on a glass substrate by patterning, for example, chromium in a matrix. Next, resin-made red, green, and blue color filters 8 are formed in the gaps between the light shielding films 9. A counter electrode is formed by disposing a transparent conductive film such as an ITO film as the common electrode 7 on the light shielding film 9 and the color filter 8. Then, for example, polyimide is applied to the uppermost layer of the counter electrode, and after drying, a rubbing process is performed to form the alignment film 11.

  Next, the TFT substrate 1 and the counter substrate 2 are arranged so as to face each other on the surface on which the alignment film 11 is formed, and the TFT substrate 1 and the counter substrate are removed by a sealing material 16 made of resin, excluding the liquid crystal sealing port. 2 and pasted together. At this time, a gap between the two substrates is kept substantially constant by interposing a spacer 15 between the TFT substrate 1 and the counter substrate 2.

  The empty cell thus obtained is raised in a vacuum, and gradually returned to atmospheric pressure with the sealing port immersed in liquid crystal, thereby injecting a liquid crystal material containing liquid crystal molecules into the empty cell to form a liquid crystal layer. Form and seal the sealing port. Finally, polarizing plates 10 are attached to both sides of the empty cell to complete the liquid crystal panel.

  Next, as shown in FIG. 1, a driver circuit 13 for driving the liquid crystal display device is electrically connected to the liquid crystal panel and disposed on the side portion or the back surface portion of the liquid crystal panel. Then, the liquid crystal panel is held by the holding frame 23 including the opening serving as the display surface of the liquid crystal panel, the backlight 22 serving as the surface light source, the light guide plate 20, and the holding frame 23, thereby completing the liquid crystal display device.

  The present invention also includes a Cu-based alloy sputtering target used for film formation of the source-drain electrodes described above.

  As described in the above-described embodiment, the pure Cu or Cu—X alloy thin film used for the source-drain electrode is preferably formed by a sputtering method capable of forming a high-quality film at a high speed. Therefore, it is preferable to use these pure Cu or Cu-X alloy as a sputtering target material.

  The method for producing the sputtering target is not particularly limited, and any method such as a melting / casting method or a powder sintering method can be adopted, but in particular, it is recommended to produce by a vacuum melting / casting method. Is done. According to the vacuum melting / casting method, a target with less impurity components such as nitrogen and oxygen can be obtained as compared with the case of manufacturing by other methods. This is because the electrode can exhibit excellent characteristics, and a high-performance and highly reliable display device can be produced.

  Since the display device of the present invention includes the above-described source-drain electrodes, it is possible to realize remarkably superior performance and reliability. Note that the display device of the present invention only needs to include the above-described source-drain electrodes, and the configuration of the other display devices is not particularly limited, and any configuration known in the field of display devices can be employed.

(Examples 1-2, Comparative Example 1)
In Examples 1 and 2 below, if a source-drain electrode of a Cu alloy thin film having an oxygen-nitrogen-containing layer is used, even if the barrier metal layer is omitted, the diffusion of Cu into the semiconductor layer is suppressed, and a good TFT Various experiments were conducted in order to investigate the characteristics. In Example 1 and Example 2, the oxygen-nitrogen-containing layer was formed using the same plasma nitridation method as in Embodiment 1 described above. Specific experimental conditions and evaluation methods are as follows.

(Source-drain electrode)
In Example 1, Cu-0.34 atomic% Ni described in Embodiment 1 was used as the wiring material for the source-drain electrodes.

  In Example 2, pure Cu was used in place of Cu-0.34 atomic% Ni in Embodiment 1 described above.

  In Comparative Example 1, pure Cu was used, but nitrogen plasma treatment was not performed.

As a result, in both Example 1 and Example 2, the oxygen-containing layer containing oxygen was formed in the nitrogen-containing layer with a thickness of about 3.0 μm, and the oxygen-nitrogen-containing layer was analyzed by RBX. It was confirmed that the ratio (Q value) of the sum of atoms and oxygen atoms to silicon atoms exceeded 0.2.
On the other hand, in Comparative Example 1, formation of a nitrogen / oxygen-containing layer was not observed.

(TFT used for experiment)
Here, in order to easily examine the TFT characteristics, various heat treatments (150 ° C. for 30 minutes, 200 ° C. for 30 minutes, 250 ° C. for 30 minutes, 300 ° C. are performed on the TFT shown in FIG. For 30 minutes) was subjected to the experiment. This heat treatment condition is set on the assumption that the heat treatment in the film forming process of the Si nitride film (protective film) that maximizes the thermal history in the TFT substrate manufacturing process. The TFT used in this example is not completed by performing various film forming processes like an actual TFT substrate, but the TFT subjected to the above-mentioned annealing has the TFT characteristics of the actual TFT substrate. It is thought that it almost reflects.

(Evaluation of interdiffusion between Si and Cu)
For each of Example 1, Example 2, and Comparative Example 1, the TFT shown in FIG. 4G of Embodiment 1 was fabricated, the interface with the amorphous silicon channel thin film was observed, and Si and Cu in amorphous silicon were observed. The presence or absence of mutual diffusion was investigated.
Specifically, GD-OES analysis is performed on each sample immediately after TFT fabrication and each sample heat-treated at 350 ° C. for 30 minutes in a nitrogen atmosphere, and element composition analysis in the depth direction is performed. went. GD-OES analysis is a technique for analyzing a film while scraping the film by high-frequency sputtering from the film surface (upper layer) of the sample after completion of film formation. The analysis conditions for GD-OES are as follows.
Gas pressure 300Pa, power 20W, frequency 500Hz,
Duty cycle 0.125

(Evaluation results of interdiffusion between Si and Cu)
The results of GD-OES analysis of each sample after film formation are shown in FIGS. Specifically, FIG. 5 shows the results of Comparative Example 1 (only pure Cu), FIG. 6 shows the results of Example 1, and FIG. 7 shows the results of Example 2.

  First, FIG. 5 (comparative example) will be referred to.

  FIG. 5A shows the result of the sample immediately after the TFT fabrication, and FIG. 5B shows the result of the sample heat-treated at 350 ° C. for 30 minutes. The horizontal axis is the sputtering time (seconds) and indirectly means the distance in the depth direction from the surface, and the vertical axis is the relative intensity of Cu atoms, O atoms, Si atoms, and N atoms.

  As is clear from a comparison between FIG. 5A and FIG. 5B, in Comparative Example 1 having no nitrogen / oxygen-nitrogen containing layer, Cu atoms in the sample were converted to amorphous silicon (a− It can be seen that it diffuses to the Si) side.

  Reference is now made to FIGS. 6 and 7 (both examples of the present invention).

  6A and 6B, and FIG. 7A and FIG. 7B, it is clear that Example 1 containing an oxygen-nitrogen-containing layer (Cu-0.34 atomic%). In Example 2 (pure Cu) containing a Ni alloy) and an oxygen-nitrogen containing layer, Cu atoms in the sample were not diffused to the amorphous silicon (a-Si) side even after heat treatment, and a-Si It can be seen that the diffusion of Cu atoms into the inside is suppressed.

  The above is the result when a Cu—Ni alloy is used, but a Cu—X alloy other than Ni (X = Ni, Zn, Mg, Mn, Ir, Ge, Nb, Cr, and at least one kind of rare earth elements) It has been confirmed by experiments that the same results as in FIG. 6 and FIG.

(Example 3)
In this example, in Example 2 (using pure Cu) described above, the plasma nitriding method was performed under various conditions (Condition 1 to Condition 5) shown in Table 1 to form an oxygen-nitrogen containing layer. In the same manner as in Example 1, a TFT was manufactured, and various heat treatments were performed on this TFT in the same manner as in Example 1. For comparison, a sample without heat treatment was also prepared. Under any condition, nitrogen was used as a carrier gas.

  Of the plasma nitridation conditions shown in Table 1, conditions 1-2 and conditions 4-5 are all set within the preferred range defined in the present invention, and condition 3 has a plasma irradiation time of 600. This is an example of a long second.

  Next, using the above TFT, the switching characteristics of the drain current-gate voltage of the TFT were examined. By examining the switching characteristics, the interdiffusion of Si and Cu can be indirectly evaluated. Here, the leakage current that flows when the TFT switching is turned off (the drain current value when the negative voltage is applied to the gate voltage, the off current) and the on current that flows when the TFT switching is turned on are measured as follows. did.

  A drain current and a gate voltage were measured using a TFT having a gate length (L) of 300 μm and a gate width (W) of 20 μm. The drain voltage at the time of measurement was 10V. The off current was defined as the current when the gate voltage (-3V) was applied, and the on current was defined as the voltage when the gate voltage was 20V.

Each TFT characteristic measured in this way was evaluated as follows using the TFT characteristic of the conventional example as a reference value. As a conventional example, a TFT was prepared in the same manner as described above using a source-drain electrode composed of a pure Cu thin film and a Mo barrier metal layer, and the TFT characteristics were measured. The on-current of the conventional example is about 1 × 10 ⁻⁶ A (μA order), and the off-current of the conventional example is about 1 × 10 ⁻¹² A (pA order). Using this value as a reference value, the off-state current within the range of one digit increase of the reference value (1 × 10 ⁻¹¹ A or less) is good (◯), and the one exceeding the above range is bad (×) It was. Further, the on-current depends on the heat treatment condition, and the above reference value (1 × 10 ⁻⁶
A) Good if it is above (◯), bad if the on-current is smaller than the above range (×)
). Further, as a comprehensive evaluation, ◎ indicates that both the on-current and off-current are good, and × indicates that either one is good and the other is bad.

  Furthermore, the Q value and thickness of the oxygen-nitrogen-containing layer when the TFT was produced by the methods of Condition 1, Condition 3, and Condition 5 shown in Table 1 were measured. These were measured using a high resolution RBS analyzer “HRBS500” manufactured by Kobe Steel. The thickness of the oxygen / nitrogen-containing layer is the thickness of the layer that satisfies the Q value of 0.2 or more.

  These results are summarized in Table 2.

  From Table 2, it can be considered as follows.

  No. in Table 2 1-5 (condition 1), No. 1 6-10 (Condition 2), no. 16-20 (condition 4), and 21 to 25 (Condition 5) are all examples in which plasma nitridation was performed within the preferred range of the present invention, and even when heat treatment was performed, good TFT characteristics almost equivalent to those of the conventional example were obtained.

  Of these, the Q value when plasma nitridation is performed under condition 1 is 1.8, the thickness of the oxygen-nitrogen-containing layer is 1.7 nm, and the Q value when plasma nitridation is performed under condition 5 is 1.5. The thickness of the oxygen / nitrogen-containing layer is 2.0 nm, and an oxygen / nitrogen-containing layer having a desired diffusion suppressing effect is obtained under any conditions.

Specifically, as a result of performing RBS analysis on the oxygen-nitrogen-containing layer when plasma nitriding was performed under condition 1, the surface density of oxygen and nitrogen on the outermost surface was oxygen: 1.2 ± 0.4 × 10 respectively. ¹⁵ (atoms / cm ² ), nitrogen: 10.9 ± 0.5 × 10 ¹⁵ (atoms / cm ² ), and the ratio of nitrogen to oxygen was about 9: 1. The peak values of nitrogen concentration and oxygen concentration by depth profile measurement by RBS analysis were nitrogen: 58 atomic% and oxygen: 30 atomic%. As described above, when plasma nitriding is performed under the condition 1, oxygen in the above range is contained in the nitrogen-containing layer, but the inclusion of the oxygen does not adversely affect the TFT characteristics. It is clear from

  On the other hand, No. Nos. 11 to 15 (condition 3) are examples in which the plasma irradiation time is long, and as shown in Table 2, the on-current decreased.

  In addition, when plasma nitriding was performed under condition 3, the Q value was 1.4, and the thickness of the oxygen / nitrogen-containing layer was 3.7 nm, exceeding the preferred thickness of the present invention.

  From these results, if a source-drain electrode produced under plasma nitriding conditions satisfying the preferred range of the present invention is used, the barrier metal layer can be omitted even at the interface between the amorphous silicon channel thin film and the Cu-based alloy film. As a result of effectively preventing interdiffusion between Si and Cu, it was confirmed that good TFT characteristics could be realized.

Example 4
In this example, the source-drain electrode using the Cu-X alloy (X = Ni, Zn, Mn, Mg, Ge) shown in Table 3 was used instead of pure Cu in Example 2 described above. A TFT was produced in the same manner as in Example 1 except that nitrogen plasma treatment was performed under the following conditions, and various heat treatments were performed on this TFT in the same manner as in Example 1. For comparison, a sample without heat treatment was also prepared. Further, for reference, an experiment similar to the above was performed for a source-drain electrode using pure Cu.
Plasma conditions Temperature: 320 ° C., pressure: 133 Pa, input power: 100 W, irradiation time: 60 seconds,
Carrier gas: Nitrogen

  Next, in the same manner as in Example 3 using the above TFT, the switching characteristics between the drain current and the gate voltage of the TFT were examined, and the TFT characteristics were evaluated.

  These results are summarized in Table 3 and Table 4.

From Table 3 and Table 4, any of Cu-Zn alloy, Cu-Mn alloy, Cu-Mg alloy, Cu-Ge alloy, Cu-Ge-Ni alloy, Cu-Mn-Ge alloy, Cu-Mn-Ni alloy It was confirmed that even when a Cu-based alloy is used, excellent TFT characteristics can be obtained as in the case of using pure Cu and Cu—Ni alloy.

FIG. 1 is a schematic enlarged cross-sectional view illustrating a configuration of a typical liquid crystal panel to which an amorphous silicon TFT substrate is applied. FIG. 2 is a schematic cross-sectional explanatory view showing a configuration of a conventional typical amorphous silicon TFT substrate. FIG. 3 is a schematic cross-sectional explanatory view showing the configuration of the TFT substrate according to the embodiment of the present invention. FIG. 4 is a process diagram showing a part of the manufacturing process of the TFT substrate shown in FIG. FIG. 5 is a diagram showing the results of GD-OES analysis for Comparative Example 1. FIG. 6 is a diagram showing the results of GD-OES analysis performed on Example 1. FIG. 7 is a diagram showing the results of GD-OES analysis performed on Example 2. FIG. 8 is a schematic view schematically showing the configuration of the source / drain electrodes used in the present invention.

Explanation of symbols

1 TFT substrate 2 Counter electrode 3 Liquid crystal layer 4 Thin film transistor (TFT)
DESCRIPTION OF SYMBOLS 5 Transparent pixel electrode 6 Wiring part 7 Common electrode 8 Color filter 9 Light-shielding film 10a, 10b Polarizing plate 11 Orientation film 12 TAB tape 13 Driver circuit 14 Control circuit 15 Spacer 16 Sealing material 17 Protective film 18 Diffusion plate 19 Prism sheet 20 Light guide plate 21 Reflector 22 Backlight 23 Holding Frame 24 Printed Circuit Board 25 Scan Line 26 Gate Electrode 27 Gate Insulating Film (Si Nitride Film)
28 Source electrode 29 Drain electrode 28a, 29a Nitrogen / oxygen-containing layer 28b, 29b Cu-based alloy thin film 30 Protective film (Si nitride film)
31 Photoresist 32 Contact hole 33 Amorphous silicon channel film (active semiconductor film)
34 Signal line (source-drain wiring)
51, 52, 53 Barrier metal layer 55 Andopto hydrogenated amorphous silicon film (a-Si-H)
56 n ⁺ type hydrogenated amorphous silicon film (n ⁺ a-Si-H)
60 Oxygen-nitrogen-containing layer 61 Cu-2.0 atomic% Nd alloy film 62 Resist 63 Cu-2.0 atomic% Ni alloy film 100 Liquid crystal display panel

Claims (5)

A method of manufacturing a thin film transistor substrate having a semiconductor layer of a thin film transistor and a source-drain electrode,
Forming a semiconductor layer of a thin film transistor on a substrate;
Nitriding the upper portion of the semiconductor layer;
Then, forming a thin film of pure Cu or Cu alloy used for the source-drain electrode,
The source-drain electrode comprises a nitrogen-containing layer containing nitrogen, or an oxygen-nitrogen containing layer containing nitrogen and oxygen, and a thin film of pure Cu or Cu alloy, and the nitrogen-containing layer or oxygen-nitrogen containing The layer is formed by nitriding the upper part of the semiconductor layer,
Part or all of nitrogen constituting the nitrogen-containing layer or part or all of nitrogen or oxygen constituting the oxygen-nitrogen containing layer is bonded to Si of the semiconductor layer of the thin film transistor, and Si nitride or Si oxynitride,
The thin film of pure Cu or Cu alloy, a method of manufacturing the thin film transistor substrate, characterized in that through the nitrogen-containing layer or the oxygen-nitrogen-containing layer is connected to the semiconductor layer of the thin film transistor. The maximum value of the ratio ([N] / [Si]) of the number of nitrogen atoms ([N]) and the number of Si atoms ([Si]) constituting the nitrogen-containing layer is 0.2 or more and 2.0 or less. The ratio of the sum of the number of nitrogen atoms ([N]) and the number of oxygen atoms ([O]) constituting the oxygen-nitrogen-containing layer and the number of Si atoms [([N] + [O]) 2. The method for manufacturing a thin film transistor substrate according to claim 1, wherein the maximum value of / [Si]] is in a range of 0.2 to 2.0. 3. The method for manufacturing a thin film transistor substrate according to claim 1, wherein a thickness of the nitrogen-containing layer or the oxygen-nitrogen containing layer is in a range of 0.8 nm to 3.5 nm. The method for manufacturing a thin film transistor substrate according to claim 1, wherein the semiconductor layer of the thin film transistor is made of amorphous silicon or polycrystalline silicon. Display device comprising a thin film transistor substrate obtained by the production method according to any one of claims 1-4.