JP4720442B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine provided with a symbol display device that is provided in a game area and displays a plurality of identification symbols.

Conventionally, various gaming machines including a symbol display device provided in a game area and displaying a plurality of identification symbols have been proposed.
For example, when the player operates the determination button according to the operation request display of the determination button displayed on the symbol display device, when a performance character having a high effect appears on the symbol display device and the determination button is not operated There has been proposed a gaming machine configured such that a production character having the lowest production effect appears on the symbol display device (see, for example, Patent Document 1).
JP 2004-202120 A (paragraphs (0261) to (0316), FIGS. 38 to 44)

  However, in the above-described configuration of the gaming machine, when the notice character is made to appear instead of the effect character, the reliability is developed to be a big hit by operating the decision button according to the operation request display of the decision button. A notice character is displayed, but after the start of variable display on the symbol display device, the operation request display of the enter button is displayed multiple times at different timings, and the player needs to operate the enter button multiple times. If the user operates the decision button or does not operate it, a highly reliable production character that develops a jackpot and a warning character that develops a jackpot and has the lowest reliability appear in the symbol display device. It becomes. For this reason, there is a problem that display control cannot be performed so that the notice character that should be displayed properly appears even though the player operates the enter button.

  Therefore, the present invention has been made to solve the above-described problems. A plurality of notice timings are provided in advance between the start of variation of a plurality of identification symbols and the stop of the final stop symbol. Even if the player forgets to input the notice display instruction information at every timing, the player will forget to input the notice display instruction information. By configuring each notice character that was scheduled and the notice character scheduled to be displayed this time, even if you forget to enter the notice display instruction information, by entering the notice instruction information afterwards, It is an object of the present invention to provide a gaming machine capable of display control so that each notice character that should be originally displayed can be accurately displayed.

In order to achieve the above object, the gaming machine according to claim 1 includes a symbol display device provided in the game area for displaying a plurality of identification symbols, and a control means for controlling a notice of notice, and each of the identification symbols. In the gaming machine in which a special gaming state advantageous to the player occurs after a change in the specific symbols constituting the predetermined mode, after the start of the change of the plurality of identification symbols, until the final stop symbol is stopped A notice timing storage means for storing a plurality of notice timings preset in advance, a notice character storage means for storing a plurality of notice characters corresponding to each notice timing, and the plurality of notice timings at each of the plurality of notice timings. A notice determining means for randomly determining whether or not to give a notice of notice of the final form of the identification symbol, and a notice finger for instructing the player to make the notice of notice. An instruction means for inputting information, and the notice instruction information is inputted via the instruction means within a predetermined time set in advance for each notice timing determined to be notified by the notice determining means. Determining means for determining whether or not the notice instruction information is input within a predetermined time set with respect to the notice timing by the judging means, Control is performed such that a notice character corresponding to the notice timing is displayed on the display screen of the symbol display device and the final mode of the plurality of identification symbols is notified in advance, and the control means performs the notice timing by the determination means. If it is determined that the notice instruction information has not been input within the predetermined time set for When it is determined that the advance notice information is input within a predetermined time set for imming, the advance notice that it is determined that the advance instruction information is not input together with the advance character corresponding to the subsequent advance timing. Control is performed such that a notice character corresponding to the timing is displayed on a display screen of the symbol display device so that the final mode of the plurality of identification symbols is notified in advance.

  In the gaming machine according to claim 1, an input request display for requesting to input the notice instruction information is displayed on the symbol display device at each notice timing determined to be notified of the notice. In addition, the player can input the notice instruction information by the instruction means only within a predetermined time after the input request display is performed. Each time the input request display is performed, it is determined whether or not the advance instruction information is input. When the advance instruction information is input, the advance instruction information is not input by the current advance timing. All the notice characters corresponding to each notice timing are displayed on the display screen of the symbol display device, and the final mode of a plurality of identification symbols is notified in advance. On the other hand, if the notice instruction information is not inputted within a predetermined time after the input request display is performed, the notice character corresponding to the notice timing is not displayed on the symbol display device, and the notice timing is indicated by the notice instruction. It is stored as a notice timing when no information is input.

  As a result, even if the player forgets to input the notice display instruction information in the middle of a plurality of notice timings set in advance after the start of variation of the plurality of identification symbols until the final stop symbol stops, By entering the notice instruction information at the notice timing, each notice character that was originally scheduled to be displayed and the notice character that is scheduled to be displayed this time are displayed. Even in this case, after that, by inputting the notice instruction information, it is possible to perform display control so that each notice character that should be originally displayed can be displayed accurately. In addition, the player can increase the sense of expectation for the acquisition of each notice character because each notice character that was originally scheduled to be displayed is displayed by inputting the notice instruction information. Interest can be increased.

  Hereinafter, an embodiment in which a gaming machine according to the present invention is embodied in a pachinko machine will be described in detail with reference to the drawings.

First, a schematic configuration of the pachinko machine 1 according to the present embodiment will be described with reference to FIGS. 1 and 2.
As shown in FIGS. 1 and 2, the pachinko machine 1 includes an upper hinge 3 </ b> A in which an inner frame 3 made of synthetic resin forms a hinge for attaching an inner frame to a wooden outer frame 2 formed in a rectangular shape in front view. The opening of the outer frame 2 is attached to the outer frame 2 so as to be openable and closable via the lower hinge 3B. A front cover member 4 made of synthetic resin is attached to the front side of the upper half of the inner frame 3 so as to be freely opened and closed by being pivotally supported at the upper and lower sides of the left end edge portion. In addition, a substantially circular window 5 is opened at a substantially central portion of the front cover member 4, and the game board 41 is passed through two glasses attached to a glass holding frame formed on the outer peripheral edge of the window 5. The gaming area 42 (see FIG. 3) on the upper side (see FIG. 3) can be seen. Further, a full-color light emitting diode is built in the upper left edge of the window portion 5 of the front cover member 4 to constitute an error display illumination lamp 6 for displaying an error during the game. In addition, speakers 7 are arranged at four corners of the front cover member 4 as viewed from the front. Further, the front portion of the front cover member 4 is covered with a synthetic resin front member 4A made of an opaque synthetic resin, and a full-color light emitting diode (not shown) is built in along the outer periphery of the window portion 5. And light effects are performed during the game.

A key insertion portion 4B for operating a locking device (not shown) for locking the inner frame 3 and the front cover member 4 is provided at the right edge of the front cover member 4. In order to open the front cover member 4, if a predetermined key is inserted into the key insertion portion 4B and rotated in a predetermined direction, the locked state of the locking device is released and only the front cover member 4 is opened.
In addition, an upper plate 8 that receives a prize ball to be paid out via a prize ball payout device 22 is disposed below the front cover member 4. The upper plate 8 is pivotally supported on the upper and lower sides of the left edge, and is attached so that it can be opened by lowering a lever (not shown) provided inside after opening the front cover member 4. Further, a ball lending operation unit 8B for operating a card-type ball lending machine (not shown) is provided on the central front portion of the upper plate 8, and operation buttons 8C and 8D are arranged. A lower plate 9 is disposed below the upper plate 8. Further, on the left side of the upper end surface of the lower plate 9, switch buttons 9A and 9B (for example, the switch button 9A is red and the switch button 9B is colored yellow) that can be used for effect display or the like are arranged. Has been.

The pachinko ball on the upper plate 8 is sent to a launching device (not shown) in which the firing force of the pachinko ball is adjusted by the operation handle 10 via a ball feed mechanism (not shown) communicating with the upper plate 8. Yes. This launching device is composed of a launching solenoid (not shown) for continuously hitting a supplied pachinko ball, a launching control board disposed in a launching control board case 30 that functions as a launching device, and the like. The control board is configured such that the power supplied to the firing solenoid is adjusted via a variable resistor (not shown) attached to the inside of the operation handle 10 so that the firing force of the pachinko ball can be increased or decreased. It is configured. As a result, the player adjusts the amount of rotation of the turning operation member 10A in the operation handle 10, whereby the resistance value of the variable resistor attached in the operation handle 10 is increased or decreased, and the pachinko ball is fired by the firing solenoid. It is configured so that the force can be appropriately adjusted.
Further, a speaker housing 11 is provided so as to cover the front surface portion of the outer frame 2 below the inner frame 3 over the entire width in the left-right direction and the vertical direction.
Further, when the inner frame 3 is closed, the lower end portion of the inner frame 3 is in contact with the upper end surface portion of the speaker housing 11 by its own weight. Further, a rib portion (not shown) is provided on the front end edge of the bottom surface of the speaker housing 11 so as to project downward to a position facing the lower end surface of the outer frame 2 over the entire width in the left-right direction.

In addition, a game board 41 is attached to a mechanism board 18 made of a metal such as an iron plate or a synthetic resin so that the game board 41 can be attached and detached at substantially the center of the inner frame 3. A mechanism set board 20 made of synthetic resin is attached to the back side of the mechanism board 18 with a hinge so as to be freely opened and closed.
In addition, a prize ball tank 21 opened upward is fixed to the mechanism set board 20 at the uppermost back side of the pachinko machine 1. The prize ball tank 21 has a communication hole formed in an inclined bottom surface, and a tank rail 23 that forms a passage through which the pachinko balls are aligned and flowed in two rows below the communication hole to send the pachinko ball to the prize ball dispensing device 22. Is attached. Also, in the prize ball payout device 22, a ball presence detection switch (not shown) for confirming a pachinko ball passing through the prize ball passage in the prize ball guide unit 24 and a payout stepping motor (not shown) for adjusting the payout of the pachinko ball. The interior is shown. These prize ball tank 21, tank rail 23, prize ball guide unit 24, prize ball payout device 22 and the like constitute a prize ball payout system.

  In addition, an effect display board case 26 in which an effect display board 260 (see FIG. 4) for controlling a liquid crystal display (LCD) 52 (see FIG. 3) and the like is incorporated is disposed below the tank rail 23. . Further, on the side of the effect display board case 26, an accessory driving control board case 27 in which an accessory driving control board for driving and controlling ordinary accessories is provided. Further, on the lower side of the effect display substrate case 26, while driving and controlling each speaker 7, the speaker built in the speaker case 11, and the full color diode such as the error display illumination lamp 6, the effect display substrate 260 is controlled. A sub-integrated control board case 28 in which a sub-integrated control board 280 (see FIG. 4) for performing a causal relationship between display control and sound control related to a speaker or the like is provided. Further, a main control board case 29 in which a main control board 290 (see FIG. 4) for controlling the gaming operation of the pachinko machine 1 is provided is disposed below the sub integrated control board case 28. On the player side front portion of the main control board case 29, a launch control board case 30 in which a launch control board that drives and controls the launch device by operating the operation handle 10 is provided. Further, a payout control board case 31 in which a payout control board for driving and controlling the prize ball payout device 22 is provided is located on the side of the main control board case 29. Further, a power supply board case 32 in which a power supply board for generating and supplying various drive power sources such as DC5V and DC12V from an AC24V supply power source is provided below the payout control board case 31.

Next, the configuration of the game area 42 on the game board 41 will be described with reference to FIG.
As shown in FIG. 3, in this game area 42, each structure such as a prize opening is arranged on a game board 41 made of a plate material of a predetermined thickness, and an annular rail 43 is erected so as to surround it. Has been configured. This rail 43 constitutes an overlapping guide path 44 that guides the launched pachinko ball into the game area 42, and restricts the progress of the pachinko ball driven along the rail 43 on the right shoulder. Step portion 45.
An opening is established in the approximate center of the game area 42, and a special symbol display device 48 is disposed on the front side of the opening. The special symbol display device 48 includes a liquid crystal display (LCD) 52 and the like attached to the back surface portion. This liquid crystal display 52 displays three rows of changing symbols that fluctuate in the vertical direction on the left, middle, and right, and a normal symbol display unit 50 that displays a normal symbol divided into two on the left and right corners. Is configured.

On the other hand, a gate 54 is disposed on the left side of the special symbol display device 48. The gate 54 is provided with a gate switch 54A (see FIG. 4) for detecting the passage of the pachinko sphere. Further, outside the left and right lower corners of the special symbol display device 48, normal windmills 55 and 56 are provided.
In addition, a start port 57 is disposed immediately below the special symbol display device 48. The starting port 57 is provided with a starting port switch 57A (see FIG. 4) for detecting the winning of the pachinko ball, and the three rows of changing symbols displayed on the liquid crystal display 52 by detecting the winning of the pachinko ball. The fluctuation starts. If the winning symbol 57 is won while the changing symbol is changing, up to four winnings are stored in the RAM provided on the main control board 290 (see FIG. 4) as will be described later, and the change of the changing symbol is confirmed. Held as a count.

  Further, the normal symbol of the normal symbol display unit 50 is changed by detecting the passage of the pachinko ball through the gate 54. Then, when a pachinko ball enters the gate 54 and the normal symbol on the normal symbol display unit 50 changes and then stops in a predetermined display mode (for example, “11”, “77”, etc.) The tulip-type accessory 57B provided at the upper part of the start port 57 is opened for a predetermined time (in this embodiment, about 1 second), and the probability that a pachinko ball wins the start port 57 increases. If the pachinko ball passes through the gate 54 while the normal symbol is fluctuating, the number of passages is stored in the RAM provided on the main control board 290, as will be described later, and is stored as the fixed number of variations of the normal symbol. Is done.

A special winning device 61 is provided below the starting port 57. The special winning device 61 is formed with a large winning opening 60 whose front surface is covered with an open / close door 59 having a wide width and opening upward. In addition, a so-called V port is formed in the center of the big winning port 60, and a V switch 60B (see FIG. 4) for detecting a winning in the V port is provided. Also, in the big prize opening 60, a big prize opening switch 60A (see FIG. 4) for counting the number of pachinko balls won when the opening / closing door 59 is opened is provided.
In addition, on each of the left and right sides of the big winning opening 60, winning openings 62 and 63 that open upward are arranged and communicated with a not-shown winning ball bowl on the back of the game board 41. Each winning opening switch (not shown) for detecting the winnings is provided. In addition, each of the lighting lamps 62A, 63A is built in under the winning prize ports 62, 63.
In addition, an out port 65 is opened along the rail 43 immediately below the special winning device 61. Furthermore, in such a game area 42 surrounded by the rails 43, a plurality of nails are driven together with the above-described components to constitute a complicated flow path of the pachinko ball.

Next, the configuration of the control system related to the drive control of the pachinko machine 1 configured as described above will be described with reference to FIGS.
As shown in FIG. 4, the control system related to the drive control of the pachinko machine 1 includes a main control board 290, a sub-integrated control board 280, an effect display board 260, and the like.
The main control board 290 includes a CPU 291, ROM 292, RAM 293, an input / output circuit (I / O) 294, etc., and the CPU 291, ROM 292, RAM 293, and input / output circuit 294 are connected to each other by a bus line. Yes. A clock circuit 295 is connected to the CPU 291 and a predetermined clock signal is input. The input / output circuit 294 is connected to a gate switch 54A, a start port switch 57A, a big prize port switch 60A, a V switch 60B, and the like. The input / output circuit 294 is connected to an opening / closing solenoid 59A for opening / closing the opening / closing door 59 and a solenoid 57C for opening / closing the tulip type accessory 57B.

Further, as shown in FIG. 5, the RAM 293 of the main control board 290 stores a numerical value obtained by repeatedly adding one by one from 0 to 359 based on the clock signal input from the clock circuit 295 (the maximum value 359 is followed by the minimum value). A big hit counter 293A for storing “Return to 0” is provided. The count value of the big hit counter 293A is read at the timing when the switch signal is input from the start port switch 57A, and it is determined whether or not the big hit counter is based on the read count value. Here, for example, the count value “7” corresponds to the big hit, and the other count values are lost. Also, for example, in normal times, the count value “7” corresponds to the big hit, and in the case of the so-called probability fluctuation mode (when probability variation is acquired), the count values “1, 3, 5, 7” correspond to the big hit. The other count values are out of range. Therefore, in the gaming state in the non-probability change mode, a jackpot occurs with a probability of 1/360, and in the gaming state with a probability change, a jackpot occurs with a probability of 4/360.
When the jackpot is lottery, the special symbols “1”, “2”, “3”, “3”, “3”, “3”, and “3” ... any one of "7" and "8" is displayed in a fixed stop together with "111", "222", "333", ..., "777", "888" Thereafter, as will be described later, the grand prize winning opening 60 can be continuously opened a predetermined number of times (for example, 15 times), and the number of winning prizes to the big winning prize opening 60 within 29.5 seconds or 29.5 seconds each time. The game is released until the total reaches 10, and a so-called jackpot game can be performed in which a lot of prize balls are paid out to the player (in other words, the player is in an advantageous state) (see FIG. 24).

  Further, the RAM 293 stores a normal symbol counter 293B in which a numerical value obtained by repeatedly adding 1 from 0 to 9 (returning to the minimum value 0 next to the maximum value 9) based on the clock signal input from the clock circuit 295 is stored. Is provided. The count value of the normal symbol counter 293B is read at a timing when a switch signal is input from each gate switch 54A, and it is determined whether or not it is a hit based on the read count value. Here, for example, the case where the count value is an even number corresponds to a win, and the case where the count value is an odd number corresponds to a loss.

  Here, when the pachinko ball passes through the gate 54 (see FIG. 3), the normal symbol counter 293B then stores the numerical value stored when the signal from the gate switch that detects the passage of the pachinko ball is input. Is stored in the parameter storage area 293K as “ordinary symbol count value”.

  In addition, a first holding counter 293C is provided that counts up to a maximum of four winnings in the starting port 57 while the design of the liquid crystal display 52 is changing. Further, a second holding counter 293D is provided that counts up to four passes through the gate 54 while the normal symbol of the normal symbol display unit 50 is changing.

Further, the RAM 293 has a reach counter 293E that stores a numerical value obtained by repeatedly adding one by one from 0 to 142 based on the clock signal output from the clock circuit 295 (the maximum value 142 then returns to the minimum value 0). Is provided. The count value of the reach counter 293E is read at the timing when the switch signal is input from the start port switch 57A, and it is determined whether or not the reach is reached based on the read count value. Here, for example, it corresponds to the case of reach loss where the count value “0 to 27” is lost after reaching, and to the case of complete loss where the count value “28 to 142” is immediately lost without reaching reach. Yes.
Reach refers to the change of the left, middle, and right three lines of change, and the change of the left and right columns to the special patterns “1”, “2”, “3”,. A state in which all of the “8” stops at the same time and the fluctuation pattern in the middle row changes (for example, “1 ↓ 1”, “2 ↓ 2”,..., “7 ↓ 7”, etc.) Is the state.) A special symbol that stops in the left column and the right column among the three symbols of the left, middle, and right columns is called a reach symbol. Therefore, the reach loss means that after reaching the reach state, the middle row of the change symbol stops at a special symbol different from the reach symbol. Also, complete loss refers to ending without reaching reach.

  In addition, the RAM 293 stores a value obtained by repeatedly adding 1 from 0 to 7 based on the clock signal output from the clock circuit 295 (the maximum value 7 is then returned to the minimum value 0). A counter 293F is provided. The count value of the jackpot special symbol selection counter 293F is read at the timing when the switch signal is input from the start port switch 57A, and the left, middle, and right three rows of fluctuation symbols fluctuate based on the read count value. After that, the combination pattern of the jackpot symbols that are stopped and displayed is specified. For example, the count value “0” is a jackpot symbol “111”, the count value “1” is a jackpot symbol “222”, the count value “2” is a jackpot symbol “333”, the count value “3” is a jackpot symbol “444”, The count value “4” corresponds to the jackpot symbol “555”, the count value “5” corresponds to the jackpot symbol “666”, the count value “6” corresponds to the jackpot symbol “777”, and the count value “7” corresponds to the jackpot symbol “888”. ing. Each jackpot symbol is a symbol that is stopped and displayed after a series of symbol variations, as is well known.

  The RAM 293 stores a normal symbol selection counter in which a numerical value obtained by repeatedly adding one by one from 0 to 3 based on the clock signal output from the clock circuit 295 (returns to the minimum value 0 next to the maximum value 3) is stored. 293G is provided. Here, for example, the count value “0” is the normal symbol “11”, the count value “1” is the normal symbol “17”, the count value “2” is the normal symbol “71”, and the count value “3” is the normal symbol “17”. 77 ". Each ordinary symbol is a symbol that is stopped and displayed after a series of symbol fluctuations, as is well known.

  Here, when the pachinko ball passes through the gate 54 (see FIG. 3), the normal symbol selection counter 293G receives the numerical value stored when the signal from the gate switch that detects the passage of the pachinko ball is input. The “normal symbol selection count value” at that time is stored in a parameter storage area 293K described later.

  The RAM 293 stores a numerical value obtained by repeatedly adding one by one from 0 to 99 based on the clock signal output from the clock circuit 295 (the maximum value 99 then returns to the minimum value 0). 293H is provided. The count value of the variation pattern selection counter 293H is read at the timing when the switch signal is input from the start port switch 57A. Note that the count value of the variation pattern selection counter 293H may be configured to be read at the timing when the variation of the variation symbols of the three columns of the liquid crystal display 52 is started. As is well known, the variation pattern command selected based on the count value of the variation pattern selection counter 293H specifies a variation pattern for displaying a series of symbol variations on the special symbol display device 48 based on various display effects. In this embodiment, as described later, the display effect time of “5 seconds” (see FIG. 10) is set as the display pattern change time. Further, two types of reach loss variation patterns of “20 seconds” and “30 seconds” (see FIG. 11) are set. Furthermore, in the variation pattern of the big hit (normal big hit and probability variation big hit), “22 seconds” and “32 seconds” (see FIG. 11) are set.

Further, the RAM 293 stores a numerical value obtained by repeatedly adding 1 from 0 to 200 based on the clock signal output from the clock circuit 295 (the maximum value 200 then returns to the minimum value 0). 293I is provided. The count value of the lost symbol selection counter 293I is read at the timing when the switch signal is input from the start port switch 57A.
In addition, the RAM 293 stores a numerical value obtained by repeatedly adding one by one from 0 to 143 based on the clock signal output from the clock circuit 295 (returns to the minimum value 0 next to the maximum value 143), and the reach / losing symbol selection counter. 293J is provided. The count value of the reach lose symbol selection counter 293J is read at the timing when the switch signal is input from the start port switch 57A.

Further, the RAM 293 is provided with a parameter storage area 293K for storing the count values of the counters 293A to 293J when a switch signal is input from the start port switch 57A.
Note that the count values and the parameter storage area 293K of the counters 293A to 293J are initialized to “0” at startup. The first hold counter 293C is decremented by 1 every time the special symbol starts to change. The second hold counter 293D is decremented by 1 every time the normal symbol starts to change.

  Further, as shown in FIG. 6, the ROM 292 stores a later-described variation pattern determination table 73 (see FIG. 11) for determining a variation pattern based on the count value of the variation pattern selection counter 293H. A storage area 292A is provided.

  As shown in FIG. 4, the sub-integrated control board 280 includes a CPU 281, a ROM 282 that stores a drive control program for the speaker 7, the illumination lamp 6, and the like, and a RAM 283 that stores various control signals from the main control board 290. An input / output circuit 284 for receiving various control signals sent from the main control board 290, a drive circuit 71 for driving and controlling the speaker 7, a drive circuit 72 for driving and controlling the error display illumination lamp 6 and the like are provided. Yes. The CPU 281, ROM 282, RAM 283, and input / output circuit 284 are mutually connected by a bus line. A clock circuit 285 is connected to the CPU 281 and a predetermined clock signal is input. The input / output circuit 284 is connected to the input / output circuit 294 of the main control board 290. Further, the input / output circuit 284 is connected to the drive circuits 71 and 72 and the switch buttons 9A and 9B.

Further, as shown in FIG. 7, the RAM 283 of the sub-integrated control board 280 repeatedly adds 1 by 1 from 0 to 13 based on the clock signal input from the clock circuit 285 (the minimum value is next to the maximum value 13). An effect pattern selection counter 283A in which “return to value 0” is stored is provided. The count value of the effect pattern selection counter 283A is read at the timing when the variation pattern command transmitted from the main control board 290 is input (S205 in FIG. 25), and the read count value is stored in the parameter storage area 283C. Remembered.
In addition, the RAM 283 stores a numerical value obtained by repeatedly adding one by one from 0 to 13 based on the clock signal input from the clock circuit 285 (the maximum value 13 then returns to the minimum value 0). 283B is provided. The count value of the notice pattern selection counter 283B is read at the timing when the variation pattern command transmitted from the main control board 290 is input (S221 in FIG. 26), and the read count value is stored in the parameter storage area 283C. Remembered.
At the time of starting or resetting, “0” is substituted into the effect pattern selection counter 283A and the notice pattern selection counter 283B, stored, and initialized.

  As shown in FIG. 8, the ROM 282 of the sub integrated control board 280 is provided with an effect pattern selection table storage area 282A in which an effect pattern selection table 74 (see FIG. 12) described later is stored. Further, the ROM 282 is provided with a notice pattern selection table storage area 282B in which a notice pattern selection table 75 (see FIG. 13) described later is stored. The ROM 282 is provided with a comparison 4-bit table storage area 282C in which a comparison 4-bit table 76 (see FIG. 14) described later is stored. The ROM 282 is provided with a notice time chart storage area 282D for storing time charts 77 and 78 (see FIG. 15) described later. Further, the ROM 282 stores a later-described sub control program (see FIG. 25, etc.) for performing control such as selection of each of the later-described effect pattern commands 1A, 11A,..., 22B (see FIG. 12). Yes.

  As shown in FIG. 4, the effect display board 260 includes a CPU 261, a ROM 262 for storing a display control program and required display data, a RAM 263 for storing display commands, display information, input / output signals, and the like, and a sub-integrated control board. An input / output circuit 264 that receives various control signals sent from the H.280, a VDP (Video Display Processor) 265 that receives display information sent from the CPU 261 and processes and displays an image on the liquid crystal display 52. It is arranged. The CPU 261, ROM 262, RAM 263, input / output circuit 264, and VDP 265 are connected to each other by a bus line. A clock circuit 266 is connected to the CPU 261 and a predetermined clock signal is input. Then, the CPU 261 performs a predetermined effect display on the liquid crystal display 52 based on various control signals such as display pattern information input from the sub integrated control board 280.

  9, the ROM 262 of the effect display board 260 is provided with an effect display pattern table storage area 262A in which an effect display pattern table 81 (see FIG. 16) described later is stored. The ROM 262 is provided with a character table storage area 262B for storing a character table 82 (see FIG. 17) described later. Further, a notice character storage area 262C is provided in which characters A, B, C, and D (see FIGS. 34 and 35) displayed on the display screen at each notice timing described later are stored. Further, the ROM 262 has a control program (described later) for performing display control of the liquid crystal display 52 of the effect display pattern corresponding to each effect pattern command 1A, 11B,..., 22B (refer to FIG. 12) described later. 28, etc.) are stored.

  Further, the RAM 263 of the effect display board 260 stores a numerical value obtained by repeatedly adding 1 from 0 to 9 based on the clock signal input from the clock circuit 266 (the maximum value is 9 and then the minimum value is 0). A character table selection counter 263A is provided. The count value of the character table selection counter 263A is read at the timing when the effect pattern command transmitted from the sub-integrated control board 280 is input (S301 in FIG. 28), and the read count value is the parameter storage area 263B. Is remembered.

Next, the variation pattern determination table 73 stored in the variation pattern determination table storage area 292A of the ROM 292 of the main control board 290 will be described with reference to FIG. FIG. 11 is a diagram illustrating an example of the variation pattern determination table stored in the variation pattern determination table storage area 292A of the ROM 292 of the main control board 290 of the pachinko machine 1 according to the present embodiment.
As shown in FIG. 11, the variation pattern determination table 73 is mainly composed of three pattern groups. A complete loss variation pattern group (variation pattern command 1) and a reach loss variation pattern group (variation pattern command 11, variation pattern command 12). ) And a big hit variation pattern group (a variation pattern command 21 and a variation pattern command 22). First, “lost” and “hit” (regardless of whether it is a normal big hit or a probable big hit) are determined based on the count value of the big hit counter 293A. Next, in the case of “losing”, one of the variation pattern commands 1, 11, and 12 is determined based on the count value of the variation pattern selection counter 293H. In the case of “big hit”, one of the variation pattern commands 21 and 22 is determined based on the count value of the variation pattern selection counter 293H. Specific control for determining each variation pattern command 1 to 22 will be described later (see FIG. 18).

For example, the complete loss variation pattern command 1 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “0 to 89”.
The reach-losing variation pattern command 11 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “90 to 95”. The reach-losing variation pattern command 12 is determined when “lost” is determined from the count value of the big hit counter 293A and the count value of the variation pattern selection counter 293H is “96 to 99”.

  The jackpot variation pattern command 21 is determined when it is determined that the jackpot is based on the count value of the jackpot counter 293A and the count value of the variation pattern selection counter 293H is “0 to 39”. The jackpot variation pattern command 22 is determined when “big hit” is determined from the count value of the jackpot counter 293A and the count value of the variation pattern selection counter 293H is “40 to 99”.

  Next, an example of the effect pattern selection table 74 stored in the effect pattern selection table storage area 282A of the ROM 282 of the sub integrated control board 280 will be described with reference to FIG. Here, the effect pattern selection table 74 is displayed when the CPU 281 of the sub-integrated control board 280 receives instruction information (specifically, the variation pattern command and the final stop symbol information) from the CPU 291 of the main control board 290. It is a table used when selecting an effect pattern (effect pattern command) as display instruction information to be output (instructed) to the CPU 261 of the substrate 260.

  As shown in FIG. 12, the effect pattern selection table 74 is input from the CPU 291 and the “variation pattern command” representing the variation pattern instruction information input from the CPU 291 of the main control board 290. A “final stop pattern instruction” representing each of the three rows of symbols displayed on the liquid crystal display 52 and an “effect pattern count” representing the count value of the effect pattern selection counter 283A acquired when a variation pattern command is input from the CPU 291. Value ”and“ effect pattern command ”corresponding to this“ effect pattern count value ”. The “effect pattern command” is a command for instructing the CPU 261 of the effect display board 260 to effect display the display image data of the effect display pattern corresponding to the effect pattern command on the liquid crystal display 52. is there. The “effect pattern command” is a command for instructing the drive circuit 71 to play game music corresponding to the effect pattern command via the speaker 7. The “effect pattern command” is a command for instructing the drive circuit 72 to drive the lighting lamp 6 and the like in accordance with the lighting drive pattern corresponding to the effect display pattern command. Specific control based on each effect pattern command will be described later (see FIG. 28).

  For example, when the “variation pattern command” input from the main control board 290 is “1” and the acquired count value of the effect pattern selection counter 283A is “0 to 13”, the effect pattern command 1A is selected. The effect pattern command 1A is a combination of special symbols (for example, “567”) for notifying the complete loss instructed from the main control board 290 after five seconds from the start of variation of the three rows of variation symbols displayed on the liquid crystal display 52. ) Is stopped and displayed on the liquid crystal display 52, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern of the electric lamp 6 and the like are specified.

When the “variation pattern command” input from the main control board 290 is “11” and the acquired count value of the effect pattern selection counter 283A is “0 to 10”, the effect pattern command 11A is selected. Is done. In the effect pattern command 11A, the type of reach effect is “reach A”, and, as will be described later, after the start of the change of the three rows of change symbols, at each of the notice timings T1 to T4 (see FIG. 15A) at random. A special symbol combination (for example, “767” for notifying the reach loss instructed from the main control board 290 after 20 seconds from the start of the variation of the three rows of variation symbols is determined. ") Is stopped and displayed on the liquid crystal display 52, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern of the illumination lamp 6 and the like are specified.
If the “variation pattern command” input from the main control board 290 is “11” and the count value of the acquired effect pattern selection counter 283A is “11-13”, the effect pattern command 11B is selected. Is done. In the effect pattern command 11B, the type of reach effect is “reach B”, and, as will be described later, after the start of the change of the three rows of change symbols, at each of the notice timings T1 to T4 (see FIG. 15A) at random. A special symbol combination (for example, “323”, for example, is determined and notified in advance when the jackpot acquisition notification is determined, and 20 seconds after the start of the variation of the three rows of variation symbols, is notified of the reach loss instructed from the main control board 290. ") Is stopped and displayed on the liquid crystal display 52, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern of the illumination lamp 6 and the like are specified.

When the “variation pattern command” input from the main control board 290 is “22” and the count value of the acquired effect pattern selection counter 283A is “0 to 3”, the effect pattern command 22A is selected. Is done. In the effect pattern command 22A, the type of reach effect is “reach C” and, as will be described later, after starting the change of the three lines of change symbols, at each of the notice timings T11 to T14 (see FIG. 15B) at random. A notice combination of jackpot acquisition is determined and the notice notice is given, and a special symbol combination (for example, “777” that informs the jackpot instructed from the main control board 290 32 seconds after the start of the fluctuation of the three rows of fluctuation symbols. ") Is stopped and displayed on the liquid crystal display 52, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern of the illumination lamp 6 and the like are specified.
Further, when the “variation pattern command” input from the main control board 290 is “22” and the count value of the acquired effect pattern selection counter 283A is “4 to 13”, the effect pattern command 22B is selected. Is done. In the effect pattern command 22B, the type of reach effect is “reach D”, and, as will be described later, after the start of the change of the three rows of change symbols, at each of the notice timings T11 to T14 (see FIG. 15B) at random. A notice combination of jackpot acquisition is determined and the notice notice is given, and a special symbol combination (for example, “777” that informs the jackpot instructed from the main control board 290 32 seconds after the start of the fluctuation of the three rows of fluctuation symbols. ") Is stopped and displayed on the liquid crystal display 52, and the game music corresponding thereto and the effect pattern for performing the lighting drive pattern of the illumination lamp 6 and the like are specified.

  Next, an example of the notice pattern selection table 75 stored in the notice pattern selection table storage area 282B of the ROM 282 of the sub-integrated control board 280 will be described with reference to FIG. Here, the notice pattern selection table 75 is a notice timing constituted by an 8-bit binary number for determining the notice timing output (instructed) by the CPU 281 of the sub-integrated control board 280 to the CPU 261 of the effect display board 260. It is a table used when selecting data at random.

  As shown in FIG. 13, the notice pattern selection table 75 includes a “count value” representing the count value of the notice pattern selection counter 283B acquired when a variation pattern command is input from the CPU 291 and the “count value”. It consists of corresponding “8-bit notice timing data”. In addition, bits 4 to 7 of the upper 4 digits of each 8-bit notice timing data are set to “0000”. Further, bit 0 of the first digit among the lower 4 bits 0 to 3 of the 8-bit notice timing data corresponds to the times T1 and T11 of the notice time charts 77 and 78 shown in FIG. If it is set to “1” as described later, it indicates that a notice is notified at each time T1 and T11. If it is set to “0”, a notice is notified at each time T1 and T11. It means not to do.

In addition, bit 1 of the second digit among the lower 4 digits bit 0 to bit 3 of each 8-bit notice timing data corresponds to each time T2, T12 of each notice time chart 77, 78 shown in FIG. If it is set to “1”, it means that the notice is notified at each time T2 and T12, and if it is set to “0”, it means that the notice is not notified at each time T2 and T12. Represents.
In addition, bit 3 of the third digit out of the lower 4 digits bit 0 to bit 3 of each 8-bit notice timing data corresponds to each time T3, T13 of each notice time chart 77, 78 shown in FIG. If it is set to “1”, it means that the notice is notified at each time T3 and T13, and if it is set to “0”, it means that the notice is not notified at each time T3 and T13. Represents.

Further, the fourth digit bit 3 out of the lower 4 digits 0 to 3 of the 8-bit notice timing data corresponds to the times T4 and T14 of the notice time charts 77 and 78 shown in FIG. If it is set to “1”, it means that the notice is notified at each time T4 and T14, and if it is set to “0”, it means that the notice is not notified at each time T4 and T14. Represents.
For example, when the count value of the notice pattern selection counter 283B acquired when the variation pattern command is input from the CPU 291 is “11”, the 8-bit notice timing data corresponds to “00001101”. Then, the lower 4 bits 0 to 3 of the 8-bit notice timing data are notified at each time T1, T2, T4, T11, T12, and T14 of the notice time charts 77 and 78 shown in FIG. Represents the effect. When the count value of the notice pattern selection counter 283B acquired when the variation pattern command is input from the CPU 291 is “13”, the 8-bit notice timing data corresponds to “00000000”. The lower 4 digits of bit 8 to bit 3 of the 8-bit notice timing data are the time T1, T2, T3, T4, T11, T12, T13, and T14 of the notice time charts 77 and 78 shown in FIG. In any case, it indicates that no notice is notified.

Next, an example of the comparison 4-bit table 76 stored in the comparison 4-bit table storage area 282C of the ROM 282 of the sub integrated control board 280 will be described with reference to FIG. Here, the comparison 4-bit table 76 is used when the CPU 281 of the sub integrated control board 280 determines the presence / absence of a notice instruction to be output (instructed) to the CPU 261 of the effect display board 260 at each notice timing. It is a table.
As shown in FIG. 14, the comparison 4-bit table 76 includes “comparison 4 bits” as comparison data composed of “notification timing” representing each notice timing and a 4-bit binary number corresponding to this “notice timing”. ].

This “notice timing” corresponds to each time T1, T2, T3, T4 of the notice time chart 77 shown in FIG. 15 or each time T11, T12, T13, T14 of the notice time chart 78. The “notice timing”, “second notice timing”, “third notice timing”, and “fourth notice timing” are stored in advance.
The “comparison 4 bits” includes “0001” corresponding to “first notice timing”, “0010” corresponding to “second notice timing”, and “0100” corresponding to “third notice timing”. ”,“ 1000 ”4-bit binary numbers are sequentially stored corresponding to“ fourth notice timing ”. That is, in correspondence with “first notice timing” to “fourth notice timing”, the bit value “1” of the first 4 bits of “0001” is bit-shifted sequentially to the next higher digit. Comparison data (shift comparison data) composed of binary numbers is sequentially stored.

  Next, an example of the respective notice time charts 77 and 78 stored in the notice pair chart storage area 282D of the ROM 282 of the sub integrated control board 280 will be described with reference to FIG. Here, the notice time charts 77 and 78 are used when the CPU 281 of the sub integrated control board 280 determines the timing of the notice instruction to be output (instructed) to the CPU 261 of the effect display board 260 at each notice timing. It is.

As shown in FIG. 15A, in the notice time chart 77, the CPU 281 of the sub-integrated control board 280 outputs any of the effect pattern commands 11A, 11B, 21A, and 21B to the CPU 261 of the effect display board 260. In this case, the CPU 281 is used when determining the timing of a notice instruction to be output (instructed) to the CPU 261 of the effect display board 260.
This notice time chart 77 is a time T1 second which is the first timing for performing the first notice from the start of the variation of the identification symbols in the three rows, and is T2 seconds which is the second notice timing for performing the next notice. It is also the time to stop.) Next, T3 seconds, which is the third notice timing for performing the next notice, and T4 seconds, which is the fourth notice timing for performing the next notice (this is also the time for stopping the second symbol). ) And a time T5 seconds for stopping the third symbol.
Therefore, as described later, when the CPU 281 outputs any one of the effect pattern commands 11A, 11B, 21A, and 21B to the CPU 261 of the effect display board 260, the three rows of identification symbols of the liquid crystal display 52 are displayed. After the start of fluctuation, a notice is given every time T1 seconds, T2 seconds (when the first symbol is stopped), T3 seconds, and T4 seconds (when the second symbol is stopped, that is, when reaching). Is determined (see FIG. 27).

As shown in FIG. 15B, the notice time chart 78 shows that the CPU 281 of the sub-integrated control board 280 sends any of the effect pattern commands 12A, 12B, 22A, 22B to the CPU 261 of the effect display board 260. When output, the CPU 281 is used when determining the timing of a notice instruction to be output (instructed) to the CPU 261 of the effect display board 260.
This notice time chart 78 is a time T11 second which is the first timing for performing the first notice from the start of the variation of the identification symbols in the three rows, and is T12 seconds which is the second notice timing for performing the next notice. This is also the time to stop. T13 seconds, which is the third notification timing for the next notification, and T14 seconds, which is the fourth notification timing for the next notification (the time to stop the second symbol). ) And a time T15 seconds for stopping the third symbol.
Therefore, as described later, when the CPU 281 outputs any of the effect pattern commands 12A, 12B, 22A, and 22B to the CPU 261 of the effect display board 260, the three rows of identification symbols of the liquid crystal display 52 are displayed. After the start of fluctuation, a notice is given every time T11 seconds, T12 seconds (when the first symbol is stopped), T13 seconds, and T14 seconds (when the second symbol is stopped, that is, when reaching). Is determined (see FIG. 27).

  Next, the effect display pattern table 81 stored in the effect display pattern table storage area 262A of the ROM 262 of the effect display board 260 will be described with reference to FIG. Here, the effect display pattern table 81 is displayed when the CPU 261 of the effect display board 260 receives an “effect pattern command” (see FIG. 12) as display instruction information from the CPU 281 of the sub-integrated control board 280. It is a table used when selecting each production | presentation display pattern preset corresponding to instruction information. Then, the CPU 261 of the effect display board 260 reads the effect display moving image data corresponding to the selected effect display pattern from the ROM 262 and controls the display on the liquid crystal display 52.

As shown in FIG. 16, the effect display pattern table 81 includes each effect pattern command representing display instruction information input from the CPU 281 of the sub-integrated control board 280 and “effect display” set in advance for each effect pattern command. Pattern ".
The “effect pattern command” in the effect display pattern table 76 includes “1A”, “11A”, “11B”, “12A”, “12B”, “21A”, “21B”, “22A”, “22B”. "Is stored in advance.

  In addition, the “effect display pattern” in the effect display pattern table 76 indicates a predetermined time after the start of fluctuation (for example, about 1 .5 seconds.) When the time has elapsed, the first symbol in the first column is stopped and displayed. Subsequently, when the predetermined time (for example, about 2 seconds) has elapsed, the second symbol in the third column is displayed. Stop display, and when a predetermined time (for example, about 1.5 seconds) has elapsed, the third symbol in the second row is stopped and displayed, “change start → first symbol stop → second symbol stop” “→ 3rd symbol stop → Loss display (5 seconds)” is stored in advance.

The “effect display pattern” includes, for example, first notice timing to fourth notice timing corresponding to each time T1 to T4 of the notice time chart 77 corresponding to “11A” of “effect pattern command”. “Change start → first notice timing → first symbol stop (second notice timing) → third notice timing → second symbol stop (fourth notice timing) → reach A “Production → 3rd symbol stop → reach loss display (20 seconds)” is stored in advance.
In addition, corresponding to “11B” of “effect pattern command”, it is an effect display pattern of reach losing including the first notice timing to the fourth notice timing corresponding to each time T1 to T4 of the notice time chart 77. “Change start → first notice timing → first symbol stop (second notice timing) → third notice timing → second symbol stop (fourth notice timing) → reach B effect → third symbol stop → reach loss display ( 20 seconds) "is stored in advance.

The “effect display pattern” includes, for example, the first notice timing to the fourth notice timing corresponding to the times T1 to T4 of the notice time chart 77 corresponding to “21A” of the “effect pattern command”. “Variation start → first notice timing → first symbol stop (second notice timing) → third notice timing → second symbol stop (fourth notice timing) → reach A “Production → 3rd symbol stop → winning display (22 seconds)” is stored in advance.
In addition, corresponding to “21B” of “effect pattern command”, it is a jackpot effect display pattern including the first notice timing to the fourth notice timing corresponding to each time T1 to T4 of the notice time chart 77. “Start of change → first notice timing → first symbol stop (second notice timing) → third notice timing → second symbol stop (fourth notice timing) → reach B effect → third symbol stop → winning display ( 22 seconds) "is stored in advance.

Next, the character table 82 stored in the effect display pattern table storage area 262B of the ROM 262 of the effect display board 260 will be described with reference to FIG. Here, the character table 82 is used when the CPU 261 of the effect display board 260 selects a notice character to be displayed at the first notice timing to the fourth notice timing in the effect display patterns 11B, 12B, 21B, and 22B. The table to use.
As shown in FIG. 17, the character table 82 includes a “character table selection count value” representing the count value of the character table selection counter 263A acquired when an effect pattern command is input from the CPU 281 and the “character table selection”. It consists of “first notice timing” to “fourth notice timing” corresponding to “count value”.

  In addition, “0 to 7” and “8 to 9” are stored in advance in the “character table selection count value”. Corresponding to “0 to 7” of “Character table selection count value”, “Character A” to “Character D” are stored in advance for “First notice timing” to “Fourth notice timing”, respectively. Has been. Corresponding to “8 to 9” of “Character table selection count value”, “Character D” to “Character A” are stored in advance for “First notice timing” to “Fourth notice timing”, respectively. Has been.

  Next, control processing of the pachinko machine 1 configured as described above will be described with reference to FIGS.

  First, interrupt control processing executed by the CPU 291 of the main control board 290 will be described with reference to FIGS. 18 to 24 are flowcharts of the interrupt control process executed by the CPU 291 of the main control board 290. Here, the interrupt control process of FIG. 18 operates at regular intervals (for example, every 4 msec) after the power is turned on. 18 to 24 are stored in the ROM 292 and RAM 293 provided in the main control board 290, and are executed by the CPU 291.

  As shown in FIG. 18, first, in step (hereinafter referred to as “S”) 1, the CPU 291 executes a sub process of the start opening winning process. In S2, the CPU 291 executes a sub process of the jackpot determination process. Subsequently, in S3, the CPU 291 executes the sub-process of the variation pattern selection process, then executes the sub-process of the command transmission process in S4, and further executes the confirmation signal transmission process in S5. After that, in S6, the CPU 291 determines that the winning prize opening 60 is continuously performed a predetermined number of times (for example, 15 times) when winning the jackpot as a result of the determination in S2, and within 29.5 seconds or 29.5 seconds each time. After executing the sub-process of the jackpot game process for performing control related to the jackpot game (special game state) that is released until the number of winning prizes at the jackpot 60 reaches 10, then, in S7, through the prize ball payout device 22 Then, a sub-process of a prize ball payout process for paying out a winning ball for each winning ball to each of the winning holes 62 and 63, the start opening 57 and the big winning opening 60 is executed, and the process is terminated.

Next, the sub-process of the start opening winning process (S1) will be described with reference to FIG.
As shown in FIG. 19, first, in S 11, the CPU 291 receives a pachinko ball winning of the starting port 57, that is, a pachinko ball detection signal from the starting port switch 57 A is received via the input / output circuit (I / O) 294. A determination process for determining whether or not an input has been made is executed.
If the pachinko ball detection signal from the start port switch 57A is not input via the input / output circuit 294 (S11: NO), the sub-process is terminated and the process returns to the main flowchart.

  On the other hand, when the pachinko ball detection signal from the start port switch 57A is input via the input / output circuit 294 (S11: YES), in S12, the CPU 291 causes the big hit counter 293A, the first hold counter 293C, “Count value acquisition process” for acquiring each count value of the reach counter 293E, the big hit special symbol selection counter 293F, the fluctuation pattern selection counter 293H, the loss symbol selection counter 293I, the reach loss symbol selection counter 293J, etc., and storing it in the parameter storage area 293K Is executed, the sub-process is terminated and the process returns to the main flowchart.

  For example, when the pachinko ball detection signal from the start port switch 57A is input via the input / output circuit 294, the CPU 291 reads the count value of the big hit counter 293A and substitutes this count value into the algebra V. And stored in the RAM 293. At the same time, the CPU 291 reads the count value of the first hold counter 293C, substitutes this count value for the algebra U, and stores it in the RAM 293. At the same time, the CPU 291 reads the count value of the reach counter 293E, substitutes this count value for the algebra M, and stores it in the RAM 293. At the same time, the CPU 291 reads the count value of the jackpot special symbol selection counter 293F, substitutes this count value for the algebra Y, and stores it in the RAM 293. At the same time, the CPU 291 reads the count value of the variation pattern selection counter 293H, substitutes this count value for the algebra H, and stores it in the RAM 293. At the same time, the CPU 291 reads the count value of the lost symbol selection counter 293I, assigns this count value to the algebra I, and stores it in the RAM 293. At the same time, the CPU 291 reads the count value of the reach lose symbol selection counter 293J, substitutes this count value for the algebra F, and stores it in the RAM 293.

Next, the sub-process of the jackpot determination process (S2) will be described with reference to FIG.
As shown in FIG. 20, first, in S21, the CPU 291 receives a pachinko ball winning of the starting port 57, that is, a pachinko ball detection signal from the starting port switch 57A is sent via the input / output circuit (I / O) 294. A determination process for determining whether or not an input has been made is executed.
When the pachinko ball detection signal from the start port switch 57A is not input via the input / output circuit 294 (S21: NO), the sub-process is terminated and the process returns to the main flowchart.
On the other hand, when the pachinko ball detection signal from the start port switch 57A is input via the input / output circuit 294 (S21: YES), in S22, the CPU 291 reads the fluctuation processing flag from the RAM 293, and A determination process for determining whether or not the fluctuating process flag is ON, that is, whether it is “1” is executed. When the pachinko machine 1 is started up or reset, “0” is assigned to the variation processing flag and stored in the RAM 293.
If the variable processing flag read from the RAM 293 in S22 is ON, that is, “1” (S22: YES), the CPU 291 ends the sub-process and returns to the main flowchart.

On the other hand, when the variation processing flag read from the RAM 293 in S22 is OFF, that is, “0” (S22: NO), in S23, the CPU 291 executes a jackpot value acquisition process.
In this jackpot value acquisition process, first, the CPU 291 reads a probability variation flag (“0” is assigned to the probability variation flag when the power is turned on) stored in the RAM 293. If the probability variation flag read from the RAM 293 is ON, that is, “1”, it is determined that the probability variation mode is selected, and the “probability large hit value” (in the case of the first embodiment) stored in the ROM 292 in advance. Are “1”, “3”, “5”, and “7”), and this “probability variation jackpot value” is stored as “jackpot value” in the parameter storage area 293K. On the other hand, when the probability variation flag read from the RAM 293 is OFF, that is, “0”, it is determined that the normal mode is set, and the “normal jackpot value” stored in the ROM 292 in advance (in the case of the first embodiment). Is “7”), and this “ordinary jackpot value” is stored in the parameter storage area 293K as a “jackpot value”.

Subsequently, in S24, the CPU 291 executes a determination process for determining whether or not it is a “big hit”.
In the determination process of whether or not this is a “big hit”, first, the algebra V as the “big hit count value” is read from the parameter storage area 293K. Then, it is determined whether or not this algebra V matches any of the “big hit values” stored in the parameter storage area 293K. If they match, the jackpot algebra Q (“0” is substituted for the jackpot algebra Q when the power is turned on) is stored in the parameter storage area 293K by substituting “1”. Then, “0” is substituted into the jackpot algebra Q and stored in the parameter storage area 293K.
Therefore, in the normal mode gaming state, the lottery probability of “big hit” is 1/360. In the case of the gaming state in the probability variation mode, the lottery probability of “big hit” is 4/360. As a result, in the probability variation mode, the probability of being a “hit” is about four times that in the normal mode gaming state.

Then, the jackpot algebra Q is read again from the parameter storage area 293K, and it is determined whether the jackpot algebra Q is “0” or “1”. That is, it is determined whether or not “big hit” has occurred.
When the jackpot algebra Q is “1”, it is determined that a “jackpot” has occurred (S24: YES), and in S25, the CPU 291 reads the jackpot flag from the RAM 293 and turns on the jackpot flag. That is, “1” is substituted into the jackpot flag and stored in the RAM 293 again. When the pachinko machine 1 is started or reset, the jackpot flag is set to OFF, that is, “0” is substituted for the jackpot flag and stored in the RAM 293.
In S26, the CPU 291 reads the algebra Y as the jackpot special symbol selection count value from the parameter storage area 293K, and the “big jackpot symbol” (specific symbol) corresponding to the algebra Y stored in the ROM 292 (for example, “ 111 ”,“ 777 ”, etc. Further, each“ 1 ”symbol of“ 111 ”and each“ 7 ”symbol of“ 777 ”functions as a first identifying symbol.) After storing in the RAM 293 as symbol data of the final stop symbol for notification, the sub-processing is terminated and the process returns to the main flowchart.

On the other hand, when the jackpot algebra Q read from the parameter storage area 293K again in S24 is “0”, it is determined that “losing” has occurred (S24: NO), and in S27, the CPU 291 reads from the RAM 293. The jackpot flag is read and the jackpot flag is turned off, that is, “0” is substituted into the jackpot flag and stored in the RAM 293 again.
Then, in S28, the CPU 291 displays the variation symbol at this time in a reach state in which two symbols out of the three symbols of the variation symbol are aligned (for example, “5 ↓ 5”, “7 ↓ 7”, etc. It is determined whether or not to display a loss (for example, “545” or “737”) after “↓” means that the symbol is rotating).
This determination is made by reading the algebra H as the count value of the variation pattern selection counter 293H stored in the parameter storage area 293K, and when the count value of the variation pattern selection counter 293H is “90 to 99”, after the reach state It is determined to display a loss (S28: YES), and in S29, the CPU 291 includes a reach loss symbol (non-specific symbol) (for example, “121”, “767”, etc. Further, each “1” of “121”, The symbol “2” and the symbols “7” and “6” of “767” function as the second identification symbols. The selection of the reach lose symbol is performed by reading the algebra F as the count value of the reach lose symbol selection counter 293J from the parameter storage area 293K, reading the reach lose symbol corresponding to this count value from the ROM 292, and as the symbol data of the final stop symbol of the reach lose notification. After storing in the RAM 293, the sub-process is terminated and the process returns to the main flowchart.

  On the other hand, in S28, the algebra H as the count value of the variation pattern selection counter 293H stored in the parameter storage area 293K is read, and when the count value of the variation pattern selection counter 293H is “0 to 89”, complete loss Is displayed (S28: NO), and in S30, the CPU 291 has a complete loss symbol (non-specific symbol) (for example, “123”, “386”, etc. In addition, “1” of “123”, “ The symbols “2” and “3” and the symbols “3”, “8” and “6” of “386” function as the second identification symbols))). The selection of the complete loss symbol is performed by reading the algebra I as the count value of the loss symbol selection counter 293I from the parameter storage area 293K, reading the complete loss symbol corresponding to the count value from the ROM 292, and displaying the final stop symbol of the complete loss notification. After storing in the RAM 293 as symbol data, the sub-process is terminated and the process returns to the main flowchart.

Next, the sub-process of the variation pattern selection process (S3) will be described with reference to FIG.
As shown in FIG. 21, first, in S31, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. . When the pachinko machine 1 is started up or reset, “0” is assigned to the variation processing flag and stored in the RAM 293.
If the variable processing flag read from the RAM 293 in S31 is ON, that is, “1” (S31: YES), the CPU 291 ends the sub-process and returns to the main flowchart.

  On the other hand, when the variable processing flag read from the RAM 293 in S31 is OFF, that is, “0” (S31: NO), in S32, the CPU 291 reads the jackpot algebra Q from the parameter storage area 293K, It is determined whether the jackpot algebra Q is “0” or “1”, that is, whether or not “big jackpot” has occurred, and when it is determined that a jackpot has occurred, that is, when the jackpot algebra Q is “1” (S32: YES), the process proceeds to S33.

Subsequently, in S33, the CPU 291 reads the algebra H as the count value of the variation pattern selection counter 293H from the parameter storage area 293K, and sub-integrated control board from the big hit variation pattern group of the variation pattern determination table 73 based on the count value. After selecting a variation pattern command to be output as instruction information to the CPU 281 of 280 and storing it in the RAM 293, the sub-process is terminated and the process returns to the main flowchart.
For example, when the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “0 to 39”, the CPU 291 selects the variation pattern command 21 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.
When the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “40 to 99”, the CPU 291 selects the variation pattern command 22 and selects the sub integrated control board. The instruction information output to the CPU 281 of 280 is stored in the RAM 293.

On the other hand, if the CPU 291 determines in S32 that no jackpot has occurred, that is, if the jackpot algebra Q is “0” (S32: NO), the process proceeds to S34.
In S34, the CPU 291 reads the algebra H as the count value of the variation pattern selection counter 293H from the parameter storage area 293K, and based on each count value, the complete loss variation pattern group and the reach loss variation pattern group of the variation pattern determination table 73. Then, the variation pattern command to be output as instruction information to the CPU 281 of the sub integrated control board 280 is selected and stored in the RAM 293, and then the sub process is terminated and the process returns to the main flowchart.

For example, if the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “0 to 89”, the CPU 291 selects the variation pattern command 1 and selects the sub integrated control board. The instruction information output to the CPU 281 of the H.280 is stored in the RAM 293.
Further, when the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “90 to 95”, the CPU 291 selects the variation pattern command 11 and selects the sub integrated control board. The instruction information output to the CPU 281 of the H.280 is stored in the RAM 293.
When the count value of the variation pattern selection counter 293H read from the parameter storage area 293K is any one of “96 to 99”, the CPU 291 selects the variation pattern command 12 and selects the sub integrated control board. The instruction information output to the CPU 281 of the H.280 is stored in the RAM 293.

Next, the sub-process of the command transmission process (S4) will be described with reference to FIG.
As shown in FIG. 22, first, in S41, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. .
If the variable processing flag read from the RAM 293 in S41 is ON, that is, “1” (S41: YES), the CPU 291 ends the sub-process and returns to the main flowchart.

On the other hand, when the variation processing flag read from the RAM 293 in S41 is OFF, that is, “0” (S41: NO), in S42, the CPU 291 sends the instruction information from the RAM 293 to the CPU 281 of the sub-integrated control board 280. Are read out and the symbol data of the final stop symbol are read out, and the symbol of the variation pattern and the symbol data of the final stop symbol are output to the CPU 281 of the sub-integrated control board 280.
Subsequently, in S <b> 43, the CPU 291 starts measuring the effect display time corresponding to the change pattern command output to the CPU 281, that is, the change times of a plurality of change symbols displayed on the liquid crystal display 52.
In S44, the CPU 291 reads the variation processing flag from the RAM 293, turns on the variation processing flag, that is, substitutes “1” for the variation processing flag and stores it again in the RAM 293. The process ends and the process returns to the main flowchart.

Next, the sub-process of the confirmation signal transmission process (S5) will be described with reference to FIG.
As shown in FIG. 23, first, in S51, the CPU 291 reads a variation processing flag from the RAM 293, and executes a determination process for determining whether or not the variation processing flag is ON, that is, “1”. .
If the variable processing flag read from the RAM 293 in S51 is OFF, that is, “0” (S51: NO), the CPU 291 ends the sub-process and returns to the main flowchart.

On the other hand, when the variable processing flag read from the RAM 293 in S51 is ON, that is, “10” (S51: YES), the CPU 291 proceeds to the process of S52.
Subsequently, in S52, the CPU 291 reads the effect time corresponding to the variation pattern command output as instruction information from the ROM 292 to the CPU 281 and whether or not the measurement time when the measurement is started in the process of S43 is equal to or longer than this effect time. That is, a determination process is performed to determine whether or not the three rows of the changing symbols displayed on the liquid crystal display 52 are stopped and displayed.
For example, when the variation pattern command 1 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which measurement is started in the process of S 43 has been 5 seconds or longer. When the fluctuation pattern command 11 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time when measurement is started in the process of S 43 has been 20 seconds or longer. When the variation pattern command 12 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time for which the measurement is started in the process of S 43 has been 30 seconds or longer. When the variation pattern command 21 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which measurement is started in the process of S 43 has been 22 seconds or longer. When the variation pattern command 22 is output as instruction information to the CPU 281, the CPU 291 determines whether or not the measurement time at which measurement is started in the process of S 43 has been 32 seconds or longer.

If the measurement time started in the process of S43 is not equal to or longer than the effect time read from the ROM 292 (S52: NO), the CPU 291 ends the sub-process and returns to the main flowchart.
On the other hand, when the measurement time started in the process of S43 is equal to or longer than the effect time read from the ROM 292 (S52: YES), the CPU 291 stops the liquid crystal display 52 with respect to the CPU 281 in S53. A confirmation signal for instructing to confirm and display each displayed special symbol is output.
In S54, the CPU 291 reads the variation processing flag from the RAM 293, turns off the variation processing flag, that is, substitutes “0” for the variation processing flag and stores it again in the RAM 293. The process ends and the process returns to the main flowchart.

Next, the sub-process of the jackpot game process (S6) will be described with reference to FIG.
As shown in FIG. 24, first, in S61, the CPU 291 reads a jackpot flag from the RAM 293, and executes a determination process for determining whether or not the jackpot flag is ON, that is, “1”. If the jackpot flag read from the RAM 293 is OFF (S61: NO), the CPU 291 ends the sub-process and returns to the main flowchart.
On the other hand, when the big hit flag read from the RAM 293 is ON (S61: YES), in S62, the CPU 291 opens the open / close door 59 upward via the open / close door solenoid 59A to open the big winning opening 60.
In S <b> 63, the CPU 291 reads the algebra R indicating the number of continuous opening of the big prize opening 60 from the RAM 293, adds “1” to the algebra R, and stores it again in the RAM 293. When the pachinko machine 1 is started up or reset, “0” is substituted for the algebra R representing the number of times the special winning opening 60 is continuously opened and stored in the RAM 293.

Subsequently, in S64, the CPU 291 executes a determination process for determining whether or not a winning is made to the V port, that is, whether or not a winning detection signal is input from the V switch 60B via the input / output circuit 294.
When a winning detection signal is input from the V switch 60B via the input / output circuit 294 (S64: YES), in S65, the CPU 291 reads the V flag from the RAM 293 and turns on the V flag. That is, “1” is substituted into the V flag and stored in the RAM 293 again. When the pachinko machine 1 is started or reset, the V flag is set to OFF, that is, “0” is substituted for the V flag and stored in the RAM 293.
Thereafter, in S66, the CPU 291 reads an algebra V1 representing the total number of winning prizes from the RAM 293 to the big prize opening 60, adds “1” to the algebra V1, stores it in the RAM 293 again, and then proceeds to the processing of S68. . When the pachinko machine 1 is activated or reset, “0” is substituted into the algebra V1 representing the total number of winning prizes to the big winning opening 60 and stored in the RAM 293.

On the other hand, when the winning detection signal is not input from the V switch 60B via the input / output circuit 294 in S64 (S64: NO), the CPU 291 proceeds to the process of S67. In S67, the CPU 291 executes a determination process for determining whether or not a prize winning port 60 has been won, that is, whether or not a prize detection signal is input from the prize winning switch 60A via the input / output circuit 294.
When a winning detection signal is input from the big winning opening switch 60A via the input / output circuit 294 (S67: YES), the CPU 291 proceeds to the process of S68 after executing the process of S66.
On the other hand, when the winning detection signal is not input from the large winning opening switch 60A via the input / output circuit 294 (S67: NO), the CPU 291 proceeds to the process of S68.

Subsequently, in S68, the CPU 291 reads an algebra V1 representing the total number of winning prizes to the big winning opening 60 from the RAM 293, and whether or not the algebra V1 is less than 10, that is, the winning quantity to the big winning opening 60 is determined. A determination process for determining whether the total number is 9 or less is executed. Note that the upper limit number of winning prizes to the big prize opening 60 when the big prize opening 60 is opened is preset to ten.
If the algebra V1 read from the RAM 293 is less than 10 (S68: NO), in S69, the CPU 291 determines whether or not 29.5 seconds or more have elapsed since the big prize opening 60 was opened. Execute the judgment process. Then, when 29.5 seconds or more have not elapsed since the special winning opening 60 was opened (S69: NO), the CPU 291 executes the processing after S64 again.
On the other hand, when 29.5 seconds or more have elapsed after the special winning opening 60 is opened (S69: YES), the CPU 291 proceeds to the process of S70.
On the other hand, when the algebra V1 read from the RAM 293 in S69 is 10 or more (S68: YES), the CPU 291 proceeds to the process of S70.

Subsequently, in S70, the CPU 291 closes the open / close door 59 via the open / close door solenoid 59A and closes the special winning opening 60.
In S71, the CPU 291 reads an algebra V1 representing the total number of winning prizes from the RAM 293 to the big prize opening 60, substitutes “0” for the algebra V1, and stores it in the RAM 293 again.
Thereafter, in S72, the CPU 291 reads out the V flag from the RAM 293, and executes a determination process for determining whether or not the V flag is ON, that is, whether or not the V opening is won while the big winning opening 60 is opened. When the V flag read from the RAM 293 is ON, that is, when the V flag is “1” (S72: YES), the CPU 291 proceeds to the process of S73.
In S73, the CPU 291 reads from the RAM 293 an algebra R representing the number of consecutive opening of the big prize opening 60, and whether or not the algebra R is larger than “14”, that is, the big prize opening 60 is continuously opened 15 times. Determination processing for determining whether or not has been performed is executed. When the algebra R read from the RAM 293 is “14” or less (S73: NO), the CPU 291 executes the processing from S61 again.
On the other hand, when the algebra R read from the RAM 293 is larger than “14” (S73: YES), the CPU 291 proceeds to the process of S74.
On the other hand, when the V flag read from the RAM 293 in S72 is OFF, that is, when the V flag is “0” (S72: NO), the CPU 291 proceeds to the process of S74.

In S74, the CPU 291 reads the V flag from the RAM 293 and turns off the V flag, that is, substitutes “0” for the V flag and stores it again in the RAM 293.
In S75, the CPU 291 reads an algebra R indicating the number of consecutive opening of the big prize opening 60 from the RAM 293, substitutes “0” for the algebra R, and stores it in the RAM 293 again. That is, the algebra R is initialized.
Further, in S76, the CPU 291 reads the jackpot flag from the RAM 293, turns off the jackpot flag, that is, assigns “0” to the jackpot flag, stores it in the RAM 293 again, terminates the sub-processing, and performs main processing. Return to the flowchart.

  Next, the control processing executed when the CPU 281 of the sub-integrated control board 280 receives each command such as “fluctuation pattern command” representing the fluctuation pattern as instruction information from the CPU 291 of the main control board 290 will be described with reference to FIGS. 27 will be described. Here, the interrupt control process of FIG. 25 operates at regular intervals (for example, every 4 msec) after the power is turned on. 25 to 27 are stored in the ROM 282 and the RAM 283 provided in the sub integrated control board 280, and are executed by the CPU 281.

As shown in FIG. 25, first, in S201, the CPU 281 of the sub-integrated control board 280 receives instruction information such as “variation pattern command”, “final stop symbol instruction”, “confirmation signal” from the CPU 291 of the main control board 290. A determination process for determining whether or not an input has been made is executed.
If instruction information such as “variation pattern command”, “final stop symbol instruction”, “confirmation signal”, or the like is input from the CPU 291 (S201: YES), the CPU 281 proceeds to the process of S202.
In S <b> 202, the CPU 281 stores instruction information such as “variation pattern command”, “final stop symbol instruction”, and “confirmation signal” input from the CPU 291 of the main control board 290 in the RAM 283. In addition, the CPU 281 reads the count value of the effect pattern selection counter 283A when the variation pattern command is input from the CPU 291 and stores the count value in the RAM 283.
Subsequently, in S203, the CPU 281 reads the instruction information from the RAM 283 again, and executes a determination process for determining whether the instruction information is a “confirmation signal”.

If the instruction information is a “confirmation signal” (S203: YES), the CPU 281 proceeds to the process of S204. In S204, the CPU 291 outputs (instructs) the “confirmation signal” as display instruction information to the CPU 261, and ends the process.
On the other hand, if the instruction information is not a “confirmation signal” (S203: NO), in S205, the CPU 281 reads the count value of the effect pattern selection counter 283A stored in the RAM 283 in S202 from the RAM 283 again, and this count value. Is substituted into the effect pattern algebra E and stored in the parameter storage area 283C.

  In S206, the CPU 281 reads out the “variation pattern command” and the “final stop symbol instruction” as the instruction information from the RAM 283, and also reads the effect pattern algebra E from the parameter storage area 283C. Then, the effect pattern algebra E is read as the “effect pattern count value” in the effect pattern selection table 74 (see FIG. 12), and the “effect pattern command” of the corresponding effect pattern is read out and output to the CPU 261 of the effect display board 260 (instructions). And store it in the RAM 283 as an effect pattern command of display instruction information.

  For example, the “variation pattern command” read from the RAM 283 is “1”, the “final stop symbol instruction” is “123” for notifying complete loss, and the effect pattern algebra E read from the parameter storage area 283C is “0”. In any case of “13”, the CPU 281 stores “1A” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260.

  Further, the “variation pattern command” read from the RAM 283 is “11”, the “final stop symbol information” is “787” for reporting reach loss, and the effect pattern algebra E read from the parameter storage area 283C is “12”. In this case, the CPU 281 stores “11B” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, the “variation pattern command” read from the RAM 283 is “12”, the “final stop symbol information” is “212” for notifying reach loss, and the effect pattern algebra E read from the parameter storage area 283C is “9”. In this case, the CPU 281 stores “12A” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260.

  Also, the “variation pattern command” read from the RAM 283 is “21”, the “final stop symbol information” is “333” for notifying the big hit, and the effect pattern algebra E read from the parameter storage area 283C is “5”. In this case, the CPU 281 stores “21B” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260. Further, the “variation pattern command” read from the RAM 283 is “22”, the “final stop symbol information” is “666” for notifying the big hit, and the effect pattern algebra E read from the parameter storage area 283C is “1”. In this case, the CPU 281 stores “22A” in the RAM 283 as an effect pattern command to be output (instructed) to the CPU 261 of the effect display board 260.

Thereafter, in S207, the CPU 281 reads out the “effect pattern command” and the “final stop symbol information” from the RAM 283, and outputs (instructs) to the CPU 261 of the effect display board 260.
For example, when “1A” is read as the “effect pattern command” from the RAM 283, the CPU 281 outputs the effect pattern command “1A” and “final stop symbol information” to the CPU 261 as display instruction information. Further, when “11B” is read as the “effect pattern command” from the RAM 283, the effect pattern command “11B” and “final stop symbol information” are output to the CPU 261 as display instruction information.

  Subsequently, in S208, the CPU 281 reads again from the RAM 283 whether or not the effect pattern command output to the CPU 261 is a complete loss effect display pattern, that is, the “effect pattern command” output to the CPU 261. Is executed to determine whether or not “1A” is “1A”. When the “effect pattern command” output to the CPU 261 is “1A” (S208: YES), the CPU 281 ends the sub-process.

On the other hand, when the “effect pattern command” output to the CPU 261 is not “1A” (S208: NO), the CPU 281 proceeds to the process of S209.
In S209, the CPU 281 reads the “notice flag” from the RAM 283, assigns “1” to the “notice flag”, and stores it in the RAM 283 again, that is, sets the “notice flag” to ON. When the pachinko machine 1 is started up and reset, “0” is assigned to the “notice flag” and stored in the RAM 283. That is, the “notice flag” is set to OFF.
In S210, the CPU 281 executes a sub-process (see FIG. 26) of “time chart selection process” described later.
Subsequently, in S211, the CPU 281 executes a sub-process (see FIG. 27) of “notice instruction process” described later, and then ends the process.

On the other hand, if instruction information such as “variation pattern command”, “final stop symbol instruction”, “confirmation signal” or the like is not input from the CPU 291 in S201 (S201: NO), the CPU 281 proceeds to the process of S212. .
In S <b> 212, the CPU 281 reads the “notice flag” from the RAM 283 and executes a determination process for determining whether the “notice flag” is ON, that is, “1”. When the “notice flag” read from the RAM 283 is “1” (S212: YES), the CPU 281 executes the processing from S211 onward.
On the other hand, when the “notice flag” read from the RAM 283 is “0” (S212: NO), the CPU 281 ends the process.

Next, the sub-process of the “time chart selection process” in S210 will be described with reference to FIG.
As shown in FIG. 26, in S221, the CPU 281 reads the count value of the notice pattern selection counter 283B, assigns this count value to the notice pattern algebra G, and stores it in the parameter storage area 283C of the RAM 283.
Note that the CPU 281 reads the count value of the notice pattern selection counter 283B when the variation pattern command is input from the CPU 291 in the process of S202, and substitutes this count value into the notice pattern algebra G to store the parameter storage area of the RAM 283. You may make it memorize | store in 283C.

In S222, the CPU 281 reads the notice pattern algebra G from the parameter storage area 283C. Then, this notice pattern algebra G is set to “count value” from the notice pattern selection table 75 (see FIG. 13), and the lower 4 digits of the corresponding 8-bit notice timing data, that is, the 4-bit value from bit 0 to bit 3 is read. It is stored in the RAM 283 as a “preliminary bit string” of binary 4 bits.
For example, when the notice pattern algebra G is “5”, the CPU 281 stores “0111” in the RAM 283 as a “notice bit string” of binary 4 bits. When the notice pattern algebra G is “11”, the CPU 281 stores “1101” in the RAM 283 as a “notice bit string” of binary 4 bits.

In S223, the CPU 281 reads the effect pattern command output to the CPU 261 from the RAM 283, reads the notice time chart corresponding to the effect pattern command from the ROM 282, and sets each notice time T1 to T4 or each notice time T11 to T14. Store in the RAM 283.
For example, when the effect pattern command read from the RAM 283 is any of the effect pattern commands 11A, 11B, 21A, and 21B, the CPU 281 reads the notice time chart 77 from the ROM 282, and each notice time T1, T2, and T3. , T4 (seconds) is stored in the RAM 283 as the advance notice timing for making the advance notice.
When the effect pattern command read from the RAM 283 is one of the effect pattern commands 12A, 12B, 22A, 22B, the CPU 281 reads the notice time chart 78 from the ROM 282, and each notice time T11, T12, T13. , T14 (seconds) is stored in the RAM 283 as the advance notice timing for making the advance notice.

In step S <b> 224, the CPU 281 starts measuring the effect display time corresponding to the effect pattern command output to the CPU 261, i.e., the change times of the plurality of change symbols displayed on the liquid crystal display 52.
Subsequently, in S225, the CPU 281 reads the notice number algebra N from the RAM 283, assigns “1” to the notice number algebra N and stores it again in the RAM 283, ends the sub-process, and returns to the main flowchart.

Next, the sub-process of the “notice instruction process” in S211 will be described with reference to FIG.
As shown in FIG. 27, in S231, the CPU 281 reads the notice frequency algebra N from the RAM 283, and the measurement time when measurement is started in the process of S224 has passed the notice time of the Nth notice timing stored in S223. Judgment processing is performed to determine whether or not.
For example, when the notice algebra number N read from the RAM 283 is “1” and the notice times stored in S223 are T1, T2, T3, and T4, the measurement time when the measurement is started in the process of S224 is It is determined whether or not a notice time T1, which is one notice timing, has elapsed.
When the notice algebra number N read from the RAM 283 is “2” and the notice times stored in S223 are T1, T2, T3, and T4, the measurement time when the measurement is started in the process of S224 is 2. It is determined whether or not a notice time T2, which is a notice timing, has elapsed.
Further, when the notice algebra number N read from the RAM 283 is “3” and the notice times stored in S223 are T11, T12, T13, and T14, the measurement time when the measurement is started in the process of S224 is 3. It is determined whether or not a notice time T13 that is a notice timing has elapsed.
Further, when the notice algebra number N read from the RAM 283 is “4” and the notice times stored in S223 are T11, T12, T13, and T14, the measurement time when the measurement is started in the process of S224 is 4. It is determined whether or not a notice time T14 that is a notice timing has elapsed.

If the notice time of the Nth notice timing has not elapsed (S231: NO), the CPU 281 ends the sub-process and returns to the main flowchart.
On the other hand, when the notice time of the Nth notice timing has elapsed (S231: YES), the CPU 281 proceeds to the process of S232.
In S232, the CPU 281 reads the notice number algebra N from the RAM 283, and reads “comparison 4 bits” of binary 4 bits corresponding to the “Nth notice timing” from the comparison 4-bit table 76 stored in the ROM 282. Then, the CPU 281 reads out a “preliminary bit string” of binary 4 bits from the RAM 283 and calculates a logical product with this “comparison 4 bits”.

For example, when the notice algebra number N read from the RAM 283 is “1” and the “notice bit string” of binary 4 bits is “1011”, the CPU 281 sets the “first notice timing” from the comparison 4-bit table 76. Read out "0001" which is the "comparison 4 bits" of the corresponding binary 4 bits. Then, the CPU 281 calculates a logical product of “1011” and “0001”, and calculates a binary number of “0001”.
When the notice algebra number N read from the RAM 283 is “2” and the “notice bit string” of binary 4 bits is “1011”, the CPU 281 sets “second notice timing” from the comparison 4-bit table 76. Read out "0010" which is the "comparison 4 bits" of the corresponding binary 4 bits. Then, the CPU 281 calculates a logical product of “1011” and “0010”, and calculates a binary number of “0010”.
When the notice algebra number N read from the RAM 283 is “3” and the “notice bit string” of binary 4 bits is “1011”, the CPU 281 sets the “third notice timing” from the comparison 4-bit table 76. Read out “0100” which is the “comparison 4 bits” of the corresponding binary 4 bits. Then, the CPU 281 calculates a logical product of “1011” and “0100”, and calculates a binary number “0000”.
When the notice algebra number N read out from the RAM 283 is “4” and the “notice bit string” of binary 4 bits is “1011”, the CPU 281 sets the “fourth notice timing” from the comparison 4-bit table 76. Read “1000” which is the “comparison 4 bits” of the corresponding binary 4 bits. Then, the CPU 281 calculates a logical product of “1011” and “1000”, and calculates a binary number of “1000”.

Subsequently, in S233, the CPU 281 executes determination processing for determining whether the logical product value calculated in S232 is “0000”, that is, “0”. When the logical product value calculated in S232 is other than “0”, that is, in any of “0001”, “0010”, “0100”, and “1000” (S233: NO), The CPU 281 proceeds to the process of S234.
In S234, the CPU 281 reads the notice number algebra N from the RAM 283 and stores the “Nth notice timing” output to the CPU 261 of the effect display board 260 in the RAM 283 as the notice determination timing. For example, when the notice algebra N read from the RAM 283 is “1”, the “first notice timing” is stored in the RAM 283 as the notice determination timing. When the notice algebra N read from the RAM 283 is “2”, the “second notice timing” is stored in the RAM 283 as the notice determination timing.
In S235, the CPU 281 displays a display requesting the CPU 261 of the effect display board 260 to press the switch button 9A within a predetermined time (for example, within about 1 to 3 seconds). An input request display instruction is output.

Subsequently, in S236, the CPU 281 determines whether or not the switch button 9A has been pressed within a predetermined time (for example, within about 1 to 3 seconds) after outputting the input request display instruction. Execute the process. When the switch button 9A is pressed within a predetermined time (S236: YES), the CPU 281 proceeds to the process of S237.
In S237, the CPU 281 reads each notice determination timing stored in the RAM 283.
In S238, the CPU 281 outputs a notice instruction for notifying the read notice determination timing to the CPU 261 of the effect display board 260. For example, when the notice determination timings read from the RAM 283 are “first notice timing” and “second notice timing”, the CPU 281 notifies the CPU 261 of “first notice timing” and “second notice timing”. Output instructions.
Thereafter, in S239, the CPU 281 clears each notice determination timing stored in the RAM 283, and then proceeds to S240. Accordingly, the RAM 283 is in a state where no notice determination timing is stored.

On the other hand, when the logical product calculated in S233 is “0”, ie, “0000” (S233: YES), the CPU 281 proceeds to the process of S240.
If the switch button 9A is not pressed within the predetermined time in S236 (S236: NO), the CPU 281 proceeds to S240.

In S240, the CPU 281 reads the notice number algebra N from the RAM 283, adds “1” to the notice number algebra N, and stores it in the RAM 283 again.
In S241, the CPU 281 reads the notice number algebra N from the RAM 283, and executes a determination process for determining whether the notice number algebra N is less than 5. If the notice number algebra N is less than 5, that is, any one of 1, 2, 3, and 4 (S241: YES), the CPU 281 ends the sub-process and returns to the main flowchart. .
On the other hand, when the notice number algebra N is 5 or more, that is, when it is 5 (S241: NO), in S242, the CPU 281 reads the "notice flag" from the RAM 283, and sets "0" to this "notice flag". ”And stored again in the RAM 283, that is, after setting the“ notice flag ”to OFF, the sub-process is terminated and the process returns to the main flowchart.

Next, control processing executed when the CPU 261 of the effect display board 260 configured as described above receives effect display instruction information from the CPU 281 of the sub-integrated control board 280 will be described with reference to FIGS. 28 to 38. To do.
As shown in FIG. 28, when the display instruction information is input from the CPU 281 of the sub-integrated control board 280 in S301, the CPU 261 stores the effect pattern command and the symbol data of the final stop symbol constituting the display instruction information in the RAM 263. To remember. At the same time, the CPU 261 reads the count value of the character table selection counter 263A, substitutes it in the character table selection algebra L, and stores it in the RAM 263.
In step S <b> 302, the CPU 261 reads out the effect pattern command from the RAM 263, and executes determination processing for determining whether the effect pattern command is a complete loss effect pattern command. That is, the CPU 261 executes determination processing for determining whether or not the effect pattern command read from the RAM 263 is “1A”. When the effect pattern command read from the RAM 263 is “1A” (S302: YES), in S303, the CPU 261 executes a sub-process of “completely losing display process”.
On the other hand, when the effect pattern command read from the RAM 263 is not “1A” (S302: NO), the CPU 261 proceeds to the process of S304.

Subsequently, in S304, the CPU 261 reads the effect pattern command again from the RAM 263, and executes a determination process for determining whether the effect pattern command is a reach-losing effect pattern. That is, the CPU 261 executes determination processing for determining whether or not the effect pattern command read from the RAM 263 is any one of “11A, 11B, 12A, and 12B”. If the effect pattern command read from the RAM 263 is any one of “11A, 11B, 12A, and 12B” (S304: YES), in S305, the CPU 261 performs sub-processing of “los reach display processing”. Execute.
On the other hand, when the effect pattern command read from the RAM 263 is not any of “11A, 11B, 12A, 12B” (S304: NO), the CPU 261 proceeds to the process of S306.

In S <b> 306, the CPU 261 again reads out the effect pattern command from the RAM 263, and executes determination processing for determining whether the effect pattern command is a winning effect pattern. That is, the CPU 261 executes determination processing for determining whether or not the effect pattern command read from the RAM 263 is any one of “21A, 21B, 22A, and 22B”. When the effect pattern command read from the RAM 263 is any one of “21A, 21B, 22A, 22B” (S306: YES), in S307, the CPU 261 performs a sub-process of “winning display process”. After execution, the process is terminated.
On the other hand, when the effect pattern command read from the RAM 263 is not any of “21A, 21B, 22A, 22B” (S306: NO), the CPU 261 ends the process without executing the sub-process of S307. To do.

Next, sub-processing of “completely losing display processing” (S303) will be described with reference to FIG.
As shown in FIG. 29, in S311, the CPU 261 reads the effect pattern command again from the RAM 263, and the effect pattern command is stored in the effect display pattern table storage area 262A of the ROM 262 in the “effect pattern display table 81”. As the “command”, the “effect display pattern” corresponding to the “effect pattern command” in the effect display pattern table 81 is read out and stored in the RAM 263.
For example, the CPU 261 stores, in the RAM 263, the complete loss of moving image data for about 5 seconds as the “effect display pattern” corresponding to the “effect pattern command 1 A” of the effect display pattern table 81.
In S <b> 312, the CPU 261 starts changing display of the first, second, and third symbols in three columns that change in the vertical direction on the left side, right side, and center on the liquid crystal display 52.
Subsequently, in S313, the CPU 261 starts a first predetermined time (for example, about 1.5 seconds) stored in advance in the ROM 262 after starting the variable display of the first, second, and third symbols. In this case, the symbol data of the last stop symbol constituting the display instruction information is read from the RAM 263, and the first symbol of the symbol data is stopped and displayed as the first symbol in the left column of the liquid crystal display 52. Further, the CPU 261 continues the variable display of the second and third symbols.
For example, when the last stop symbol data constituting the display instruction information read from the RAM 263 is “687”, the CPU 261 stops displaying the symbol “6” as the first symbol in the left column of the liquid crystal display 52. To do.

In S314, the CPU 261 starts a variable display of each of the first, second, and third symbols, and then a second predetermined time (for example, about 3.5 seconds) stored in advance in the ROM 262 has elapsed. In this case, the symbol data of the final stop symbol constituting the display instruction information is read from the RAM 263, and the third symbol of the symbol data is stopped and displayed as the second symbol in the right column of the liquid crystal display 52. Further, the CPU 261 stops and displays the first symbol in the left column of the liquid crystal display 52, and continues the variable display of the third symbol in the center.
For example, when the symbol data constituting the production instruction information read from the RAM 263 is “687”, the CPU 261 stops and displays the symbol “7” as the second symbol in the right column of the liquid crystal display 52.
In S315, the CPU 261 starts when the third predetermined time (for example, about 5 seconds) stored in advance in the ROM 262 has elapsed since the start of the variable display of the first, second, and third symbols. Reads out the symbol data of the last stop symbol constituting the display instruction information from the RAM 263, and stops and displays the second symbol of the symbol data as the third symbol at the center of the liquid crystal display 52. As a result, the first, second, and third symbols are stopped and displayed as completely lost symbols.
For example, when the symbol data constituting the production instruction information read from the RAM 263 is “687”, the CPU 261 stops and displays the symbol “8” as the third symbol in the center of the liquid crystal display 52.

In step S <b> 316, the CPU 261 executes a determination process for determining whether a confirmation signal is input from the CPU 281 of the sub-integrated control board 280. The CPU 291 stores the display time “about 5 seconds” of the fluctuation pattern “1” output to the CPU 281 in the ROM 292 in advance. Is output. In addition, when this confirmation signal is input from the CPU 291, the CPU 281 outputs a confirmation signal that instructs the CPU 261 to stop the confirmation of the first, second, and third symbols displayed on the liquid crystal display 52. Output.
If no confirmation signal is input from the CPU 281 (S316: NO), the CPU 261 continues to display the moving image in S317. On the other hand, when a confirmation signal is input from the CPU 281 (S316: YES), a confirmation stop display of each of the first, second, and third symbols for notifying the loss displayed on the liquid crystal display 52 in S318 is displayed. Then, the sub-process is terminated and the process returns to the main flowchart.

Next, the sub-process of the “los reach display process” in S305 will be described with reference to FIGS.
As shown in FIG. 30, in S321, the CPU 261 reads out the effect pattern command from the RAM 263 again, and the effect pattern command is stored in the effect display pattern table storage area 262A of the ROM 262 (see FIG. 16). The “effect display pattern” corresponding to the “effect pattern command” in the effect display pattern table 81 is read out and stored in the RAM 263.

For example, when the effect pattern command read from the RAM 263 is “11A”, the CPU 261 uses the “display start pattern” in the effect display pattern table 81 for about 20 seconds of reach-losing video data “change start → first notice timing → "First symbol stop (second notice timing)-> third notice timing-> second symbol stop (fourth notice timing)-> reach A effect-> third symbol stop-> reach loss display (20 seconds)" is stored in the RAM 263.
Further, when the effect pattern command read from the RAM 263 is “11B”, the CPU 261 displays the video data “change start → first notice timing” of about 20 seconds as the “effect display pattern” in the effect display pattern table 81. "First symbol stop (second notice timing)-> third notice timing-> second symbol stop (fourth notice timing)-> reach B effect-> third symbol stop-> reach loss display (20 seconds)" is stored in the RAM 263.

In S322, the CPU 261 causes the liquid crystal display 52 to display each of the first and second columns in the three columns that change in the vertical direction on the left side, the right side, and the center on the liquid crystal display 52 based on the moving image data of the “effect display pattern” stored in the RAM 263.・ Start the variable display of the 3rd symbol.
Subsequently, in S323, the CPU 261 performs a sub-process (see FIG. 31) of “notice display process 1” described later, and then proceeds to a process in S324.
Subsequently, in S324, the CPU 261 executes a determination process for determining whether or not the reach display of reach A is performed.
In the case of reach A effect display (S324: YES), in S325, the CPU 261 proceeds to the process of S331 after executing the sub-process of the reach A display process.

On the other hand, when the effect display is not reach A (S324: NO), the CPU 261 proceeds to the process of S326. In S <b> 326, the CPU 261 executes a determination process for determining whether or not reach B effect display.
In the case of reach B effect display (S326: YES), in S327, the CPU 261 executes the sub-process of the reach B display process, and then proceeds to the process of S331.
On the other hand, when the effect display is not reach B (S326: NO), the CPU 261 proceeds to the process of S328. In S <b> 328, the CPU 261 executes a determination process for determining whether or not reach C effect display.
In the case of the effect display of reach C (S328: YES), in S329, the CPU 261 proceeds to the process of S331 after executing the sub-process of the reach C display process.
On the other hand, if it is not the effect display of reach C (S328: NO), in S330, the CPU 261 proceeds to the process of S331 after executing the sub process of the reach D display process.

In S331, the CPU 261 reads the symbol data of the final stop symbol constituting the display instruction information from the RAM 263, stops and displays the final stop symbol in the center of the display screen, notifies reach loss, and then proceeds to the processing of S332. .
For example, when the symbol data constituting the production instruction information read from the RAM 263 is “767”, the CPU 261 stops and displays the reach loss symbol “767” in the center of the screen of the liquid crystal display 52.

Subsequently, in S <b> 332, the CPU 261 executes a determination process for determining whether or not a confirmation signal is input from the CPU 281 of the sub-integrated control board 280. The CPU 291 stores the display times “about 20 seconds” and “about 30 seconds” of the variation patterns “11” and “12” output to the CPU 281 in the ROM 292 in advance, and the display times “about 20”. When “second” and “about 30 seconds” have elapsed, a confirmation signal is output to the CPU 281. In addition, when this confirmation signal is input from the CPU 291, the CPU 281 outputs a confirmation signal that instructs the CPU 261 to stop the confirmation of the first, second, and third symbols displayed on the liquid crystal display 52. Output.
If no confirmation signal is input from the CPU 281 (S332: NO), the CPU 261 continues to display the moving image in S333. On the other hand, when a confirmation signal is input from the CPU 281 (S332: YES), a confirmation stop display of each of the first, second, and third symbols for notifying reach loss displayed on the liquid crystal display 52 in S334 is displayed. Then, the sub-process is terminated and the process returns to the main flowchart.
For example, when the symbol data of the final stop symbol constituting the effect instruction information read from the RAM 263 is “767”, the CPU 261 displays the symbol “767” for notifying the reach loss on the liquid crystal display 52 with fixed stop display.

Next, the sub-process of “notice display process 1” in S323 will be described with reference to FIG.
As shown in FIG. 31, in S341, the CPU 261 waits for the first notice timing time stored in advance in the ROM 262 after starting the variable display of the first, second and third symbols in the three columns. (S341: NO). For example, when the effect pattern command is “11A” or “11B”, the notice time is T1 seconds, and when the effect pattern command is “12A” or “12B”, the notice time is T11 seconds (see FIG. 15). ).
When the time of the first notice timing stored in advance in the ROM 262 after the start of the variable display of the first, second, and third symbols in the three columns is reached (S341: YES), the CPU 261 proceeds to S342. Move on to processing. In S342, the CPU 261 performs a sub-process (see FIG. 32) of “notice character display process” described later, and then proceeds to a process in S343.

Subsequently, in S343, the CPU 261 starts the variable display of each of the first, second, and third symbols and then stores in advance in the ROM 262 for a fourth predetermined time (for example, the effect pattern command is “11A” or “11B”. In this case, the time is T2 seconds, and when the production pattern command is “12A” or “12B”, the time is T12 seconds, and the times T2 and T12 are also the notice times T2 and T12, respectively. .)), The symbol data of the last stop symbol constituting the display instruction information is read from the RAM 263, and the first symbol of the symbol data is stopped and displayed as the first symbol in the left column of the liquid crystal display 52. To do. Further, the CPU 261 continues the variable display of the second and third symbols.
For example, when the symbol data of the final stop symbol constituting the display instruction information read from the RAM 263 is “767”, the CPU 261 stops displaying the symbol “7” as the first symbol in the left column of the liquid crystal display 52. To do.

In S344, the CPU 261 performs the sub-process of “notice character display process” in S342, and then proceeds to S345.
In S345, the CPU 261 waits for the time of the third notice timing stored in advance in the ROM 262 after starting the variable display of the first, second, and third symbols in the three columns (S345: NO). For example, when the effect pattern command is “11A” or “11B”, the notice time is T3 seconds, and when the effect pattern command is “12A” or “12B”, the notice time is T13 seconds (see FIG. 15). ).
When the time of the third notice timing stored in advance in the ROM 262 after starting the variable display of each of the first, second, and third symbols in the three columns is reached (S345: YES), the CPU 261 proceeds to S346. Move on to processing.
In S346, the CPU 261 proceeds to the process of S347 after executing the sub-process of the “notice character display process” of S342.

Subsequently, in S347, the CPU 261 starts a variable display of each of the first, second, and third symbols and then stores in advance in the ROM 262 for a fifth predetermined time (for example, the effect pattern command is “11A” or “11B”. In this case, the time is T4 seconds, and when the production pattern command is “12A” or “12B”, the time is T14 seconds, and the times T4 and T14 are also the notice times T4 and T14, respectively. .)), The last stop symbol data constituting the display instruction information is read from the RAM 263, and the third symbol of the symbol data is stopped and displayed as the second symbol in the right column of the liquid crystal display 52. To do. Further, the CPU 261 stops and displays the first symbol in the left column of the liquid crystal display 52, and continues the variable display of the third symbol in the center.
For example, when the symbol data constituting the effect instruction information read from the RAM 263 is “767”, the CPU 261 stops and displays the symbol “7” as the second symbol in the right column of the liquid crystal display 52.
In S348, after executing the sub-process of “notice character display process” in S342, the CPU 261 ends the sub-process, returns to the sub-process of “losing reach display process”, and proceeds to the process of S324.

Next, the sub-process of “notice character display process” in S342, S344, S346, and S348 will be described with reference to FIG.
As shown in FIG. 32, in S351, the CPU 261 instructs to display a display requesting the pressing of the switch button 9A within a predetermined time (for example, within about 1 to 3 seconds). A determination process for determining whether or not an input request display instruction is input from the CPU 281 of the sub-integrated control board 280 is executed.
When the input request display instruction is not input from the CPU 281 (S351: NO), the CPU 261 ends the sub-process and returns to the sub-process of “preliminary display process 1”.
On the other hand, when the input request display instruction is input from the CPU 281 (S351: YES), the CPU 261 proceeds to the process of S352. In S352, the CPU 261 reads out the button press request display image data indicating that the switch button 9A is to be pressed from the ROM 262 and displays it on the liquid crystal display (LCD) 52 (see FIG. 35B, etc.). .

In S353, the CPU 261 executes determination processing for determining whether or not a notice instruction is input within a predetermined time from the display of the button press request.
If no notice instruction is input within a predetermined time from the display of the button press request (S353: NO), the CPU 261 erases the display of the button press request, ends the sub-process, The process returns to the sub-process of “Preliminary display process 1”.
On the other hand, when a notice instruction is input within a predetermined time from the display of the button press request (S353: YES), the CPU 261 stores the notice instruction in the RAM 263 and erases the button press request display. The process proceeds to S354.

  In S <b> 354, the CPU 261 reads the character table selection algebra L from the RAM 263 and reads each notice determination timing notified by the notice instruction from the RAM 263. Then, the numerical value of the character table selection algebra L is set as the “count value” of the character table 82, and each notified notice determination timing is used as each notice timing of the character table 82 and corresponds to each notified notice determination timing. Each notice character is read. Then, the CPU 261 displays each read notice character so as to descend downward from the upper end portion of the display screen of the liquid crystal display 52, and after stopping display on the lower end portion of the display screen, the sub-processing is terminated. Then, the process returns to the sub-process of “preliminary display process 1”.

For example, when the value of the character table selection algebra L read from the RAM 263 is “5” and the notified notice determination timings read from the RAM 263 are “first notice timing” and “second notice timing”, the CPU 261. Reads the notice character A and the notice character B, displays the notice characters A and B so as to descend downward from the upper end portion of the display screen of the liquid crystal display 52, and stops and displays them on the lower end portion of the display screen. .
When the numerical value of the character table selection algebra L read from the RAM 263 is “8” and the notified notice determination timings read from the RAM 263 are “first notice timing” and “second notice timing”, the CPU 261. Reads the notice character D and the notice character C, displays the notice characters D and C so as to descend downward from the upper end portion of the display screen of the liquid crystal display 52, and stops and displays them on the lower end portion of the display screen. .

Next, the sub-process of the “winning display process” (S307) in S307 will be described with reference to FIGS.
As shown in FIG. 33, in S361, the CPU 261 reads the effect pattern command from the RAM 263 again, and the effect pattern command is stored in the effect display pattern table storage area 262A of the ROM 262 (see FIG. 16). The “effect display pattern” corresponding to the “effect pattern command” in the effect display pattern table 81 is read out and stored in the RAM 263.

For example, when the effect pattern command read from the RAM 263 is “21A”, the CPU 261 uses the “display effect pattern” in the effect display pattern table 81 as the “effect display pattern” for about 22 seconds, and starts the change start → first notice timing. The first symbol stop (second notice timing) → third notice timing → second symbol stop (fourth notice timing) → reach A effect → third symbol stop → winning display (22 seconds) ”is stored in the RAM 263.
Further, when the effect pattern command read from the RAM 263 is “21B”, the CPU 261 uses the “effect display pattern” of the second effect display pattern table 77 as the “effect display pattern” for about 22 seconds of the reach reach moving image data “change start → first Preliminary timing → first symbol stop (second preliminary timing) → third preliminary timing → second symbol stop (fourth preliminary timing) → reach B effect → third symbol stop → winning display (22 seconds) ”is stored in RAM 263 To do.
In S362, the CPU 261 executes the process in S322.

Subsequently, in S363, the CPU 261 performs a sub-process (see FIG. 32) of “notice display process 2” described later, and then proceeds to a process in S364.
In S364 to S370, the CPU 261 executes the processes of S324 to S330.
Subsequently, in S371, the CPU 261 reads the symbol data of the final stop symbol constituting the display instruction information from the RAM 263, stops and displays the final stop symbol in the center of the display screen, notifies the winning, and then proceeds to the processing of S372. To do.
For example, when the symbol data of the final stop symbol constituting the effect instruction information read from the RAM 263 is “777”, the CPU 261 displays the symbol “777” for notifying the jackpot acquisition on the liquid crystal display 52 with fixed stop display. .

In S372 through S374, the CPU 261 executes the processes in S332 through S334.
Thereafter, in S375, the CPU 261 displays a predetermined jackpot game effect such as displaying the number of consecutive opening of the big winning opening 60, and then ends the sub-process and returns to the main flowchart.

Next, the sub-process of “notice display process 2” in S363 will be described with reference to FIG.
As shown in FIG. 34, in S381, the CPU 261 waits for the time of the first notice timing stored in advance in the ROM 262 after starting the variable display of the first, second, and third symbols in the three columns. (S381: NO). For example, when the effect pattern command is “21A” or “21B”, the notice time is T1 seconds, and when the effect pattern command is “22A” or “22B”, the notice time is T11 seconds (see FIG. 15). ).
If the time of the first notice timing stored in advance in the ROM 262 after the start of the variable display of the first, second, and third symbols in the three columns is reached (S381: YES), the CPU 261 proceeds to S382. Move on to processing. In S382, the CPU 261 proceeds to the process of S383 after executing the sub-process (see FIG. 32) of the “notice character display process” in S342.

Subsequently, in S383, the CPU 261 starts the variable display of the first, second, and third symbols and then stores in advance in the ROM 262 for a sixth predetermined time (for example, the effect pattern command is “21A” or “21B”. In the case of time T2 seconds, and in the case where the production pattern command is “22A” or “22B”, time T12 seconds)), the final stop constituting the display instruction information from the RAM 263 The symbol design data is read out, and the first symbol of the symbol data is stopped and displayed as the first symbol in the left column of the liquid crystal display 52. Further, the CPU 261 continues the variable display of the second and third symbols.
For example, when the symbol data of the final stop symbol constituting the display instruction information read from the RAM 263 is “777”, the CPU 261 stops displaying the symbol “7” as the first symbol in the left column of the liquid crystal display 52. To do.

In S384, the CPU 261 performs the sub-process of “notice character display process” in S342, and then proceeds to S385.
In S385, the CPU 261 waits for the time of the third notice timing stored in advance in the ROM 262 after starting the variable display of the first, second, and third symbols in the three columns (S385: NO). For example, when the effect pattern command is “21A” or “21B”, the notice time is T3 seconds, and when the effect pattern command is “22A” or “22B”, the notice time is T13 seconds (see FIG. 15). ).
When the time of the third notice timing stored in advance in the ROM 262 after the start of the variable display of the first, second, and third symbols in the three columns is reached (S385: YES), the CPU 261 proceeds to S386. Move on to processing.
In S386, the CPU 261 proceeds to the process of S387 after executing the sub-process of the “notice character display process” of S342.

Subsequently, in S387, the CPU 261 starts the variable display of each of the first, second, and third symbols and then stores in advance in the ROM 262 for a seventh predetermined time (for example, the effect pattern command is “21A” or “21B”. In the case of time T4 seconds, and in the case where the production pattern command is “22A” or “22B”, time T14 seconds), the final stop constituting the display instruction information from the RAM 263 After the symbol design data is read out and the third symbol of the symbol data is stopped and displayed as the second symbol in the right column of the liquid crystal display 52, the process proceeds to S388. Further, the CPU 261 stops and displays the first symbol in the left column of the liquid crystal display 52, and continues the variable display of the third symbol in the center.
For example, when the symbol data constituting the production instruction information read from the RAM 263 is “777”, the CPU 261 stops and displays the symbol “7” as the second symbol in the right column of the liquid crystal display 52.
In S388, the CPU 261 executes the sub-process of “notice character display process” in S342, ends the sub-process, returns to the sub-process of “winning display process”, and proceeds to the process of S364.

  Next, the CPU 281 of the sub-integrated control board 280 selects the jackpot effect pattern command “22B” in the process of S206, and stores “1011” in the RAM 283 as a “notice bit string” of binary 4 bits in the process of S222. After the storage, the effect display instruction information including the effect pattern command “22B” and the final stop symbol “777” is output to the CPU 261 of the effect display board 260, and when the CPU 261 receives the effect display instruction information, the character table selection counter 263A. An example of the variable display displayed on the display screen of the liquid crystal display 52 when the count value “5” is substituted into the character table selection algebra L and stored in the RAM 263 will be described with reference to FIGS.

As shown in FIG. 35A, first, variable display of the first, second, and third symbols in the three columns is started.
Then, as shown in FIG. 35 (B), the notice time T11 of the first notice timing corresponding to the effect pattern command “22B” after starting the variable display of the first, second, and third symbols in the three columns. When the second (see FIG. 15) is reached, the CPU 281 requests the CPU 261 to press the switch button 9A in response to the bit 0 value “1” of the first digit of the binary notice bit string “1011”. Is displayed within a predetermined time (for example, within about 1 to 3 seconds), and an input request display instruction is output. The message “Please press the button” and a request display 85 in which a red switch button is surrounded by a substantially square frame are displayed on the right side, and a request to press the switch button 9A is displayed. Since the switch button 9A is not pressed within a predetermined time (for example, within about 1 to 3 seconds), all the notice determination timings stored in the RAM 283 from the CPU 281 to the CPU 261 (the notice decision timing is “ Is not outputted, and the notice character A corresponding to the first notice timing is not displayed.
Further, the variable display of the first, second, and third symbols in the three columns is continued.

Subsequently, as shown in FIG. 35 (C), the first symbol stop time T12 seconds (FIG. 15) corresponding to the effect pattern command “22B” after the variable display of the first, second, and third symbols is started. (7) is stopped and displayed as the first symbol in the left column of the liquid crystal display 52. Further, the variable display of the second and third symbols is continued.
Also, when the first symbol stop time T12 seconds (notice time T12 seconds) is reached, the CPU 281 sends a value “1” of the second digit bit 0 of the binary notice bit string “1011” to the CPU 261. An input request display instruction is output to instruct that the display requesting the pressing of the switch button 9A is limited to a predetermined time (for example, within about 1 to 3 seconds), and the liquid crystal display At the upper end of the display screen 52, the description "Please press the button" and a request display 85 in which a red switch button is surrounded by a substantially square frame are displayed on the right side of the display screen, and the switch button 9A is pressed. Request is displayed. Since the switch button 9A is not pressed within a predetermined time (for example, within about 1 to 3 seconds), all the notice determination timings stored in the RAM 283 from the CPU 281 to the CPU 261 (the notice decision timing is “ The notice instruction for notifying the first notice timing and the second notice timing is not output, and the notice characters A and B corresponding to the first notice timing and the second notice timing are not displayed.

  Then, as shown in FIG. 36 (D), the notice time T13 of the third notice timing corresponding to the effect pattern command “22B” after starting the variable display of the first, second, and third symbols in the three columns. When the second (see FIG. 15) is reached, an input request display instruction is not output from the CPU 281 to the CPU 261 corresponding to the bit 2 value “0” of the third digit of the binary notice bit string “1011”. The display 85 is not displayed. Further, the CPU 281 does not output a notice instruction to notify the CPU 261 of the notice decision timing (the notice decision timings are “first notice timing” and “second notice timing”), and the first notice timing and the first notice timing are not output. 2 Each notice character A, B corresponding to the notice timing is not displayed.

Subsequently, as shown in FIG. 36 (E), the second symbol stop time T14 seconds (FIG. 15) corresponding to the effect pattern command “22B” after the variable display of the first, second, and third symbols is started. Reference 7) is stopped and displayed as the second symbol in the right column of the liquid crystal display 52. Further, the variation display of the third symbol is continued.
Further, when the second symbol stop time T14 seconds (notice time T14 seconds) is reached, the CPU 281 sends a value “1” of bit 3 of the fourth digit of the binary notice bit string “1011” to the CPU 261. An input request display instruction is output to instruct that the display requesting the pressing of the switch button 9A is performed only within a predetermined time (for example, within about 1 to 3 seconds), and the liquid crystal display At the top of the display screen 52, a request display 85 is displayed in which the description “Last”, “Please press the button” and a red switch button on the right side of the display screen are surrounded by a square frame. A request to press the button 9A is displayed. Then, when the player presses the switch button 9A within a predetermined time (for example, within about 1 to 3 seconds), the CPU 281 causes the CPU 261 to store each notice determination timing (notice determination timing) stored in the RAM 283. Is a “first notice timing”, “second notice timing”, and “fourth notice timing”), a notice instruction is output, and the noticed first notice timing, second notice timing, and Each notice character A, B, D corresponding to the fourth notice timing descends from the upper left end of the display screen of the liquid crystal display 52, the upper left end of the center left, and the upper end of the right end, and stops at the lower end of the display screen. Is displayed.

  Thereafter, as shown in FIG. 37 (F), after the variable display of the first, second, and third symbols is started, the third symbol stop time T15 seconds corresponding to the effect pattern command “22B” (see FIG. 15). ), “7” is stopped and displayed as the third symbol in the middle row of the liquid crystal display 52, and the winning is notified.

On the other hand, as shown in FIG. 38 (G), in the above FIG. 36 (E), at the upper end of the display screen of the liquid crystal display 52, “Last”, “Please press the button” and its right side Is displayed within a predetermined time (for example, about 1 to 3 seconds) after a request display 85 is displayed with a red switch button surrounded by a substantially square frame and a request to press the switch button 9A is displayed. In the case where the player does not press the switch button 9A, the CPU 281 sends the CPU 261 each notice determination timing stored in the RAM 283 (the notice decision timing is “first notice timing”, “ Notification instructions for notifying “second notice timing” and “fourth notice timing” are not output, and each of the information corresponding to the first notice timing, the second notice timing, and the fourth notice timing is output. WARNING characters A, B, D is not displayed.
Thereafter, as shown in FIG. 38 (H), after the variable display of the first, second, and third symbols is started, the third symbol stop time T15 seconds corresponding to the effect pattern command “22B” (see FIG. 15). ), “7” is stopped and displayed as the third symbol in the middle row of the liquid crystal display 52, and the winning is notified.

As described above, according to the pachinko machine 1 according to the present embodiment, the CPU 281 of the sub-integrated control board 280 has the “notice bit string” and the first notice timing at each notice time T1 to T4 and T11 to T14 seconds. A logical product of four “comparison 4 bits” of 4 binary bits corresponding to the fourth notice timing is sequentially calculated. When the logical product is other than “0” at each of the first notice timing to the fourth notice timing, the CPU 281 stores the notice timing in the RAM 283 as the notice determination timing and presses the switch button 9A. The requested input request display instruction is output to the CPU 261 of the effect display board 260 (S231 to S235). Then, the CPU 281 determines whether or not the switch button 9A is pressed within a predetermined time (about 1 to 3 seconds) after the input request display instruction is output to the CPU 261 of the effect display board 260, and the switch When the button 9A is pressed, a notice instruction for notifying each notice determination timing stored up to the present notice timing is output to the CPU 261, and then each notice decision timing notified is cleared (S236 to S239). .
On the other hand, when the input request display instruction is input, the CPU 261 of the effect display board 260 reads the display image data of the button press request indicating that the switch button 9A is to be pressed from the ROM 262, and the liquid crystal display The data is displayed on the (LCD) 52 (S351: YES to S352). If a notice instruction is input within a predetermined time from the display of the button press request (S353: YES), the CPU 261 displays each notice character corresponding to each notice timing included in the notice instruction in the character table 82. The selected notice character is displayed so as to descend downward from the upper end portion of the display screen of the liquid crystal display 52, and is stopped and displayed on the lower end portion of the display screen (S353: YES to S354).

  As a result, each notice set in advance between the start of the variable display of each of the first, second, and third symbols and the time when the final stop symbol (third symbol) is stopped and displayed in the center of the display screen. In the middle of the timings T1 to T4 and T11 to T14 seconds, the player presses the switch button 9A within a predetermined time (for example, about 1 second to 3 seconds) during which the button press request display image is displayed. Even if it is forgotten, when the player presses the switch button 9A when a button press request display image is displayed after that, it was originally scheduled to be displayed by that time among the notice characters A to D. Since the notice character and the notice character scheduled to be displayed this time are displayed, even if the player forgets to press the switch button 9A, each notice character to be originally displayed among the notice characters A to D is displayed. Yarakuta it is possible to display control so as to accurately displayed. In addition, when the player presses the switch button 9A, each of the notice characters A to D that were originally scheduled to be displayed is displayed, so that a sense of expectation for acquisition of each notice character A to D is increased. Can increase the interest of the game.

  In addition, this invention is not limited to the said Example, Of course, various improvement and deformation | transformation are possible within the range which does not deviate from the summary of this invention. For example, the following may be used.

  (A) In the above embodiment, when the switch button 9A is never pressed after the fourth notice timing has elapsed, none of the notice characters A to D are displayed, but after the fourth notice timing has elapsed, If the switch button 9A has never been pressed, the CPU 281 reads all the notice determination timings stored in the RAM 283 so far, and gives a notice instruction to notify all the read notice determination timings thus read out. It may be configured to output to the CPU 261. Thus, even if the player is not paying attention to other things and cannot press the switch button 9A, the notice character that should be originally displayed among the notice characters A to D is always displayed. The display can be reliably controlled.

  (B) Moreover, you may give the high and low reliability to each notice character AD. Thereby, the appearance of each of the notice characters A to D can increase the player's sense of expectation for winning the jackpot, and can further increase the interest of the game.

  (C) Also, instead of the comparison 4-bit table 76, “0001” is stored in advance in the ROM 282 of the sub-integrated control board 280 as comparison data composed of 4-bit binary numbers, and the 4-bit “0001” is stored. The bit value “1” of the first digit is sequentially bit-shifted to the next higher digit, “0001” corresponding to “first notice timing”, and “0010” corresponding to “second notice timing”. The comparison data (shift comparison data) of “0100” corresponding to “third notice timing” and “1000” corresponding to “fourth notice timing” may be calculated sequentially. As a result, the storage capacity of the ROM 282 can be reduced.

(D) Also, in the above embodiment, as shown in FIG. 27, when the logical product calculated in S233 is “0”, that is, “0000” (S233: YES), the CPU 281 Although the process has shifted to the process, after executing the process of S235, that is, the CPU 281 displays a display requesting the CPU 261 of the effect display board 260 to press the switch button 9A within a predetermined time (for example, about 1 It is also possible to shift to the processing of S240 after outputting an input request display instruction instructing to display only within seconds to 3 seconds).
As a result, as shown in FIG. 32, at each of the first to fourth notice timings, the CPU 261 reads display image data of a button press request indicating that the switch button 9A is required to be pressed from the ROM 262, and the liquid crystal The information is displayed on the display (LCD) 52 (S352). However, only when the logical product value calculated in S232 is other than “0” (S233: NO), the CPU 281 outputs a notice instruction to the CPU 261 (S238), so the player presses the switch button 9A. In some cases, the notice character is not displayed, and the player's expectation for obtaining the notice character corresponding to each of the first to fourth notice timings can be increased.

(E) Also, in the above embodiment, in S354, the CPU 261 displays each notice character so as to descend downward from the upper end of the display screen of the liquid crystal display 52, and stops and displays it on the lower end of the display screen. (See FIG. 36E), each notice character may appear at a predetermined position corresponding to the display screen, and may be stopped and displayed at the appearing position. Thereby, since the position where each notice character appears is decided, the player can confirm each notice character quickly.

  (F) In the above embodiment, in S354, the CPU 261 stops and displays each notice character on the lower end of the display screen of the liquid crystal display 52 (see FIGS. 36E to 37). The notice character may be erased from the display screen after the stop display or the movement display for a certain period of time (for example, only for about 3 seconds to 5 seconds). Thereby, when the switch button 9A is pressed, the player's interest can be more strongly attracted to the display screen.

It is the front side perspective view showing the whole pachinko machine concerning this example. It is the back side perspective view which showed the whole pachinko machine of FIG. It is a front view which shows the game board of the pachinko machine of FIG. It is a block diagram which shows the structure of the control system which concerns on the drive control of the pachinko machine of FIG. FIG. 5 is a block diagram illustrating a configuration of a RAM of the main control board in FIG. 4. It is a block diagram which shows the structure of ROM of the main control board of FIG. FIG. 5 is a block diagram illustrating a configuration of a RAM of the sub integrated control board in FIG. 4. FIG. 5 is a block diagram illustrating a configuration of a ROM of the sub integrated control board in FIG. 4. It is a block diagram which shows the structure of ROM of the production | presentation display board | substrate of FIG. It is a block diagram which shows the structure of RAM of the effect display board | substrate of FIG. It is a figure which shows an example of the fluctuation pattern determination table stored in the fluctuation pattern determination table storage area of FIG. It is a figure which shows an example of the production pattern selection table stored in the production pattern selection table storage area of FIG. It is a figure which shows an example of the notice pattern selection table stored in the notice pattern selection table storage area of FIG. It is a figure which shows an example of the comparison 4 bit table stored in the comparison 4 bit table storage area of FIG. It is a figure which shows an example of the notice time chart stored in the notice time chart storage area of FIG. It is a figure which shows an example of the effect display pattern table stored in the effect display pattern table storage area of FIG. It is a figure which shows an example of the character table stored in the character table storage area of FIG. It is a main flowchart which shows the interruption control process which CPU of the main control board performs. FIG. 19 is a sub-flowchart showing a sub-process of the “start opening prize process” in FIG. 18. FIG. FIG. 19 is a sub-flowchart showing a sub process of “big hit determination process” in FIG. 18. FIG. FIG. 19 is a sub-flowchart showing a sub-process of “variation pattern selection process” in FIG. 18. FIG. FIG. 19 is a sub-flowchart showing a sub-process of “command transmission process” in FIG. 18. FIG. FIG. 19 is a sub-flowchart showing a sub-process of “determined signal transmission process” in FIG. 18. FIG. FIG. 19 is a sub-flowchart showing a sub-process of “big hit game process” in FIG. 18. FIG. It is a flowchart which shows the control processing performed when CPU of a sub integrated control board receives each command as instruction information from CPU of a main control board. FIG. 26 is a sub-flowchart showing a sub-process of “time chart selection process” in FIG. 25; FIG. 26 is a sub-flowchart showing a sub-process of “notice instruction process” in FIG. 25; It is a main flowchart which shows the control processing performed when CPU of an effect display board | substrate receives display instruction information from CPU of a sub integrated control board. FIG. 29 is a sub-flowchart illustrating a sub-process of “complete loss display processing” in FIG. 28. FIG. 29 is a sub-flowchart illustrating a sub-process of the “los reach display process” in FIG. 28. FIG. 31 is a sub-flowchart showing a sub-process of “notice display process 1” in FIG. 30. FIG. FIG. 32 is a sub-flowchart showing a sub-process of “notice character display process” in FIG. 31; FIG. 29 is a sub-flowchart showing a sub-process of “winning display process” in FIG. 28. FIG. 34 is a sub-flowchart showing a sub-process of “notice display process 2” of FIG. 33. FIG. The CPU of the sub-integrated control board selects the jackpot effect pattern command “22B”, stores “1011” as the “notice bit string” of binary 4 bits in the RAM 283, and then displays the effect pattern command “22B” and the final stop pattern. The effect display instruction information including “777” is output to the CPU of the effect display board, and when the effect display instruction CPU receives the effect display instruction information, the count value “5” of the character table selection counter is set to the character table selection algebra L. FIG. 4 is a diagram showing an example of a variable display displayed on the display screen of the liquid crystal display when it is stored in the RAM, and (A) is when the change starts, (B) is a notice time T11 seconds, and the switch button is When not pressed, (C) is a diagram showing a display screen when the switch button is not pressed at the notice time T12 seconds. 35D is a diagram showing a display screen when the switch button is not pressed at the notice time T13 seconds and (E) is a display screen when the switch button is pushed at the notice time T14 seconds. (F) is a figure which shows the display screen of 3rd symbol stop time T15 second following FIG. 36 (D), (G) is a diagram showing a display screen of the third symbol stop time T15 seconds when the switch button is not pressed at the notice time T14 seconds.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Pachinko machine, 52 ... Liquid crystal display, 57 ... Starting port, 60 ... Extra prize opening, 73 ... Variation pattern determination table, 74 ... Production pattern selection table, 75 .. Notification pattern selection table, 76... Comparison 4 bit table, 77 and 78... Notification time chart, 81. 261, 281, 291 ... CPU, 262, 282, 292 ... ROM, 263, 283, 293 ... RAM, 280 ... sub-integrated control board, 290 ... main control board.

Claims (1)

A symbol display device provided in the game area for displaying a plurality of identification symbols; and a control means for controlling the notice of notice, and after each of the identification symbols fluctuates, stopped at a specific symbol constituting a predetermined aspect Later, in a gaming machine in which a special gaming state advantageous to the player occurs,
Notice timing storage means for storing a plurality of preset notice timings after the start of variation of the plurality of identification symbols until the final stop symbol is stopped;
Notice character storage means for storing a plurality of notice characters corresponding to each notice timing;
Notice determining means for randomly determining whether or not to notify the notice of the final mode of the plurality of identification symbols at each of the plurality of notice timings;
Instruction means for inputting notice instruction information for instructing the player to make the notice notice;
Determining means for determining whether or not the notice instruction information has been input via the instruction means within a predetermined time for each notice timing determined to be notified by the notice determining means. When,
With
When it is determined that the notification instruction information is input within a predetermined time set for the notification timing by the determination unit, the control unit displays the notification character corresponding to the notification timing in the symbol display. Control to display on the display screen of the device and notify the final mode of the plurality of identification symbols,
When it is determined that the notification instruction information has not been input within a predetermined time set by the determination unit with respect to the notification timing, the control unit performs a notification timing after the notification timing. When it is determined that the notice instruction information is input within the set predetermined time, it corresponds to the notice timing corresponding to the notice character corresponding to the subsequent notice timing and the notice timing when it is determined that the notice instruction information is not inputted. A gaming machine , wherein a notice character is displayed on a display screen of the symbol display device and the final mode of the plurality of identification symbols is controlled to be notified in advance.

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