JP4712792B2 - データ端末装置、電力供給、およびデータ収集のための回路分離を備えるミッドスパン型パッチ・パネル - Google Patents
データ端末装置、電力供給、およびデータ収集のための回路分離を備えるミッドスパン型パッチ・パネル Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0228—Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/02—Constructional details
- H04Q1/13—Patch panels for monitoring, interconnecting or testing circuits, e.g. patch bay, patch field or jack field; Patching modules
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/06—Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10189—Non-printed connector
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S439/00—Electrical connectors
- Y10S439/941—Crosstalk suppression
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- Engineering & Computer Science (AREA)
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- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Computer Networks & Wireless Communication (AREA)
- Structure Of Telephone Exchanges (AREA)
- Structure Of Printed Boards (AREA)
- Small-Scale Networks (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
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Description
Claims (25)
- 向上された性能レベルを提供する、取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネルであって、
複数の層を備える多層パッチ・パネル・プリント回路基板と、
前記複数のうちの少なくとも第1の層上に配置され、PD/ユーザ端のIDCと通信機器端のRJ45コネクタとの間に電気的に結合されている通信回路と、
拡張機能を提供するために前記複数のうちの少なくとも第2の層に配置されている少なくとも1つのアクティブ回路で構成され、前記通信回路と電気的に結合されている、取外可能モジュラ式または固定式電子部品のうちの少なくとも1つと、
前記アクティブ回路との補償容量および誘導結合を確立して、前記アクティブ回路から生じる少なくとも1つの悪影響を実質的に最低限に抑え、それによって向上された性能レベルを提供するために、前記複数のうちの少なくとも1つの層上に配置されている複数の補償回路素子とを備え、
前記アクティブ回路は、前記PD/ユーザ端と前記通信回路の前記通信機器端との間を隔てる少なくとも1のDC阻止容量と、前記通信回路の前記通信機器端に電力を供給する少なくとも1つの中央タップ付き変換器と、を含む、補償拡張機能パッチ・パネル。 - 前記通信回路が信号搬送トレースまたは電気通信ルーティング回路のうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記拡張機能が、装置検出機能、論理演算機能、および電力供給機能のうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記アクティブ回路がアクティブ回路2次ルーティング層、アクティブ回路部品、IDC部品、プラグイン・モジュール・コネクタ、およびアクティブ回路の1次ルーティングのうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記アクティブ回路部品が複数のDC阻止容量を含む請求項4に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記アクティブ回路部品が複数の中央タップ付き変換器を含む請求項4に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記アクティブ回路部品が少なくとも1つの演算増幅器を含む請求項4に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記少なくとも1つの層上に配置されている前記複数の補償回路素子が、前記アクティブ回路との前記補償結合を確立するために、誘導素子、容量素子、およびリアクタンス素子のうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記誘導素子、容量素子、およびリアクタンス素子が信号搬送トレースで構成される請求項8に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記誘導素子、容量素子、およびリアクタンス素子が導体箔キャパシタ回路で構成される請求項8に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記悪影響が増大した雑音レベル、反射、害を与える誘導結合、および害を与える容量結合のうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記向上された性能レベルがカテゴリ3、5、5e、6、6e、および7の性能レベル以上のうちの少なくとも1つを含む請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記多層パッチ・パネル・プリント回路基板が少なくとも48ポートを有する3Uパネル・サイズをさらに備える請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記多層パッチ・パネル・プリント回路基板が、少なくとも48ポートと、1U、2U、および3Uの高さ寸法のうちの1つと、を有するパネルから成っている請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記多層パッチ・パネル・プリント回路基板がケーブル管理機構をさらに備える請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- 前記多層パッチ・パネル・プリント回路基板が、前記パッチ・パネル・プリント回路基板の面上の前記通信回路に隣接し、その間に配列されている前記アクティブ回路およびケーブル管理機構をさらに備える請求項1に記載の取外可能モジュラ式または固定式電子部品を含み得る補償拡張機能パッチ・パネル。
- パッチ・パネルが向上された性能レベルを提供する、個別に、または組み合わせて装置検出や電力供給などの拡張機能を提供することができる取外可能モジュラ式または固定式電子部品を含み得る拡張機能パッチ・パネルを作成する方法であって、
複数の層を有する多層パッチ・パネル・プリント回路基板をアセンブルするステップと、
前記複数のうちの少なくとも第1の層上に、PD/ユーザ端のIDCと通信機器端のRJ45コネクタとの間に電気的に結合されている通信回路を配置するステップと、
前記複数のうちの少なくとも第2の層上に、拡張機能を提供するのに使用する少なくとも1つのアクティブ回路で構成され、前記通信回路に電気的に結合された取外可能モジュラ式および固定式電子部品のうちの少なくとも1つを配置するステップと、
前記アクティブ回路との補償容量および誘導結合を確立して、前記アクティブ回路から生じる少なくとも1つの悪影響を実質的に最低限に抑え、それによって向上された性能レベルを提供するために、補償回路素子を前記複数のうちの少なくとも1つの層上に配置するステップとを備え、
前記アクティブ回路は、前記PD/ユーザ端と前記通信回路の前記通信機器端との間を隔てる少なくとも1のDC阻止容量と、前記通信回路の前記通信機器端に電力を供給する少なくとも1つの中央タップ付き変換器と、を含む、方法。 - 前記複数のうちの前記第1の層の上に、信号搬送トレースまたは電気通信ルーティング回路のうちの少なくとも1つを含む通信回路を配置するステップをさらに備える請求項17に記載の拡張機能パッチ・パネルを作成する方法。
- 前記複数のうちの前記第2の層の上に、アクティブ回路2次ルーティング層、アクティブ回路部品、IDC部品、プラグイン・モジュール・コネクタ、およびアクティブ回路の1次ルーティングのうちの少なくとも1つを含む取外可能モジュラ式または固定式電子部品のうちの少なくとも1つを配置するステップをさらに備える請求項17に記載の拡張機能パッチ・パネルを作成する方法。
- 前記アクティブ回路部品が複数のDC阻止容量を含む請求項19に記載の拡張機能パッチ・パネルを作成する方法。
- 前記アクティブ回路部品が複数の中央タップ付き変換器を含む請求項19に記載の拡張機能パッチ・パネルを作成する方法。
- 前記アクティブ回路部品が少なくとも1つの演算増幅器を含む請求項19に記載の拡張機能パッチ・パネルを作成する方法。
- 前記少なくとも1つの層上に配置された前記補償回路素子が、前記アクティブ回路との前記補償結合を確立するために、誘導素子、容量素子、およびリアクタンス素子のうちの少なくとも1つを含む請求項17に記載の拡張機能パッチ・パネルを作成する方法。
- 前記悪影響が増大した雑音レベル、反射、害を与える誘導結合、および害を与える容量結合のうちの少なくとも1つを含む請求項17に記載の拡張機能パッチ・パネルを作成する方法。
- 前記向上された性能レベルがカテゴリ3、5、5e、6、6e、および7の性能レベル以上のうちの1つを含む請求項17に記載の拡張機能パッチ・パネルを作成する方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/791,292 US7038918B2 (en) | 2004-03-03 | 2004-03-03 | Midspan patch panel with compensation circuit for data terminal equipment, power insertion and data collection |
US10/791,292 | 2004-03-03 | ||
PCT/US2005/006595 WO2005091913A2 (en) | 2004-03-03 | 2005-03-02 | Midspan patch panel with compensation circuit for data terminal equipment, power insertion and data collection |
Publications (2)
Publication Number | Publication Date |
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JP2007535837A JP2007535837A (ja) | 2007-12-06 |
JP4712792B2 true JP4712792B2 (ja) | 2011-06-29 |
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JP2007501902A Active JP4712792B2 (ja) | 2004-03-03 | 2005-03-02 | データ端末装置、電力供給、およびデータ収集のための回路分離を備えるミッドスパン型パッチ・パネル |
Country Status (8)
Country | Link |
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US (1) | US7038918B2 (ja) |
EP (1) | EP1723838B1 (ja) |
JP (1) | JP4712792B2 (ja) |
KR (1) | KR20060127246A (ja) |
CN (1) | CN100505995C (ja) |
CR (1) | CR8576A (ja) |
ES (1) | ES2710660T3 (ja) |
WO (1) | WO2005091913A2 (ja) |
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JP2007535837A (ja) | 2007-12-06 |
CN100505995C (zh) | 2009-06-24 |
EP1723838A4 (en) | 2014-12-03 |
WO2005091913A2 (en) | 2005-10-06 |
CR8576A (es) | 2007-06-06 |
KR20060127246A (ko) | 2006-12-11 |
CN1943290A (zh) | 2007-04-04 |
US20050195584A1 (en) | 2005-09-08 |
EP1723838B1 (en) | 2018-10-03 |
EP1723838A2 (en) | 2006-11-22 |
WO2005091913A3 (en) | 2005-11-17 |
ES2710660T3 (es) | 2019-04-26 |
US7038918B2 (en) | 2006-05-02 |
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