JP4657931B2 - 信号ルーティングに低電圧スイングを使用したプログラマブルロジックデバイスにおける電力削減方法 - Google Patents
信号ルーティングに低電圧スイングを使用したプログラマブルロジックデバイスにおける電力削減方法 Download PDFInfo
- Publication number
- JP4657931B2 JP4657931B2 JP2006010539A JP2006010539A JP4657931B2 JP 4657931 B2 JP4657931 B2 JP 4657931B2 JP 2006010539 A JP2006010539 A JP 2006010539A JP 2006010539 A JP2006010539 A JP 2006010539A JP 4657931 B2 JP4657931 B2 JP 4657931B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- routing
- coupled
- level signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17736—Structural details of routing resources
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/1778—Structural details for adapting physical parameters
- H03K19/17784—Structural details for adapting physical parameters for supply voltage
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/039,272 US7262634B2 (en) | 2005-01-19 | 2005-01-19 | Methods of reducing power in programmable logic devices using low voltage swing for routing signals |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006203898A JP2006203898A (ja) | 2006-08-03 |
| JP2006203898A5 JP2006203898A5 (https=) | 2009-02-26 |
| JP4657931B2 true JP4657931B2 (ja) | 2011-03-23 |
Family
ID=36282700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006010539A Expired - Fee Related JP4657931B2 (ja) | 2005-01-19 | 2006-01-18 | 信号ルーティングに低電圧スイングを使用したプログラマブルロジックデバイスにおける電力削減方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7262634B2 (https=) |
| EP (1) | EP1684432A3 (https=) |
| JP (1) | JP4657931B2 (https=) |
| CN (1) | CN1808905A (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8253442B2 (en) | 2008-03-31 | 2012-08-28 | Micron Technology, Inc. | Apparatus and method for signal transmission over a channel |
| US7911229B2 (en) * | 2008-09-26 | 2011-03-22 | Siliconblue Technologies Corporation | Programmable signal routing systems having low static leakage |
| US8130538B2 (en) * | 2009-01-15 | 2012-03-06 | Altera Corporation | Non-volatile memory circuit including voltage divider with phase change memory devices |
| US9443050B2 (en) * | 2012-08-01 | 2016-09-13 | Oregon State University | Low-voltage swing circuit modifications |
| US9304534B1 (en) | 2014-09-24 | 2016-04-05 | Freescale Semiconductor, Inc. | Low voltage swing buffer |
| WO2017075435A1 (en) | 2015-10-30 | 2017-05-04 | Corning Incorporated | Glass articles with mixed polymer and metal oxide coatings |
| US10848155B2 (en) | 2019-02-15 | 2020-11-24 | Intel Corporation | Flexible transmitter circuitry for integrated circuits |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5187392A (en) * | 1991-07-31 | 1993-02-16 | Intel Corporation | Programmable logic device with limited signal swing |
| US5525917A (en) * | 1994-12-16 | 1996-06-11 | Altera Corporation | Sense amplifier with feedback and stabilization |
| US5909126A (en) * | 1995-05-17 | 1999-06-01 | Altera Corporation | Programmable logic array integrated circuit devices with interleaved logic array blocks |
| US5963049A (en) * | 1995-05-17 | 1999-10-05 | Altera Corporation | Programmable logic array integrated circuit architectures |
| US5585744A (en) * | 1995-10-13 | 1996-12-17 | Cirrus Logic, Inc. | Circuits systems and methods for reducing power loss during transfer of data across a conductive line |
| US5818261A (en) * | 1996-08-08 | 1998-10-06 | Hewlett Packard Company | Pseudo differential bus driver/receiver for field programmable devices |
| US6351173B1 (en) * | 2000-08-25 | 2002-02-26 | Texas Instruments Incorporated | Circuit and method for an integrated level shifting latch |
| KR100961941B1 (ko) | 2003-01-03 | 2010-06-08 | 삼성전자주식회사 | 다중 도메인 액정 표시 장치용 박막 트랜지스터 표시판 |
| KR100920348B1 (ko) | 2003-02-27 | 2009-10-07 | 삼성전자주식회사 | 액정 표시 장치 |
| US7088140B1 (en) * | 2004-03-04 | 2006-08-08 | Altera Corporation | High speed IO buffer using auxiliary power supply |
| KR101112537B1 (ko) | 2004-06-03 | 2012-02-29 | 삼성전자주식회사 | 다중 도메인 액정 표시 장치 및 그에 사용되는 표시판 |
| KR101061848B1 (ko) | 2004-09-09 | 2011-09-02 | 삼성전자주식회사 | 박막 트랜지스터 패널 및 이를 포함하는 다중 도메인 액정표시 장치 |
-
2005
- 2005-01-19 US US11/039,272 patent/US7262634B2/en not_active Expired - Fee Related
-
2006
- 2006-01-06 EP EP06250067A patent/EP1684432A3/en not_active Withdrawn
- 2006-01-18 CN CN200610005002.5A patent/CN1808905A/zh active Pending
- 2006-01-18 JP JP2006010539A patent/JP4657931B2/ja not_active Expired - Fee Related
-
2007
- 2007-07-25 US US11/881,392 patent/US7639042B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7262634B2 (en) | 2007-08-28 |
| US20090146688A1 (en) | 2009-06-11 |
| US20060158220A1 (en) | 2006-07-20 |
| EP1684432A3 (en) | 2008-09-24 |
| CN1808905A (zh) | 2006-07-26 |
| US7639042B2 (en) | 2009-12-29 |
| JP2006203898A (ja) | 2006-08-03 |
| EP1684432A2 (en) | 2006-07-26 |
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