JP4647734B2 - Semiconductor device diode and method of manufacturing the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device diode having a slow reverse current reduction characteristic and a manufacturing method thereof.
[0002]
[Prior art]
Among semiconductor elements, a diode is formed by joining an N-type impurity layer and a P-type impurity layer, and is used as a rectifying element. If a positive (+) voltage is applied to the P-type impurity layer, i.e., the anode, and a negative (-) voltage is applied to the N-type impurity layer, i.e., the cathode, to maintain the diode in the forward conduction state, a large number of carriers are obtained. Are injected with different polarities, that is, electrons in the N-type impurity layer are injected into the P-type impurity layer, holes in the P-type impurity layer are injected into the N-type impurity layer, and forward current is supplied to each part of the diode. Will be in a state of flowing Subsequently, if the diode is switched from the forward bias state to the reverse state, that is, if a negative voltage is applied to the P-type impurity layer and a positive voltage is applied to the N-type impurity layer, the inside of the diode is instantaneously reversed. A current flows. Thereafter, the reverse current is reduced to a normal leakage current level while the injected carriers are sequentially disappeared, and the diode is in a blocking state.
[0003]
At this time, the accumulation time is from the time when the reverse current flows until the time when the reverse voltage is not applied to the diode. Depending on the application circuit, a long or short accumulation time is used, and the ratio of the reverse current decrease is expressed as a recovery ratio. Some application circuits require fast reverse current reduction or snap recovery characteristics (ie, characteristics with a high recovery ratio), and other application circuits require slow reverse current reduction characteristics (ie, characteristics with a low recovery ratio).
[0004]
The characteristics of the recovery ratio of the diode are affected by the amount of accumulated minority carriers, minority carrier mobility, minority carrier lifetime, and the like. In the case of a diode, in the forward conduction state, a large number of holes are injected from the anode side toward the cathode, and electrons are injected from the cathode side toward the anode. The injection should be relatively smaller than the electron injection.
[0005]
FIG. 1 shows P to obtain a slow reverse current reduction characteristic. ^- 2 is a cross-sectional view showing a conventional diode in which layers are formed so as to form a shallow junction, and FIG. 2 is a characteristic diagram showing an impurity concentration distribution in a cross section taken along the line II-II ′ of FIG. 10 is a cathode, 12 is N ⁺ Layer, 14 is N ^- Epitaxial layer, 16 is P ^- 18, 18 is a ring, 20 is a channel stopper, 22 is an insulating film, and 24 is an anode. In FIG. 2, the horizontal axis indicates the distance from the anode to the cathode, and the vertical axis indicates the impurity concentration. Show.
[0006]
The conventional diode is N ⁺ N on layer 12 ^- An epitaxial layer 14 is formed and this N ^- Shallow junction P near the surface of the epitaxial layer 14 ^- After forming the layer 16, the P is used to improve the breakdown voltage of the diode. ^- N around layer 16 ^- A P-type ring 18 is formed near the surface of the epitaxial layer 14. Thereafter, N for stopping the expansion of the depletion layer that occurs when the reverse voltage is applied. ⁺ After forming the channel stopper 20 around the P-type ring 18, ^- The anode 24 connected to the layer 16 and the N ⁺ A cathode 10 connected to the layer 12 is formed.
[0007]
The conventional diode is thick N ^- Shallow junction P near the surface of the epitaxial layer 14 ^- By forming the layer 16, the amount of holes injected in the cathode direction is reduced, and the amount of electrons injected in the anode direction is relatively increased, thereby taking a slow reverse current reduction characteristic.
[0008]
[Problems to be solved by the invention]
However, in the case of the conventional diode, first, P for injecting holes on the cathode side is used. ^- Since the junction depth between the layer 16 and the P-type ring 18 for increasing the breakdown voltage of the diode is different, a separate mask is used to form them, and the process becomes complicated. ^- Since the layer 16 is formed to have a shallow junction (about 2 μm to 4 μm), the anode 24 is connected to the P ^- It has a weak point in terms of process reliability, such as forming a contact window for connection to the layer 16.
[0009]
FIG. 3 shows P to obtain a slow reverse current reduction characteristic. ^- FIG. 4 is a sectional view showing a diode according to another conventional example in which layers are formed so as to form a wave-like junction, and FIG. 4 is a characteristic diagram showing an impurity concentration distribution in a section taken along line IV-IV ′ of FIG. In FIG. 3, reference numeral 30 denotes a cathode, and 32 denotes N. ⁺ Layer, 34 is N ^- Epitaxial layer, 36 is P ⁺ The first diffusion layer, 38 is P ^- In FIG. 4, the horizontal axis indicates the distance from the anode to the cathode, and the vertical axis indicates the impurity concentration.
[0010]
The diode according to another example of the prior art includes a plurality of Ns separated by a certain distance. ⁺ Layer 32 and this N ⁺ N formed between and above layers 32 ^- The epitaxial layer 34 and the N ^- P forming a wavy junction near the surface of the epitaxial layer 34 ^- The layer 38 and the P in the region where the deep junction is formed in the wavy junction. ^- P formed near the surface of the layer 38 ⁺ Layer 36 and this P ⁺ Layer 36 and P ^- An anode 42 connected to the layer 38 and the N ⁺ Layer 32 and said N ^- It consists of a cathode 30 to which an epitaxial layer 34 is connected. At this time, the insulating film 40 is formed of the P ⁺ Layer 36 and P ^- A region other than the layer 38 is formed to prevent connection with the anode 42.
[0011]
P ⁺ Layers 36 and P ^- Layer 38 is N ^- After forming the epitaxial layer 34, P ⁺ On the region where the layer 36 is formed, the N ^- After forming a mask pattern having a window that partially exposes epitaxial layer 34, P ⁺ It is formed by a step of diffusing impurity ions. P through the window ⁺ If impurity ions are diffused, N in the portion where the window is formed ^- The epitaxial layer 34 has P ⁺ A layer 36 is formed, and the region between the windows is doped with P implanted through the windows. ⁺ Impurity ions spread and the P ⁺ P whose concentration is lower than that of the layer 36 ^- Layer 38 is formed.
[0012]
According to the conventional diode according to the above other example, the anode impurity layer (that is, P) having a deep and natural junction (wave-like junction) by the process as mentioned above. ⁺ Layer 36 and P ^- By forming the layer 38), it is possible to overcome the reliability weakness caused by the shallow junction which has been a problem in the conventional diode of FIG. 1 and to form a ring for enhancing the breakdown voltage. Since the number can be smaller, the size of the diode can be reduced.
[0013]
But P ^- The junction depth of the layer 38 is relatively larger than that of the diode of FIG. In order to obtain a slow reverse current reduction characteristic, an additional method for adjusting the lifetime of the hole, such as a large amount of electron irradiation, must be performed.
[0014]
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor element diode capable of improving slow reverse current reduction characteristics, reducing the number of masks during manufacture, and improving reliability and breakdown voltage characteristics. is there.
[0015]
Another object of the present invention is to provide an optimum manufacturing method in manufacturing the diode.
[0016]
[Means for Solving the Problems]
The diode of the semiconductor device according to the present invention includes a first N connected to the cathode electrode. ⁺ Layer and this 1N ⁺ N formed on the layer ^- The epitaxial layer and this N ^- This N is formed near the surface of the epitaxial layer. ^- P forming an undulating junction with the epitaxial layer ^- Layer and this P ^- This P is selectively formed near the surface of the layer. ^- Second N connected to anode electrode together with layer ⁺ And a layer. More specifically, the second N ⁺ Layer is P ^- It is formed in the part where the wavy junction is deeply formed in the layer. In addition, the P ^- The N around it to surround the layer ^- N near the epitaxial layer surface ⁺ A channel stopper is further included.
[0017]
A first semiconductor device diode manufacturing method according to the present invention includes: ⁺ N on layer ^- Forming an epitaxial layer; and said N ^- Forming a first mask pattern having a first window for partially exposing a region to be an anode impurity layer on the epitaxial layer; and exposing N through the first window ^- By simultaneously diffusing N-type impurities and P-type impurities in the epitaxial layer, the N ^- P forming a wave-like junction with the epitaxial layer ^- Layer and this P ^- Second N selectively formed near the surface of the layer ⁺ Forming a layer at the same time. Subsequently, a step of removing the first mask pattern, and the second N ⁺ N up to layer is formed ^- Forming a second mask pattern having a second window exposing a region serving as a channel stopper on the epitaxial layer; and diffusing N-type impurities through the second window. ^- N around the stratum ^- A step of forming a channel stopper near the surface of the epitaxial layer, and the N formed up to the channel stopper; ^- Forming an insulating film on the epitaxial layer; and selectively removing the insulating film to form the P ^- Layer and 2N ⁺ Forming a third window exposing the layer; and passing through the third window the P ^- Layer and 2N ⁺ Forming an anode electrode in contact with the layer. Here, the P-type impurity may be boron ions, and the N-type impurity may be phosphorus ions.
[0018]
The second semiconductor device diode manufacturing method according to the present invention includes a first N ⁺ N on layer ^- Forming an epitaxial layer; and said N ^- Forming a first mask pattern having a first window for partially exposing a region to be an anode impurity layer on the epitaxial layer; and exposing N through the first window ^- The N-type is diffused by diffusing P-type impurities in the epitaxial layer. ^- P forming a wave-like junction with the epitaxial layer ^- Forming a layer, and partially etching the first mask pattern to form N in a region where a channel stopper is to be formed in the first mask pattern. ^- Forming a second window exposing the epitaxial layer; and exposing the P exposed through the first window and the second window. ^- Layer and N ^- The P is obtained by diffusing N-type impurities in the epitaxial layer. ^- 2N in the layer ⁺ At the same time as forming the layer, the P ^- N surrounding the layer ⁺ Forming a channel stopper. Next, 2N ⁺ The N and the channel stopper are formed ^- Forming an insulating film on the epitaxial layer; and selectively removing the insulating film to form the P ^- Layer and 2N ⁺ Forming a third window exposing the layer; and passing through the third window the P ^- Layer and 2N ⁺ Forming an anode electrode in contact with the layer.
[0019]
In the second method, the step of diffusing the P-type impurity may be performed through the first window. ^- This is a step of implanting boron ions inside the epitaxial layer, and the step of diffusing the N-type impurity is POCl. _Three A liquid impurity source exposed through the first window and the second window. ^- Layer and N ^- After applying to the surface of the epitaxial layer, drive-in is performed to remove this impurity source to P ^- Layer and N ^- It can be a step of diffusing into the epitaxial layer. Alternatively, the step of diffusing the P-type impurity may include N through the first window. ^- A step of implanting boron ions into the epitaxial layer, and the step of diffusing the N-type impurity is performed through the first window and the second window. ^- Layer and N ^- It may be a step of implanting phosphorus ions into the epitaxial layer.
[0020]
According to the present invention as described above, the amount of electrons injected into the anode can be relatively increased compared with the holes injected into the cathode when a forward voltage is applied, thereby improving the slow reverse current reduction characteristic. In addition, it is possible to reduce the number of masks used at the time of manufacture, and to improve the breakdown voltage characteristics and reliability.
[0021]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of a diode of a semiconductor device and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments, and many modifications are possible by those having ordinary knowledge in the art within the technical idea of the present invention.
[0022]
FIG. 5 shows a P-shaped wavy junction to obtain a slow reverse current reduction characteristic. ^- N in the layer ⁺ FIG. 6 is a characteristic diagram showing the impurity concentration distribution of the cross section taken along the line VI-VI ′ of FIG. 5, and FIG. Reference numeral 50 denotes a cathode (cathode electrode), and 52 denotes a first N. ⁺ Layer 52, 54 is N ^- The epitaxial layer, 56 is P ^- Layer, 58 is the second N ⁺ 60, N ⁺ A channel stopper, 62 an insulating film, 64 an anode (anode electrode), and I _h Indicates the Hall current, I _e Represents the electron current, and in FIG. 6, the horizontal axis represents the distance from the anode to the cathode, and the vertical axis represents the impurity concentration.
[0023]
The diode includes a first N connected to the cathode 50. ⁺ Layer 52 and this first N ⁺ N formed on layer 52 ^- Epitaxial layer 54 and N ^- P formed near the surface of the epitaxial layer 54 and having a wavy junction ^- Layer 56 and this P ^- Selectively formed in the vicinity of the surface of the layer 56; ^- Second N connected to anode 64 along with layer 56 ⁺ It consists of layer 58. At this time, 2N ⁺ Layer 58 is the P ^- The layer 56 is formed in a portion where the wave-like junction is deeply formed. For example, the second N ⁺ The junction depth of layer 58 is 6 μm and this second N ⁺ P at the bottom of layer 58 ^- The bonding depth of the layer 56 is 18 μm. N ⁺ The channel stopper 60 is the P ^- Surrounding N in a form surrounding layer 56 ^- The second N is formed near the surface of the epitaxial layer 54. ⁺ It has almost the same junction depth as layer 58.
[0024]
This embodiment is P ^- Second N in layer 56 ⁺ By selectively forming the layer 58 and connecting it with the anode 64, the amount of holes injected is reduced as compared with the conventional case of FIG. 3 to improve the slow reverse current reduction characteristic, that is, the soft recovery characteristic. P ^- The second N selectively formed in layer 56; ⁺ Layer 58 is configured such that when a forward voltage is applied to the diode, P ^- The amount of holes injected from the layer 56 into the cathode is reduced (P ^- Some of the holes injected from the layer 56 into the cathode are part of the second N ⁺ And no longer combines with the electrons of the layer 58). Therefore, according to the diode of this embodiment, when a forward voltage is applied, the amount of electrons injected into the anode is relatively larger than the amount of holes injected into the cathode, and the soft recovery characteristic can be improved.
[0025]
At this time, 2N ⁺ Layer 58 and P ^- Since the layer 56 has a structure shorted to the anode 64, the forward voltage may be lost. However, since the hole injection amount is relatively smaller than the electron injection amount, the carrier lifetime is adjusted. Since it is not necessary to perform an additional process such as electron irradiation for increasing the forward voltage, the voltage gain obtained thereby can cancel the voltage loss generated by the short structure. Rather, according to the diode according to the present embodiment, the electron current I _e Path and Hall current I _h , The forward voltage can be lowered by shortening the path as shown by the dotted line and the solid line in FIG. That is, if the carrier (electron or hole) path is shortened, the resistance generated when the carrier (electron or hole) is injected is also reduced, so that the forward voltage can be lowered after all.
[0026]
Also, according to the diode of FIG. ^- The junction depth of layer 56 is P for the conventional diode of FIG. ^- Since it is deeper than the layer 16, it is possible to solve a weak point in reliability as compared with the conventional diode having a shallow junction structure. Further, according to the diode of FIG. 5, the electric field concentration can be prevented by the wave-like junction structure, so that the breakdown voltage characteristic is improved.
7 and 8 are cross-sectional views showing an embodiment suitable for manufacturing the diode of FIG.
[0027]
First, FIG. ^- FIG. 10 is a cross-sectional view for explaining a step of forming a first mask pattern 74 on the epitaxial layer 72, and this step is performed by a first N ⁺ Layer (ie, N ⁺ Substrate) 70 in the usual way N ^- The step of forming the epitaxial layer 72 and the N ^- A step of forming a first mask pattern 74 having a first window 76 for partially exposing a region to be an anode impurity layer on the epitaxial layer 72 is formed. At this time, the first mask pattern 74 is exposed by the first window 76 during a subsequent impurity ion implantation process. ^- An impurity ion blocking film for preventing impurity ions from being implanted into other regions other than the epitaxial layer 72, and is formed of a material such as a photoresist, for example.
[0028]
FIG. 7 (B) shows P ^- Layer 80 and 2N ⁺ FIG. 6 is a cross-sectional view for explaining a process of forming a layer 82, in which N is exposed through a first window 76 of the first mask pattern 74. ^- Simultaneously implanting N-type impurities and P-type impurities 78 into the epitaxial layer 72, and diffusing the implanted impurities to form the N-type impurities. ^- The P of the epitaxial layer 72 and the wave junction ^- Layer 80 and this P ^- The second N formed near the surface of the layer 80 at a position corresponding to a deep portion of the wavy junction. ⁺ The layer 82 is formed.
[0029]
At this time, the P-type impurity having a larger diffusion coefficient than the N-type impurity is used.
For example, boron (B) ions are used as P-type impurities, and phosphorus (P) ions are used as N-type impurities.
[0030]
If two types of impurities having different diffusion coefficients are simultaneously injected into the substrate and then diffused, impurities having a large diffusion coefficient are diffused earlier than impurities having a small diffusion coefficient, so that the final impurity profile is different. In this embodiment, since the diffusion coefficient of the P-type impurity is larger than that of the N-type impurity, the finally formed impurity profile is the second N as shown in FIG. ⁺ Layer 82 is said P ^- Layer 80 is formed in a surrounding form. At this time, 2N ⁺ Since the layer 82 is formed by implanting N-type impurities through the first window 76, the layer 82 is formed in an island-like form at a position corresponding to the first window 76.
[0031]
On the other hand, P ^- Since the layer 80 is formed with a wave-like natural junction structure, P is applied when a reverse voltage is applied. ^- The problem of the conventional diode shown in FIG. That is, since the electric field can be prevented from being concentrated by the wavy natural junction structure, the withstand voltage characteristic of the diode can be improved.
[0032]
FIG. 8A shows N ⁺ 7 is a cross-sectional view for explaining a process of forming a channel stopper 88. This process includes a step of removing the first mask pattern (74 in FIG. 7B) and a second N ⁺ N up to layer 82 is formed ^- A step of forming a second mask pattern 84 having a second window exposing a region serving as a channel stopper on the epitaxial layer 72, and implanting an N-type impurity 86 through the second window and then diffusing the same. P ^- Said N surrounding layer 80 ⁺ The process consists of forming a channel stopper 88.
[0033]
At this time, the channel stopper 88 is formed for the purpose of preventing the depletion region from being expanded when a reverse voltage is applied to the diode.
[0034]
FIG. 8B is a cross-sectional view for explaining a process of forming an anode (anode electrode) 92 and a cathode (cathode electrode) 94, and this process includes the second mask pattern (FIG. 8A). 84) and the channel stopper 88 are formed. ^- Forming an insulating material layer, such as silicon dioxide, on the epitaxial layer 72; and partially etching the insulating material layer to form the second N ⁺ Layer 82 and P ^- Forming an insulating film 90 having a third window exposing the layer 80; and patterning after depositing a metal material such as aluminum on the entire surface of the resultant structure on which the insulating film 90 having the third window is formed. The second N ⁺ Layer 82 and P ^- Forming the anode 92 simultaneously connected to the layer 80; and the first N ⁺ Layer (ie, N ⁺ The substrate 94 is formed by depositing a metal material such as aluminum on the back surface of the substrate 70 to form the cathode 94.
[0035]
According to the diode manufacturing method of the present invention as described above, P ^- Since the layer 80 is formed so as to have a wavy natural junction, it is not necessary to form a ring for improving the breakdown voltage of the diode, and it is not necessary to perform another mask process for forming the ring. The number of can be reduced. 2nd N ⁺ Layer 82 is P ^- Since it is formed simultaneously with the layer 80, the second N ⁺ A separate mask for forming layer 82 is not required.
[0036]
FIGS. 9 and 10 are cross-sectional views for explaining another embodiment suitable for manufacturing the diode of FIG. 5, and the manufacturing method according to the embodiment of the present invention is P. ^- Layer, 2N ⁺ Layer and N ⁺ The method for forming the channel stopper is different.
[0037]
First, FIG. ^- FIG. 10 is a cross-sectional view for explaining a step of forming the layer 108, and this step is performed using the first N ⁺ Layer (ie, N ⁺ Substrate) N in the usual way on 100 ^- The step of forming the epitaxial layer 102 and the N ^- A step of forming a first mask pattern 104 having a first window 106 that partially exposes a region to become an anode impurity layer on the epitaxial layer 102, and a diffusion after implanting a P-type impurity through the first window 106 To form a wave-like natural junction ^- It consists of forming the layer 108.
[0038]
At this time, ions such as boron (B) are used as the P-type impurity.
[0039]
In the present embodiment, the P ^- The layer 108 is formed by impurity ion implantation and diffusion process, and the N exposed through the first window 106 is formed. ^- A P-type liquid impurity source is applied to the surface of the epitaxial layer 102 and then driven in. ^- The P is diffused in the epitaxial layer 102. ^- Layer 108 can also be formed.
[0040]
FIG. 9B shows the second N ⁺ Layer 116 and N ⁺ It is sectional drawing shown in order to demonstrate the process of forming the channel stopper 118, Comprising: This process is N of the area | region used as a channel stopper. ^- Forming a second window 112 exposing the epitaxial layer in the first mask pattern 104; and exposing P through the first window 106 and the second window 112. ^- Layer 108 surface and N ^- On the surface of the epitaxial layer 102, for example, POCl _Three The N-type liquid impurity source 114 is applied, and the resultant substrate is driven in to connect the N-type liquid impurity source 114 to the P ^- Layer 108 and N ^- By diffusing into the epitaxial layer 102, the P ^- 2nd N selectively in layer 108 ⁺ At the same time that layer 116 is formed, P ^- N so as to surround layer 108 ^- Near the surface of the epitaxial layer 102, the N ⁺ The step includes forming a channel stopper 118.
[0041]
At this time, in the present embodiment, the second N is applied in a step of applying a liquid impurity source on the semiconductor substrate and then driving in and diffusing. ⁺ Layer 116 and N ⁺ Although the channel stopper 118 is formed, these may be formed in a step of diffusing after injecting N-type impurities (for example, phosphorus ions) through the first window 106 and the second window 112.
[0042]
In the present embodiment, the first window 106 that has already been opened is reopened during the etching process for forming the second window 112. ^- N exposed through the first window 106 during impurity ion implantation for forming the layer 108 ^- This is because a thin oxide film may be formed on the surface of the epitaxial layer 102. In the present embodiment, the first window 106 is reopened during the etching process for forming the second window 112, and the second N ⁺ Layer 116 can be formed smoothly.
[0043]
FIG. 10 is a cross-sectional view for explaining a process of forming an anode (anode electrode) 122 and a cathode (cathode electrode) 124. This process is performed by the first mask pattern (104 in FIG. 9B). , And a channel stopper 118 is formed. ^- Forming an insulating material layer such as silicon dioxide on the epitaxial layer 102; and partially etching the insulating material layer to form the second N ⁺ Layer 116 and P ^- Forming an insulating film 120 having a third window exposing the layer 108; and patterning after depositing a metal material such as aluminum on the entire surface of the resultant structure on which the insulating film 120 having the third window is formed. The second N ⁺ Layer 116 and P ^- Forming the anode 122 for simultaneous connection to the layer 108; and the first N ⁺ Layer (ie, N ⁺ The cathode 124 is formed by depositing a metal material such as aluminum on the back surface of the substrate 100.
According to the diode manufacturing method according to another embodiment of the present invention as described above, P ^- Since the layer 108 is formed so as to have a wavy natural junction, it is not necessary to form a ring for improving the breakdown voltage of the diode, and it is not necessary to perform another mask process for forming the ring. Can be reduced. 2nd N ⁺ Layer 116 is N ⁺ Since it can be formed simultaneously with the channel stopper 118, the second N ⁺ A separate mask for forming layer 116 is not required.
[0044]
The following is a result of simulating characteristics of a diode according to one conventional method, a diode according to another conventional method, and a diode according to the present invention.
[0045]
First, in the case of a diode by a conventional method (see FIG. 1), P ^- When the junction depth of the layer 16 was 2.2 μm and an arbitrary forward current value was taken, the forward voltage of the diode was 2.10 [V], and the electron current was about 48% higher than the Hall current. . At this time, the lifetime of the electrons was 56 [ns].
[0046]
Next, in the case of a diode by another conventional method (see FIG. 3), P ^- When the junction depth of the layer 38 is 18 μm and the current value is the same as the forward current of the diode according to one conventional method, the forward voltage of the diode is 2.13 [V], and the Hall current is the electron current. Increased by 161%. At this time, the lifetime of the electrons was 25 [ns].
[0047]
Finally, in the case of the diode according to the invention (see FIG. 5), the second N ⁺ The junction depth of the layer 58 is 6 μm, and the P ^- When the junction depth of the layer 56 is 18 μm and the current value is the same as the forward current of the diode according to one conventional method, the forward voltage of the diode is 2.11 [V], and the electron current is the Hall current. Increased by 77%. At this time, the lifetime of the electrons was 85 [ns].
[0048]
Therefore, according to the simulation results mentioned, it can be seen that the present invention has a higher ratio of electron current to hole current than the diodes of one method and another method. This means that the slow reverse current reduction characteristic (i.e., soft recovery) is improved over the conventional diode and the other diodes. Moreover, since the ratio of the electron current to the hole current is larger, it can be seen that the necessity of electron irradiation is less than that of the conventional method and the diodes of other methods.
[0049]
【The invention's effect】
As described above in detail, according to the diode of the semiconductor device and the method of manufacturing the same according to the present invention, the slow reverse current reduction characteristic can be improved, the number of masks during the manufacturing can be reduced, and the breakdown voltage characteristic And can increase reliability.
[Brief description of the drawings]
FIG. 1 shows P to obtain a slow reverse current reduction characteristic. ^- Sectional drawing which shows the conventional diode which formed the layer so that a shallow junction might be made.
FIG. 2 is a characteristic diagram showing an impurity concentration distribution in a cross section taken along the line II-II ′ in FIG.
FIG. 3 shows P to obtain a slow reverse current reduction characteristic. ^- Sectional drawing which shows the diode by the other conventional example which formed the layer so that a wavelike junction might be formed.
4 is a characteristic diagram showing an impurity concentration distribution in a cross section taken along line IV-IV ′ in FIG. 3;
FIG. 5 is a cross-sectional view showing an embodiment of a diode according to the present invention.
6 is a characteristic diagram showing an impurity concentration distribution in a cross section taken along line VI-VI ′ of FIG.
FIG. 7 is a sectional view showing an embodiment of a diode manufacturing method according to the present invention.
8 is a cross-sectional view showing a step that follows the step shown in FIG. 7. FIG.
FIG. 9 is a cross-sectional view showing another embodiment of a diode manufacturing method according to the present invention.
10 is a cross-sectional view showing a step that follows the step shown in FIG. 9. FIG.
[Explanation of symbols]
50 cathode
52 1N ⁺ layer
54 N ^- Epitaxial layer
56P ^- layer
58 2N ⁺ layer
60 N ⁺ Channel stopper
62 Insulating film
64 anode
I _e Electron current
I _h Hall current

Claims (12)

A first N ⁺ layer connected to the cathode electrode;
And the epitaxial layer, ^- N formed on the second 1N ⁺ layer
The N ^- formed near the surface of the epitaxial layer, the N ^- and layer, ^- P forming the junction of the wavy epitaxial layer
The P ^- is selectively formed in the vicinity the surface of the layer, the P ^- see including a first 2N ⁺ layer connected to the anode electrode with the layer,
The diode of the semiconductor element, wherein the second N ⁺ layer is formed in a portion where a wave-like junction is deeply formed in the P ⁻ layer . Wherein the bonding depth of the 2N ⁺ layer 6 [mu] m, the diode of the semiconductor device according to claim 1, wherein the P ⁺ layer junction depth of the first 2N ⁺ layer lower is 18 [mu] m. The diode of claim 1, further comprising an N ⁺ channel stopper in the vicinity of the surface of the N ^- epitaxial layer around the P ^- layer so as to surround the P ^- layer. Forming an N ⁻ epitaxial layer on the first N ⁺ layer;
Forming a first mask pattern having a plurality of first windows partially exposing a region to be an anode impurity layer on the N ⁻ epitaxial layer;
The exposed through the plurality of first windows N ^- said by simultaneously diffusing the N-type impurity and P-type impurities into the epitaxial layer N ^- and the layer, the P ^{- -} P constituting a junction of the epitaxial layer and the corrugated surface of the layer And a step of simultaneously forming a second N ⁺ layer selectively formed in the vicinity of the diode. Removing the first mask pattern after forming the second N ⁺ layer;
Forming a second mask pattern having a second window exposing the region to become a channel stopper on the epitaxial layer, ^- the N until the first 2N ⁺ layer is formed
Wherein by diffusing the N-type impurity through the second window P ^- the near layer N ^- semiconductor device according to claim 4, characterized by further comprising a step of forming a channel stopper on the epitaxial layer near the surface Diode manufacturing method. Forming an insulating film on the N ^- epitaxial layer formed up to the channel stopper;
Forming a third window for exposing the layer and the first 2N ⁺ layer, ^- the P by selectively removing the insulating film
Layers and methods of the diode manufacturing semiconductor device according to claim 5, characterized in that it comprises further a step of forming an anode electrode in contact with the first 2N ⁺ layer ^- the P through the third window. 5. The method of manufacturing a diode of a semiconductor device according to claim 4 , wherein an impurity having a diffusion coefficient larger than that of the N-type impurity is used as the P-type impurity. 8. The method of manufacturing a diode of a semiconductor device according to claim 7 , wherein the P-type impurity is boron ion and the N-type impurity is phosphorus ion. Forming an N ⁻ epitaxial layer on the first N ⁺ layer;
Forming a first mask pattern having a plurality of first windows partially exposing a region to be an anode impurity layer on the N ⁻ epitaxial layer;
Forming a layer, ^- P forming the bonding of the epitaxial layer and the wavy ^- the N by diffusing a P-type impurity in the epitaxial layer ^- the N exposed through the plurality of first windows
Wherein the first mask pattern partially by etching, the areas channel stopper is formed on the first mask pattern N ^- forming a second window exposing the epitaxial layer, the plurality of first the exposed through the window and the second window P ^- layer and the N ^- said by diffusing the N-type impurity into the epitaxial layer P ^- simultaneously forming the first 2N ⁺ layer in the layer, the P ^- surrounds the layer Forming the N ⁺ channel stopper as described above. Step of diffusing the P-type impurity is the N through the plurality of first windows ^- a step of implanting boron ions into the interior of the epitaxial layer,
After application to the surface of the epitaxial layer, the drive - ^- step of diffusing the N-type impurity is the P liquid impurities source of POCl ₃ was exposed through the plurality of first windows and the second windows ^- layer and said N-in the method of the diode manufacturing semiconductor device according to claim 9, characterized in that the step of diffused into the epitaxial layer ^- a by performing the impurity source the P ^- layer and said N. Step of diffusing the P-type impurity is the N through the plurality of first windows ^- a step of implanting boron ions into the interior of the epitaxial layer,
To claim 9, characterized in that the step of implanting phosphorous ions into the interior of the epitaxial layer ^- a step of diffusing the N-type impurity is the P through the plurality of first windows and the second windows ^- layer and the N The diode manufacturing method of the semiconductor element of description. Forming an insulating film on the epitaxial layer, ^- the N until the channel stopper and the first 2N ⁺ layer is formed
Forming a third window for exposing the layer and the first 2N ⁺ layer, ^- the P by selectively removing the insulating film
Layers and methods of the diode manufacturing semiconductor device according to claim 9, characterized in that it comprises further a step of forming an anode electrode in contact with the first 2N ⁺ layer ^- the P through the third window.

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