JP4603851B2 - Cmosイメージセンサの製造方法 - Google Patents
Cmosイメージセンサの製造方法 Download PDFInfo
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- JP4603851B2 JP4603851B2 JP2004307638A JP2004307638A JP4603851B2 JP 4603851 B2 JP4603851 B2 JP 4603851B2 JP 2004307638 A JP2004307638 A JP 2004307638A JP 2004307638 A JP2004307638 A JP 2004307638A JP 4603851 B2 JP4603851 B2 JP 4603851B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 25
- 239000002184 metal Substances 0.000 claims description 69
- 238000002161 passivation Methods 0.000 claims description 57
- 238000005530 etching Methods 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 30
- 238000000059 patterning Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 4
- 230000003647 oxidation Effects 0.000 claims 2
- 238000007254 oxidation reaction Methods 0.000 claims 2
- 239000011229 interlayer Substances 0.000 description 15
- 239000010410 layer Substances 0.000 description 8
- 230000002093 peripheral effect Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 6
- 238000005468 ion implantation Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000007667 floating Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 239000003086 colorant Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000006263 metalation reaction Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14687—Wafer level processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14632—Wafer-level processed structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Description
11 素子分離膜
12 ゲート電極
13 スペーサ
14 単位画素
15 N型イオン注入領域
16 P型イオン注入領域
17 層間絶縁膜
18 第1金属配線
19 第1金属層間絶縁膜
20 第2金属配線
21 第2金属層間絶縁膜
22 第3金属配線
23、32 パッシべーション膜
24 カラーフィルタ
25、34 オーバーコーティング層
26 マイクロレンズ
27、35 低温酸化膜(LTO)
30 金属層間絶縁膜
31 パッドメタル
33 酸化膜
Claims (8)
- パッドオープン部を備えるCMOSイメージセンサの製造方法であって、
パッドメタル上にパッシべーション膜を形成するステップと、
第1パッドマスクを用いて前記パッシべーション膜をエッチングすることによりパターニングし、前記パッドメタルの所定部分を露出させるステップと、
前記パッドメタルの露出された前記所定部分及び前記パッシべーション膜の上に酸化膜を蒸着するステップと、
カラーフィルタ、平坦化膜及びマイクロレンズを順に形成するステップと、
前記マイクロレンズを保護する低温酸化膜を、以上のステップによって形成された構造全体の上に塗布するステップと、
前記パターニングされたパッシベーション膜を露出させずに前記パッドメタルの一部をオープンさせるように、前記低温酸化膜及び前記酸化膜を選択的にエッチングするステップと
を含むことを特徴とするCMOSイメージセンサの製造方法。 - 前記第1パッドマスクを用いて前記パッシべーション膜をパターニングする前記ステップが、
露出した前記パッドメタルの周囲を取り囲む複数のホールを形成するように、前記パッシべーション膜をパターニングするステップを含むことを特徴とする請求項1に記載のCMOSイメージセンサの製造方法。 - 前記第1パッドマスクを用いて前記パッシべーション膜をパターニングする前記ステップが、
露出した前記パッドメタルの周囲を取り囲むストリングを形成するように、前記パッシべーション膜をパターニングするステップを含むことを特徴とする請求項1に記載のCMOSイメージセンサの製造方法。 - 前記低温酸化膜及び前記酸化膜を選択的にエッチングするステップが、前記第1パッドマスクよりも面積が小さい第2パッドマスクを用いてエッチングすることを特徴とする請求項1に記載のCMOSイメージセンサの製造方法。
- パッドオープン部を備えるCMOSイメージセンサの製造方法であって、
パッドメタル上にパッシべーション膜を形成するステップと、
前記パッシべーション膜上に酸化膜を蒸着するステップと、
第1パッドマスクを用いて前記パッシべーション膜及び前記酸化膜をエッチングすることによりパターニングし、前記パッドメタルの所定部分を露出させるステップと、
カラーフィルタ、平坦化膜及びマイクロレンズを順に形成するステップと、
前記マイクロレンズを保護する低温酸化膜を、以上のステップによって形成された構造全体の上に塗布するステップと、
前記パターニングされたパッシベーション膜を露出させずに前記パッドメタルの一部をオープンさせるように、前記低温酸化膜を選択的にエッチングするステップと
を含むことを特徴とするCMOSイメージセンサの製造方法。 - 前記第1パッドマスクを用いて前記パッシべーション膜をパターニングするステップが、
露出した前記パッドメタルの周囲を取り囲む複数のホールを形成するように、前記パッシべーション膜をパターニングするステップを含むことを特徴とする請求項5に記載のCMOSイメージセンサの製造方法。 - 前記第1パッドマスクを用いて前記パッシべーション膜をパターニングするステップが、
露出した前記パッドメタルの周囲を取り囲むストリングを形成するように、前記パッシべーション膜をパターニングするステップを含むことを特徴とする請求項5に記載のCMOSイメージセンサの製造方法。 - 前記低温酸化膜を選択的にエッチングするステップが、
前記第1パッドマスクによって露出される前記パッドメタルの面積よりも、第2パッドマスクによって露出される前記パッドメタルの面積の方が小さく、
前記第2パッドマスクを用いてエッチングすることを特徴とする請求項5に記載のCMOSイメージセンサの製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0074572A KR100505894B1 (ko) | 2003-10-24 | 2003-10-24 | 저온산화막의 박리현상을 개선한 시모스 이미지센서의제조방법 |
Publications (2)
Publication Number | Publication Date |
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JP2005129952A JP2005129952A (ja) | 2005-05-19 |
JP4603851B2 true JP4603851B2 (ja) | 2010-12-22 |
Family
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Application Number | Title | Priority Date | Filing Date |
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JP2004307638A Active JP4603851B2 (ja) | 2003-10-24 | 2004-10-22 | Cmosイメージセンサの製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7232698B2 (ja) |
JP (1) | JP4603851B2 (ja) |
KR (1) | KR100505894B1 (ja) |
CN (1) | CN1311544C (ja) |
TW (1) | TWI351111B (ja) |
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2003
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2004
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- 2004-10-22 JP JP2004307638A patent/JP4603851B2/ja active Active
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JP2000164836A (ja) * | 1998-11-25 | 2000-06-16 | Nikon Corp | 固体撮像装置等の半導体装置の製造方法 |
JP2001339059A (ja) * | 2000-05-29 | 2001-12-07 | Sony Corp | 固体撮像素子の製造方法 |
JP2002100755A (ja) * | 2000-08-18 | 2002-04-05 | Hynix Semiconductor Inc | Cmosイメージセンサ及びその製造方法 |
JP2003273341A (ja) * | 2002-03-14 | 2003-09-26 | Tobu Denshi Kk | イメージセンサ用半導体素子の製造方法 |
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US20050090035A1 (en) | 2005-04-28 |
CN1311544C (zh) | 2007-04-18 |
CN1624900A (zh) | 2005-06-08 |
TWI351111B (en) | 2011-10-21 |
US7232698B2 (en) | 2007-06-19 |
JP2005129952A (ja) | 2005-05-19 |
TW200515607A (en) | 2005-05-01 |
KR100505894B1 (ko) | 2005-08-01 |
KR20050039157A (ko) | 2005-04-29 |
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