JP4593179B2 - Display device - Google Patents

Description

The present invention relates to a display device including a self-luminous light emitting element and a transistor in which a channel portion is formed using an amorphous semiconductor or an organic semiconductor.

In recent years, development of display devices having light-emitting elements has been actively promoted. In addition to the advantages of existing liquid crystal display devices, this display device has features such as a high response speed, excellent video display, and a wide viewing angle, and has attracted much attention as a next-generation flat panel display.

The display device includes a plurality of pixels each including a light emitting element and at least two transistors, and the transistor connected in series with the light emitting element in the pixel controls light emission or non-light emission of the light emitting element. A transistor often uses a crystalline semiconductor (polysilicon) because of its high field effect mobility. The light-emitting element has a structure in which an electroluminescent layer is sandwiched between two electrodes. The electroluminescent layer is formed on a patterned first conductive film (first electrode), and the electroluminescent layer is formed. A second conductive film (second electrode) is formed so as to cover the entire surface of the layer.

There is a transistor using an amorphous silicon TFT as a transistor for controlling a light emitting element (for example, see Patent Document 1).
JP 2003-255856 A

A transistor using polysilicon is likely to have variations in characteristics due to defects formed in crystal grain boundaries. Therefore, when there is variation in the drain current of the transistor, even if the input signal voltage is the same, the drain current varies from pixel to pixel, resulting in luminance unevenness.

In view of the above circumstances, it is an object of the present invention to provide a display device in which unevenness in luminance caused by variation in transistor characteristics is suppressed.

In addition, it is preferable that the second conductive film (second electrode) formed over the electroluminescent layer be subjected to heat treatment to reduce resistance. However, the electroluminescent layer has low heat resistance and cannot be subjected to high-temperature heat treatment. Therefore, due to the difference in resistance value, the voltage value applied between the electrodes at the end and the center is different, which may cause poor image quality.

In view of the above circumstances, an object of the present invention is to provide a display device in which image quality defects due to a difference in resistance value are suppressed.

In order to solve the above-described problems of the prior art, the present invention takes the following measures.

The present invention is characterized in that a transistor in which a channel portion is formed using an amorphous semiconductor (typically amorphous silicon, a-Si: H) or an organic semiconductor is used as a transistor for driving a light-emitting element. The transistor has little variation in characteristics such as field effect mobility. Therefore, a display device in which luminance unevenness caused by variation in transistor characteristics is improved can be provided. In addition, the present invention using an amorphous semiconductor is very effective when manufacturing a large panel of several inches to several tens of inches, and since the crystallization process is unnecessary and the number of masks is small, the manufacturing cost is low. Can be reduced.

The present invention is characterized in that an auxiliary conductive film (wiring) is connected to the conductive film laminated on the electroluminescent layer to reduce the resistance of the conductive film. With the above characteristics, it is possible to provide a display device in which the resistance of the conductive film can be reduced without performing heat treatment and image quality defects are suppressed. This feature is very effective in manufacturing a large panel of several tens of inches, because the resistance value becomes a problem as the number of inches of the panel increases.

The present invention relates to a light emitting element including a light emitting material between a pair of electrodes, a pixel portion in which a plurality of transistors that form a channel portion using an amorphous semiconductor are disposed, and a substrate including a driver circuit disposed around the pixel portion. And a driver IC attached to the substrate. The driving circuit formed on the substrate includes an N-type transistor (hereinafter sometimes referred to as a-Si: HTFT) in which a channel portion is formed of an amorphous semiconductor and a P-type transistor in which a channel portion is formed of an organic semiconductor. (Hereinafter sometimes referred to as organic TFT). The organic TFT corresponds to a transistor including an organic small molecule such as pentacene, an organic polymer such as PEDOT (polythiophene) or PPV (polyphenylene vinylene). The a-Si: HTFT and the organic TFT can be manufactured on the same substrate together with the pixel portion, and a shift register, a buffer, or the like can be configured using this CMOS circuit as one unit circuit. It is also possible to configure a drive circuit with only N-type transistors and only P-type transistors. In that case, a drive circuit can be configured with only a-Si: HTFT and only organic TFT.

The present invention includes a first electrode connected to the anode line, a light-emitting element including a light-emitting material between the second electrodes connected to the cathode line, and a transistor in which a channel portion is formed using an amorphous semiconductor. And a reverse bias applying circuit for applying a reverse bias to the light emitting element by inverting the potentials of the anode line and the cathode line. With the above structure, it is possible to provide a display device in which deterioration of the light-emitting element over time is suppressed and reliability is improved.

In the present invention, a light-emitting element including a light-emitting material between a pair of electrodes, a first transistor having a gate electrode connected to a first power source whose potential is kept constant, and a gate electrode connected to a signal line A second power source having the same potential as the low potential voltage, and a third power source having the same potential as the high potential voltage, and the light emitting element and the first and second transistors. Connected in series. In addition, the display device is characterized in that the first and second transistors form a channel portion with an amorphous semiconductor.
In the above structure, since the second transistor operates in a linear region, a slight change in V _GS of the first transistor does not affect the current value of the light emitting element. That is, the current value of the light emitting element is determined by the first transistor operating in the saturation region. Therefore, the present invention having the above structure can provide a display device in which luminance unevenness of a light-emitting element due to variation in transistor characteristics is improved and image quality is improved.

The present invention having the above structure can provide a display device in which luminance unevenness caused by variation in transistor characteristics is improved. Further, the resistance of the conductive film can be reduced without performing heat treatment, and a display device in which image quality defects are suppressed can be provided. Further, the present invention including a transistor including an amorphous semiconductor as a channel portion can provide an inexpensive and large display device.

(Embodiment 1)
Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals are used in common in different drawings.

First, the arrangement of wirings in the panel, particularly the arrangement of a power supply line (hereinafter referred to as an anode line) having the same potential as the high potential voltage VDD and a power supply line (hereinafter referred to as a cathode line) having the same potential as the low potential voltage VSS. This will be described with reference to FIG. Note that FIG. 4 illustrates only wirings arranged in the column direction in the pixel portion 104.

4A is a top view of the panel. A pixel portion 104 in which a plurality of pixels 105 are arranged in a matrix on a substrate 100, a signal line driver circuit 101 around the pixel portion 104, Scan line driving circuits 102 and 103 are arranged. The number of these driver circuits is not particularly limited, and may be changed as appropriate depending on the configuration of the pixel 105. Alternatively, the driver IC may be bonded using a COG method or the like without being integrally formed on the substrate 100.

The signal lines 111 arranged in the column direction in the pixel portion 104 are connected to the signal line driver circuit 101. Similarly, the power supply lines 112 to 114 arranged in the column direction are connected to any of the anode lines 107 to 109. Similarly, the auxiliary wiring 110 arranged in the column direction is connected to the cathode line 106. The anode lines 107 to 109 and the cathode line 106 are routed so as to surround the periphery of the pixel portion 104 and the driving circuits arranged in the periphery thereof, and are connected to the terminals of the FPC.

The anode lines 107 to 109 correspond to any color of RGB. The purpose of this is to correct luminance variations occurring between the respective colors by changing the potentials of the anode lines 107 to 109. That is, since the current density of the electroluminescent layer of the light emitting element is different for each color, the problem that the luminance is different for each color even when the same current value is passed is improved. Here, it is assumed that the electroluminescent layers are separately applied in RGB, but there is a problem of differences in current density in each color, such as a method using a light emitting element that emits white light and a color filter as a colorization method. In the case of adopting a method that does not become or when performing monochrome display, it is not necessary to provide a plurality of anode lines.

FIG. 4B simply shows a mask layout diagram. The anode lines 107 to 109 and the cathode lines 106 are arranged around the signal line driver circuit 101, and the anode lines 107 to 109 are arranged in the pixel portion 104. Are connected to power supply lines 112 to 114 arranged in the column direction. As shown in the figure, the cathode line 106 and the auxiliary wiring 110 are formed of the same layer of conductor.

After the cathode line 106 and the auxiliary wiring 110 are formed, a first conductive film (first electrode) of the light emitting element is formed, and then an insulating film (also called a bank) is formed. Next, an opening is formed in the insulating film located above the cathode line 106 and the auxiliary wiring 110. By forming the opening, the cathode line 106 and the auxiliary wiring 110 are exposed, and the electroluminescent layer is formed in this state. The electroluminescent layer is separately applied so as not to be stacked in the opening formed above the cathode line 106 and the auxiliary wiring 110. Next, a second conductive film (second electrode) is formed on the entire surface. At this time, the second conductive film is formed by being stacked on the electroluminescent layer, the cathode line 106 and the auxiliary wiring 110. . Through the above process, the second conductive film is electrically connected to the cathode line 106 and the auxiliary wiring 110, and this embodiment has a significant feature in this structure. According to this feature, the resistance of the second conductive film formed so as to cover the electroluminescent layer can be reduced, so that the image quality defect due to the resistance value of the second conductive film can be improved. . This feature is very effective in manufacturing a large panel of several tens of inches, because the resistance value becomes a problem as the number of inches of the panel increases.

Note that although a case where the second conductive film is connected to the cathode line is given as an example in this embodiment, the present invention is not limited to this. The second conductive film may be connected to the anode line. In this case, the second conductive film is set so that the counter electrode of the light emitting element serves as an anode.

The layer for forming the auxiliary wiring 110 is not limited to a conductor in the same layer as the signal line arranged in the column direction as shown in FIG. 4, but a conductive film in the same layer as the scanning line arranged in the row direction. It may be used. Further, the contact (connection) between the auxiliary wiring 110 and the second conductive film may be provided linearly in the column direction, may be provided in a dot shape, or a combination thereof. Moreover, you may provide linearly in a row direction, may provide it in dot shape, and may combine them. Therefore, the mask layout diagrams will be described below with reference to FIGS. 5 to 7 by taking some cases as examples. 5 to 7 are simplified drawings, and only the pixel electrode is shown in the pixel 105. FIG. The illustration of the power supply line 112 is omitted.

First, a case where the auxiliary wiring 110 and the signal line 111 are formed using the same layer of conductor and the auxiliary wiring 110 and the second conductive film are connected to each other through a linear opening is described with reference to FIGS. explain. In FIG. 5, a plurality of pixels 105 are arranged in a matrix in the pixel portion 104, and signal lines 111 and auxiliary wirings 110 are arranged in the column direction, and scanning lines 128 are arranged in the row direction. The auxiliary wiring 110 is connected to the cathode line 106. Note that the auxiliary wiring 110 and the cathode line 106 are wirings formed of the same layer of conductor, but here, the wiring arranged in the pixel portion 104 is referred to as the auxiliary wiring 110 and is arranged in other regions. This wiring is called a cathode line 106.

A linear opening 120 is formed above the cathode line 106 and the auxiliary wiring 110, and the auxiliary wiring 110 and the cathode line 106 are connected to the second conductive film through the opening 120. In this case, the auxiliary wiring 110 is connected to the second conductive film through the opening 120 formed in a linear shape.

Next, the case where the linear opening 122 is formed above the cathode line 106 and the dotted opening 123 is formed on the auxiliary wiring 110 will be described with reference to FIG. In this case, the auxiliary wiring 110 is connected to the second conductive film through the opening 123 formed in a dot shape. Other than that, the configuration is the same as that of FIG.

Finally, the case where the auxiliary wiring 124 and the scanning line 128 are formed of the same layer of conductor and the auxiliary wiring 124 and the second conductive film are connected to each other through the opening formed in a dotted shape is used with reference to FIG. I will explain. In FIG. 7, a plurality of pixels 105 are arranged in a matrix in the pixel portion 104, and signal lines 111 are arranged in the column direction, and scanning lines 128 and auxiliary wirings 124 are arranged in the row direction. The auxiliary wiring 124 is connected to the cathode line 126. The auxiliary wiring 124 and the cathode line 126 are formed of another layer of conductor and are connected via a contact hole.

A linear opening 125 is formed above the cathode line 126, and a dotted opening 127 is formed above the auxiliary wiring 124, and the cathode line 126 and the auxiliary wiring 124 are connected via these openings. The second conductive film is connected. In this case, the auxiliary wiring 124 is connected to the second conductive film through the opening 127 formed in a dot shape.

As described above, the auxiliary wiring is formed using a conductor in the same layer as the wiring (for example, signal line) arranged in the column direction (FIGS. 5 and 6), and the wiring (for example, scanning line) arranged in the row direction. The main method is a method of forming a conductor of the same layer (FIG. 7), and these methods do not require a new mask or the like. Therefore, problems such as an increase in manufacturing cost and a decrease in reliability due to an increase in masks can be avoided. Further, in the case where the contact between the auxiliary wiring and the second conductive film is provided in a dot shape, if the contact formation portion is arranged at the end portion of the pixel, reduction of the opening can be suppressed, and a brighter image can be obtained. Can be provided.

Subsequently, a cross-sectional structure and a mask layout diagram thereof when a driving transistor, a light emitting element, and an auxiliary wiring are provided over a substrate having an insulating surface will be described with reference to FIGS.

FIG. 1C shows a mask layout for one pixel. A conductor 16 that functions as a power supply line, a conductor 26 that functions as a signal line, and a conductor 27 that functions as an auxiliary wiring in the column direction. The conductors 28 that are arranged and function as scanning lines are arranged in the row direction. In addition, a switching transistor 29 and a driving transistor 30 are provided.

FIG. 1A corresponds to a diagram showing a cross-sectional structure taken along ABC in the mask layout diagram of FIG. A gate electrode 11 is formed on the substrate 10 having an insulating surface, and a gate insulating film 12 is formed on the gate electrode 11. Next, an amorphous semiconductor, an N-type semiconductor, and a conductor are stacked and formed, and these are simultaneously patterned to form an amorphous semiconductor 13, N-type semiconductors 14, 15, and conductors 16, 17. The Next, after the insulators 18 and 19 are formed and an opening is formed in a predetermined region so that a part of the conductor 17 is exposed, the conductor 20 is formed. Thereafter, a conductor (first electrode, pixel electrode) 21, an electroluminescent layer 22, and a conductor (second electrode, counter electrode) 23 are formed so as to be electrically connected to the conductor 20. A stacked body of the conductor 21, the electroluminescent layer 22, and the conductor 23 corresponds to the light emitting element 24. Next, the protective film 25 is formed on the entire surface.

When the conductors 16 and 17 are formed, the conductors 26 and 27 are formed at the same time. The conductor 26 corresponds to a signal line, and the conductor 27 corresponds to an auxiliary wiring. Before the conductor (second electrode, counter electrode) 23 is formed, the conductor 27 is exposed, so that the conductor 23 and the conductor 27 are stacked. The low resistance is realized. Note that in the cross-sectional structure illustrated in FIG. 1A, the conductor 27 functioning as an auxiliary wiring is formed of a conductor in the same layer as the conductors 16 and 17.

FIG. 1B shows a cross-sectional structure of the driving transistor 50 and the light emitting element 24. A gate electrode 11 is formed on the substrate 10 having an insulating surface, and a gate insulating film 12 is formed on the gate electrode 11. Next, an amorphous semiconductor 13 is formed, and then an insulator 31 that serves as an etching stopper is formed. Subsequently, an N-type semiconductor and a conductor are stacked, and these are patterned simultaneously to form an N-type semiconductor. Semiconductors 32 and 33 and conductors 34 and 35 are formed. Next, the insulators 18, 5070, and 5080 are formed, and an opening is formed in a predetermined region so that a part of the conductor 35 is exposed, and then a connection wiring 5060 made of a conductor is formed. Thereafter, a light emitting element 24 including the conductor 21, the electroluminescent layer 22, and the conductor 23 is formed, and then a protective film 25 is formed.

When the conductors 34 and 35 are formed, the conductor 26 is formed at the same time, and when the conductor 20 is formed, the conductor 36 is formed at the same time. The conductor 26 corresponds to a signal line, and the conductor 36 corresponds to an auxiliary wiring. Before the conductor (opposite electrode) 23 is formed, the conductor 36 is exposed so that the conductor 36 and the conductor 23 are stacked, and the resistance of the conductor 23 is reduced. Realized. Note that in the cross-sectional structure illustrated in FIG. 1B, the conductor 36 that functions as an auxiliary wiring is formed using a conductor in the same layer as the conductor 20.

FIG. 2 shows a cross-sectional structure of the driving transistor 51 and the light emitting element 24. A gate electrode 11 and a gate insulating film 12 are formed on the gate electrode 11 over a substrate 10 having an insulating surface. Next, an amorphous semiconductor 13 is formed, and then an insulator 41 that serves as an etching stopper is formed, and a gate electrode 42 is formed. Subsequently, an N-type semiconductor and a conductor are stacked and formed, and these are simultaneously patterned to form N-type semiconductors 43 and 44 and conductors 45 and 46. Next, after the insulators 18 and 19 are formed and an opening is formed in a predetermined region so that a part of the conductor 46 is exposed, the conductor 20 is formed. Thereafter, a light emitting element 24 including the conductor 21, the electroluminescent layer 22, and the conductor 23 is formed, and then a protective film 25 is formed. In addition, the conductor 36 that functions as an auxiliary wiring is electrically connected to the conductor 23.

FIG. 3A illustrates a cross-sectional structure of the driving transistor 431 and the light-emitting element 438. A driving transistor 431 is formed over a substrate 430 having an insulating surface, an insulator 440 is formed over the driving transistor 431, an opening is formed in a predetermined portion, and then a conductive material is formed over the insulator 440. Body 433, 434 is formed. Subsequently, a conductor 435 corresponding to the pixel electrode is formed, and then an insulator 442 is formed. After an opening 439 is formed in a predetermined portion of the insulators 441 and 442, an electroluminescent layer 436 is formed over the insulator 442, and a conductor 437 corresponding to a counter electrode is formed over the electroluminescent layer 436. . As described above, the structure illustrated in FIG. 3A has a structure in which four layers of insulators are stacked.

FIG. 3B illustrates a cross-sectional structure of the driving transistor 431 and the light-emitting element 459. A driving transistor 431 is formed over a substrate 430 having an insulating surface, and a wiring 460 and an auxiliary wiring 452 electrically connected to the driving transistor 431 are formed. After that, an insulator 453 is formed, and an opening is formed at a predetermined position of the insulator 453. Subsequently, a conductor 454 corresponding to a pixel electrode is formed, an insulator 458 is formed over the conductor 454, and an opening is formed at a predetermined position of the insulator 458. Next, electroluminescent layers 455 and 456 are formed over the conductor 454, and a conductor 457 corresponding to a counter electrode is formed over the electroluminescent layers 455 and 456. A stacked body of the conductor 454, the electroluminescent layer 455, and the conductor 457 corresponds to the light-emitting element 459.

In the structure illustrated in FIG. 3B, the electroluminescent layer 456 over the auxiliary wiring 452 is thin and is formed by an evaporation method, and thus is not formed on the side surface of the auxiliary wiring 452. This configuration utilizes this point, and for this reason, the side surface of the auxiliary wiring 452 and the conductor 457 are electrically connected.

As shown in FIGS. 1 to 3, the present invention includes a transistor having an amorphous semiconductor and a light emitting element. The driving transistor connected in series with the light emitting element is preferably set to channel width W / channel length L = 1 to 100 (preferably 5 to 20) in order to improve current capability. Specifically, it is preferable to set the channel length to 5 to 15 μm and the channel width W to 20 to 1200 μm (preferably 40 to 600 μm). Note that when the channel width W and the channel length are set as described above, the area occupied by the transistor in the pixel increases. Therefore, it is preferable that the light emitting element emits a top surface that is emitted in a direction opposite to the substrate.

Transistors in which a channel portion is formed using an amorphous semiconductor are roughly classified into a channel etch type (FIGS. 1A, 3A and 3B), a channel protection type (FIG. 1B), and a dual gate type. (FIG. 2) is mentioned, and any of them may be used in the present invention.

One of the pair of electrodes included in the light-emitting element corresponds to an anode and the other corresponds to a cathode. It is preferable to use materials such as metals, alloys, electrical conductor compounds, and mixtures thereof for the anode and the cathode. A material having a high work function is used for the anode, and a material having a low work function is used for the cathode. The electroluminescent layer sandwiched between the anode and the cathode is formed of a wide variety of materials such as an organic material and an inorganic material. The luminescence in the electroluminescent layer includes luminescence (fluorescence when returning from a singlet excited state to a ground state). ) And light emission (phosphorescence) when returning from the triplet excited state to the ground state.

In addition, any material of an organic material and an inorganic material may be used for the insulating film. However, since an organic material has a problem in its hygroscopicity, a barrier film such as a silicon nitride film is preferably provided. Among organic materials, resist materials are preferable because they are less expensive than other organic materials such as acrylic and polyimide, have a small contact hole diameter, and have a low hygroscopic property, so that a barrier film is not necessary. is there. However, since the resist material is colored, it is preferably used for a top emission display device. Specific examples of the resist material include a solution in which a cresol resin or the like is dissolved in a solvent (propylene glycol monomethyl ether acetate; PGMEA), and the solution is formed by applying the solution by a spin coating method.

The present invention having the above structure can provide a display device in which luminance unevenness caused by variation in characteristics of the transistor is improved because variation in characteristics of the transistor is small. In addition, the present invention using an amorphous semiconductor is suitable for manufacturing a large panel of several inches to several tens of inches. This is because a crystallization step is unnecessary and the number of masks is small, so that manufacturing costs can be suppressed. Further, although depending on the heat treatment temperature in the process, the amorphous semiconductor can be manufactured over a lightweight, thin, and inexpensive flexible substrate such as a plastic, so that the application of the display device can be expanded.

In addition, the auxiliary wiring can reduce the resistance value of the second conductive film, resulting in a reduction in power consumption. Further, signal writing failure and gradation failure due to wiring resistance can be prevented, and the occurrence of voltage drop can be suppressed, so that a uniform voltage can be applied to the light emitting element. Therefore, a display device with improved image quality can be provided. This configuration is very effective in manufacturing a large panel of several tens of inches, because the resistance value becomes a problem as the number of inches of the panel increases.

(Embodiment 2)
Embodiments of the present invention will be described with reference to the drawings.

FIG. 8A shows a top view of a panel, which includes a pixel portion 202 including a plurality of pixels 201 arranged in a matrix and a scan line driver circuit 203 over a substrate 200 having an insulating surface. A plurality of driver ICs 205 are attached to the substrate 200, and the plurality of driver ICs 205 correspond to the signal line driver circuit 204. The scan line driver circuit 203 and the signal line driver circuit 204 are connected to the power supply circuit 206 and the controller 207.

The power supply circuit 206 supplies power to the panel. Specifically, the power supply circuit 206 is connected to a power supply line arranged in the pixel portion 202. This power supply line is also called an anode line or a cathode line. The anode line has the same potential as the high potential voltage VDD, and the cathode line has the same potential as the low potential voltage VSS. The controller 207 plays a role of supplying a clock, a clock back, a start pulse, and a video signal to the signal line driver circuit 204 and the scan line driver circuit 203. Further, in the case where a plurality of driver ICs 205 are provided as the signal line driver circuit 204 as in this panel, there is also a role of determining which video signal is supplied to which driver IC, that is, a role of distributing the signals.

Note that FIG. 8A shows the case where only the driving circuit on the scanning line side is formed over the substrate; however, the present invention is not limited to this, and depending on the operating frequency of the driving circuit, the driving circuit on the same substrate is used. A driver circuit on the signal line side may also be formed. However, preferably, the driver circuit on the scanning line side is formed over the substrate and the driver circuit on the signal line side is a driver IC. This meets the demands of each of the scanning line driving circuit and the signal line driving circuit. The signal line driving circuit is driven at a frequency of 50 MHz or more (for example, 65 MHz or more), and the scanning line driving circuit is a signal line driving circuit. This is because the driving frequency is about 100 kHz, which is about 1/100. As described above, it is preferable to select either a method using a drive circuit integrated on a substrate or a method of attaching a driver IC in accordance with the operating frequency of each drive circuit.

FIG. 8B is a top view of the panel, which includes a pixel portion 202 including a plurality of pixels 201 arranged in a matrix over a substrate 200 having an insulating surface. In addition, the driver IC 209 on the signal line side and the driver IC 208 on the scanning line side that are pasted by the COG method are included. These driver ICs 208 and 209 are connected to the external input terminal 211 by the connection wiring 210. Then, the power supply circuit 206 and the controller 207 are connected via the external input terminal 211. Note that FIG. 8B shows a case of being attached by the COG method, but the present invention is not limited to this, and the driver IC is connected to the driver IC through the FPC without being attached to the substrate. You may let them. Further, the length and the number of the long sides and short sides of the driver IC to be mounted are not particularly limited.

Each pixel 201 included in both panels includes a light-emitting element including a light-emitting material between a pair of electrodes, and a transistor in which a channel portion is formed using an amorphous semiconductor or an organic semiconductor. The first electrode of the light emitting element is connected to the anode line, and the second electrode is connected to the cathode line. In the present invention, the potential of the anode line and the cathode line is switched during a period when the light emitting element is not emitting light. A reverse bias is applied to the capacitor. The timing for applying the reverse bias to the light emitting element is determined by supplying a predetermined signal from the controller 207 to the power supply circuit 206. Therefore, in the present invention, the power supply circuit 206 and the controller 207 are collectively referred to as a reverse bias application circuit.

By the way, when displaying a multi-tone image using the display device of the present invention, it is preferable to use a time gray scale method. This is because if the reverse bias is set to be applied during a period in which the light emitting element does not emit light, the reverse bias can be applied without affecting the gradation display.

In general, one wiring of the anode line and the cathode line is commonly connected to all the pixels. Therefore, it is necessary to apply the reverse bias at the same time for all the pixels. Therefore, a new semiconductor element may be disposed in order to apply a reverse bias to the light emitting element. This semiconductor element corresponds to a transistor or a diode. By using this semiconductor element, a reverse bias can be applied to any pixel such as every pixel or every line. Specifically, a reverse bias is applied to the light emitting element at the same time as the semiconductor element becomes conductive. That is, when the semiconductor element becomes conductive, a certain wiring and a light emitting element are electrically connected. At this time, the reverse bias is applied to the light emitting element by setting the potential of the wiring lower than the counter potential of the light emitting element. When a reverse bias is applied, the light emitting element inevitably emits no light. However, in the case of the above structure, the reverse bias can be applied to an arbitrary pixel at an arbitrary timing, which affects gradation display. Will not affect. This method is suitable not only for the time gray scale method but also when other methods such as analog driving are used as a method for expressing multiple gray scales.

The present invention having the above structure can provide a display device that can suppress deterioration over time of a light-emitting element and can improve reliability and extend the life of the element. This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 3)
In this embodiment mode, a cross-sectional structure of a CMOS circuit including an N-type transistor whose channel portion is formed using an amorphous semiconductor and a P-type transistor whose channel portion is formed using an organic semiconductor will be described with reference to FIGS.

FIG. 10A is an equivalent circuit diagram in which a P-type transistor 221 and an N-type transistor 222 are connected in series, with one end set to VDD and the other end set to the same potential as VSS. FIG. 10B illustrates a cross-sectional structure of these transistors. Conductors 231 and 232 are provided over a substrate 200, and silicon nitride 233 is provided over the conductors 231 and 232. Next, an amorphous semiconductor 234 is provided over the silicon nitride 233, and the silicon nitride 241 is provided over the amorphous semiconductor 234 again. Next, an N-type semiconductor and a conductor are stacked on the silicon nitride 241, and these are simultaneously patterned to provide N-type semiconductors 235 and 242 and electrodes 236 and 237. Thereafter, electrodes 238 and 239 are provided, and subsequently, an organic semiconductor 240 serving as a channel layer is provided. As the organic semiconductor 240, an organic low molecule such as pentacene or an organic polymer such as PEDOT or PPV may be used. For patterning of pentacene, a method using a metal mask in combination with an evaporation method may be used. In this manner, a CMOS circuit including an N-type transistor that forms a channel portion with the amorphous semiconductor 234 and a P-type transistor that forms a channel portion with the organic semiconductor 240 is completed.

Since this CMOS circuit is a unit circuit such as a clocked inverter that constitutes a shift register, a buffer, or the like, it may be used for a driver circuit or a pixel circuit. In addition, this configuration is preferably used for a driving circuit on the scanning line side because of its operating frequency. Specifically, as illustrated in FIG. 8A, it is preferable that the driver circuit on the scanning line side is formed using a CMOS circuit of this structure and a driver IC is used as the driver circuit on the signal line side. In this embodiment mode, the case where the driver circuit is formed using a CMOS circuit has been described, but the present invention is not limited to this. Of course, the drive circuit may be configured with only an N-type transistor (a-Si: HTFT) and only a P-type transistor (organic TFT).

This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 4)
The present invention provides a display device including a plurality of pixels each including a light-emitting element including a light-emitting material between a pair of electrodes and a transistor in which a channel portion is formed using an amorphous semiconductor or an organic semiconductor. The configuration of the pixel will be described with reference to FIG.

In the pixel shown in FIG. 11A, a signal line 310 and power supply lines 311 to 313 are arranged in the column direction, and a scanning line 314 is arranged in the row direction. The pixel also includes a switching transistor 301, a driving transistor 303, a current control transistor 304, a capacitor 302, and a light emitting element 305.

The pixel shown in FIG. 11C is different from the pixel shown in FIG. 11A except that the gate electrode of the transistor 303 is connected to the power supply line 313 arranged in the row direction. It is. That is, both pixels shown in FIGS. 11A and 11C show the same equivalent circuit diagram. However, in the case where the power supply line 312 is arranged in the row direction (FIG. 11A) and in the case where the power supply line 312 is arranged in the column direction (FIG. 11C), each power supply line is conductive on a different layer. Formed in the body. Here, attention is paid to a wiring to which the gate electrode of the transistor 303 is connected, and FIGS. 11A and 11C are illustrated separately in order to indicate that layers for manufacturing these are different.

As a feature of the pixel shown in FIGS. 11A and 11C, transistors 303 and 304 are connected in series in the pixel. The channel length L ₃ , the channel width W _{3 of} the transistor 303, and the channel length L _{4 of the} transistor 304 The channel width W ₄ is set so as to satisfy L ₃ / W ₃ : L ₄ / W ₄ = 5 to 6000: 1. As an example when 6000: 1 is satisfied, there is a case where L ₃ is 500 μm, W ₃ is 3 μm, L ₄ is 3 μm, and W ₄ is 100 μm.

Note that the transistor 303 operates in a saturation region and controls a current value flowing through the light-emitting element 305, and the transistor 304 operates in a linear region and controls supply of current to the light-emitting element 305. It is preferable in terms of manufacturing process that both transistors have the same conductivity type. The transistor 303 may be a depletion type transistor as well as an enhancement type. In the present invention having the above structure, since the transistor 304 operates in a linear region, a slight variation in V _GS of the transistor 304 does not affect the current value of the light-emitting element 305. That is, the current value of the light emitting element 305 is determined by the transistor 303 operating in the saturation region. The present invention having the above structure can provide a display device in which luminance unevenness of a light-emitting element due to variation in transistor characteristics is improved and image quality is improved.

In the pixel illustrated in FIGS. 11A to 11D, the transistor 301 controls input of a video signal to the pixel. When the transistor 301 is turned on and a video signal is input into the pixel, the capacitor 301 The video signal is held in the element 302. Note that FIGS. 11A and 11C illustrate a structure in which the capacitor 302 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 302 need not be explicitly provided.

The light-emitting element 305 has a structure in which an electroluminescent layer is sandwiched between two electrodes, and a potential difference is generated between the pixel electrode and the counter electrode (between the anode and the cathode) so that a forward bias voltage is applied. Is provided. The electroluminescent layer is composed of a wide variety of materials such as organic materials and inorganic materials. The luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from a singlet excited state to a ground state, and a triplet excited state. And light emission (phosphorescence) when returning to the ground state.

The pixel illustrated in FIG. 11B has the same pixel structure as that illustrated in FIG. 11A except that a transistor 306 and a scan line 315 are added. Similarly, the pixel illustrated in FIG. 11D has the same pixel structure as that illustrated in FIG. 11C except that a transistor 306 and a scan line 315 are added.

The transistor 306 is controlled to be turned on or off by a newly arranged scanning line 315. When the transistor 306 is turned on, the charge held in the capacitor 302 is discharged, and the transistor 306 is turned off. That is, the arrangement of the transistor 306 can forcibly prevent a current from flowing through the light-emitting element 305. Accordingly, the configurations in FIGS. 11B and 11D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

In the pixel shown in FIG. 11E, a signal line 350, power supply lines 351 and 352 are arranged in the column direction, and a scanning line 353 is arranged in the row direction. In addition, the pixel includes a switching transistor 341, a driving transistor 343, a capacitor 342, and a light-emitting element 344. The pixel illustrated in FIG. 11F has the same pixel structure as that illustrated in FIG. 11E except that a transistor 345 and a scan line 354 are added. Note that in the structure in FIG. 11F as well, the duty ratio can be improved by the arrangement of the transistor 345.

This embodiment mode can be freely combined with the above embodiment modes.

As essential components of the present invention, a light-emitting element including a light-emitting material between a pair of electrodes and a transistor including an amorphous semiconductor or an organic semiconductor can be given, and the light-emitting element and the transistor are included in each pixel. . As described above, when a transistor including an amorphous semiconductor is included in each pixel, in many cases, a driver IC is mounted by a COG method or a TAB method, or connected through an FPC. In the present embodiment, an embodiment in which a plurality of driver ICs are formed on a rectangular substrate and the driver ICs are mounted will be described.

In the top view of the panel shown in FIG. 9A, one driver IC 251 and 252 is provided on each of the scanning line side and the signal line side. Since other structures are the same as those of the panel illustrated in FIG. 8B, description thereof is omitted here.

FIG. 9B is a perspective view showing a state where the driver IC is attached to the substrate. On the substrate 253, a plurality of driving circuits and input / output terminals for connecting the plurality of driving circuits are provided. A plurality of driver ICs can be obtained by dividing the substrate 253 into strips or rectangles with each drive circuit and input / output terminals corresponding to the drive circuit as one unit. Then, when this driver IC is bonded to the substrate 200, the display device is completed. FIG. 9B illustrates a mode in which a driver IC 252 corresponding to a scan line driver circuit and a driver IC 251 corresponding to a signal line driver circuit are mounted.

The pitch of the signal lines and the scanning lines is preferably matched with the pitch of the output terminals of the driver IC. Then, it is not necessary to form the leader line by dividing into several blocks at the end portion of the pixel portion 202, and it can be manufactured with high yield in the process. Further, when a plurality of these driver ICs are formed on the rectangular substrate 200, a large amount can be formed, which is preferable from the viewpoint of improving productivity. Therefore, it is preferable to use a large-area substrate as the substrate 200, for example, it is preferable to use a large-area substrate having a side of about 300 mm to 1000 mm. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer. Further, when cutting, if the length of the long side of the driver IC is the same as the length in the vertical direction or the horizontal direction of the pixel portion 202, the number of driver ICs to be attached can be reduced, and the reliability is improved. improves.

These driver ICs are preferably formed of a crystalline semiconductor, and the crystalline semiconductor is preferably formed by irradiating continuous wave laser light. Therefore, it is preferable to use a continuous wave solid-state laser or a gas laser as an oscillator for generating the laser light. This utilizes the fact that crystal grain boundaries extend in the scanning direction when irradiated with continuous-wave laser light, and the semiconductor extends so that the direction in which the crystal grain boundaries extend and the channel length direction are parallel to each other. This is because when a layer is patterned, a thin film transistor using a crystalline semiconductor with sufficient electrical characteristics as an active layer can be formed.

The configuration of the driver IC is preferably different between the scanning line side and the signal line side. Specifically, it is preferable to change the film thickness of the gate insulating film of the thin film transistor between the driver circuit arranged on the signal line side and the driver circuit arranged on the scanning line side. This meets the requirements of the signal line (data line) side and the scanning line side. Specifically, the thickness of the gate insulating film of the thin film transistor constituting the signal line driving circuit is 20 to 70 nm, and the channel The length is set to 0.3-1 μm. On the other hand, the thickness of the gate insulating film of the thin film transistor constituting the scanning line driving circuit is set to 150 to 250 nm, and the channel length is set to 1 to 2 μm. With the above structure, a display device having a driver IC corresponding to the operating frequency of each driving circuit can be provided. This embodiment can be freely combined with the above embodiment modes and embodiments.

As essential components of the present invention, a light-emitting element including a light-emitting material between a pair of electrodes and a transistor including an amorphous semiconductor or an organic semiconductor can be given, and the light-emitting element and the transistor are included in each pixel. Such a transistor including an amorphous semiconductor has a property that its electrical characteristics (threshold voltage, field-effect mobility, and the like) change with time. Therefore, here, the threshold voltage correction circuit will be described by focusing on the threshold voltage.

First, the threshold correction circuit will be described with reference to FIGS. FIG. 17A shows an equivalent circuit diagram, which includes switches 531 and 532 including transistors, a transistor 533, and a capacitor 534. The operation of this circuit will be briefly described below.

First, the switches 531 and 532 are turned on (FIG. 17A). Then, a current I _DS flows from the switch 531 to the transistor 533 and from the switch 531 to the capacitor 534. At this time, current I _DS flows divided into I ₁ and I _2, satisfying the I _DS = I ₁ + I _2. At the moment when current starts to flow, no charge is held in the capacitor 534 and the transistor 533 is off. Therefore, I ₂ = 0 and I _DS = I1. However, electric charges are gradually accumulated in the capacitor 534, and a potential difference starts to be generated between both electrodes of the capacitor 534. When the potential difference between the two electrodes becomes V _TH , the transistor 554 is turned on and I ₂ > 0. At this time, since I _DS = I ₁ + I ₂ is satisfied, I 1 gradually decreases, but the current has flowed before. In the capacitor element 534, charge accumulation is continued until the potential difference between the electrodes becomes V _DD . When the potential difference between both electrodes of the capacitor 534 becomes V _DD , I ₂ stops flowing, and the transistor 533 is on, so that I _DS = I 1 (points A and D in FIGS. 17C and 17D).

Subsequently, the switch 531 is turned off (FIG. 17B). Then, the charge held in the capacitor 534 flows in the direction of the transistor 533 through the switch 532 and is discharged. This operation is performed until the transistor 533 is turned off. That is, the charge is held until the charge held in the capacitor 534 has the same value as the threshold voltage of the transistor 533 (points B and C in FIGS. 17C and 17D).

In this way, the potential difference between both electrodes of the capacitor can be set to the same value as the threshold voltage of a certain transistor. Then, while keeping V _GS of the transistor as it is, a signal voltage is input to the gate electrode of the transistor. Then, in addition to V _GS held in the capacitor, a value obtained by adding the signal voltage is input to the gate electrode of the transistor. That is, even if the threshold voltage between transistors varies, a transistor to which a signal voltage is input always receives a value obtained by adding the threshold voltage of the transistor and the signal voltage. Therefore, the influence of the variation in threshold voltage between transistors can be suppressed.

By providing the threshold correction circuit, variations in threshold voltage of the driving transistor for driving the light emitting element can be suppressed, and luminance unevenness caused by these variations can be improved, resulting in high-quality images. A display device for displaying can be provided. Note that the threshold correction circuit shown in this embodiment can also be applied to the pixel circuit shown in FIG. At this time, this threshold value correction circuit may be provided so that the threshold voltage of the driving transistor in which the signal voltage is input to the gate electrode can be corrected.

In the present embodiment, the threshold voltage correcting means is exemplified, but other electric characteristic correcting means may be provided, for example, a field effect mobility correcting means may be provided. This embodiment can be freely combined with the above embodiment modes and embodiments.

The light-emitting element is formed by appropriately combining a hole injection layer, a hole transport layer, a hole blocking layer (hole blocking layer), an electron transport layer, and the like. However, since the electron injection layer can significantly improve the electron injection property from the electrode when lithium (Li) is doped into bathocuproin (BCP), which is known as a material excellent in the transport property of only electrons, Such a material may be used.

In addition, a benzoxazole derivative (BzOS) or a pyridine derivative is a material that has excellent electron transporting properties and is difficult to crystallize when formed, and among alkali metals, alkaline earth metals, and transition metals By including at least one of the above, a layer having excellent electron injectability is formed. Therefore, in a light-emitting element having a layer containing a light-emitting substance between a pair of electrodes, it is preferable to use a benzoxazole derivative or a pyridine derivative for part of the layer containing a light-emitting substance.

That is, by forming an electron injection layer using a benzoxazole derivative or a pyridine derivative and an electron injectable composition for a light-emitting element containing at least one of an alkali metal, an alkaline earth metal, or a transition metal, Electron injection from the electrode functioning as the cathode can be improved. Furthermore, since a pyridine derivative is a material that is difficult to crystallize when deposited, a light-emitting element that has superior element characteristics and a longer element lifetime than conventional ones, and a display device using the light-emitting element can be provided. This embodiment can be freely combined with the above embodiment modes and embodiments.

In this embodiment, a stacked structure of light emitting elements will be described. Here, description is made using an enlarged view of a portion surrounded by broken lines 5700 and 5710 in FIG. 18A, 18C, and 19A correspond to enlarged views of a portion surrounded by a broken line 5700, and FIGS. 18B, 18D, and 21B are broken line 5710. It corresponds to an enlarged view of the enclosed part. Note that the cross-sectional structure in FIG. 1B and the cross-sectional structures shown in FIGS. 18 and 19 are the same in that the insulating film 5070, the passivation film 5080, the connection wiring 5060, and the pixel electrode 5100 are formed. However, other structures are different, and will be described below using different reference numerals.

18A and 18B, a passivation film 5080 is formed over the insulating film 5070, and a connection wiring 5060 is formed over the passivation film 5080. The connection wiring 5060 is electrically connected to the source electrode or the drain electrode of the driving transistor. Further, an auxiliary wiring 5200 obtained by patterning a conductor common to the connection wiring 5060 is formed over the passivation film 5080. A pixel electrode 5100 is formed so as to be connected to the connection wiring 5060, and a hole injection layer 5110, a light emitting layer 5120, and an electron injection layer 5130 are sequentially stacked over the pixel electrode 5100. Finally, a protective film 5240 is formed. A stacked body of the pixel electrode 5100, the hole injection layer 5110, the light emitting layer 5120, and the electron injection layer 5130 corresponds to the light emitting element 5140.

The light emitting layer 5120 is formed using a metal mask so as not to completely cover the opening and to expose a part of the auxiliary wiring 5200. Accordingly, the hole injection layer 5110 and the electron injection layer 5130 are sequentially stacked on the auxiliary wiring 5200 in the opening. Note that the present invention is not limited to this, and the hole injection layer 5110 and the light emitting layer 5120 may be formed using a metal mask so that only the electron injection layer 5130 is formed over the auxiliary wiring 5200. .

18A and 18B illustrate a structure in which light emitted from the light-emitting element 5140 is emitted to the substrate side, the light may be directed to the side opposite to the substrate side.

18C and 18D, a pixel electrode 5100 is formed so as to be connected to a connection wiring 5060, and a hole injection layer 5110, a light emitting layer 5120, and an electron injection layer 5130 are formed over the pixel electrode 5100. The transparent conductive film 5800 is sequentially stacked. Finally, a protective film 5240 is formed. By forming the transparent conductive film 5800 so as to be in contact with the electron injection layer 5130, a potential drop can be suppressed even when the resistance of the electron injection layer 5130 functioning as the counter electrode increases.

The light emitting layer 5120 is formed using a metal mask so as not to completely cover the opening and to expose a part of the auxiliary wiring 5200. Therefore, in the opening, the hole injection layer 5110, the electron injection layer 5130, and the transparent conductive film 5800 are sequentially stacked on the auxiliary wiring 5200. Note that the present invention is not limited to this, and only the electron injection layer 5130 and the transparent conductive film 5800 are formed over the auxiliary wiring 5200 by forming the hole injection layer 5110 and the light emitting layer 5120 using a metal mask. It is good also as a structure. Alternatively, the hole injection layer 5110, the light-emitting layer 5120, and the electron injection layer 5130 may be formed using a metal mask so that only the transparent conductive film 5800 is formed over the auxiliary wiring 5200.

18A and 18B, the protective film 5240 may have a stacked structure of an inorganic insulating film and an organic insulating film. A cross-sectional structure at that time is shown in FIGS. 19A and 19B. Will be described.

19A and 19B, the protective film 5240 has a stacked structure, and an inorganic insulating film 5240a is in contact with the electron injecting layer 5130. An organic resin film 5240b is formed on the inorganic insulating film 5240a, and the organic resin is formed. An inorganic insulating film 5240c is formed over the film 5240b. As the inorganic insulating films 5240a and 5240c, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, or the like can be used, so that entry of a substance that promotes deterioration of moisture or oxygen into the light-emitting element 5140 can be prevented. Further, by providing the organic resin film 5240b having a small internal stress between the inorganic insulating film 5240a and the inorganic insulating film 5240c, the protective film 5240 can be prevented from being peeled off by the stress. As the organic resin film 5240b, polyimide, polyamide, polyimide amide, or the like can be used.

The light emitting layer 5120 is formed using a metal mask so as not to completely cover the opening and to expose a part of the auxiliary wiring 5200. Accordingly, in the opening, the hole injection layer 5110, the electron injection layer 5130, the inorganic insulating film 5240a, the organic resin film 5240b, and the inorganic insulating film 5240c are sequentially stacked over the auxiliary wiring 5200. Note that the present invention is not limited to this, and the hole injection layer 5110 and the light emitting layer 5120 are formed using a metal mask, whereby the electron injection layer 5130, the inorganic insulating film 5240a, and the organic resin film are formed over the auxiliary wiring 5200. 5240b and the inorganic insulating film 5240c may be sequentially formed. This embodiment can be freely combined with the above embodiment modes and embodiments.

As essential components of the present invention, a light-emitting element including a light-emitting material between a pair of electrodes and a transistor including an amorphous semiconductor or an organic semiconductor can be given, and the light-emitting element and the transistor are included in each pixel. In the case where such a transistor is included in each pixel, a driver circuit formed over the same substrate is preferably formed using a transistor including an amorphous semiconductor or an organic semiconductor. However, only an N-type transistor can be formed as a transistor including an amorphous semiconductor. Therefore, in this embodiment, an example in which a shift register is configured with only N-type transistors will be described.

In FIG. 12A, a block denoted by 400 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. FIG. 12B shows a specific structure of the pulse output circuit 400, which includes N-type transistors 401 to 406 and a capacitor 407. This pulse output circuit is a circuit that can be configured with only N-type transistors by applying the bootstrap method. Detailed operation is described in Japanese Patent Laid-Open No. 2002-335153.

In this embodiment, an example in which only an N-type transistor is used is shown, but the present invention is not limited to this. The driver circuit may be formed of a P-type transistor including an organic semiconductor in the channel portion. This embodiment can be freely combined with the above embodiment modes and embodiments.

When the display device of the present invention is digitally driven, it is preferable to use a time gray scale method in order to express a multi-tone image. This embodiment describes a time gray scale method. FIG. 13A shows a timing chart when the vertical axis indicates a scanning line and the horizontal axis indicates time, and FIG. 13B shows the j-th row. A timing chart of a scanning line is shown.

The display device normally has a frame frequency of about 60 Hz. In other words, a screen drawing is performed about 60 times per second, and a period in which the screen is drawn once is referred to as one frame period. In the time gray scale method, one frame period is divided into a plurality of subframe periods. In many cases, the number of divisions at this time is equal to the number of gradation bits. Here, for the sake of simplicity, the case where the number of divisions is equal to the number of gradation bits is shown. In other words, since the 5-bit gradation is illustrated in the present embodiment, an example in which it is divided into five subframe periods SF1 to SF5 is shown. Each sub-frame period has an address period Ta in which a video signal is written to the pixel and a sustain period Ts in which the pixel is lit or not lit. In the sustain periods Ts1 to Ts5, the ratio of the lengths is Ts1:...: Ts5 = 16: 8: 4: 2: 1. That is, when expressing n-bit gradation, the length ratio of n sustain periods is 2 ^(n-1) : 2 ^(n-2) :...: 2 ¹ : 2 ⁰ .

A subframe period (here, the subframe period SF5 corresponds) having a lighting period shorter than the writing period has an erasing period Te5. The erasing period Te5 is a period in which the video signal written in the pixel is reset and the light emitting element is forcibly reset, and the next period does not start immediately after the lighting period ends.

Note that in order to increase the number of display gradations, the number of subframe periods may be increased. Further, the order of the subframe periods does not necessarily have to be the order from the upper bit to the lower bit, and may be arranged at random during one frame period. Furthermore, the order may change for each frame period. This embodiment can be freely combined with the above embodiment modes and embodiments.

In this embodiment, an example of a structure of a signal line driver circuit and a scan line driver circuit will be described with reference to FIGS.

As shown in FIG. 14A, the signal line driver circuit includes a shift register 3021, a first latch circuit 3022, and a second latch circuit 3023. In addition, as illustrated in FIG. 14B, the scan line driver circuit includes a shift register 3024 and a buffer 3025. However, the illustrated configuration is merely an example. For example, a configuration in which a level shifter and a buffer are newly arranged in the signal line driver circuit, or a level shifter is arranged between the shift register 3024 and the buffer 3025 in the scanning line driver circuit. Or you may. When the level shifter is arranged, the voltage amplitude of the logic circuit portion and the buffer portion can be changed. This embodiment can be freely combined with the above embodiment modes and embodiments.

As an example of an electronic device manufactured by applying the present invention, a video camera, a digital camera, a goggle type display, a navigation system, a sound reproducing device such as a car audio, a notebook type personal computer, a game device, a portable information terminal (mobile computer) , Mobile phones, portable game machines, electronic books, etc.), image playback devices equipped with recording media such as home game machines (specifically, displays that can play back recording media such as DVDs and display the images) And the like). Specific examples of these electronic devices are shown in FIGS.

FIG. 15A illustrates a portable terminal, which includes a main body 9301, an audio output portion 9302, an audio input portion 9303, a display portion 9304, an operation switch 9305, and the like. FIG. 15B shows a PDA, which includes a main body 9101, a stylus 9102, a display portion 9103, operation buttons 9104, an external interface 9105, and the like. FIG. 15C illustrates a portable game device, which includes a main body 9201, a display portion 9202, operation buttons 9203, and the like. FIG. 15D illustrates a goggle type display including a main body 9501, a display portion 9502, an arm portion 9503, and the like.

FIG. 16A illustrates a large liquid crystal television of about 40 inches, which includes a display portion 9401, a housing 9402, an audio output portion 9403, and the like. FIG. 16B illustrates a monitor, which includes a housing 9601, an audio output portion 9602, a display portion 9603, and the like. FIG. 16C illustrates a digital video camera, which includes display portions 9701 and 9702 and the like. FIG. 16D illustrates a laptop computer, which includes a housing 9801, a display portion 9802, a keyboard 9803, and the like.

In the electronic device described above, the display device of the present invention is preferably used for a panel including the display portions 9304, 9103, 9202, 9502, 9401, 9603, 9701, 9702, and 9802. This embodiment can be freely combined with the above embodiment modes and embodiments.

In this example, a layout example of the pixel circuit described in Embodiment Mode 4 will be described. The layout example to be described below shows a case where a pixel electrode included in a light emitting element and an insulating layer surrounding an end portion of the pixel electrode are formed. In the layout examples shown in FIGS. 21 to 23, three adjacent pixels are shown, one pixel is a layout when a transistor and a capacitor are formed, and one pixel is a layout when a pixel electrode is formed. One pixel shows a layout when an insulating layer functioning as a partition layer is formed.

The first layout example and the second layout example are in the case where three transistors are provided in one pixel (3 TFT / Cell). The switching transistor 601, the driving transistor 602, and the erasing transistor A transistor 603, a capacitor 604, a signal line 609 and an auxiliary wiring 610 arranged in the column direction, and scanning lines 607 and 608 arranged in the row direction are provided (see FIGS. 20 and 21). In addition, a pixel electrode 605 and an insulating layer 606 included in the light-emitting element are provided.
The insulating layer 606 is provided between adjacent pixel electrodes 605. The insulating layer 606 is provided with an opening so that the auxiliary wiring 610 and the pixel electrode 605 are exposed. The auxiliary wiring 610 and the counter electrode are connected to each other through an opening provided in the insulating layer 606. Further, an electroluminescent layer is provided in contact with the pixel electrode 605 through an opening provided in the insulating layer 606, and a counter electrode is provided in contact with the electroluminescent layer.

In the layout example shown in FIG. 20, any of top emission, bottom emission, and dual emission may be used. On the other hand, in the layout example shown in FIG. 21, since the pixel electrode 605 is provided above the transistors 601 to 603, a top emission method is preferably employed. However, in the layout example illustrated in FIG. 21, a dual emission method may be employed. In that case, the insulating layer 606 is formed using a light-blocking material so that the transistors 601 to 603 are not exposed to light. It is good to form.

The third layout example and the fourth layout example are cases where four transistors are provided in one pixel (4 TFT / Cell), and are a switching transistor 611, a driving transistor 619, and a current control transistor. Transistor 620, erasing transistor 613, capacitor element 614, signal line 612 and auxiliary wiring 621 arranged in the column direction, and scanning lines 617 and 618 arranged in the row direction are provided (see FIGS. 22 and 23). In addition, a pixel electrode 605 included in the light-emitting element and an insulating layer 616 are provided.
An opening is provided in the insulating layer 616 so that the auxiliary wiring 621 and the pixel electrode 615 are exposed. The auxiliary wiring 621 and the counter electrode are connected to each other through an opening provided in the insulating layer 616. In addition, an electroluminescent layer is provided so as to be in contact with the pixel electrode 615 through an opening provided in the insulating layer 616, and a counter electrode is provided so as to be in contact with the electroluminescent layer.
According to the structure shown in the drawing, the pixel electrode 615 is provided above the transistors 611, 613, 619, and 620, so that the aperture ratio can be improved. Therefore, in this configuration, a top emission method may be employed. Note that in the layout example shown in FIG. 22, a dual emission method may be employed. In that case, the insulating layer 616 has a light-shielding property so that the transistors 611, 613, 619, and 620 are not exposed to light. It is good to form with material.

Note that in the above structure, the transistors 601 to 603, 611, 613, 619, and 620 are transistors in which a channel portion is formed using an amorphous semiconductor or an organic semiconductor. The auxiliary wirings 610 and 621 are connected to the same layer as the gate electrodes of the transistors 601 to 603, 611, 613, 619, and 620 and connected to the source electrode or the drain electrode of the transistors 601 to 603, 611, 613, 619, and 620. It is provided in the same layer as the wiring or the same layer as the pixel electrodes 605 and 615.

10A and 10B each illustrate a cross-sectional structure in which an amorphous semiconductor channel transistor (channel protection type, channel etch type), a light-emitting element, and one electrode of the light-emitting element are connected to an auxiliary wiring. 10A and 10B each illustrate a cross-sectional structure in which an amorphous semiconductor channel (a dual gate type) transistor, a light-emitting element, and one electrode of the light-emitting element are connected to an auxiliary wiring. 4A and 4B illustrate a cross-sectional structure in which a transistor including an amorphous semiconductor as a channel portion, a light-emitting element, and one electrode of the light-emitting element are connected to an auxiliary wiring. The top view of a panel and the figure explaining arrangement | positioning of an anode line, a cathode line, and auxiliary wiring. The figure explaining arrangement | positioning and opening part of an anode line, a cathode line, and auxiliary wiring. The figure explaining arrangement | positioning and opening part of an anode line, a cathode line, and auxiliary wiring. The figure explaining arrangement | positioning and opening part of an anode line, a cathode line, and auxiliary wiring. The top view of the panel in which the driver IC was mounted. The top view and perspective view of the panel in which the linear driver IC was mounted. The figure which shows the cross-section of the CMOS circuit comprised by the organic transistor and the a-Si transistor. FIG. 10 is a circuit diagram of a pixel including a transistor and a light-emitting element using an amorphous semiconductor as a channel portion. The circuit diagram of the shift register comprised only by an N-type transistor. The figure which shows the timing chart of a time gradation system. 3A and 3B illustrate structures of a signal line driver circuit and a scan line driver circuit. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. The figure explaining a threshold value correction circuit. 3A and 3B illustrate a stacked structure of a light-emitting element. 3A and 3B illustrate a stacked structure of a light-emitting element. The layout diagram of a pixel circuit (3TFT / Cell). The layout diagram of a pixel circuit (3TFT / Cell). The layout diagram of a pixel circuit (4TFT / Cell). The layout diagram of a pixel circuit (4TFT / Cell).

Claims (6)

A first transistor;
A connection wiring electrically connected to one of a source or a drain of the first transistor;
A first insulating layer provided on the connection wiring;
A first opening provided in the first insulating layer;
A first electrode provided on the first insulating layer and electrically connected to the connection wiring in the first opening;
A second insulating layer provided on the first electrode;
A second opening provided in the second insulating layer;
An electroluminescent layer provided on the second insulating layer and electrically connected to the first electrode in the second opening;
A second electrode provided on the electroluminescent layer,
The first insulating layer is provided with a third opening,
The second insulating layer is provided with a fourth opening,
An auxiliary wiring is provided in the third opening and in the fourth opening,
The display device, wherein the electroluminescent layer is provided on an upper surface of the auxiliary wiring, and the auxiliary wiring and the second electrode are electrically connected on a side surface of the auxiliary wiring. In claim 1,
The display device, wherein the first transistor includes an amorphous semiconductor or an organic semiconductor. In claim 1 or claim 2,
A light-emitting element composed of the first electrode, the electroluminescent layer, and the second electrode, the first transistor, the second transistor, the third transistor, and the fourth transistor; A capacitor having a capacitor, a first wiring, a second wiring, a third wiring, a fourth wiring, and a fifth wiring;
The other of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the second transistor;
A gate of the first transistor is electrically connected to the first wiring;
The other of the source and the drain of the second transistor is electrically connected to the second wiring;
The gate of the second transistor is electrically connected to one of a source or a drain of the third transistor, one of a source or a drain of the fourth transistor, and one of a pair of electrodes of the capacitor. Connected to
The other of the source and the drain of the third transistor is electrically connected to the third wiring,
A gate of the third transistor is electrically connected to the fourth wiring;
The other of the source and the drain of the fourth transistor is electrically connected to the second wiring and the other of the pair of electrodes of the capacitor,
A display device, wherein a gate of the fourth transistor is electrically connected to the fifth wiring. In claim 3,
The first transistor operates in a saturation region;
The display device, wherein the second transistor operates in a linear region. In claim 3 or claim 4,
The first electrode is provided above the first to fourth transistors, and is provided to overlap the first to fourth transistors,
The display device is characterized in that the light emitting element is a top emission type. In any one of Claim 3 thru | or 5,
The display device, wherein the second to fourth transistors include an amorphous semiconductor or an organic semiconductor.

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