JP2005031651A5 - - Google Patents

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JP2005031651A5
JP2005031651A5 JP2004179165A JP2004179165A JP2005031651A5 JP 2005031651 A5 JP2005031651 A5 JP 2005031651A5 JP 2004179165 A JP2004179165 A JP 2004179165A JP 2004179165 A JP2004179165 A JP 2004179165A JP 2005031651 A5 JP2005031651 A5 JP 2005031651A5
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Prior art keywords
emitting element
transistor
light emitting
insulating layer
electrode
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JP2004179165A
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JP4593179B2 (en
JP2005031651A (en
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Priority claimed from JP2004179165A external-priority patent/JP4593179B2/en
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Publication of JP2005031651A5 publication Critical patent/JP2005031651A5/ja
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Claims (15)

非晶質半導体を含むトランジスタと、
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、
前記トランジスタ上に設けられた発光素子と、
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、
記絶縁層上に設けられた補助配線とを有し、
前記接続配線は、前記発光素子の画素電極に接続され
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、
前記補助配線は、前記トランジスタのゲート電極と同じ層に設けられていることを特徴とする表示装置。
And the door transistor including an amorphous semiconductors,
A connection wiring connected to the source electrode or drain electrode of the transistor;
A light emission device provided on the transistor,
An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element ;
Anda auxiliary wiring provided before Symbol insulating layer,
The connection wiring is connected to a pixel electrode of the light emitting element ,
The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer ,
The auxiliary line, a display device which is characterized that you have provided in the same layer as the gate electrode of said transistor.
非晶質半導体を含むトランジスタと、
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、
前記トランジスタ上に設けられた発光素子と、
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、
記絶縁層上に設けられた補助配線とを有し、
前記接続配線は、前記発光素子の画素電極に接続され
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、
前記補助配線は、前記接続配線と同じ層に設けられていることを特徴とする表示装置。
And the door transistor including an amorphous semiconductors,
A connection wiring connected to the source electrode or drain electrode of the transistor;
A light emission device provided on the transistor,
An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element ;
Anda auxiliary wiring provided before Symbol insulating layer,
The connection wiring is connected to a pixel electrode of the light emitting element ,
The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer ,
The auxiliary line, a display device which is characterized that you have provided in the same layer as the connection wiring.
非晶質半導体を含むトランジスタと、A transistor including an amorphous semiconductor;
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、A connection wiring connected to the source electrode or drain electrode of the transistor;
前記トランジスタ上に設けられた発光素子と、A light emitting element provided on the transistor;
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element;
前記絶縁層上に設けられた補助配線と、を有し、An auxiliary wiring provided on the insulating layer,
前記接続配線は、前記発光素子の画素電極に接続され、The connection wiring is connected to a pixel electrode of the light emitting element,
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer,
前記補助配線は、前記発光素子の画素電極と同じ層に設けられていることを特徴とする表示装置。The display device, wherein the auxiliary wiring is provided in the same layer as the pixel electrode of the light emitting element.
有機半導体を含むトランジスタと、A transistor including an organic semiconductor;
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、A connection wiring connected to the source electrode or drain electrode of the transistor;
前記トランジスタ上に設けられた発光素子と、A light emitting element provided on the transistor;
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element;
前記絶縁層上に設けられた補助配線と、を有し、An auxiliary wiring provided on the insulating layer,
前記接続配線は、前記発光素子の画素電極に接続され、The connection wiring is connected to a pixel electrode of the light emitting element,
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer,
前記補助配線は、前記トランジスタのゲート電極と同じ層に設けられていることを特徴とする表示装置。The display device, wherein the auxiliary wiring is provided in the same layer as the gate electrode of the transistor.
有機半導体を含むトランジスタと、A transistor including an organic semiconductor;
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、A connection wiring connected to the source electrode or drain electrode of the transistor;
前記トランジスタ上に設けられた発光素子と、A light emitting element provided on the transistor;
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element;
前記絶縁層上に設けられた補助配線と、を有し、An auxiliary wiring provided on the insulating layer,
前記接続配線は、前記発光素子の画素電極に接続され、The connection wiring is connected to a pixel electrode of the light emitting element,
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer,
前記補助配線は、前記接続配線と同じ層に設けられていることを特徴とする表示装置。The display device, wherein the auxiliary wiring is provided in the same layer as the connection wiring.
有機半導体を含むトランジスタと、A transistor including an organic semiconductor;
前記トランジスタのソース電極又はドレイン電極に接続された接続配線と、A connection wiring connected to the source electrode or drain electrode of the transistor;
前記トランジスタ上に設けられた発光素子と、A light emitting element provided on the transistor;
前記発光素子の画素電極の端部を囲むように設けられた絶縁層と、An insulating layer provided so as to surround an end portion of the pixel electrode of the light emitting element;
前記絶縁層上に設けられた補助配線と、を有し、An auxiliary wiring provided on the insulating layer,
前記接続配線は、前記発光素子の画素電極に接続され、The connection wiring is connected to a pixel electrode of the light emitting element,
前記補助配線は、前記絶縁層に設けられた開口部を介して、前記発光素子の対向電極に接続され、The auxiliary wiring is connected to the counter electrode of the light emitting element through an opening provided in the insulating layer,
前記補助配線は、前記発光素子の画素電極と同じ層に設けられていることを特徴とする表示装置。The display device, wherein the auxiliary wiring is provided in the same layer as the pixel electrode of the light emitting element.
請求項1乃至請求項6のいずれか一項において、In any one of Claims 1 thru | or 6,
前記トランジスタと前記発光素子を制御する駆動回路を有し、A driving circuit for controlling the transistor and the light emitting element;
前記駆動回路は、非晶質半導体でチャネル部を形成するN型トランジスタと有機半導体でチャネル部を形成するP型トランジスタを有することを特徴とする表示装置。The display device is characterized in that the drive circuit includes an N-type transistor that forms a channel portion with an amorphous semiconductor and a P-type transistor that forms a channel portion with an organic semiconductor.
請求項1乃至請求項6のいずれか一項において、
前記トランジスタと前記発光素子を制御するドライバICを有し、
前記ドライバICは、前記トランジスタと前記発光素子が設けられた基板上に貼り付けられていることを特徴とする表示装置。
In any one of Claims 1 thru | or 6 ,
A driver IC for controlling the transistor and the light emitting element;
The driver IC, the display device wherein the transistor and the light emitting element is found stuck on a substrate is provided.
請求項1乃至請求項6のいずれか一項において、
前記トランジスタと前記発光素子を制御するドライバICを有し、
前記ドライバICは、前記トランジスタと前記発光素子が設けられた基板上に貼り付けられた接続フィルムに接続されていることを特徴とする表示装置。
In any one of Claims 1 thru | or 6 ,
A driver IC for controlling the transistor and the light emitting element;
The driver IC, the display device, characterized in that the transistor and the light emitting element is connected to the connection film attached to the substrate provided.
請求項1乃至請求項のいずれか一項において、
前記トランジスタはチャネルエッチ型のトランジスタであることを特徴とする表示装置。
In any one of Claims 1 thru | or 9 ,
The display device is characterized in that the transistor is a channel etch type transistor.
請求項1乃至請求項のいずれか一項において、
前記トランジスタはチャネル保護型のトランジスタであることを特徴とする表示装置。
In any one of Claims 1 thru | or 9 ,
The display device is characterized in that the transistor is a channel protection type transistor.
請求項1乃至請求項のいずれか一項において、
前記トランジスタは、第1のゲート電極、第2のゲート電極およびゲート絶縁膜を有し、
前記第1のゲート電極は、前記ゲート絶縁膜を介して、前記第2のゲート電極と重なるように設けられていることを特徴とする表示装置。
In any one of Claims 1 thru | or 9 ,
The transistor has a first gate electrode, a second gate electrode, and a gate insulating film,
The display device , wherein the first gate electrode is provided so as to overlap the second gate electrode with the gate insulating film interposed therebetween.
請求項1乃至請求項12のいずれか一項において、
前記発光素子と前記トランジスタは可撓性基板上に設けられることを特徴とする表示装置。
In any one of Claims 1 to 12 ,
The display device, wherein the light-emitting element and the transistor are provided over a flexible substrate.
請求項1乃至請求項13のいずれか一項において、
前記発光素子に逆方向バイアスを印加する逆方向バイアス印加回路を有することを特徴とする表示装置。
In any one of Claims 1 thru / or Claim 13 ,
A display device comprising a reverse bias application circuit for applying a reverse bias to the light emitting element.
請求項1乃至請求項14のいずれか一項に記載の前記表示装置を用いた電子機器。 Child devices electrodeposition using the display device according to any one of claims 1 to 14.
JP2004179165A 2003-06-17 2004-06-17 Display device Expired - Fee Related JP4593179B2 (en)

Priority Applications (1)

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JP2005031651A JP2005031651A (en) 2005-02-03
JP2005031651A5 true JP2005031651A5 (en) 2007-04-19
JP4593179B2 JP4593179B2 (en) 2010-12-08

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