JP4582299B2 - Manufacturing method of stencil mask - Google Patents

Description

  As a means for forming extremely fine circuits or structures as represented by the manufacture of semiconductor integrated circuits and the like, the present invention performs fine processing by exposure to charged beams such as electron beams, ion beams, or X-rays. The present invention relates to a charged beam exposure mask that is loaded into a charged beam exposure apparatus and is necessary for forming an exposure pattern by a charged beam into a predetermined shape.

  Extremely fine circuits or structures such as those represented by the manufacture of semiconductor integrated circuits tend to be increasingly miniaturized in the future, and research into electron beam lithography, ion beam lithography, or X-ray lithography as their manufacturing technology. Development is actively underway. In recent years, reduction transfer apparatuses have been proposed in which a mask having a predetermined pattern is irradiated with an electron beam, an ion beam, or X-ray, and reduced and transferred onto a wafer.

  Among the reduction transfer apparatuses, as a method corresponding to the miniaturization of a semiconductor, a method called a cell projection exposure method or a block exposure method using an electron beam, and an EPL (Electron Beam Projection Lithography) method capable of further increasing the throughput are called. A method has been developed. Among the electron beam exposure masks used in these methods, in order to explain the structure of a conventional mask, an electron beam exposure mask in which an electron beam transmission hole is provided in a silicon thin film (hereinafter referred to as a stencil mask). A typical manufacturing method will be described with reference to FIG. First, a silicon substrate on which a silicon oxide film 12 formed by thermal oxidation or the like at a temperature of about a few hundreds of degrees Celsius is formed and a silicon substrate 13 serving as a support substrate are connected to each other at about 1000 ° C. via the silicon oxide film 12. After bonding by thermal fusion at a temperature, the silicon substrate on which the silicon oxide film 12 as a bonding layer is formed is cut to a thickness of several tens of microns (μm), and the cut surface is polished to a predetermined thickness Then, a substrate on which the silicon thin film 11 is formed is prepared (see FIG. 4A). Such a substrate is generally called an SOI (Silicon On Insulator) substrate and is generally used as a substrate for manufacturing sensors. (For example, Makoto Ishida, Rie Tai Lee: Applied Physics 7, p. 700 (1995)). The SOI substrate is used as a stencil mask substrate in view of its workability, and the thickness of the silicon substrate 13 is usually 500 μm to 725 μm, the thickness of the silicon thin film 11 is 2 μm to 20 μm, and the thickness of the silicon oxide film 12. Is about 1 μm. These values differ depending on the method of the electron beam reduction exposure transfer apparatus and the form of the stencil mask used.

  A conventional method for manufacturing a stencil mask using the aforementioned SOI substrate will be described. After the electron beam is drawn on the resist layer formed on the silicon thin film 11 by an electron beam mask drawing device or the like and developed to form a resist pattern, the silicon thin film 11 is etched by dry etching using the resist pattern as a mask. Then, the resist pattern is peeled off to produce the silicon thin film pattern 11a (see FIG. 4B).

Next, a silicon nitride film (hereinafter referred to as a Si _x N _y film) is formed as an etching protective film 15 at the time of back etching in which the opening 18 is formed in a subsequent process on the entire back side and front side of the substrate (see FIG. (Refer FIG.4 (c)). The reason why the patterned silicon thin film 11a is also formed here is to protect the patterned silicon thin film 11a because the entire substrate is often exposed to the etching solution, particularly near the end of the back etching. is there. In addition, the formation of the etching protective film 15 can be performed in one step according to a low pressure CVD (Chemical Vapor Deposition) method that can be formed simultaneously on the front and back sides. Thereafter, a resist pattern is formed by photolithography, and the etching protection film 15 is etched by dry etching or the like using the resist pattern as a mask, and etching protection is used as a mask when the opening 18 is formed (back etching). A film pattern 15a is formed (see FIG. 4D).

  Next, using the etching protection film pattern 15a as a mask, the silicon substrate 13 is back-etched with an aqueous KOH solution at 80 ° C. to 90 ° C. to form the opening 18. Thereafter, the etching protection film pattern 15a is peeled off, and then the silicon oxide film 12 exposed at the opening surface is peeled off at the same time, thereby completing the conventional stencil mask having the penetrating electron beam transmitting holes 19 ( (Refer FIG.4 (e)). Thereafter, in order to enhance the electrical conductivity and thermal conductivity of the stencil mask as necessary, both front and back surfaces are covered with a conductive film 17 that is difficult to oxidize such as gold or platinum, thereby completing a conventional stencil mask with a conductive film ( (Refer FIG.4 (f)).

  When the conductive film 17 is formed, a thin film such as titanium is used as a base for improving the adhesion between the Si surface of the silicon substrate 13a and the silicon thin film pattern 11a in which the opening 18 is formed and the conductive film 17. May form. The internal stress of the thin film formed on the conductive film 17 and the base for improving its adhesion is controlled so as to be small depending on the film forming conditions.

  As another manufacturing method, there is a method generally called a preceding back etching method, and an outline of this process will be described below. First, an etching protective film 15 is formed on the entire back surface and front surface of the SOI substrate (see FIG. 4B '). Thereafter, a resist pattern is formed by photolithography, and the etching protective film 15 is etched by dry etching or the like using the resist pattern as a mask to form an etching protective film pattern 15a. Subsequently, the silicon substrate 13 is back-etched to form the opening 18 (see FIG. 4C '). Next, the etching protection film pattern 15a is peeled off, and then the silicon oxide film 12 exposed on the opening surface is peeled off to produce a back-etched stencil mask substrate (see FIG. 4 (d ')). Thereafter, an electron beam is drawn and developed by an electron beam mask drawing apparatus or the like to form a resist pattern. Using this resist pattern as a mask, the silicon thin film 11 is etched by dry etching, and then the resist pattern is peeled to remove the silicon thin film pattern. By producing 11a, a conventional stencil mask having a penetrating electron beam transmission hole 19 is completed. This method is advantageous in that the stencil mask substrate shown in FIG. 4 (d ') can be fabricated in advance, so that the stencil mask fabrication period is shortened.

  Further, in the back etching step, a dry etching using an etching gas (hereinafter referred to as dry etching) can be employed instead of a wet etching using a KOH aqueous solution (hereinafter referred to as wet etching). In this case, the step of FIGS. 4C and 4B, that is, the step of forming the etching protective film 15 for the KOH aqueous solution is not required. Instead, a material serving as a mask when dry etching the silicon substrate 13 is required, but a resist pattern for forming the opening 18 can be used. When the silicon substrate 13 is dry-etched, the etching cross section of the silicon substrate pattern 13a 'is almost vertical (see FIG. 5). This is because in the case of wet etching, etching is performed according to the orientation of the crystal plane of the silicon substrate. For example, in the case of a silicon substrate whose principal surface has a <100> plane, the etching is performed at an angle of 54.7 °. On the other hand, in the case of the dry etching method, although depending on the method and conditions, anisotropic etching is possible regardless of the plane orientation.

In the stencil mask having the conventional structure described in FIG. 4 or FIG. 5, an SOI in which two silicon substrates are bonded together by thermal fusion at a temperature of about 1000 ° C. through a silicon oxide film formed by thermal oxidation or the like. A board is used. Due to the difference in thermal expansion coefficient between silicon and silicon oxide film, compressive internal stress (hereinafter referred to as compressive stress) is generated in the silicon oxide film at room temperature, causing warpage of the SOI substrate. For example, the thermal expansion coefficients of silicon and silicon oxide film are 2.5 × 10 ⁻⁶ ° C.− ¹ , 0.5 × 10 ⁻⁶ ° C. ⁻¹ (for example, Realize Inc .: Silicon Science, Chapter 13 Data) (1996)), when a silicon oxide film having a thickness of 1 μm is formed by thermal oxidation at 1100 ° C. and then cooled to room temperature (assuming 23 ° C.), a compressive stress of about 190 MPa is calculated. Will occur in the silicon oxide film. In this case, in the case of a silicon wafer having a diameter of 200 mm and a thickness of 0.725 mm, a warp of about 60 μm occurs in the entire silicon wafer. In actual SOI substrates, the amount of warpage is strictly different from the calculated value due to the fact that the silicon thin film is bonded and the internal stress relaxation action of the silicon oxide film, but the warp of several tens of μm remains. Has been observed.

  Accordingly, in the process of manufacturing the conventional stencil mask, the position of the silicon thin film pattern 11a is shifted from a predetermined position. As a result, the transfer is performed when the image is reduced and transferred onto the wafer by the charged beam reduction transfer device. It causes deterioration of accuracy.

  Furthermore, the energy that the charged beam incident on the stencil mask loses in the stencil mask is converted to almost 100% thermal energy, so that the temperature of the stencil mask rises. Therefore, if the stencil mask is made of a material having a significantly different coefficient of thermal expansion, thermal distortion increases, which may cause a deterioration in transfer accuracy. As described above, when comparing the thermal expansion coefficients of silicon and silicon oxide film, it depends on the temperature, but as can be seen from the fact that silicon is about one digit larger, silicon oxide is used to suppress thermal distortion. It is desirable to make the film thickness as thin as possible. On the other hand, the thickness of the silicon oxide film has an important meaning in the manufacturing process of the stencil mask. The silicon oxide film functions as an etching stop layer during back etching of the silicon substrate and dry etching of the silicon thin film. However, since the silicon oxide film is slightly etched when the silicon substrate or silicon thin film is etched, it is necessary to have a minimum thickness considering the thickness distribution of the silicon substrate or silicon thin film and the distribution of the etching rate. Has been.

  The present invention has been made in view of such a conventional problem, and an object of the present invention is to suppress a positional deviation of a pattern due to a change in warping of a substrate during a manufacturing process, and to reduce the influence of thermal distortion. An object of the present invention is to provide a stencil mask with high transfer accuracy during exposure by the above method.

In order to achieve the above object in the present invention, first, the first invention of the present invention is to attach two substrates through an intermediate layer, and form a transmission hole for a charged beam on one of the substrates. A method for manufacturing a stencil mask in which an opening is formed in the other substrate at a position corresponding to the above , wherein the warpage of the substrate by the intermediate layer is prevented on the surface opposite to the intermediate layer side of the other substrate. Forming a substrate warpage prevention film for forming a charge beam transmission hole in one substrate and forming an opening in the other substrate at a position corresponding to the transmission hole. And a method for manufacturing a stencil mask.

Further, the second invention of the present invention is that the substrate warpage prevention film is such that a value obtained by multiplying the internal stress and thickness of the substrate warpage prevention film is equal to a value obtained by multiplying the internal stress and thickness of the intermediate layer. The stencil mask manufacturing method according to claim 1, wherein:

According to a third aspect of the present invention, in the method for producing a stencil mask according to claim 1 or 2, wherein the substrate warpage preventing film is formed by the same thin film forming method as the intermediate layer. is there.

The fourth aspect of the present invention, the substrate is a method for producing a stencil mask according to claims 1 3 in one or Re without noise, which is a silicon substrate.

The fifth aspect of the present invention, the intermediate layer is a method for producing a stencil mask according to claims 1 4 in one or Re without noise, which is a silicon oxide film.

  As described above in detail, according to the stencil mask of the present invention, by providing the substrate warpage prevention film on the surface opposite to the intermediate layer side of the substrate where the opening is formed, the intermediate layer and the substrate warp are provided. The internal stresses of the prevention film cancel each other, the occurrence of substrate warpage during the stencil mask manufacturing process is suppressed, the thermal distortion during transfer on the wafer is reduced by the charged beam reduction transfer device, and the stencil mask pattern is reduced. The positional accuracy and the transfer accuracy are improved.

  In addition, by controlling the value obtained by multiplying the internal stress and thickness of the substrate warpage prevention film to be equal to the value obtained by multiplying the internal stress and thickness of the intermediate layer, more accurate substrate warpage can be prevented. Become.

  Furthermore, the substrate warpage prevention film can be formed more accurately and relatively easily by using the substrate warpage prevention film formed by the same thin film forming method as that of the intermediate layer.

  Hereinafter, an embodiment will be described in detail by taking a stencil mask of the present invention as an example when a silicon substrate is used as a substrate and a silicon oxide film is used as an intermediate layer, but the embodiments can be implemented without departing from the scope of the claims. is there.

  FIG. 1 is a cross-sectional view showing an example of the structure of the stencil mask of the present invention, and FIG. 2 is a process cross-sectional view of two different examples of the manufacturing process of the stencil mask of the present invention. The silicon substrate 3 is manufactured by using a member in which a silicon substrate warpage preventing film 4 is formed on the surface opposite to the bonding surface with the silicon thin film 1. FIG. 1A shows the basic configuration of the stencil mask of the present invention when wet etching is employed in the back etching process, and FIG. 1B shows the conductive property on both sides of the stencil mask of FIG. A stencil mask having a film. FIG. 1 (c) shows the basic configuration of the stencil mask of the present invention when the dry etching method is employed in the back etching process, and FIG. 1 (d) shows the conductive on both sides of the stencil mask of FIG. 1 (c). A stencil mask having a film. In any case, the internal stress of the silicon oxide film and the silicon substrate warpage prevention film cancel each other by providing the silicon substrate warpage prevention film on the surface opposite to the bonding surface of the silicon substrate to the silicon thin film. Thus, warpage of the silicon substrate can be prevented.

  Next, in order to describe the present invention in detail, the stencil mask of the present invention will be described with reference to FIG. 2, which is a process cross-sectional view of an example of the manufacturing process of the stencil mask of FIG. First, an SOI substrate in which the silicon thin film 1 and the silicon substrate 3 are bonded together through the silicon oxide film 2 is prepared (see FIG. 2A). Here, the silicon oxide film 2 is formed by thermal oxidation, and its thickness is in the range of 0.2 μm to 1 μm.

  Here, the reason why the thickness of the silicon oxide film 2 is set in the range of 0.2 μm to 1 μm will be described. As described above, it is desirable that the silicon oxide film 2 is thin. However, a certain amount of thickness is necessary to realize a good bonding state, and the lower limit is estimated to be about 0.02 μm from literature (Takao Abe, Kiyoshi Mitani, Yasuaki Nakazato: Applied Physics 11, p.1080 (1994)). As is well known, the magnitude of substrate warpage due to changes in internal stress of the thin film is proportional to the thickness of the thin film. Therefore, if the thickness of the silicon oxide film 2 which was 1 μm in the past is 0.02 μm, the warpage of the substrate becomes 1/50, and a pattern for producing a stencil mask and using a stencil mask is obtained. The accuracy is greatly improved.

  On the other hand, in the back etching of the silicon substrate 3 and the dry etching of the silicon thin film 1 which are the next steps, a so-called selection ratio (selection ratio = (selection ratio = ( The silicon oxide film is used as an etching stop layer under the condition that (silicon etching rate) / (silicon oxide film etching rate)) increases. However, the silicon substrate 3 and the silicon thin film 1 are not only distributed in thickness but also added to the distribution of etching. In practice, the etching of the silicon is finished and reaches the surface of the silicon oxide film 2. There are places where the etching of silicon has not finished yet. In order to finish the etching of the portion where the etching of silicon has not been completed, the etching time may be increased by that amount. However, the portion that has already reached the silicon oxide film 2 is etched to some extent. Therefore, it is necessary to secure the minimum thickness of the silicon oxide film 2 in consideration of the thickness distribution of the silicon oxide film 2 and the etching distribution of silicon. In particular, in the back etching process of the silicon substrate 3 having a thickness of 500 μm or more, depending on the method and conditions, the selection ratio in the wet method using a KOH aqueous solution is about 100, and the dry etching method is used. The selection ratio is about 20, and the silicon oxide film 2 needs to have a thickness of 0.2 μm or more, especially considering the etching distribution when the dry etching method is adopted.

Next, a silicon substrate warpage preventing film 4 is formed on the surface of the silicon substrate 3 opposite to the bonding surface with the silicon thin film 1 to form a member for producing the stencil mask of the present invention (FIG. 2B). reference). Here, as a material of the silicon substrate warpage preventing film 4, silicon oxide, silicon nitride, silicon carbide, etc., metals such as chromium, tungsten, tantalum, titanium, and alloys containing these metals, or these metals or alloys and oxygen are used. , Metal compounds containing nitrogen, carbon and the like. Among these, the same silicon oxide as the silicon oxide film 2 is most preferable. The reason is that the thermal expansion coefficient can be made substantially the same as that of the silicon oxide film 2 although it depends on the thin film formation method and its conditions. As a method for forming the silicon substrate warpage preventing film 4, a thin film forming method such as a thermal oxidation method, a CVD method, a sputtering method, a vapor deposition method, or an SOG (spin on glass) method can be used. In order to control the internal stress (hereinafter referred to as σ ₄ ) of the silicon substrate warpage preventing film 4 to be the same as the internal stress (hereinafter referred to as σ ₂ ) of the silicon oxide film 2, the same thin film forming method as the silicon oxide film 2 is used. It is preferable to adopt the same formation conditions. More preferably, in the manufacturing process of the SOI substrate, the silicon substrate on which the silicon oxide film is formed by thermal oxidation at a temperature of about several hundreds of degrees Celsius and the silicon substrate 3 are placed at a temperature of about 1000 degrees Celsius via the silicon oxide film. Before the silicon substrate on which the silicon oxide film 2 is bonded and bonded to each other by thermal fusion is cut into a thickness of several tens of microns (μm), the silicon substrate 3 is formed by the same thermal oxidation as the method of forming the SiO ₂ layer 2. A silicon substrate warpage prevention film 4 made of a silicon oxide film may be formed on the back surface and prepared as a member (see FIG. 2B) for producing the stencil mask of the present invention. At this time, if the thickness of the silicon substrate warpage preventing film 4 (hereinafter referred to as T ₄ ) and the thickness of the silicon oxide film 2 (hereinafter referred to as T ₂ ) are made the same, σ ₄ · T ₄ = σ ₂ · T ₂ , which is a problem in producing a stencil mask with good pattern accuracy, and in the accuracy with which the pattern formed on the stencil mask is reduced by a charged beam reduction transfer device and transferred onto a wafer. Enter the area without.

When the material and formation method of the silicon substrate warpage prevention film 4 are different from those of the silicon oxide film 2, the formation method of each film and the internal stress control method according to the conditions are examined in advance, and the σ ₄ · T ₄ value is Internal stress and thickness are set to be the same as the σ ₂ · T ₂ value. At the same time, the change in the internal stress of each film when the temperature is raised from room temperature (23 ° C.) to about several hundred ° C. or 1000 ° C. is examined. In general, the change in the internal stress of the thin film due to the difference in thermal expansion coefficient between the thin film and the substrate is proportional to the temperature, but the change in the internal stress due to other factors is related to the temperature. This is because the physical properties of the thin film may change due to heat in many cases. Specifically, the internal stress of the thin film may be due to a difference in thermal expansion coefficient between the substrate due to a heterogeneous structural defect in the thickness direction and the substrate. The former inhomogeneous structural defect is frozen in the process of recovering to the thermal equilibrium state during the thin film formation process, so if heat above the temperature at the time of formation is applied, the structural defect part of the thin film results in relaxation. In particular, the internal stress of the thin film changes. The degree greatly depends on the formation conditions of the thin film (for example, Technical Information Institute: Measurement / Evaluation of Thin Film Materials, p. 63 (1991)).

In the process of forming the silicon oxide film 2 and the process of forming the silicon substrate warp prevention film 4, even if the formation conditions are strictly controlled, the internal stress and thickness vary. Therefore, even if the film is formed so that σ ₄ · T ₄ = σ ₂ · T ₂ , there are strictly certain ranges for the σ ₄ · T ₄ value and the σ ₂ · T ₂ value. For example, when σ ₂ = 190 MPa and T ₂ = 0.2 μm, the σ ₂ · T ₂ value is 38 MPa · μm, but σ ₂ and T ₂ each include variations in film formation and variations in measurement. Assuming that these variations are in the range of the average value ± 5%, the σ ₂ · T ₂ value in the case of T ₂ = 0.2 μm is in the range of about 34 MPa · μm to about 42 MPa · μm, and T _{When 2} = 1 μm, the σ ₂ · T ₂ value is in the range of about 170 MPa · μm to about 210 MPa · μm. On the other hand, the same variation also exists in the σ ₄ · T ₄ value. Therefore, in the present invention, when the silicon substrate warpage preventing film 4 is formed so that the σ ₄ · T ₄ value is equal to the σ ₂ · T ₂ value, the σ ₂ · T ₂ value varies within the range of σ ₂ · T _{2. 4} · T This means that the average value of the dispersion of the _four values is included, but the value obtained by multiplying the internal stress and the thickness generally has a variation in the range of about ± 10% of the average value. In this case, as a result, the warpage of the substrate is suppressed to a good value of less than 10 μm.

  Next, a resist layer is applied to the surface of the silicon thin film 1, and a resist pattern for forming a charged beam transmission hole 9 is formed by means such as electron beam lithography using an electron beam mask drawing apparatus. After the silicon thin film 1 is etched as a mask by known dry etching, the resist pattern is peeled off by a method such as ashing using a stripping solution such as an organic solvent or oxygen plasma (FIG. 2C). )reference).

  Next, a silicon nitride film is formed on the entire back side and front side of the SOI substrate having the silicon thin film pattern 1a as an etching protective film 5 in back etching for forming the opening 8 in a later step by a low pressure CVD method or the like. (See FIG. 2 (d)). Thereafter, a resist pattern is formed by photolithography, and the etching protection film 5 and the silicon substrate warpage prevention film 4 are continuously etched by a known dry etching or the like using the resist pattern as a mask. An etching protection film pattern 5a and a silicon substrate warpage prevention film pattern 4a are formed (see FIG. 2E).

  Next, using the etching protection film pattern 5a as a mask, the silicon substrate 3 is back-etched with a 90 ° C. aqueous KOH solution to form the opening 8, and the silicon oxide film 2 exposed in the opening is subsequently subjected to buffered hydrofluoric acid treatment or the like. Remove with. Here, in the stencil mask of the present invention, the silicon substrate warpage preventing film pattern 4a is left. Thereafter, the etching protection film pattern 5a is peeled off with hot phosphoric acid or the like to complete the stencil mask of the present invention having the penetrating hole 9 for the penetrating charged beam (see FIG. 2 (f)).

  Thereafter, in order to enhance the electrical conductivity and thermal conductivity of the stencil mask as necessary, gold having a thickness of several hundred angstroms to several thousand angstroms is applied to both the front and back surfaces of the stencil mask shown in FIG. By forming the conductive film 7 as a material, the stencil mask with the conductive film of the present invention is completed. (See FIG. 2 (g)). In order to enhance the adhesion of the conductive film 7, a titanium film or the like having a thickness of several angstroms may be formed on the base by a known DC magnetron sputtering method or the like.

  Next, the steps of the preceding back etching method will be described below. First, a substrate having a silicon substrate warpage prevention film 4 formed on the back surface of the silicon substrate 3 is prepared (see FIG. 2B), and an etching protective film 5 at the time of back etching is formed on the entire back surface side and front surface side of the substrate. (See FIG. 3C ′). Thereafter, a resist pattern is formed by photolithography, and the etching protection film 5 and the silicon substrate warpage preventing film 4 are etched by known dry etching using the resist pattern as a mask to provide an etching protection that serves as a mask during back etching. A film pattern 5a and a silicon substrate warpage prevention film pattern 4a are formed (see FIG. 2D ').

  Next, the silicon substrate 3 is back-etched with an aqueous KOH solution, and the silicon oxide film 2 on the opening surface is etched away by buffered hydrofluoric acid treatment or known dry etching. Here, in the stencil mask of the present invention, the silicon substrate warpage preventing film pattern 4a is left. Next, the etching protection film pattern 5a is peeled off with phosphoric acid to produce a back-etched stencil mask substrate (see FIG. 2 (e ')).

  Next, a resist layer is applied to the surface of the silicon thin film 1, and a resist pattern for forming a charged beam transmission hole 9 is formed by means such as electron beam lithography using an electron beam mask drawing apparatus. As a mask, the silicon thin film 1 is etched by known dry etching and penetrated, and then the resist pattern is peeled off by a method such as ashing using a stripping solution such as an organic solvent or oxygen plasma, and the penetrating hole 9 for the penetrating charged beam is formed. The stencil mask of the present invention is completed (see FIG. 2 (f)). Thereafter, a conductive film 7 may be formed on both the front and back surfaces of the stencil mask as necessary to form a stencil mask with a conductive film (see FIG. 2G).

The dry etching of the etching protection film 5 made of a silicon nitride film and the silicon substrate warpage prevention film 4 uses a mixed gas mainly composed of a fluorocarbon gas (CF ₄ , CHF ₃ , C ₂ F _6, etc.) as an etching gas. it can. Examples of the dry etching apparatus include those using a discharge method such as RIE, ECR, ICP, microwave, helicon wave, and NLD.

Further, in the case of dry etching of the silicon thin film 1, if the resist has insufficient etching resistance, a silicon nitride film, a silicon oxide film, a silicon carbide film, etc., a metal such as chromium, tungsten, tantalum, or titanium, or these metals A thin film made of an alloy containing or a metal compound containing these metals or alloys and oxygen, nitrogen, carbon, or the like may be used as an etching mask. These etching masks can be formed by a known thin film forming method. At this time, it is preferable to form the film under the condition that the internal stress of the thin film serving as an etching mask is minimized. The dry etching of the silicon thin film 1 is performed by using a mixed gas mainly containing a fluorine-based gas (CF _4, C ₄ F ₈ , SF _6, etc.), a mixed gas mainly containing a chlorine-based gas (Cl ₂ , SiCl _4, etc.), bromine A mixed gas or the like mainly containing a system gas (HBr or the like) can be used in consideration of the resistance of the material of the etching mask. Examples of the dry etching apparatus include those using a known discharge method such as RIE, ECR, ICP, microwave, helicon wave, and NLD.

  The stencil mask according to the present invention shown in FIG. 1B has been described with reference to FIG. 2 which is a cross-sectional view of the manufacturing process, and the stencil mask of the present invention is shown in FIGS. It can also be produced using a process of forming an opening in a silicon substrate by dry etching as shown in d). Also in this case, either the silicon thin film 1 or the silicon substrate 3 may be etched first, and the step of forming an etching protective film on the entire surface of the substrate becomes unnecessary as compared with the case where the silicon substrate is wet-etched. . The dry etching of the silicon substrate can be performed with the same apparatus and etching conditions as the dry etching of the silicon substrate described in the manufacturing process when the silicon substrate is wet etched.

  Hereinafter, the present invention will be described in more detail based on examples.

A silicon thin film 1 having a thickness of 20 μm and a silicon substrate 3 having a thickness of 500 μm are bonded to each other through a silicon oxide film 2 having a thickness of 0.5 μm formed by a thermal oxidation method. An SOI substrate having a diameter of 100 mm on which a silicon substrate warpage preventing film 4 made of SiO ₂ having a thickness of 0.5 μm formed by the same thermal oxidation method as that of the silicon oxide film 2 is prepared (see FIG. 2B). . The value obtained by multiplying the internal stress and the film thickness of the silicon oxide film 2 at this time is about 130 MPa · μm, and the value obtained by multiplying the internal stress and the film thickness of the silicon substrate warpage preventing film 4 is about 140 MPa · μm, The warpage of the SOI substrate was less than 10 μm.

  Next, a resist pattern was formed on the silicon thin film 1 by a normal electron beam lithography process. Next, using the resist pattern as a mask, the silicon thin film 1 was dry-etched with an ICP dry etching apparatus using a fluorocarbon-based mixed gas, and then the remaining resist pattern was removed with an organic solvent to form a pattern. A silicon thin film 1a was formed (see FIG. 2C).

Next, a silicon nitride film serving as the back etching protection film 5 was formed on the entire front and back surfaces of the substrate having the silicon thin film pattern 1a. The silicon nitride film was formed at a temperature of 850 ° C. by a low pressure CVD method using a mixed gas composed of dichlorosilane gas and ammonia gas (see FIG. 2D). At this time, although the substrate is exposed to a high temperature of 850 ° C., when the change in the warp of the substrate is confirmed in advance by an apparatus capable of measuring the change in the warp of the substrate while being heated, the silicon oxide film 2 and the back surface of the silicon substrate 3 are observed. Since the silicon substrate warpage preventing film 4 made of the same SiO ₂ is formed, the amount of change in the warpage of the substrate is less than 10 μm at the maximum.

Thereafter, a resist pattern is formed on the silicon nitride film on the back surface of the silicon substrate 3 by a normal photolithography method, and the silicon substrate warp prevention film made of the silicon nitride film and SiO _{2 is} mixed with a fluorocarbon-based mixture using the resist pattern as a mask. After dry etching with a gas RIE apparatus, the remaining resist pattern was removed by ashing with oxygen plasma to form a silicon substrate warpage prevention film pattern 4a similar to the etching protection film pattern 5a (FIG. 2E). reference).

  Next, using the etching protective film pattern 5a as a mask, the silicon substrate 3 was back-etched with a 30 wt% KOH aqueous solution heated to 90 ° C. to form the opening 8. Thereafter, the portion of the silicon oxide film 2 exposed in the opening 8 of the silicon substrate 3 was completely removed with buffered hydrofluoric acid to form a silicon oxide film pattern 2a. Further, the etching protection film pattern 5a formed of the silicon nitride film was removed with a hot phosphoric acid solution at 100 ° C., and the stencil mask of the present invention was completed (see FIG. 2 (f) or FIG. 1 (a)). At this time, when the positional deviation from the design value of the transmission hole 9 of the charged beam of the stencil mask was measured, the positional deviation of the silicon thin film pattern 1a became much smaller than that of the conventional stencil mask, and the position of the stencil mask pattern It was confirmed that the accuracy was improved.

  Thereafter, in order to increase the electrical conductivity and thermal conductivity of the stencil mask of the present invention, the adhesion force is applied to both the front and back surfaces of the stencil mask shown in FIG. 2 (f) or FIG. 1 (a) by DC magnetron sputtering. A titanium film with a thickness of 200 angstroms is formed as a reinforcing layer on the base, and then a platinum film with a thickness of 1000 angstroms (0.1 μm) is formed to form a conductive film 7 with the conductive film of the present invention. The stencil mask was completed. (See FIG. 2 (g) or FIG. 1 (b)). At this time, the internal stress of the titanium film and the platinum film is controlled so as to be a tensile stress of less than 100 MPa, the stencil mask is not warped before and after the formation of the conductive film 7, and the sheet resistance value of the conductive film 7 Was 30Ω / □ or less.

FIG. 3 is a process cross-sectional view showing an example of a manufacturing process of a stencil mask when an opening is formed on a silicon substrate of the present invention using dry etching. As shown in FIG. 3, a silicon thin film 1 having a thickness of 2 μm and a silicon substrate 3 having a thickness of 500 μm are bonded to each other through a silicon oxide film 2 having a thickness of 1 μm formed by a thermal oxidation method. In addition, an SOI substrate having a diameter of 100 mm on which a silicon substrate warpage preventing film 4 made of SiO ₂ having a thickness of 1 μm and formed by the same thermal oxidation method as the silicon oxide film 2 as a bonding layer was prepared (FIG. 3A). )reference). The value obtained by multiplying the internal stress and the film thickness of the silicon oxide film 2 at this time is approximately 250 MPa · μm, and the value obtained by multiplying the internal stress and the film thickness of the silicon substrate warpage preventing film 4 is approximately 250 MPa · μm, The warpage of the substrate was less than 10 μm.

Next, a resist pattern 10 is formed on the surface of the silicon substrate 3 by a normal photolithography method, and the silicon substrate warpage prevention film made of SiO _{2 is formed} by an RIE apparatus using a fluorocarbon-based mixed gas using the resist pattern as a mask. Dry etching was performed to form a silicon substrate warpage prevention film pattern 4a (see FIG. 3B).

  Subsequently, using the resist pattern 10 and the silicon substrate warpage prevention film pattern 4a as a mask, the silicon substrate 3 was back-etched by an ICP dry etching apparatus using a fluorocarbon-based mixed gas to form an opening 8. At this time, although the film thickness of the resist pattern 10 decreased, the silicon substrate warpage preventing film pattern 4a was not exposed. In addition, when all the portions forming the opening 8 of the silicon substrate 3 were completely etched, the silicon oxide film 2 having a thickness of 1 μm sufficiently played a role as an etching stop layer. At this time, the cross section of the etched silicon substrate 3a 'was almost vertical. Thereafter, the resist pattern 10 is removed by ashing with oxygen plasma, and then the silicon oxide film 2 exposed in the opening 8 of the silicon substrate 3a ′ is completely removed by etching with buffered hydrofluoric acid, whereby the silicon oxide film pattern 2a is removed. It formed (refer FIG.3 (c)).

  Next, a resist pattern was formed on the silicon thin film 1 by a normal electron beam lithography process. Next, using the resist pattern as a mask, the silicon thin film 1 is dry-etched by an ICP etching apparatus using a fluorocarbon-based mixed gas to form a charged beam transmission hole 9, and the remaining resist pattern is removed with an organic solvent. Then, a patterned silicon thin film 1a was formed to complete the stencil mask of the present invention (see FIG. 3D or FIG. 1C). At this time, the positional deviation from the design value of the charged beam transmission hole 9 of the stencil mask was remarkably reduced as compared with the conventional stencil mask, and it was confirmed that the positional accuracy of the stencil mask pattern was improved.

  Thereafter, in the same manner as in Example 1, in order to increase the electrical conductivity and thermal conductivity of the stencil mask of the present invention, the thickness of 200 angstroms as an adhesion strengthening layer was formed on both the front and back surfaces of the stencil mask by DC magnetron sputtering. The conductive film 7 was formed by forming a titanium film of 1000 nm and platinum having a thickness of 1000 angstroms (0.1 μm) to complete the stencil mask with the conductive film of the present invention. (See FIG. 3E or FIG. 1D). At this time, when the positional deviation from the design value of the transmission hole 9 of the charged beam of the stencil mask was measured, the positional deviation of the silicon thin film pattern 1a became much smaller than that of the conventional stencil mask, and the position of the stencil mask pattern It was confirmed that the accuracy was improved.

It is sectional drawing which shows the example of the structure of the stencil mask by this invention. It is process sectional drawing which shows two examples from which the manufacturing order of the stencil mask of this invention differs in process order. It is process sectional drawing which shows the manufacturing process of the stencil mask of this invention of Example 2 to process order. It is process sectional drawing which shows two examples from which the manufacturing process of the conventional stencil mask differs in process order. It is sectional drawing which shows the example of the structure of another conventional stencil mask.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 11 ... Silicon thin film 1a, 11a ... Silicon thin film pattern 2, 12 ... Silicon oxide film 2a, 12a ... Silicon oxide film pattern 3, 13 ... Silicon substrate 3a, 3a ', 13a ... Silicon substrate pattern 4 ... Silicon substrate warp prevention film 4a ... Silicon substrate warp prevention film pattern 5,15 ... Back etching protection film 5a, 15a ... Back etching protection film pattern 7,17 .... Conductive films 8, 18 ... openings 9, 19 ... charged beam transmission hole 10 ... resist pattern

Claims (5)

A method for producing a stencil mask in which two substrates are bonded together through an intermediate layer, a charged beam transmission hole is formed in one substrate, and an opening is formed in the other substrate at a location corresponding to the transmission hole. There,
Forming a substrate warpage preventing film for preventing warpage of the substrate by the intermediate layer on the surface opposite to the intermediate layer side of the other substrate;
Forming a charged beam transmission hole in one of the substrates, and forming an opening in the other substrate at a location corresponding to the transmission hole;
A method for producing a stencil mask , comprising: The substrate warpage prevention film is provided so that a value obtained by multiplying the internal stress and thickness of the substrate warpage prevention film is equal to a value obtained by multiplying the internal stress and thickness of the intermediate layer. Item 2. A method for producing a stencil mask according to Item 1. The method for manufacturing a stencil mask according to claim 1 or 2, wherein the substrate warpage preventing film is formed by the same thin film forming method as that for the intermediate layer. Method for producing a stencil mask according to claims 1 3 in one or Re without noise, wherein the substrate is a silicon substrate. The intermediate layer manufacturing method of a stencil mask according to claims 1 4 in one or Re without noise, which is a silicon oxide layer.

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