JP2001351840A - Manufacturing method of transfer mask and transfer mask - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a transfer mask and a transfer mask for charged beam exposure which is free from defect and has extremely high transfer precision, by restraining the occurrence of notching and substrate temperature rise when a transfer mask pattern is processed by dry etching by using a silicon oxide film as an etching stopper in a transfer mask manufactured by using an SOI substrate which is formed by laminating two single crystalline silicon wafers by a silicon oxide film. SOLUTION: The manufacturing method of a transfer mask is provided with at least a process for forming an opening in a lower single crystalline silicon wafer which becomes a support substrate, thereafter removing the silicon oxide film, then forming a conductive film at least in a surface of an upper single crystalline silicon wafer facing the opening, and thereafter forming a transfer mask pattern in an upper single crystalline silicon wafer. A transfer mask is manufactured by the method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a transfer mask used for exposure to a charged beam such as an electron beam or an ion beam, and a method of manufacturing the transfer mask.

[0002]

2. Description of the Related Art Fine circuits and structures typified by patterns of semiconductor integrated circuits are still being miniaturized, and the complexity of the patterns tends to further increase. In order to cope with this, in recent years, pattern formation by charged beam exposure has attracted attention, and two single crystal silicon wafers having a plane orientation of (100) are bonded to a transfer mask for the charged beam exposure with a silicon oxide film. SOI (Silico
n on Insulator: Structure of silicon / silicon oxide film / silicon) A substrate is often used.

[0003] Manufacturing processes of a transfer mask can be roughly classified into a process of forming a transfer mask pattern on an upper single-crystal silicon wafer and a process of forming an opening in a lower single-crystal silicon wafer serving as a silicon support substrate. Can be When a transfer mask pattern is formed on the upper single-crystal silicon wafer, the etching selectivity between the upper single-crystal silicon wafer 1 and the silicon oxide film 3 is usually used to form the silicon oxide film 3 as shown in FIG. Was used as an etching stopper to form a transfer mask pattern.

However, as shown in FIG. 2, when the etching reaches the silicon oxide film 3 and the silicon oxide film 3 serving as the insulating film is exposed, the silicon oxide film 3 is charged up by the incident cations 20 and is subsequently charged. A phenomenon in which the trajectory of the cations 20 incident from the substrate is bent near the bottom of the pattern and etching progresses in the lateral direction, that is, so-called notching occurs.

In the vicinity of the fine pattern, the electrons are decelerated by the negative potential from below the lower single-crystal silicon wafer and are captured in the vicinity of the resist 8.
0 is guided to the negative potential and reaches the bottom of the pattern. As a result, charge separation occurs between the resist and the pattern bottom as shown in FIG.
The trajectory of 0 is bent. When notching as described above occurs, in the current situation where patterns are being miniaturized, notching proceeds to an adjacent pattern, causing a problem that the pattern is destroyed.

In order to suppress this notching, ultra-fine processing technology (by Tokuyama Wei, edited by Ohmsha) requires a thicker side wall protective film in order to suppress the arrival of ions whose orbits are bent to reach the side wall. It is stated that lowering the plasma density is effective. However, in the future, if the pattern is further miniaturized and the pattern groove becomes narrower, it becomes more difficult to form the side wall protective film, and the charge separation will appear more remarkably.
Further, as the pattern becomes finer, the requirements for dimensional accuracy become stricter, and deformation of the resist due to a rise in the temperature of the substrate to be processed during dry etching has become a problem.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and its object is to
In a transfer mask manufactured using an SOI substrate in which two single-crystal silicon wafers are bonded with a silicon oxide film, notch generation and substrate temperature when processing the transfer mask pattern by dry etching using the silicon oxide film as an etching stopper. An object of the present invention is to provide a method of manufacturing a transfer mask for charged beam exposure, which has no defects and has extremely high transfer accuracy by suppressing the rise, and a transfer mask.

[0008]

According to the present invention, there is provided an SOI in which two single-crystal silicon wafers are bonded with a silicon oxide film.
In a method of manufacturing a transfer mask using a substrate, an opening is formed in a lower single crystal silicon wafer serving as a support substrate, the silicon oxide film is removed, and then at least an upper single crystal facing the opening is formed. A method for manufacturing a transfer mask, comprising at least a step of forming a transfer mask pattern on an upper single-crystal silicon wafer after forming a conductive film on a surface of a silicon wafer.

In the present invention, the conductive film contains at least one of aluminum, titanium, chromium, nickel, copper, zirconium, niobium, molybdenum, palladium, silver, tantalum, tungsten, osmium, platinum, and gold. The method for manufacturing a transfer mask according to claim 1, wherein:

The present invention also relates to a transfer mask using an SOI substrate in which two single crystal silicon wafers are bonded with a silicon oxide film, wherein a lower single crystal silicon wafer is formed before forming a transfer mask pattern on the upper single crystal silicon wafer. A transfer mask for removing a silicon oxide film facing an opening of a wafer and forming a conductive film on at least a lower surface of an upper single crystal silicon wafer facing the opening.

In the present invention, the conductive film contains at least one of aluminum, titanium, chromium, nickel, copper, zirconium, niobium, molybdenum, palladium, silver, tantalum, tungsten, osmium, platinum, and gold. The transfer mask according to claim 3, wherein:

A feature of the present invention is that an opening is formed in a lower single crystal silicon wafer serving as a support substrate, the silicon oxide film is removed, and then at least an upper single crystal silicon wafer facing the opening is formed. Forming a transfer mask pattern on the upper single-crystal silicon wafer after forming the conductive film on the surface. This allows
By using a conductive film as an etching stopper for dry etching of the upper single-crystal silicon wafer, charge-up of the etching stopper, which causes notching, can be reduced. In addition, by bringing the conductive film into contact with the substrate holder of the etching apparatus, a rise in the temperature of the upper single crystal silicon wafer during dry etching can be suppressed.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a transfer mask and a transfer mask according to the present invention will be described based on the embodiments. 1A to 1F are explanatory views showing a partial cross section of an example of a method for manufacturing a transfer mask according to the present invention. First,
As shown in FIG. 1A, an SOI substrate 4 in which two single crystal silicon wafers 1 and 2 are bonded with a silicon oxide film 3
A wet etching protection film 5 is formed on the entire surface of the lower single crystal silicon wafer 2 by dry etching using a resist (not shown).
Then, an opening pattern 6 is formed.

Next, as shown in FIG. 1B, using the wet etching protection film 5 in which the opening pattern 6 is formed as an etching mask, etching is performed by wet etching until the silicon oxide film 3 is reached. An opening 6a is formed in the silicon wafer 2. Here, FIG.
Although wet etching was used as a method for forming the opening 6a in the lower single-crystal silicon wafer 2, dry etching, ultrasonic processing, sand blasting, and the like may be used instead.

Subsequently, as shown in FIG. 1C, after removing the etching protection film, the lower single crystal silicon wafer 2 is removed.
The silicon oxide film 3 exposed in the opening 6a is removed by wet etching, and one surface of the upper single crystal silicon wafer is exposed in the opening 6a. Next, as shown in FIG. 1D, a conductive film 7 is formed on the surface facing the opening 6a and the bottom surface of the lower single crystal silicon wafer 2a in which the opening 6a is formed.
Then, on the upper single-crystal silicon wafer 1 side,
A resist 8 having a transfer mask pattern 9 formed thereon is provided.
This conductive film 7 may be formed at least on the surface of the upper single crystal silicon wafer facing opening 6a.

The conductive film 7 is made of aluminum, titanium, chromium, nickel, copper, zirconium, niobium, molybdenum, palladium, silver, tantalum, tungsten, osmium, platinum, gold, an alloy containing these metals, or an alloy containing these metals. A metal compound of a metal or alloy with oxygen, nitrogen, carbon, or the like can be used. As a method for forming the conductive film, a sputtering method, a CVD method, an evaporation method, a plating method, an electrodeposition method, an ion plating method, or the like can be used. In order to form the transfer mask pattern 9 on the resist 8, it is possible to suitably use electron beam direct writing using an electron beam resist, stepper exposure using a photoresist, or the like.

Next, as shown in FIG. 1E, the transfer mask pattern 9 is formed by dry etching using the resist 8 on which the transfer mask pattern 9 is formed as an etching mask.
Is formed on the upper single crystal silicon wafer. Here, when the upper single crystal silicon wafer is dry-etched, if the resistance of the resist is insufficient, a silicon oxide film,
Inorganic substances such as silicon nitride film and silicon carbide film, metals such as chromium, tungsten, tantalum, titanium, nickel and aluminum, alloys containing these metals, and metals such as these metals or alloys with oxygen, nitrogen and carbon A compound or the like is used as an etching mask. These etching masks can be formed by various thin film forming methods. For example, there is a forming method such as a sputtering method, a CVD method, and a vapor deposition method.

The dry etching method and conditions are not particularly limited. Examples of the gas used for etching include a mixed gas mainly composed of a fluorine-based gas such as SF ₆ gas and CF ₄ gas, a mixed gas mainly composed of a chlorine-based gas such as Cl ₂ gas and SiCl ₄ gas, and a bromine such as HBr gas. A mixed gas mainly composed of a system gas may be used. In addition, RIE, magnetron RIE, ECR, IC
A dry etching apparatus using a discharge method such as P, microwave, helicon wave, and NLD is used.

Next, as shown in FIG. 1F, the conductive film 7 and the resist 8 of the etching mask are removed to obtain a transfer mask 10 of the present invention. Here, only the portion of the conductive film 7 corresponding to the transfer pattern 9 is etched and penetrated,
Other portions may be left as a part of the antistatic conductive film 11 without being removed.

Finally, as shown in FIG. 1 (g), an antistatic conductive film 11 is formed on the front and back surfaces and side surfaces of the transfer mask 10 by a plasma film forming method, a sputtering method or the like. The formed transfer mask 10a of the present invention is obtained.
The antistatic conductive film 11 may be the same as that used for the conductive film 7, and the film formation method is the same. Here, the antistatic conductive film 11 is formed, but this is not essential and may be formed as needed.

[0021]

EXAMPLES The present invention will be described in detail with reference to specific examples. <Embodiment 1> FIGS. 1A to 1F are explanatory views showing an example of a method for manufacturing a transfer mask according to the present invention in partial cross section. First, as shown in FIG.
0) and an upper single-crystal silicon wafer 2 comprising a silicon oxide film 3
An OI (Silicon on Insulator) substrate 4 is prepared, and then C
A silicon nitride film is formed as a wet etching protection film 5 on both sides of the SOI substrate 4 by VD, and an opening is formed in the silicon nitride film of the wet etching protection film 5 on the lower single crystal silicon wafer 2 side by dry etching using a resist as an etching mask. Part pattern 6 was produced.
(See Fig. 1 (a))

Next, using the silicon nitride film of the wet etching protection film 5 as an etching mask, the lower single crystal silicon wafer 2 is subjected to wet etching using a heated potassium hydroxide solution until the lower single crystal silicon wafer 2 reaches the silicon oxide film 3. 6a was formed. (See FIG. 1 (b))

Next, the silicon nitride film of the wet etching protection film 5 is removed by etching with hot phosphoric acid at about 170 ° C.
Subsequently, the silicon oxide film 3 exposed at the opening 6a was removed by wet etching using a hydrofluoric acid aqueous solution. (Figure 1
(See (c))

Next, a Cr film 7 as a conductive film is formed on the surface facing the opening 6a by sputtering and on the bottom surface of the lower single-crystal silicon wafer 2a in which the opening 6a is formed.
The upper single-crystal silicon wafer 1 is deposited on the conductive film 7 using the resist 8 on which the transfer mask pattern 9 is patterned as an etching mask.
Dry etching was performed until the film reached the film, and a transfer mask pattern 9 was formed on the upper single-crystal silicon wafer. (Figure 1
(See (d) and (e))

Next, the resist 8 and the Cr film of the conductive film 7 were removed, and the transfer mask pattern 9 was penetrated to obtain a transfer mask 10. (See FIG. 1 (f)). Finally, tantalum was deposited as an antistatic conductive film 11 using an electron beam evaporation apparatus to a thickness of about 1000 angstroms, thereby obtaining a transfer mask 10a for charged beam exposure according to the present invention. (FIG. 1 (g)
As described above, the notch phenomenon and the deformation of the resist due to the temperature rise of the upper single-crystal silicon wafer were not observed in the manufactured transfer mask, and a transfer mask having good pattern accuracy was obtained.

[0026]

As described above, according to the method of manufacturing a transfer mask of the present invention, in the step of preparing a transfer pattern onto an upper single-crystal silicon wafer by dry etching of a transfer mask for charged beam exposure, By forming a conductive film instead of a silicon oxide film as an etching stopper on a base of a silicon wafer, charge-up of the etching stopper during dry etching is reduced, and an effect of suppressing occurrence of notching is exerted. In addition, heat generated in the upper single crystal silicon wafer during dry etching is easily transmitted to the substrate holder of the dry etching apparatus via the conductive film, thereby suppressing the temperature rise of the upper single crystal silicon wafer and deforming the resist due to heat. Is also exerted. Therefore, a transfer mask having a transfer pattern with excellent dimensional accuracy can be stably manufactured. Further, according to the transfer mask of the present invention, there is an effect that the transfer mask pattern of the upper single crystal silicon wafer is of high quality without being destroyed by dry etching.

[Brief description of the drawings]

FIGS. 1A to 1F are explanatory views showing a partial cross section of an example of a method for manufacturing a transfer mask according to the present invention.

FIG. 2 is an explanatory view showing a partial cross section of a notching phenomenon that occurs in a conventional process of dry etching an upper single crystal silicon wafer.

FIG. 3 is an explanatory view showing, in partial cross section, a conventional process of dry-etching an upper single-crystal silicon wafer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Upper single-crystal silicon wafer 1a ... Upper single-crystal silicon wafer with transfer mask pattern formed 2 ... Lower single-crystal silicon wafer 2a ... Lower single-crystal silicon wafer with opening formed 3 ... Silicon oxide film 3a ... Silicon oxide film with opening formed 4 ... SOI substrate 5 ... Wet etching protective film 6 ... Opening pattern 6a ... Opening 7 ... Conductive film 8: Resist on which transfer mask pattern is formed 9: Transfer mask pattern 10: Transfer mask 10a: Transfer mask on which antistatic conductive film is formed 11: Conductive for antistatic Membrane 20 ・ ・ ・ Cation

Claims (4)

[Claims] In a method for manufacturing a transfer mask using an SOI substrate in which two single crystal silicon wafers are bonded with a silicon oxide film, an opening is formed in a lower single crystal silicon wafer serving as a support substrate. Removing the silicon oxide film, and then forming at least a step of forming a transfer mask pattern on the upper single-crystal silicon wafer after forming a conductive film on the surface of the upper single-crystal silicon wafer facing the opening; A method for manufacturing a transfer mask. 2. The method according to claim 1, wherein the conductive film contains at least one of aluminum, titanium, chromium, nickel, copper, zirconium, niobium, molybdenum, palladium, silver, tantalum, tungsten, osmium, platinum, and gold. The method for producing a transfer mask according to claim 1. 3. A transfer mask using an SOI substrate in which two single-crystal silicon wafers are bonded with a silicon oxide film, before forming a transfer mask pattern on an upper single-crystal silicon wafer, an opening in a lower single-crystal silicon wafer. A transfer mask for removing a silicon oxide film facing the opening and forming at least a conductive film on a lower surface of the upper single crystal silicon wafer facing the opening. 4. The method according to claim 1, wherein the conductive film contains at least one of aluminum, titanium, chromium, nickel, copper, zirconium, niobium, molybdenum, palladium, silver, tantalum, tungsten, osmium, platinum, and gold. The transfer mask according to claim 3, wherein